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-rw-r--r--src/UnwindRegistersSave.S337
1 files changed, 171 insertions, 166 deletions
diff --git a/src/UnwindRegistersSave.S b/src/UnwindRegistersSave.S
index 48ecb0aec70f..54505e53bac7 100644
--- a/src/UnwindRegistersSave.S
+++ b/src/UnwindRegistersSave.S
@@ -1,9 +1,8 @@
//===------------------------ UnwindRegistersSave.S -----------------------===//
//
-// The LLVM Compiler Infrastructure
-//
-// This file is dual licensed under the MIT and the University of Illinois Open
-// Source Licenses. See LICENSE.TXT for details.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
@@ -16,7 +15,7 @@
#if defined(__i386__)
#
-# extern int unw_getcontext(unw_context_t* thread_state)
+# extern int __unw_getcontext(unw_context_t* thread_state)
#
# On entry:
# + +
@@ -27,7 +26,7 @@
# +-----------------------+ <-- SP
# + +
#
-DEFINE_LIBUNWIND_FUNCTION(unw_getcontext)
+DEFINE_LIBUNWIND_FUNCTION(__unw_getcontext)
push %eax
movl 8(%esp), %eax
movl %ebx, 4(%eax)
@@ -57,12 +56,12 @@ DEFINE_LIBUNWIND_FUNCTION(unw_getcontext)
#elif defined(__x86_64__)
#
-# extern int unw_getcontext(unw_context_t* thread_state)
+# extern int __unw_getcontext(unw_context_t* thread_state)
#
# On entry:
# thread_state pointer is in rdi
#
-DEFINE_LIBUNWIND_FUNCTION(unw_getcontext)
+DEFINE_LIBUNWIND_FUNCTION(__unw_getcontext)
#if defined(_WIN64)
#define PTR %rcx
#define TMP %rdx
@@ -119,12 +118,12 @@ DEFINE_LIBUNWIND_FUNCTION(unw_getcontext)
#elif defined(__mips__) && defined(_ABIO32) && _MIPS_SIM == _ABIO32
#
-# extern int unw_getcontext(unw_context_t* thread_state)
+# extern int __unw_getcontext(unw_context_t* thread_state)
#
# On entry:
# thread_state pointer is in a0 ($4)
#
-DEFINE_LIBUNWIND_FUNCTION(unw_getcontext)
+DEFINE_LIBUNWIND_FUNCTION(__unw_getcontext)
.set push
.set noat
.set noreorder
@@ -228,12 +227,12 @@ DEFINE_LIBUNWIND_FUNCTION(unw_getcontext)
#elif defined(__mips64)
#
-# extern int unw_getcontext(unw_context_t* thread_state)
+# extern int __unw_getcontext(unw_context_t* thread_state)
#
# On entry:
# thread_state pointer is in a0 ($4)
#
-DEFINE_LIBUNWIND_FUNCTION(unw_getcontext)
+DEFINE_LIBUNWIND_FUNCTION(__unw_getcontext)
.set push
.set noat
.set noreorder
@@ -318,21 +317,21 @@ DEFINE_LIBUNWIND_FUNCTION(unw_getcontext)
# elif defined(__mips__)
#
-# extern int unw_getcontext(unw_context_t* thread_state)
+# extern int __unw_getcontext(unw_context_t* thread_state)
#
# Just trap for the time being.
-DEFINE_LIBUNWIND_FUNCTION(unw_getcontext)
+DEFINE_LIBUNWIND_FUNCTION(__unw_getcontext)
teq $0, $0
#elif defined(__powerpc64__)
//
-// extern int unw_getcontext(unw_context_t* thread_state)
+// extern int __unw_getcontext(unw_context_t* thread_state)
//
// On entry:
// thread_state pointer is in r3
//
-DEFINE_LIBUNWIND_FUNCTION(unw_getcontext)
+DEFINE_LIBUNWIND_FUNCTION(__unw_getcontext)
// store register (GPR)
#define PPC64_STR(n) \
@@ -557,157 +556,157 @@ DEFINE_LIBUNWIND_FUNCTION(unw_getcontext)
#elif defined(__ppc__)
-;
-; extern int unw_getcontext(unw_context_t* thread_state)
-;
-; On entry:
-; thread_state pointer is in r3
-;
-DEFINE_LIBUNWIND_FUNCTION(unw_getcontext)
- stw r0, 8(r3)
- mflr r0
- stw r0, 0(r3) ; store lr as ssr0
- stw r1, 12(r3)
- stw r2, 16(r3)
- stw r3, 20(r3)
- stw r4, 24(r3)
- stw r5, 28(r3)
- stw r6, 32(r3)
- stw r7, 36(r3)
- stw r8, 40(r3)
- stw r9, 44(r3)
- stw r10, 48(r3)
- stw r11, 52(r3)
- stw r12, 56(r3)
- stw r13, 60(r3)
- stw r14, 64(r3)
- stw r15, 68(r3)
- stw r16, 72(r3)
- stw r17, 76(r3)
- stw r18, 80(r3)
- stw r19, 84(r3)
- stw r20, 88(r3)
- stw r21, 92(r3)
- stw r22, 96(r3)
- stw r23,100(r3)
- stw r24,104(r3)
- stw r25,108(r3)
- stw r26,112(r3)
- stw r27,116(r3)
- stw r28,120(r3)
- stw r29,124(r3)
- stw r30,128(r3)
- stw r31,132(r3)
-
- ; save VRSave register
- mfspr r0,256
- stw r0,156(r3)
- ; save CR registers
- mfcr r0
- stw r0,136(r3)
- ; save CTR register
- mfctr r0
- stw r0,148(r3)
-
- ; save float registers
- stfd f0, 160(r3)
- stfd f1, 168(r3)
- stfd f2, 176(r3)
- stfd f3, 184(r3)
- stfd f4, 192(r3)
- stfd f5, 200(r3)
- stfd f6, 208(r3)
- stfd f7, 216(r3)
- stfd f8, 224(r3)
- stfd f9, 232(r3)
- stfd f10,240(r3)
- stfd f11,248(r3)
- stfd f12,256(r3)
- stfd f13,264(r3)
- stfd f14,272(r3)
- stfd f15,280(r3)
- stfd f16,288(r3)
- stfd f17,296(r3)
- stfd f18,304(r3)
- stfd f19,312(r3)
- stfd f20,320(r3)
- stfd f21,328(r3)
- stfd f22,336(r3)
- stfd f23,344(r3)
- stfd f24,352(r3)
- stfd f25,360(r3)
- stfd f26,368(r3)
- stfd f27,376(r3)
- stfd f28,384(r3)
- stfd f29,392(r3)
- stfd f30,400(r3)
- stfd f31,408(r3)
-
-
- ; save vector registers
-
- subi r4,r1,16
- rlwinm r4,r4,0,0,27 ; mask low 4-bits
- ; r4 is now a 16-byte aligned pointer into the red zone
+//
+// extern int unw_getcontext(unw_context_t* thread_state)
+//
+// On entry:
+// thread_state pointer is in r3
+//
+DEFINE_LIBUNWIND_FUNCTION(__unw_getcontext)
+ stw %r0, 8(%r3)
+ mflr %r0
+ stw %r0, 0(%r3) // store lr as ssr0
+ stw %r1, 12(%r3)
+ stw %r2, 16(%r3)
+ stw %r3, 20(%r3)
+ stw %r4, 24(%r3)
+ stw %r5, 28(%r3)
+ stw %r6, 32(%r3)
+ stw %r7, 36(%r3)
+ stw %r8, 40(%r3)
+ stw %r9, 44(%r3)
+ stw %r10, 48(%r3)
+ stw %r11, 52(%r3)
+ stw %r12, 56(%r3)
+ stw %r13, 60(%r3)
+ stw %r14, 64(%r3)
+ stw %r15, 68(%r3)
+ stw %r16, 72(%r3)
+ stw %r17, 76(%r3)
+ stw %r18, 80(%r3)
+ stw %r19, 84(%r3)
+ stw %r20, 88(%r3)
+ stw %r21, 92(%r3)
+ stw %r22, 96(%r3)
+ stw %r23,100(%r3)
+ stw %r24,104(%r3)
+ stw %r25,108(%r3)
+ stw %r26,112(%r3)
+ stw %r27,116(%r3)
+ stw %r28,120(%r3)
+ stw %r29,124(%r3)
+ stw %r30,128(%r3)
+ stw %r31,132(%r3)
+
+ // save VRSave register
+ mfspr %r0, 256
+ stw %r0, 156(%r3)
+ // save CR registers
+ mfcr %r0
+ stw %r0, 136(%r3)
+ // save CTR register
+ mfctr %r0
+ stw %r0, 148(%r3)
+
+ // save float registers
+ stfd %f0, 160(%r3)
+ stfd %f1, 168(%r3)
+ stfd %f2, 176(%r3)
+ stfd %f3, 184(%r3)
+ stfd %f4, 192(%r3)
+ stfd %f5, 200(%r3)
+ stfd %f6, 208(%r3)
+ stfd %f7, 216(%r3)
+ stfd %f8, 224(%r3)
+ stfd %f9, 232(%r3)
+ stfd %f10,240(%r3)
+ stfd %f11,248(%r3)
+ stfd %f12,256(%r3)
+ stfd %f13,264(%r3)
+ stfd %f14,272(%r3)
+ stfd %f15,280(%r3)
+ stfd %f16,288(%r3)
+ stfd %f17,296(%r3)
+ stfd %f18,304(%r3)
+ stfd %f19,312(%r3)
+ stfd %f20,320(%r3)
+ stfd %f21,328(%r3)
+ stfd %f22,336(%r3)
+ stfd %f23,344(%r3)
+ stfd %f24,352(%r3)
+ stfd %f25,360(%r3)
+ stfd %f26,368(%r3)
+ stfd %f27,376(%r3)
+ stfd %f28,384(%r3)
+ stfd %f29,392(%r3)
+ stfd %f30,400(%r3)
+ stfd %f31,408(%r3)
+
+
+ // save vector registers
+
+ subi %r4, %r1, 16
+ rlwinm %r4, %r4, 0, 0, 27 // mask low 4-bits
+ // r4 is now a 16-byte aligned pointer into the red zone
#define SAVE_VECTOR_UNALIGNED(_vec, _offset) \
- stvx _vec,0,r4 @\
- lwz r5, 0(r4) @\
- stw r5, _offset(r3) @\
- lwz r5, 4(r4) @\
- stw r5, _offset+4(r3) @\
- lwz r5, 8(r4) @\
- stw r5, _offset+8(r3) @\
- lwz r5, 12(r4) @\
- stw r5, _offset+12(r3)
-
- SAVE_VECTOR_UNALIGNED( v0, 424+0x000)
- SAVE_VECTOR_UNALIGNED( v1, 424+0x010)
- SAVE_VECTOR_UNALIGNED( v2, 424+0x020)
- SAVE_VECTOR_UNALIGNED( v3, 424+0x030)
- SAVE_VECTOR_UNALIGNED( v4, 424+0x040)
- SAVE_VECTOR_UNALIGNED( v5, 424+0x050)
- SAVE_VECTOR_UNALIGNED( v6, 424+0x060)
- SAVE_VECTOR_UNALIGNED( v7, 424+0x070)
- SAVE_VECTOR_UNALIGNED( v8, 424+0x080)
- SAVE_VECTOR_UNALIGNED( v9, 424+0x090)
- SAVE_VECTOR_UNALIGNED(v10, 424+0x0A0)
- SAVE_VECTOR_UNALIGNED(v11, 424+0x0B0)
- SAVE_VECTOR_UNALIGNED(v12, 424+0x0C0)
- SAVE_VECTOR_UNALIGNED(v13, 424+0x0D0)
- SAVE_VECTOR_UNALIGNED(v14, 424+0x0E0)
- SAVE_VECTOR_UNALIGNED(v15, 424+0x0F0)
- SAVE_VECTOR_UNALIGNED(v16, 424+0x100)
- SAVE_VECTOR_UNALIGNED(v17, 424+0x110)
- SAVE_VECTOR_UNALIGNED(v18, 424+0x120)
- SAVE_VECTOR_UNALIGNED(v19, 424+0x130)
- SAVE_VECTOR_UNALIGNED(v20, 424+0x140)
- SAVE_VECTOR_UNALIGNED(v21, 424+0x150)
- SAVE_VECTOR_UNALIGNED(v22, 424+0x160)
- SAVE_VECTOR_UNALIGNED(v23, 424+0x170)
- SAVE_VECTOR_UNALIGNED(v24, 424+0x180)
- SAVE_VECTOR_UNALIGNED(v25, 424+0x190)
- SAVE_VECTOR_UNALIGNED(v26, 424+0x1A0)
- SAVE_VECTOR_UNALIGNED(v27, 424+0x1B0)
- SAVE_VECTOR_UNALIGNED(v28, 424+0x1C0)
- SAVE_VECTOR_UNALIGNED(v29, 424+0x1D0)
- SAVE_VECTOR_UNALIGNED(v30, 424+0x1E0)
- SAVE_VECTOR_UNALIGNED(v31, 424+0x1F0)
-
- li r3, 0 ; return UNW_ESUCCESS
+ stvx _vec, 0, %r4 SEPARATOR \
+ lwz %r5, 0(%r4) SEPARATOR \
+ stw %r5, _offset(%r3) SEPARATOR \
+ lwz %r5, 4(%r4) SEPARATOR \
+ stw %r5, _offset+4(%r3) SEPARATOR \
+ lwz %r5, 8(%r4) SEPARATOR \
+ stw %r5, _offset+8(%r3) SEPARATOR \
+ lwz %r5, 12(%r4) SEPARATOR \
+ stw %r5, _offset+12(%r3)
+
+ SAVE_VECTOR_UNALIGNED( %v0, 424+0x000)
+ SAVE_VECTOR_UNALIGNED( %v1, 424+0x010)
+ SAVE_VECTOR_UNALIGNED( %v2, 424+0x020)
+ SAVE_VECTOR_UNALIGNED( %v3, 424+0x030)
+ SAVE_VECTOR_UNALIGNED( %v4, 424+0x040)
+ SAVE_VECTOR_UNALIGNED( %v5, 424+0x050)
+ SAVE_VECTOR_UNALIGNED( %v6, 424+0x060)
+ SAVE_VECTOR_UNALIGNED( %v7, 424+0x070)
+ SAVE_VECTOR_UNALIGNED( %v8, 424+0x080)
+ SAVE_VECTOR_UNALIGNED( %v9, 424+0x090)
+ SAVE_VECTOR_UNALIGNED(%v10, 424+0x0A0)
+ SAVE_VECTOR_UNALIGNED(%v11, 424+0x0B0)
+ SAVE_VECTOR_UNALIGNED(%v12, 424+0x0C0)
+ SAVE_VECTOR_UNALIGNED(%v13, 424+0x0D0)
+ SAVE_VECTOR_UNALIGNED(%v14, 424+0x0E0)
+ SAVE_VECTOR_UNALIGNED(%v15, 424+0x0F0)
+ SAVE_VECTOR_UNALIGNED(%v16, 424+0x100)
+ SAVE_VECTOR_UNALIGNED(%v17, 424+0x110)
+ SAVE_VECTOR_UNALIGNED(%v18, 424+0x120)
+ SAVE_VECTOR_UNALIGNED(%v19, 424+0x130)
+ SAVE_VECTOR_UNALIGNED(%v20, 424+0x140)
+ SAVE_VECTOR_UNALIGNED(%v21, 424+0x150)
+ SAVE_VECTOR_UNALIGNED(%v22, 424+0x160)
+ SAVE_VECTOR_UNALIGNED(%v23, 424+0x170)
+ SAVE_VECTOR_UNALIGNED(%v24, 424+0x180)
+ SAVE_VECTOR_UNALIGNED(%v25, 424+0x190)
+ SAVE_VECTOR_UNALIGNED(%v26, 424+0x1A0)
+ SAVE_VECTOR_UNALIGNED(%v27, 424+0x1B0)
+ SAVE_VECTOR_UNALIGNED(%v28, 424+0x1C0)
+ SAVE_VECTOR_UNALIGNED(%v29, 424+0x1D0)
+ SAVE_VECTOR_UNALIGNED(%v30, 424+0x1E0)
+ SAVE_VECTOR_UNALIGNED(%v31, 424+0x1F0)
+
+ li %r3, 0 // return UNW_ESUCCESS
blr
#elif defined(__arm64__) || defined(__aarch64__)
//
-// extern int unw_getcontext(unw_context_t* thread_state)
+// extern int __unw_getcontext(unw_context_t* thread_state)
//
// On entry:
// thread_state pointer is in x0
//
.p2align 2
-DEFINE_LIBUNWIND_FUNCTION(unw_getcontext)
+DEFINE_LIBUNWIND_FUNCTION(__unw_getcontext)
stp x0, x1, [x0, #0x000]
stp x2, x3, [x0, #0x010]
stp x4, x5, [x0, #0x020]
@@ -751,11 +750,14 @@ DEFINE_LIBUNWIND_FUNCTION(unw_getcontext)
#elif defined(__arm__) && !defined(__APPLE__)
#if !defined(__ARM_ARCH_ISA_ARM)
+#if (__ARM_ARCH_ISA_THUMB == 2)
+ .syntax unified
+#endif
.thumb
#endif
@
-@ extern int unw_getcontext(unw_context_t* thread_state)
+@ extern int __unw_getcontext(unw_context_t* thread_state)
@
@ On entry:
@ thread_state pointer is in r0
@@ -764,10 +766,10 @@ DEFINE_LIBUNWIND_FUNCTION(unw_getcontext)
@ EHABI #7.4.5 notes that in general all VRS registers should be restored
@ however this is very hard to do for VFP registers because it is unknown
@ to the library how many registers are implemented by the architecture.
-@ Instead, VFP registers are demand saved by logic external to unw_getcontext.
+@ Instead, VFP registers are demand saved by logic external to __unw_getcontext.
@
.p2align 2
-DEFINE_LIBUNWIND_FUNCTION(unw_getcontext)
+DEFINE_LIBUNWIND_FUNCTION(__unw_getcontext)
#if !defined(__ARM_ARCH_ISA_ARM) && __ARM_ARCH_ISA_THUMB == 1
stm r0!, {r0-r7}
mov r1, r8
@@ -808,7 +810,7 @@ DEFINE_LIBUNWIND_FUNCTION(unw_getcontext)
#if defined(__ELF__)
.fpu vfpv3-d16
#endif
-DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm16saveVFPWithFSTMDEPy)
+DEFINE_LIBUNWIND_FUNCTION(_ZN9libunwind13Registers_arm16saveVFPWithFSTMDEPv)
vstmia r0, {d0-d15}
JMP(lr)
@@ -822,7 +824,7 @@ DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm16saveVFPWithFSTMD
#if defined(__ELF__)
.fpu vfpv3-d16
#endif
-DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm16saveVFPWithFSTMXEPy)
+DEFINE_LIBUNWIND_FUNCTION(_ZN9libunwind13Registers_arm16saveVFPWithFSTMXEPv)
vstmia r0, {d0-d15} @ fstmiax is deprecated in ARMv7+ and now behaves like vstmia
JMP(lr)
@@ -836,7 +838,7 @@ DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm16saveVFPWithFSTMX
#if defined(__ELF__)
.fpu vfpv3
#endif
-DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm9saveVFPv3EPy)
+DEFINE_LIBUNWIND_FUNCTION(_ZN9libunwind13Registers_arm9saveVFPv3EPv)
@ VFP and iwMMX instructions are only available when compiling with the flags
@ that enable them. We do not want to do that in the library (because we do not
@ want the compiler to generate instructions that access those) but this is
@@ -859,7 +861,7 @@ DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm9saveVFPv3EPy)
#if defined(__ELF__)
.arch armv5te
#endif
-DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm9saveiWMMXEPy)
+DEFINE_LIBUNWIND_FUNCTION(_ZN9libunwind13Registers_arm9saveiWMMXEPv)
stcl p1, cr0, [r0], #8 @ wstrd wR0, [r0], #8
stcl p1, cr1, [r0], #8 @ wstrd wR1, [r0], #8
stcl p1, cr2, [r0], #8 @ wstrd wR2, [r0], #8
@@ -888,7 +890,7 @@ DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm9saveiWMMXEPy)
#if defined(__ELF__)
.arch armv5te
#endif
-DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm16saveiWMMXControlEPj)
+DEFINE_LIBUNWIND_FUNCTION(_ZN9libunwind13Registers_arm16saveiWMMXControlEPj)
stc2 p1, cr8, [r0], #4 @ wstrw wCGR0, [r0], #4
stc2 p1, cr9, [r0], #4 @ wstrw wCGR1, [r0], #4
stc2 p1, cr10, [r0], #4 @ wstrw wCGR2, [r0], #4
@@ -900,12 +902,12 @@ DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm16saveiWMMXControl
#elif defined(__or1k__)
#
-# extern int unw_getcontext(unw_context_t* thread_state)
+# extern int __unw_getcontext(unw_context_t* thread_state)
#
# On entry:
# thread_state pointer is in r3
#
-DEFINE_LIBUNWIND_FUNCTION(unw_getcontext)
+DEFINE_LIBUNWIND_FUNCTION(__unw_getcontext)
l.sw 0(r3), r0
l.sw 4(r3), r1
l.sw 8(r3), r2
@@ -946,12 +948,12 @@ DEFINE_LIBUNWIND_FUNCTION(unw_getcontext)
#elif defined(__sparc__)
#
-# extern int unw_getcontext(unw_context_t* thread_state)
+# extern int __unw_getcontext(unw_context_t* thread_state)
#
# On entry:
# thread_state pointer is in o0
#
-DEFINE_LIBUNWIND_FUNCTION(unw_getcontext)
+DEFINE_LIBUNWIND_FUNCTION(__unw_getcontext)
ta 3
add %o7, 8, %o7
std %g0, [%o0 + 0]
@@ -973,6 +975,9 @@ DEFINE_LIBUNWIND_FUNCTION(unw_getcontext)
jmp %o7
clr %o0 // return UNW_ESUCCESS
#endif
+
+ WEAK_ALIAS(__unw_getcontext, unw_getcontext)
+
#endif /* !defined(__USING_SJLJ_EXCEPTIONS__) */
NO_EXEC_STACK_DIRECTIVE