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-rw-r--r--cvmx-key-defs.h70
1 files changed, 41 insertions, 29 deletions
diff --git a/cvmx-key-defs.h b/cvmx-key-defs.h
index cf22a0cc1729..10b56fb503cc 100644
--- a/cvmx-key-defs.h
+++ b/cvmx-key-defs.h
@@ -1,5 +1,5 @@
/***********************license start***************
- * Copyright (c) 2003-2010 Cavium Networks (support@cavium.com). All rights
+ * Copyright (c) 2003-2012 Cavium Inc. (support@cavium.com). All rights
* reserved.
*
*
@@ -15,7 +15,7 @@
* disclaimer in the documentation and/or other materials provided
* with the distribution.
- * * Neither the name of Cavium Networks nor the names of
+ * * Neither the name of Cavium Inc. nor the names of
* its contributors may be used to endorse or promote products
* derived from this software without specific prior written
* permission.
@@ -26,7 +26,7 @@
* countries.
* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
- * AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR
+ * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR
* WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
* THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
* DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
@@ -49,14 +49,14 @@
* <hr>$Revision$<hr>
*
*/
-#ifndef __CVMX_KEY_TYPEDEFS_H__
-#define __CVMX_KEY_TYPEDEFS_H__
+#ifndef __CVMX_KEY_DEFS_H__
+#define __CVMX_KEY_DEFS_H__
#if CVMX_ENABLE_CSR_ADDRESS_CHECKING
#define CVMX_KEY_BIST_REG CVMX_KEY_BIST_REG_FUNC()
static inline uint64_t CVMX_KEY_BIST_REG_FUNC(void)
{
- if (!(OCTEON_IS_MODEL(OCTEON_CN38XX) || OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN58XX) || OCTEON_IS_MODEL(OCTEON_CN63XX)))
+ if (!(OCTEON_IS_MODEL(OCTEON_CN38XX) || OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN58XX) || OCTEON_IS_MODEL(OCTEON_CN61XX) || OCTEON_IS_MODEL(OCTEON_CN63XX) || OCTEON_IS_MODEL(OCTEON_CN66XX) || OCTEON_IS_MODEL(OCTEON_CN68XX) || OCTEON_IS_MODEL(OCTEON_CNF71XX)))
cvmx_warn("CVMX_KEY_BIST_REG not supported on this chip\n");
return CVMX_ADD_IO_SEG(0x0001180020000018ull);
}
@@ -67,7 +67,7 @@ static inline uint64_t CVMX_KEY_BIST_REG_FUNC(void)
#define CVMX_KEY_CTL_STATUS CVMX_KEY_CTL_STATUS_FUNC()
static inline uint64_t CVMX_KEY_CTL_STATUS_FUNC(void)
{
- if (!(OCTEON_IS_MODEL(OCTEON_CN38XX) || OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN58XX) || OCTEON_IS_MODEL(OCTEON_CN63XX)))
+ if (!(OCTEON_IS_MODEL(OCTEON_CN38XX) || OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN58XX) || OCTEON_IS_MODEL(OCTEON_CN61XX) || OCTEON_IS_MODEL(OCTEON_CN63XX) || OCTEON_IS_MODEL(OCTEON_CN66XX) || OCTEON_IS_MODEL(OCTEON_CN68XX) || OCTEON_IS_MODEL(OCTEON_CNF71XX)))
cvmx_warn("CVMX_KEY_CTL_STATUS not supported on this chip\n");
return CVMX_ADD_IO_SEG(0x0001180020000010ull);
}
@@ -78,7 +78,7 @@ static inline uint64_t CVMX_KEY_CTL_STATUS_FUNC(void)
#define CVMX_KEY_INT_ENB CVMX_KEY_INT_ENB_FUNC()
static inline uint64_t CVMX_KEY_INT_ENB_FUNC(void)
{
- if (!(OCTEON_IS_MODEL(OCTEON_CN38XX) || OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN58XX) || OCTEON_IS_MODEL(OCTEON_CN63XX)))
+ if (!(OCTEON_IS_MODEL(OCTEON_CN38XX) || OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN58XX) || OCTEON_IS_MODEL(OCTEON_CN61XX) || OCTEON_IS_MODEL(OCTEON_CN63XX) || OCTEON_IS_MODEL(OCTEON_CN66XX) || OCTEON_IS_MODEL(OCTEON_CN68XX) || OCTEON_IS_MODEL(OCTEON_CNF71XX)))
cvmx_warn("CVMX_KEY_INT_ENB not supported on this chip\n");
return CVMX_ADD_IO_SEG(0x0001180020000008ull);
}
@@ -89,7 +89,7 @@ static inline uint64_t CVMX_KEY_INT_ENB_FUNC(void)
#define CVMX_KEY_INT_SUM CVMX_KEY_INT_SUM_FUNC()
static inline uint64_t CVMX_KEY_INT_SUM_FUNC(void)
{
- if (!(OCTEON_IS_MODEL(OCTEON_CN38XX) || OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN58XX) || OCTEON_IS_MODEL(OCTEON_CN63XX)))
+ if (!(OCTEON_IS_MODEL(OCTEON_CN38XX) || OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN58XX) || OCTEON_IS_MODEL(OCTEON_CN61XX) || OCTEON_IS_MODEL(OCTEON_CN63XX) || OCTEON_IS_MODEL(OCTEON_CN66XX) || OCTEON_IS_MODEL(OCTEON_CN68XX) || OCTEON_IS_MODEL(OCTEON_CNF71XX)))
cvmx_warn("CVMX_KEY_INT_SUM not supported on this chip\n");
return CVMX_ADD_IO_SEG(0x0001180020000000ull);
}
@@ -104,12 +104,10 @@ static inline uint64_t CVMX_KEY_INT_SUM_FUNC(void)
*
* The KEY's BIST status for memories.
*/
-union cvmx_key_bist_reg
-{
+union cvmx_key_bist_reg {
uint64_t u64;
- struct cvmx_key_bist_reg_s
- {
-#if __BYTE_ORDER == __BIG_ENDIAN
+ struct cvmx_key_bist_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_3_63 : 61;
uint64_t rrc : 1; /**< RRC bist status. */
uint64_t mem1 : 1; /**< MEM - 1 bist status. */
@@ -127,8 +125,13 @@ union cvmx_key_bist_reg
struct cvmx_key_bist_reg_s cn56xxp1;
struct cvmx_key_bist_reg_s cn58xx;
struct cvmx_key_bist_reg_s cn58xxp1;
+ struct cvmx_key_bist_reg_s cn61xx;
struct cvmx_key_bist_reg_s cn63xx;
struct cvmx_key_bist_reg_s cn63xxp1;
+ struct cvmx_key_bist_reg_s cn66xx;
+ struct cvmx_key_bist_reg_s cn68xx;
+ struct cvmx_key_bist_reg_s cn68xxp1;
+ struct cvmx_key_bist_reg_s cnf71xx;
};
typedef union cvmx_key_bist_reg cvmx_key_bist_reg_t;
@@ -139,12 +142,10 @@ typedef union cvmx_key_bist_reg cvmx_key_bist_reg_t;
*
* The KEY's interrupt enable register.
*/
-union cvmx_key_ctl_status
-{
+union cvmx_key_ctl_status {
uint64_t u64;
- struct cvmx_key_ctl_status_s
- {
-#if __BYTE_ORDER == __BIG_ENDIAN
+ struct cvmx_key_ctl_status_s {
+#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_14_63 : 50;
uint64_t mem1_err : 7; /**< Causes a flip of the ECC bit associated 38:32
respective to bit 13:7 of this field, for FPF
@@ -164,8 +165,13 @@ union cvmx_key_ctl_status
struct cvmx_key_ctl_status_s cn56xxp1;
struct cvmx_key_ctl_status_s cn58xx;
struct cvmx_key_ctl_status_s cn58xxp1;
+ struct cvmx_key_ctl_status_s cn61xx;
struct cvmx_key_ctl_status_s cn63xx;
struct cvmx_key_ctl_status_s cn63xxp1;
+ struct cvmx_key_ctl_status_s cn66xx;
+ struct cvmx_key_ctl_status_s cn68xx;
+ struct cvmx_key_ctl_status_s cn68xxp1;
+ struct cvmx_key_ctl_status_s cnf71xx;
};
typedef union cvmx_key_ctl_status cvmx_key_ctl_status_t;
@@ -176,12 +182,10 @@ typedef union cvmx_key_ctl_status cvmx_key_ctl_status_t;
*
* The KEY's interrupt enable register.
*/
-union cvmx_key_int_enb
-{
+union cvmx_key_int_enb {
uint64_t u64;
- struct cvmx_key_int_enb_s
- {
-#if __BYTE_ORDER == __BIG_ENDIAN
+ struct cvmx_key_int_enb_s {
+#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_4_63 : 60;
uint64_t ked1_dbe : 1; /**< When set (1) and bit 3 of the KEY_INT_SUM
register is asserted the KEY will assert an
@@ -209,8 +213,13 @@ union cvmx_key_int_enb
struct cvmx_key_int_enb_s cn56xxp1;
struct cvmx_key_int_enb_s cn58xx;
struct cvmx_key_int_enb_s cn58xxp1;
+ struct cvmx_key_int_enb_s cn61xx;
struct cvmx_key_int_enb_s cn63xx;
struct cvmx_key_int_enb_s cn63xxp1;
+ struct cvmx_key_int_enb_s cn66xx;
+ struct cvmx_key_int_enb_s cn68xx;
+ struct cvmx_key_int_enb_s cn68xxp1;
+ struct cvmx_key_int_enb_s cnf71xx;
};
typedef union cvmx_key_int_enb cvmx_key_int_enb_t;
@@ -221,12 +230,10 @@ typedef union cvmx_key_int_enb cvmx_key_int_enb_t;
*
* Contains the diffrent interrupt summary bits of the KEY.
*/
-union cvmx_key_int_sum
-{
+union cvmx_key_int_sum {
uint64_t u64;
- struct cvmx_key_int_sum_s
- {
-#if __BYTE_ORDER == __BIG_ENDIAN
+ struct cvmx_key_int_sum_s {
+#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_4_63 : 60;
uint64_t ked1_dbe : 1;
uint64_t ked1_sbe : 1;
@@ -246,8 +253,13 @@ union cvmx_key_int_sum
struct cvmx_key_int_sum_s cn56xxp1;
struct cvmx_key_int_sum_s cn58xx;
struct cvmx_key_int_sum_s cn58xxp1;
+ struct cvmx_key_int_sum_s cn61xx;
struct cvmx_key_int_sum_s cn63xx;
struct cvmx_key_int_sum_s cn63xxp1;
+ struct cvmx_key_int_sum_s cn66xx;
+ struct cvmx_key_int_sum_s cn68xx;
+ struct cvmx_key_int_sum_s cn68xxp1;
+ struct cvmx_key_int_sum_s cnf71xx;
};
typedef union cvmx_key_int_sum cvmx_key_int_sum_t;