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-rw-r--r--cvmx-helper-npi.c64
1 files changed, 48 insertions, 16 deletions
diff --git a/cvmx-helper-npi.c b/cvmx-helper-npi.c
index d02295657428..822d5c3304eb 100644
--- a/cvmx-helper-npi.c
+++ b/cvmx-helper-npi.c
@@ -1,5 +1,5 @@
/***********************license start***************
- * Copyright (c) 2003-2010 Cavium Networks (support@cavium.com). All rights
+ * Copyright (c) 2003-2010 Cavium Inc. (support@cavium.com). All rights
* reserved.
*
*
@@ -15,7 +15,7 @@
* disclaimer in the documentation and/or other materials provided
* with the distribution.
- * * Neither the name of Cavium Networks nor the names of
+ * * Neither the name of Cavium Inc. nor the names of
* its contributors may be used to endorse or promote products
* derived from this software without specific prior written
* permission.
@@ -26,7 +26,7 @@
* countries.
* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
- * AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR
+ * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR
* WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
* THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
* DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
@@ -49,21 +49,24 @@
* Functions for NPI initialization, configuration,
* and monitoring.
*
- * <hr>$Revision: 49448 $<hr>
+ * <hr>$Revision: 70030 $<hr>
*/
#ifdef CVMX_BUILD_FOR_LINUX_KERNEL
#include <asm/octeon/cvmx.h>
#include <asm/octeon/cvmx-config.h>
#ifdef CVMX_ENABLE_PKO_FUNCTIONS
#include <asm/octeon/cvmx-helper.h>
+#include <asm/octeon/cvmx-pko.h>
+#include <asm/octeon/cvmx-pexp-defs.h>
+#include <asm/octeon/cvmx-sli-defs.h>
#endif
#include <asm/octeon/cvmx-pip-defs.h>
#else
#include "executive-config.h"
#include "cvmx-config.h"
-#ifdef CVMX_ENABLE_PKO_FUNCTIONS
-
#include "cvmx.h"
+#include "cvmx-pko.h"
+#ifdef CVMX_ENABLE_PKO_FUNCTIONS
#include "cvmx-helper.h"
#endif
#endif
@@ -83,14 +86,8 @@
int __cvmx_helper_npi_probe(int interface)
{
#if CVMX_PKO_QUEUES_PER_PORT_PCI > 0
- if (OCTEON_IS_MODEL(OCTEON_CN38XX) || OCTEON_IS_MODEL(OCTEON_CN58XX))
- return 4;
- else if (OCTEON_IS_MODEL(OCTEON_CN56XX) && !OCTEON_IS_MODEL(OCTEON_CN56XX_PASS1_X))
- return 4; /* The packet engines didn't exist before pass 2 */
- else if (OCTEON_IS_MODEL(OCTEON_CN52XX) && !OCTEON_IS_MODEL(OCTEON_CN52XX_PASS1_X))
- return 4; /* The packet engines didn't exist before pass 2 */
- else if (OCTEON_IS_MODEL(OCTEON_CN6XXX))
- return 4;
+ if (OCTEON_IS_MODEL(OCTEON_CN68XX))
+ return 32;
#if 0
/* Technically CN30XX, CN31XX, and CN50XX contain packet engines, but
nobody ever uses them. Since this is the case, we disable them here */
@@ -99,6 +96,8 @@ int __cvmx_helper_npi_probe(int interface)
else if (OCTEON_IS_MODEL(OCTEON_CN30XX))
return 1;
#endif
+ else if (!(OCTEON_IS_MODEL(OCTEON_CN52XX_PASS1_X) || OCTEON_IS_MODEL(OCTEON_CN56XX_PASS1_X) || OCTEON_IS_MODEL(OCTEON_CN31XX) || OCTEON_IS_MODEL(OCTEON_CN50XX) || OCTEON_IS_MODEL(OCTEON_CN30XX)))
+ return 4; /* The packet engines didn't exist before cn56xx pass 2 */
#endif
return 0;
}
@@ -116,23 +115,56 @@ int __cvmx_helper_npi_probe(int interface)
*/
int __cvmx_helper_npi_enable(int interface)
{
+ int num_ports = cvmx_helper_ports_on_interface(interface);
+
/* On CN50XX, CN52XX, and CN56XX we need to disable length checking
so packet < 64 bytes and jumbo frames don't get errors */
if (!OCTEON_IS_MODEL(OCTEON_CN3XXX) && !OCTEON_IS_MODEL(OCTEON_CN58XX))
{
- int num_ports = cvmx_helper_ports_on_interface(interface);
int port;
for (port=0; port<num_ports; port++)
{
cvmx_pip_prt_cfgx_t port_cfg;
- int ipd_port = cvmx_helper_get_ipd_port(interface, port);
+ int ipd_port = (OCTEON_IS_MODEL(OCTEON_CN68XX)) ?
+ cvmx_helper_get_pknd(interface, port) :
+ cvmx_helper_get_ipd_port(interface, port);
port_cfg.u64 = cvmx_read_csr(CVMX_PIP_PRT_CFGX(ipd_port));
+ port_cfg.s.lenerr_en = 0;
port_cfg.s.maxerr_en = 0;
port_cfg.s.minerr_en = 0;
cvmx_write_csr(CVMX_PIP_PRT_CFGX(ipd_port), port_cfg.u64);
+
+ if (OCTEON_IS_MODEL(OCTEON_CN68XX))
+ {
+ /*
+ * Set up pknd and bpid
+ */
+ cvmx_sli_portx_pkind_t config;
+ config.u64 = cvmx_read_csr(CVMX_PEXP_SLI_PORTX_PKIND(port));
+ config.s.bpkind = cvmx_helper_get_bpid(interface, port);
+ config.s.pkind = cvmx_helper_get_pknd(interface, port);
+ cvmx_write_csr(CVMX_PEXP_SLI_PORTX_PKIND(port), config.u64);
+ }
}
}
+ if (OCTEON_IS_MODEL(OCTEON_CN68XX))
+ {
+ /*
+ * Set up pko pipes.
+ */
+ cvmx_sli_tx_pipe_t config;
+ config.u64 = cvmx_read_csr(CVMX_PEXP_SLI_TX_PIPE);
+ config.s.base = __cvmx_pko_get_pipe (interface, 0);
+#ifdef CVMX_HELPER_NPI_MAX_PIPES
+ config.s.nump = CVMX_HELPER_NPI_MAX_PIPES;
+#else
+ config.s.nump = num_ports;
+#endif
+ cvmx_write_csr(CVMX_PEXP_SLI_TX_PIPE, config.u64);
+ }
+
+
/* Enables are controlled by the remote host, so nothing to do here */
return 0;
}