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-rw-r--r--cvmx-dbg-defs.h33
1 files changed, 14 insertions, 19 deletions
diff --git a/cvmx-dbg-defs.h b/cvmx-dbg-defs.h
index e435deb21ec8..022c7140ad5f 100644
--- a/cvmx-dbg-defs.h
+++ b/cvmx-dbg-defs.h
@@ -1,5 +1,5 @@
/***********************license start***************
- * Copyright (c) 2003-2010 Cavium Networks (support@cavium.com). All rights
+ * Copyright (c) 2003-2012 Cavium Inc. (support@cavium.com). All rights
* reserved.
*
*
@@ -15,7 +15,7 @@
* disclaimer in the documentation and/or other materials provided
* with the distribution.
- * * Neither the name of Cavium Networks nor the names of
+ * * Neither the name of Cavium Inc. nor the names of
* its contributors may be used to endorse or promote products
* derived from this software without specific prior written
* permission.
@@ -26,7 +26,7 @@
* countries.
* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
- * AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR
+ * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR
* WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
* THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
* DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
@@ -49,8 +49,8 @@
* <hr>$Revision$<hr>
*
*/
-#ifndef __CVMX_DBG_TYPEDEFS_H__
-#define __CVMX_DBG_TYPEDEFS_H__
+#ifndef __CVMX_DBG_DEFS_H__
+#define __CVMX_DBG_DEFS_H__
#if CVMX_ENABLE_CSR_ADDRESS_CHECKING
#define CVMX_DBG_DATA CVMX_DBG_DATA_FUNC()
@@ -71,12 +71,10 @@ static inline uint64_t CVMX_DBG_DATA_FUNC(void)
*
* Value returned on the debug-data lines from the RSLs
*/
-union cvmx_dbg_data
-{
+union cvmx_dbg_data {
uint64_t u64;
- struct cvmx_dbg_data_s
- {
-#if __BYTE_ORDER == __BIG_ENDIAN
+ struct cvmx_dbg_data_s {
+#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_23_63 : 41;
uint64_t c_mul : 5; /**< C_MUL pins sampled at DCOK assertion */
uint64_t dsel_ext : 1; /**< Allows changes in the external pins to set the
@@ -89,9 +87,8 @@ union cvmx_dbg_data
uint64_t reserved_23_63 : 41;
#endif
} s;
- struct cvmx_dbg_data_cn30xx
- {
-#if __BYTE_ORDER == __BIG_ENDIAN
+ struct cvmx_dbg_data_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_31_63 : 33;
uint64_t pll_mul : 3; /**< pll_mul pins sampled at DCOK assertion */
uint64_t reserved_23_27 : 5;
@@ -109,9 +106,8 @@ union cvmx_dbg_data
#endif
} cn30xx;
struct cvmx_dbg_data_cn30xx cn31xx;
- struct cvmx_dbg_data_cn38xx
- {
-#if __BYTE_ORDER == __BIG_ENDIAN
+ struct cvmx_dbg_data_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_29_63 : 35;
uint64_t d_mul : 4; /**< D_MUL pins sampled on DCOK assertion */
uint64_t dclk_mul2 : 1; /**< Should always be set for fast DDR-II operation */
@@ -132,9 +128,8 @@ union cvmx_dbg_data
} cn38xx;
struct cvmx_dbg_data_cn38xx cn38xxp2;
struct cvmx_dbg_data_cn30xx cn50xx;
- struct cvmx_dbg_data_cn58xx
- {
-#if __BYTE_ORDER == __BIG_ENDIAN
+ struct cvmx_dbg_data_cn58xx {
+#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_29_63 : 35;
uint64_t rem : 6; /**< Remaining debug_select pins sampled at DCOK */
uint64_t c_mul : 5; /**< C_MUL pins sampled at DCOK assertion */