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-rw-r--r--MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.c217
1 files changed, 107 insertions, 110 deletions
diff --git a/MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.c b/MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.c
index 3e4fd82228d5..7c089e2902a7 100644
--- a/MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.c
+++ b/MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.c
@@ -1,15 +1,8 @@
/** @file
PCI Segment Library implementation using PCI Root Bridge I/O Protocol.
- Copyright (c) 2007 - 2012, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials are
- licensed and made available under the terms and conditions of
- the BSD License which accompanies this distribution. The full
- text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -23,14 +16,14 @@ UINTN mNumberOfPciRootBridges = 0;
/**
The constructor function caches data of PCI Root Bridge I/O Protocol instances.
-
+
The constructor function locates PCI Root Bridge I/O protocol instances,
and caches the protocol instances, together with their segment numbers and bus ranges.
- It will ASSERT() if that related operation fails and it will always return EFI_SUCCESS.
+ It will ASSERT() if that related operation fails and it will always return EFI_SUCCESS.
@param ImageHandle The firmware allocated handle for the EFI image.
@param SystemTable A pointer to the EFI System Table.
-
+
@retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.
**/
@@ -45,7 +38,7 @@ PciSegmentLibConstructor (
UINTN Index;
UINTN HandleCount;
EFI_HANDLE *HandleBuffer;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptors;
HandleCount = 0;
@@ -103,13 +96,13 @@ PciSegmentLibConstructor (
/**
The destructor function frees memory allocated by constructor.
-
+
The destructor function frees memory for data of protocol instances allocated by constructor.
- It will ASSERT() if that related operation fails and it will always return EFI_SUCCESS.
+ It will ASSERT() if that related operation fails and it will always return EFI_SUCCESS.
@param ImageHandle The firmware allocated handle for the EFI image.
@param SystemTable A pointer to the EFI System Table.
-
+
@retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.
**/
@@ -159,7 +152,7 @@ PciSegmentLibSearchForRootBridge (
if (BusNumber >= mPciRootBridgeData[Index].MinBusNumber && BusNumber <= mPciRootBridgeData[Index].MaxBusNumber) {
return mPciRootBridgeData[Index].PciRootBridgeIo;
}
- }
+ }
}
return NULL;
}
@@ -185,7 +178,7 @@ DxePciSegmentLibPciRootBridgeIoReadWorker (
)
{
UINT32 Data;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
PciRootBridgeIo = PciSegmentLibSearchForRootBridge (Address);
ASSERT (PciRootBridgeIo != NULL);
@@ -224,7 +217,7 @@ DxePciSegmentLibPciRootBridgeIoWriteWorker (
IN UINT32 Data
)
{
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
PciRootBridgeIo = PciSegmentLibSearchForRootBridge (Address);
ASSERT (PciRootBridgeIo != NULL);
@@ -241,16 +234,16 @@ DxePciSegmentLibPciRootBridgeIoWriteWorker (
}
/**
- Register a PCI device so PCI configuration registers may be accessed after
+ Register a PCI device so PCI configuration registers may be accessed after
SetVirtualAddressMap().
-
+
If any reserved bits in Address are set, then ASSERT().
- @param Address The address that encodes the PCI Bus, Device, Function and
+ @param Address Address that encodes the PCI Bus, Device, Function and
Register.
-
+
@retval RETURN_SUCCESS The PCI device was registered for runtime access.
- @retval RETURN_UNSUPPORTED An attempt was made to call this function
+ @retval RETURN_UNSUPPORTED An attempt was made to call this function
after ExitBootServices().
@retval RETURN_UNSUPPORTED The resources required to access the PCI device
at runtime could not be mapped.
@@ -273,10 +266,10 @@ PciSegmentRegisterForRuntimeAccess (
Reads and returns the 8-bit PCI configuration register specified by Address.
This function must guarantee that all PCI read and write operations are serialized.
-
+
If any reserved bits in Address are set, then ASSERT().
-
- @param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
+
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
@return The 8-bit PCI configuration register specified by Address.
@@ -297,10 +290,10 @@ PciSegmentRead8 (
Writes the 8-bit PCI configuration register specified by Address with the value specified by Value.
Value is returned. This function must guarantee that all PCI read and write operations are serialized.
-
+
If any reserved bits in Address are set, then ASSERT().
- @param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
@param Value The value to write.
@return The value written to the PCI configuration register.
@@ -326,10 +319,10 @@ PciSegmentWrite8 (
and writes the result to the 8-bit PCI configuration register specified by Address.
The value written to the PCI configuration register is returned.
This function must guarantee that all PCI read and write operations are serialized.
-
+
If any reserved bits in Address are set, then ASSERT().
- @param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
@param OrData The value to OR with the PCI configuration register.
@return The value written to the PCI configuration register.
@@ -355,7 +348,7 @@ PciSegmentOr8 (
This function must guarantee that all PCI read and write operations are serialized.
If any reserved bits in Address are set, then ASSERT().
- @param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
@param AndData The value to AND with the PCI configuration register.
@return The value written to the PCI configuration register.
@@ -374,18 +367,18 @@ PciSegmentAnd8 (
/**
Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value,
followed a bitwise OR with another 8-bit value.
-
+
Reads the 8-bit PCI configuration register specified by Address,
performs a bitwise AND between the read result and the value specified by AndData,
performs a bitwise OR between the result of the AND operation and the value specified by OrData,
and writes the result to the 8-bit PCI configuration register specified by Address.
The value written to the PCI configuration register is returned.
This function must guarantee that all PCI read and write operations are serialized.
-
+
If any reserved bits in Address are set, then ASSERT().
- @param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
- @param AndData The value to AND with the PCI configuration register.
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param AndData The value to AND with the PCI configuration register.
@param OrData The value to OR with the PCI configuration register.
@return The value written to the PCI configuration register.
@@ -414,7 +407,7 @@ PciSegmentAndThenOr8 (
If EndBit is greater than 7, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
- @param Address The PCI configuration register to read.
+ @param Address PCI configuration register to read.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..7.
@param EndBit The ordinal of the most significant bit in the bit field.
@@ -448,12 +441,12 @@ PciSegmentBitFieldRead8 (
If EndBit is less than StartBit, then ASSERT().
If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
- @param Address The PCI configuration register to write.
+ @param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..7.
@param EndBit The ordinal of the most significant bit in the bit field.
Range 0..7.
- @param Value The new value of the bit field.
+ @param Value New value of the bit field.
@return The value written back to the PCI configuration register.
@@ -490,7 +483,7 @@ PciSegmentBitFieldWrite8 (
If EndBit is less than StartBit, then ASSERT().
If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
- @param Address The PCI configuration register to write.
+ @param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..7.
@param EndBit The ordinal of the most significant bit in the bit field.
@@ -532,7 +525,7 @@ PciSegmentBitFieldOr8 (
If EndBit is less than StartBit, then ASSERT().
If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
- @param Address The PCI configuration register to write.
+ @param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..7.
@param EndBit The ordinal of the most significant bit in the bit field.
@@ -559,8 +552,7 @@ PciSegmentBitFieldAnd8 (
/**
Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
- bitwise OR, and writes the result back to the bit field in the
- 8-bit port.
+ bitwise OR, and writes the result back to the bit field in the 8-bit port.
Reads the 8-bit PCI configuration register specified by Address, performs a
bitwise AND followed by a bitwise OR between the read result and
@@ -577,7 +569,7 @@ PciSegmentBitFieldAnd8 (
If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
- @param Address The PCI configuration register to write.
+ @param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..7.
@param EndBit The ordinal of the most significant bit in the bit field.
@@ -609,11 +601,11 @@ PciSegmentBitFieldAndThenOr8 (
Reads and returns the 16-bit PCI configuration register specified by Address.
This function must guarantee that all PCI read and write operations are serialized.
-
+
If any reserved bits in Address are set, then ASSERT().
If Address is not aligned on a 16-bit boundary, then ASSERT().
-
- @param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
+
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
@return The 16-bit PCI configuration register specified by Address.
@@ -634,11 +626,11 @@ PciSegmentRead16 (
Writes the 16-bit PCI configuration register specified by Address with the value specified by Value.
Value is returned. This function must guarantee that all PCI read and write operations are serialized.
-
+
If any reserved bits in Address are set, then ASSERT().
If Address is not aligned on a 16-bit boundary, then ASSERT().
- @param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
@param Value The value to write.
@return The parameter of Value.
@@ -661,16 +653,15 @@ PciSegmentWrite16 (
a 16-bit value.
Reads the 16-bit PCI configuration register specified by Address, performs a
- bitwise OR between the read result and the value specified by
- OrData, and writes the result to the 16-bit PCI configuration register
- specified by Address. The value written to the PCI configuration register is
- returned. This function must guarantee that all PCI read and write operations
- are serialized.
+ bitwise OR between the read result and the value specified by OrData, and
+ writes the result to the 16-bit PCI configuration register specified by Address.
+ The value written to the PCI configuration register is returned. This function
+ must guarantee that all PCI read and write operations are serialized.
If any reserved bits in Address are set, then ASSERT().
If Address is not aligned on a 16-bit boundary, then ASSERT().
- @param Address The address that encodes the PCI Segment, Bus, Device, Function and
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function and
Register.
@param OrData The value to OR with the PCI configuration register.
@@ -695,11 +686,11 @@ PciSegmentOr16 (
and writes the result to the 16-bit PCI configuration register specified by Address.
The value written to the PCI configuration register is returned.
This function must guarantee that all PCI read and write operations are serialized.
-
+
If any reserved bits in Address are set, then ASSERT().
If Address is not aligned on a 16-bit boundary, then ASSERT().
-
- @param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
+
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
@param AndData The value to AND with the PCI configuration register.
@return The value written to the PCI configuration register.
@@ -718,19 +709,19 @@ PciSegmentAnd16 (
/**
Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value,
followed a bitwise OR with another 16-bit value.
-
+
Reads the 16-bit PCI configuration register specified by Address,
performs a bitwise AND between the read result and the value specified by AndData,
performs a bitwise OR between the result of the AND operation and the value specified by OrData,
and writes the result to the 16-bit PCI configuration register specified by Address.
The value written to the PCI configuration register is returned.
This function must guarantee that all PCI read and write operations are serialized.
-
+
If any reserved bits in Address are set, then ASSERT().
If Address is not aligned on a 16-bit boundary, then ASSERT().
- @param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
- @param AndData The value to AND with the PCI configuration register.
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param AndData The value to AND with the PCI configuration register.
@param OrData The value to OR with the PCI configuration register.
@return The value written to the PCI configuration register.
@@ -760,7 +751,7 @@ PciSegmentAndThenOr16 (
If EndBit is greater than 15, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
- @param Address The PCI configuration register to read.
+ @param Address PCI configuration register to read.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..15.
@param EndBit The ordinal of the most significant bit in the bit field.
@@ -795,12 +786,12 @@ PciSegmentBitFieldRead16 (
If EndBit is less than StartBit, then ASSERT().
If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
- @param Address The PCI configuration register to write.
+ @param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..15.
@param EndBit The ordinal of the most significant bit in the bit field.
Range 0..15.
- @param Value The new value of the bit field.
+ @param Value New value of the bit field.
@return The value written back to the PCI configuration register.
@@ -821,9 +812,15 @@ PciSegmentBitFieldWrite16 (
}
/**
- Reads the 16-bit PCI configuration register specified by Address,
- performs a bitwise OR between the read result and the value specified by OrData,
- and writes the result to the 16-bit PCI configuration register specified by Address.
+ Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, writes
+ the result back to the bit field in the 16-bit port.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise OR between the read result and the value specified by
+ OrData, and writes the result to the 16-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized. Extra left bits in OrData are stripped.
If any reserved bits in Address are set, then ASSERT().
If Address is not aligned on a 16-bit boundary, then ASSERT().
@@ -832,7 +829,7 @@ PciSegmentBitFieldWrite16 (
If EndBit is less than StartBit, then ASSERT().
If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
- @param Address The PCI configuration register to write.
+ @param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..15.
@param EndBit The ordinal of the most significant bit in the bit field.
@@ -858,31 +855,31 @@ PciSegmentBitFieldOr16 (
}
/**
- Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR,
- and writes the result back to the bit field in the 16-bit port.
+ Reads a bit field in a 16-bit PCI configuration register, performs a bitwise
+ AND, writes the result back to the bit field in the 16-bit register.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 16-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized. Extra left bits in AndData are stripped.
- Reads the 16-bit PCI configuration register specified by Address,
- performs a bitwise OR between the read result and the value specified by OrData,
- and writes the result to the 16-bit PCI configuration register specified by Address.
- The value written to the PCI configuration register is returned.
- This function must guarantee that all PCI read and write operations are serialized.
- Extra left bits in OrData are stripped.
-
If any reserved bits in Address are set, then ASSERT().
If Address is not aligned on a 16-bit boundary, then ASSERT().
- If StartBit is greater than 7, then ASSERT().
- If EndBit is greater than 7, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
- @param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
@param StartBit The ordinal of the least significant bit in the bit field.
- The ordinal of the least significant bit in a byte is bit 0.
+ Range 0..15.
@param EndBit The ordinal of the most significant bit in the bit field.
- The ordinal of the most significant bit in a byte is bit 7.
- @param AndData The value to AND with the read value from the PCI configuration register.
+ Range 0..15.
+ @param AndData The value to AND with the PCI configuration register.
- @return The value written to the PCI configuration register.
+ @return The value written back to the PCI configuration register.
**/
UINT16
@@ -920,7 +917,7 @@ PciSegmentBitFieldAnd16 (
If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
- @param Address The PCI configuration register to write.
+ @param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..15.
@param EndBit The ordinal of the most significant bit in the bit field.
@@ -952,11 +949,11 @@ PciSegmentBitFieldAndThenOr16 (
Reads and returns the 32-bit PCI configuration register specified by Address.
This function must guarantee that all PCI read and write operations are serialized.
-
+
If any reserved bits in Address are set, then ASSERT().
If Address is not aligned on a 32-bit boundary, then ASSERT().
- @param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
@return The 32-bit PCI configuration register specified by Address.
@@ -977,11 +974,11 @@ PciSegmentRead32 (
Writes the 32-bit PCI configuration register specified by Address with the value specified by Value.
Value is returned. This function must guarantee that all PCI read and write operations are serialized.
-
+
If any reserved bits in Address are set, then ASSERT().
If Address is not aligned on a 32-bit boundary, then ASSERT().
- @param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
@param Value The value to write.
@return The parameter of Value.
@@ -1007,11 +1004,11 @@ PciSegmentWrite32 (
and writes the result to the 32-bit PCI configuration register specified by Address.
The value written to the PCI configuration register is returned.
This function must guarantee that all PCI read and write operations are serialized.
-
+
If any reserved bits in Address are set, then ASSERT().
If Address is not aligned on a 32-bit boundary, then ASSERT().
- @param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
@param OrData The value to OR with the PCI configuration register.
@return The value written to the PCI configuration register.
@@ -1035,11 +1032,11 @@ PciSegmentOr32 (
and writes the result to the 32-bit PCI configuration register specified by Address.
The value written to the PCI configuration register is returned.
This function must guarantee that all PCI read and write operations are serialized.
-
+
If any reserved bits in Address are set, then ASSERT().
If Address is not aligned on a 32-bit boundary, then ASSERT().
- @param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
@param AndData The value to AND with the PCI configuration register.
@return The value written to the PCI configuration register.
@@ -1058,18 +1055,18 @@ PciSegmentAnd32 (
/**
Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value,
followed a bitwise OR with another 32-bit value.
-
+
Reads the 32-bit PCI configuration register specified by Address,
performs a bitwise AND between the read result and the value specified by AndData,
performs a bitwise OR between the result of the AND operation and the value specified by OrData,
and writes the result to the 32-bit PCI configuration register specified by Address.
The value written to the PCI configuration register is returned.
This function must guarantee that all PCI read and write operations are serialized.
-
+
If any reserved bits in Address are set, then ASSERT().
If Address is not aligned on a 32-bit boundary, then ASSERT().
- @param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
@param AndData The value to AND with the PCI configuration register.
@param OrData The value to OR with the PCI configuration register.
@@ -1100,7 +1097,7 @@ PciSegmentAndThenOr32 (
If EndBit is greater than 31, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
- @param Address The PCI configuration register to read.
+ @param Address PCI configuration register to read.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..31.
@param EndBit The ordinal of the most significant bit in the bit field.
@@ -1135,12 +1132,12 @@ PciSegmentBitFieldRead32 (
If EndBit is less than StartBit, then ASSERT().
If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
- @param Address The PCI configuration register to write.
+ @param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..31.
@param EndBit The ordinal of the most significant bit in the bit field.
Range 0..31.
- @param Value The new value of the bit field.
+ @param Value New value of the bit field.
@return The value written back to the PCI configuration register.
@@ -1177,7 +1174,7 @@ PciSegmentBitFieldWrite32 (
If EndBit is less than StartBit, then ASSERT().
If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
- @param Address The PCI configuration register to write.
+ @param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..31.
@param EndBit The ordinal of the most significant bit in the bit field.
@@ -1206,7 +1203,7 @@ PciSegmentBitFieldOr32 (
Reads a bit field in a 32-bit PCI configuration register, performs a bitwise
AND, and writes the result back to the bit field in the 32-bit register.
-
+
Reads the 32-bit PCI configuration register specified by Address, performs a bitwise
AND between the read result and the value specified by AndData, and writes the result
to the 32-bit PCI configuration register specified by Address. The value written to
@@ -1219,7 +1216,7 @@ PciSegmentBitFieldOr32 (
If EndBit is less than StartBit, then ASSERT().
If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
- @param Address The PCI configuration register to write.
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..31.
@param EndBit The ordinal of the most significant bit in the bit field.
@@ -1264,7 +1261,7 @@ PciSegmentBitFieldAnd32 (
If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
- @param Address The PCI configuration register to write.
+ @param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..31.
@param EndBit The ordinal of the most significant bit in the bit field.
@@ -1306,10 +1303,10 @@ PciSegmentBitFieldAndThenOr32 (
If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
If Size > 0 and Buffer is NULL, then ASSERT().
- @param StartAddress The starting address that encodes the PCI Segment, Bus, Device,
+ @param StartAddress Starting address that encodes the PCI Segment, Bus, Device,
Function and Register.
- @param Size The size in bytes of the transfer.
- @param Buffer The pointer to a buffer receiving the data read.
+ @param Size Size in bytes of the transfer.
+ @param Buffer Pointer to a buffer receiving the data read.
@return Size
@@ -1404,10 +1401,10 @@ PciSegmentReadBuffer (
If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
If Size > 0 and Buffer is NULL, then ASSERT().
- @param StartAddress The starting address that encodes the PCI Segment, Bus, Device,
+ @param StartAddress Starting address that encodes the PCI Segment, Bus, Device,
Function and Register.
- @param Size The size in bytes of the transfer.
- @param Buffer The pointer to a buffer containing the data to write.
+ @param Size Size in bytes of the transfer.
+ @param Buffer Pointer to a buffer containing the data to write.
@return The parameter of Size.