aboutsummaryrefslogtreecommitdiffstats
path: root/MdePkg/Library/BaseLib/Ia32
diff options
context:
space:
mode:
Diffstat (limited to 'MdePkg/Library/BaseLib/Ia32')
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ARShiftU64.S43
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ARShiftU64.asm48
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ARShiftU64.c51
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ARShiftU64.nasm45
-rw-r--r--MdePkg/Library/BaseLib/Ia32/CpuBreakpoint.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/CpuBreakpoint.c41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/CpuBreakpoint.nasm36
-rw-r--r--MdePkg/Library/BaseLib/Ia32/CpuId.S63
-rw-r--r--MdePkg/Library/BaseLib/Ia32/CpuId.asm66
-rw-r--r--MdePkg/Library/BaseLib/Ia32/CpuId.c74
-rw-r--r--MdePkg/Library/BaseLib/Ia32/CpuId.nasm65
-rw-r--r--MdePkg/Library/BaseLib/Ia32/CpuIdEx.S67
-rw-r--r--MdePkg/Library/BaseLib/Ia32/CpuIdEx.asm68
-rw-r--r--MdePkg/Library/BaseLib/Ia32/CpuIdEx.c82
-rw-r--r--MdePkg/Library/BaseLib/Ia32/CpuIdEx.nasm67
-rw-r--r--MdePkg/Library/BaseLib/Ia32/CpuPause.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/CpuPause.c35
-rw-r--r--MdePkg/Library/BaseLib/Ia32/CpuPause.nasm36
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DisableCache.S39
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DisableCache.asm45
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DisableCache.c36
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DisableCache.nasm42
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DisableInterrupts.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DisableInterrupts.c32
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DisableInterrupts.nasm37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DisablePaging32.S52
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DisablePaging32.asm57
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DisablePaging32.c77
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DisablePaging32.nasm54
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DivS64x64Remainder.c53
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DivU64x32.S41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DivU64x32.asm46
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DivU64x32.c50
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DivU64x32.nasm43
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.S46
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.asm51
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.c55
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.nasm48
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.S89
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.asm92
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.nasm94
-rw-r--r--MdePkg/Library/BaseLib/Ia32/EnableCache.S39
-rw-r--r--MdePkg/Library/BaseLib/Ia32/EnableCache.asm45
-rw-r--r--MdePkg/Library/BaseLib/Ia32/EnableCache.c36
-rw-r--r--MdePkg/Library/BaseLib/Ia32/EnableCache.nasm42
-rw-r--r--MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.S36
-rw-r--r--MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.c36
-rw-r--r--MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.nasm38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/EnableInterrupts.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/EnableInterrupts.c32
-rw-r--r--MdePkg/Library/BaseLib/Ia32/EnableInterrupts.nasm37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/EnablePaging32.S52
-rw-r--r--MdePkg/Library/BaseLib/Ia32/EnablePaging32.asm57
-rw-r--r--MdePkg/Library/BaseLib/Ia32/EnablePaging32.c81
-rw-r--r--MdePkg/Library/BaseLib/Ia32/EnablePaging32.nasm54
-rw-r--r--MdePkg/Library/BaseLib/Ia32/EnablePaging64.S63
-rw-r--r--MdePkg/Library/BaseLib/Ia32/EnablePaging64.asm68
-rw-r--r--MdePkg/Library/BaseLib/Ia32/EnablePaging64.nasm65
-rw-r--r--MdePkg/Library/BaseLib/Ia32/FlushCacheLine.asm55
-rw-r--r--MdePkg/Library/BaseLib/Ia32/FlushCacheLine.c58
-rw-r--r--MdePkg/Library/BaseLib/Ia32/FlushCacheLine.nasm51
-rw-r--r--MdePkg/Library/BaseLib/Ia32/FxRestore.asm42
-rw-r--r--MdePkg/Library/BaseLib/Ia32/FxRestore.c40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/FxRestore.nasm38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/FxSave.asm42
-rw-r--r--MdePkg/Library/BaseLib/Ia32/FxSave.c40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/FxSave.nasm38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/GccInline.c1771
-rw-r--r--MdePkg/Library/BaseLib/Ia32/InternalSwitchStack.S48
-rw-r--r--MdePkg/Library/BaseLib/Ia32/InternalSwitchStack.c60
-rw-r--r--MdePkg/Library/BaseLib/Ia32/InternalSwitchStack.nasm47
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Invd.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Invd.c35
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Invd.nasm37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/LRotU64.S48
-rw-r--r--MdePkg/Library/BaseLib/Ia32/LRotU64.asm51
-rw-r--r--MdePkg/Library/BaseLib/Ia32/LRotU64.c55
-rw-r--r--MdePkg/Library/BaseLib/Ia32/LRotU64.nasm50
-rw-r--r--MdePkg/Library/BaseLib/Ia32/LShiftU64.S43
-rw-r--r--MdePkg/Library/BaseLib/Ia32/LShiftU64.asm48
-rw-r--r--MdePkg/Library/BaseLib/Ia32/LShiftU64.c51
-rw-r--r--MdePkg/Library/BaseLib/Ia32/LShiftU64.nasm45
-rw-r--r--MdePkg/Library/BaseLib/Ia32/LongJump.S41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/LongJump.asm46
-rw-r--r--MdePkg/Library/BaseLib/Ia32/LongJump.c50
-rw-r--r--MdePkg/Library/BaseLib/Ia32/LongJump.nasm43
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ModU64x32.S40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ModU64x32.asm45
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ModU64x32.c48
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ModU64x32.nasm42
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Monitor.S40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Monitor.asm45
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Monitor.c48
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Monitor.nasm42
-rw-r--r--MdePkg/Library/BaseLib/Ia32/MultU64x32.S41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/MultU64x32.asm43
-rw-r--r--MdePkg/Library/BaseLib/Ia32/MultU64x32.c47
-rw-r--r--MdePkg/Library/BaseLib/Ia32/MultU64x32.nasm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/MultU64x64.S44
-rw-r--r--MdePkg/Library/BaseLib/Ia32/MultU64x64.asm47
-rw-r--r--MdePkg/Library/BaseLib/Ia32/MultU64x64.c51
-rw-r--r--MdePkg/Library/BaseLib/Ia32/MultU64x64.nasm46
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Mwait.S38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Mwait.asm43
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Mwait.c44
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Mwait.nasm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Non-existing.c57
-rw-r--r--MdePkg/Library/BaseLib/Ia32/RRotU64.S48
-rw-r--r--MdePkg/Library/BaseLib/Ia32/RRotU64.asm51
-rw-r--r--MdePkg/Library/BaseLib/Ia32/RRotU64.c55
-rw-r--r--MdePkg/Library/BaseLib/Ia32/RRotU64.nasm50
-rw-r--r--MdePkg/Library/BaseLib/Ia32/RShiftU64.S46
-rw-r--r--MdePkg/Library/BaseLib/Ia32/RShiftU64.asm48
-rw-r--r--MdePkg/Library/BaseLib/Ia32/RShiftU64.c51
-rw-r--r--MdePkg/Library/BaseLib/Ia32/RShiftU64.nasm45
-rw-r--r--MdePkg/Library/BaseLib/Ia32/RdRand.S80
-rw-r--r--MdePkg/Library/BaseLib/Ia32/RdRand.asm94
-rw-r--r--MdePkg/Library/BaseLib/Ia32/RdRand.nasm90
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadCr0.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadCr0.c37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadCr0.nasm37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadCr2.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadCr2.c38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadCr2.nasm37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadCr3.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadCr3.c38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadCr3.nasm37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadCr4.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadCr4.c40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadCr4.nasm37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadCs.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadCs.c38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadCs.nasm37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr0.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr0.c38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr0.nasm37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr1.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr1.c38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr1.nasm37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr2.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr2.c38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr2.nasm37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr3.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr3.c38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr3.nasm37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr4.asm47
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr4.c40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr4.nasm44
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr5.asm47
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr5.c40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr5.nasm44
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr6.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr6.c38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr6.nasm37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr7.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr7.c38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr7.nasm37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDs.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDs.c38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDs.nasm37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadEflags.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadEflags.c39
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadEflags.nasm38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadEs.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadEs.c38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadEs.nasm37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadFs.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadFs.c38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadFs.nasm37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadGdtr.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadGdtr.c39
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadGdtr.nasm38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadGs.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadGs.c38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadGs.nasm37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadIdtr.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadIdtr.c38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadIdtr.nasm38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadLdtr.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadLdtr.c37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadLdtr.nasm37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm0.asm45
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm0.c42
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm0.nasm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm1.asm45
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm1.c42
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm1.nasm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm2.asm45
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm2.c42
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm2.nasm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm3.asm45
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm3.c42
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm3.nasm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm4.asm45
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm4.c42
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm4.nasm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm5.asm45
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm5.c42
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm5.nasm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm6.asm45
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm6.c42
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm6.nasm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm7.asm45
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm7.c42
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm7.nasm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMsr64.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMsr64.c43
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMsr64.nasm38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadPmc.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadPmc.c37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadPmc.nasm38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadSs.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadSs.c38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadSs.nasm37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadTr.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadTr.c37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadTr.nasm37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadTsc.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadTsc.c37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadTsc.nasm37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/SetJump.S44
-rw-r--r--MdePkg/Library/BaseLib/Ia32/SetJump.asm51
-rw-r--r--MdePkg/Library/BaseLib/Ia32/SetJump.c74
-rw-r--r--MdePkg/Library/BaseLib/Ia32/SetJump.nasm48
-rw-r--r--MdePkg/Library/BaseLib/Ia32/SwapBytes64.S38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/SwapBytes64.asm43
-rw-r--r--MdePkg/Library/BaseLib/Ia32/SwapBytes64.c43
-rw-r--r--MdePkg/Library/BaseLib/Ia32/SwapBytes64.nasm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Thunk16.S222
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Thunk16.asm260
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Thunk16.nasm263
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Wbinvd.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Wbinvd.c35
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Wbinvd.nasm37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteCr0.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteCr0.c37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteCr0.nasm38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteCr2.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteCr2.c37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteCr2.nasm38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteCr3.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteCr3.c37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteCr3.nasm38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteCr4.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteCr4.c39
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteCr4.nasm38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr0.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr0.c37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr0.nasm38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr1.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr1.c37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr1.nasm38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr2.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr2.c37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr2.nasm38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr3.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr3.c37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr3.nasm38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr4.asm48
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr4.c39
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr4.nasm45
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr5.asm48
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr5.c39
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr5.nasm45
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr6.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr6.c37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr6.nasm38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr7.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr7.c37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr7.nasm38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteGdtr.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteGdtr.c39
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteGdtr.nasm38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteIdtr.asm44
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteIdtr.c41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteIdtr.nasm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteLdtr.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteLdtr.c39
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteLdtr.nasm38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm0.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm0.c38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm0.nasm37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm1.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm1.c38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm1.nasm37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm2.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm2.c38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm2.nasm37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm3.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm3.c38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm3.nasm37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm4.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm4.c37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm4.nasm37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm5.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm5.c37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm5.nasm37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm6.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm6.c38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm6.nasm37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm7.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm7.c38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm7.nasm37
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMsr64.asm44
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMsr64.c49
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMsr64.nasm41
307 files changed, 15796 insertions, 0 deletions
diff --git a/MdePkg/Library/BaseLib/Ia32/ARShiftU64.S b/MdePkg/Library/BaseLib/Ia32/ARShiftU64.S
new file mode 100644
index 000000000000..32f84199c967
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ARShiftU64.S
@@ -0,0 +1,43 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ARShiftU64.S
+#
+# Abstract:
+#
+# 64-bit arithmetic right shift function for IA-32
+#
+#------------------------------------------------------------------------------
+
+ASM_GLOBAL ASM_PFX(InternalMathARShiftU64)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# InternalMathARShiftU64 (
+# IN UINT64 Operand,
+# IN UINTN Count
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalMathARShiftU64):
+ movb 12(%esp), %cl
+ movl 8(%esp), %eax
+ cltd
+ testb $32, %cl
+ jnz L0
+ movl %eax, %edx
+ movl 4(%esp), %eax
+L0:
+ shrdl %cl, %edx, %eax
+ sar %cl, %edx
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ARShiftU64.asm b/MdePkg/Library/BaseLib/Ia32/ARShiftU64.asm
new file mode 100644
index 000000000000..478c184a6ef9
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ARShiftU64.asm
@@ -0,0 +1,48 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ARShiftU64.asm
+;
+; Abstract:
+;
+; 64-bit arithmetic right shift function for IA-32
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathARShiftU64 (
+; IN UINT64 Operand,
+; IN UINTN Count
+; );
+;------------------------------------------------------------------------------
+InternalMathARShiftU64 PROC
+ mov cl, [esp + 12]
+ mov eax, [esp + 8]
+ cdq
+ test cl, 32
+ jnz @F
+ mov edx, eax
+ mov eax, [esp + 4]
+@@:
+ shrd eax, edx, cl
+ sar edx, cl
+ ret
+InternalMathARShiftU64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ARShiftU64.c b/MdePkg/Library/BaseLib/Ia32/ARShiftU64.c
new file mode 100644
index 000000000000..c2ebaeb33b4b
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ARShiftU64.c
@@ -0,0 +1,51 @@
+/** @file
+ 64-bit arithmetic right shift function for IA-32.
+
+ Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Shifts a 64-bit integer right between 0 and 63 bits. The high bits
+ are filled with original integer's bit 63. The shifted value is returned.
+
+ This function shifts the 64-bit value Operand to the right by Count bits. The
+ high Count bits are set to bit 63 of Operand. The shifted value is returned.
+
+ @param Operand The 64-bit operand to shift right.
+ @param Count The number of bits to shift right.
+
+ @return Operand arithmetically shifted right by Count.
+
+**/
+UINT64
+EFIAPI
+InternalMathARShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ _asm {
+ mov cl, byte ptr [Count]
+ mov eax, dword ptr [Operand + 4]
+ cdq
+ test cl, 32
+ jnz L0
+ mov edx, eax
+ mov eax, dword ptr [Operand + 0]
+L0:
+ shrd eax, edx, cl
+ sar edx, cl
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ARShiftU64.nasm b/MdePkg/Library/BaseLib/Ia32/ARShiftU64.nasm
new file mode 100644
index 000000000000..448e3ab8d230
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ARShiftU64.nasm
@@ -0,0 +1,45 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ARShiftU64.nasm
+;
+; Abstract:
+;
+; 64-bit arithmetic right shift function for IA-32
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathARShiftU64 (
+; IN UINT64 Operand,
+; IN UINTN Count
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(InternalMathARShiftU64)
+ASM_PFX(InternalMathARShiftU64):
+ mov cl, [esp + 12]
+ mov eax, [esp + 8]
+ cdq
+ test cl, 32
+ jnz .0
+ mov edx, eax
+ mov eax, [esp + 4]
+.0:
+ shrd eax, edx, cl
+ sar edx, cl
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/CpuBreakpoint.asm b/MdePkg/Library/BaseLib/Ia32/CpuBreakpoint.asm
new file mode 100644
index 000000000000..f4ce3f90b106
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/CpuBreakpoint.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------ ;
+; Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuBreakpoint.Asm
+;
+; Abstract:
+;
+; CpuBreakpoint function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; CpuBreakpoint (
+; VOID
+; );
+;------------------------------------------------------------------------------
+CpuBreakpoint PROC
+ int 3
+ ret
+CpuBreakpoint ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/CpuBreakpoint.c b/MdePkg/Library/BaseLib/Ia32/CpuBreakpoint.c
new file mode 100644
index 000000000000..23a773a04384
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/CpuBreakpoint.c
@@ -0,0 +1,41 @@
+/** @file
+ CpuBreakpoint function.
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics.
+**/
+
+void __debugbreak ();
+
+#pragma intrinsic(__debugbreak)
+
+/**
+ Generates a breakpoint on the CPU.
+
+ Generates a breakpoint on the CPU. The breakpoint must be implemented such
+ that code can resume normal execution after the breakpoint.
+
+**/
+VOID
+EFIAPI
+CpuBreakpoint (
+ VOID
+ )
+{
+ __debugbreak ();
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/CpuBreakpoint.nasm b/MdePkg/Library/BaseLib/Ia32/CpuBreakpoint.nasm
new file mode 100644
index 000000000000..4f91895e7b05
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/CpuBreakpoint.nasm
@@ -0,0 +1,36 @@
+;------------------------------------------------------------------------------ ;
+; Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuBreakpoint.Asm
+;
+; Abstract:
+;
+; CpuBreakpoint function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; CpuBreakpoint (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(CpuBreakpoint)
+ASM_PFX(CpuBreakpoint):
+ int 3
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/CpuId.S b/MdePkg/Library/BaseLib/Ia32/CpuId.S
new file mode 100644
index 000000000000..6f9e10c8f3ca
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/CpuId.S
@@ -0,0 +1,63 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# CpuId.S
+#
+# Abstract:
+#
+# AsmCpuid function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+ASM_GLOBAL ASM_PFX(AsmCpuid)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmCpuid (
+# IN UINT32 RegisterInEax,
+# OUT UINT32 *RegisterOutEax OPTIONAL,
+# OUT UINT32 *RegisterOutEbx OPTIONAL,
+# OUT UINT32 *RegisterOutEcx OPTIONAL,
+# OUT UINT32 *RegisterOutEdx OPTIONAL
+# )
+#------------------------------------------------------------------------------
+ASM_PFX(AsmCpuid):
+ push %ebx
+ push %ebp
+ movl %esp, %ebp
+ movl 12(%ebp), %eax
+ cpuid
+ push %ecx
+ movl 16(%ebp), %ecx
+ jecxz L1
+ movl %eax, (%ecx)
+L1:
+ movl 20(%ebp), %ecx
+ jecxz L2
+ movl %ebx, (%ecx)
+L2:
+ movl 24(%ebp), %ecx
+ jecxz L3
+ popl (%ecx)
+L3:
+ movl 28(%ebp), %ecx
+ jecxz L4
+ movl %edx, (%ecx)
+L4:
+ movl 12(%ebp), %eax
+ leave
+ pop %ebx
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/CpuId.asm b/MdePkg/Library/BaseLib/Ia32/CpuId.asm
new file mode 100644
index 000000000000..e2f9d0b1466f
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/CpuId.asm
@@ -0,0 +1,66 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuId.Asm
+;
+; Abstract:
+;
+; AsmCpuid function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmCpuid (
+; IN UINT32 RegisterInEax,
+; OUT UINT32 *RegisterOutEax OPTIONAL,
+; OUT UINT32 *RegisterOutEbx OPTIONAL,
+; OUT UINT32 *RegisterOutEcx OPTIONAL,
+; OUT UINT32 *RegisterOutEdx OPTIONAL
+; );
+;------------------------------------------------------------------------------
+AsmCpuid PROC USES ebx
+ push ebp
+ mov ebp, esp
+ mov eax, [ebp + 12]
+ cpuid
+ push ecx
+ mov ecx, [ebp + 16]
+ jecxz @F
+ mov [ecx], eax
+@@:
+ mov ecx, [ebp + 20]
+ jecxz @F
+ mov [ecx], ebx
+@@:
+ mov ecx, [ebp + 24]
+ jecxz @F
+ pop DWORD [ecx]
+@@:
+ mov ecx, [ebp + 28]
+ jecxz @F
+ mov [ecx], edx
+@@:
+ mov eax, [ebp + 12]
+ leave
+ ret
+AsmCpuid ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/CpuId.c b/MdePkg/Library/BaseLib/Ia32/CpuId.c
new file mode 100644
index 000000000000..d9c72662e62c
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/CpuId.c
@@ -0,0 +1,74 @@
+/** @file
+ AsmCpuid function.
+
+ Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+/**
+ Retrieves CPUID information.
+
+ Executes the CPUID instruction with EAX set to the value specified by Index.
+ This function always returns Index.
+ If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.
+ If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.
+ If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.
+ If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.
+ This function is only available on IA-32 and x64.
+
+ @param Index The 32-bit value to load into EAX prior to invoking the CPUID
+ instruction.
+ @param RegisterEax A pointer to the 32-bit EAX value returned by the CPUID
+ instruction. This is an optional parameter that may be NULL.
+ @param RegisterEbx A pointer to the 32-bit EBX value returned by the CPUID
+ instruction. This is an optional parameter that may be NULL.
+ @param RegisterEcx A pointer to the 32-bit ECX value returned by the CPUID
+ instruction. This is an optional parameter that may be NULL.
+ @param RegisterEdx A pointer to the 32-bit EDX value returned by the CPUID
+ instruction. This is an optional parameter that may be NULL.
+
+ @return Index.
+
+**/
+UINT32
+EFIAPI
+AsmCpuid (
+ IN UINT32 Index,
+ OUT UINT32 *RegisterEax, OPTIONAL
+ OUT UINT32 *RegisterEbx, OPTIONAL
+ OUT UINT32 *RegisterEcx, OPTIONAL
+ OUT UINT32 *RegisterEdx OPTIONAL
+ )
+{
+ _asm {
+ mov eax, Index
+ cpuid
+ push ecx
+ mov ecx, RegisterEax
+ jecxz SkipEax
+ mov [ecx], eax
+SkipEax:
+ mov ecx, RegisterEbx
+ jecxz SkipEbx
+ mov [ecx], ebx
+SkipEbx:
+ pop eax
+ mov ecx, RegisterEcx
+ jecxz SkipEcx
+ mov [ecx], eax
+SkipEcx:
+ mov ecx, RegisterEdx
+ jecxz SkipEdx
+ mov [ecx], edx
+SkipEdx:
+ mov eax, Index
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/CpuId.nasm b/MdePkg/Library/BaseLib/Ia32/CpuId.nasm
new file mode 100644
index 000000000000..5996b9263289
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/CpuId.nasm
@@ -0,0 +1,65 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuId.Asm
+;
+; Abstract:
+;
+; AsmCpuid function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmCpuid (
+; IN UINT32 RegisterInEax,
+; OUT UINT32 *RegisterOutEax OPTIONAL,
+; OUT UINT32 *RegisterOutEbx OPTIONAL,
+; OUT UINT32 *RegisterOutEcx OPTIONAL,
+; OUT UINT32 *RegisterOutEdx OPTIONAL
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmCpuid)
+ASM_PFX(AsmCpuid):
+ push ebx
+ push ebp
+ mov ebp, esp
+ mov eax, [ebp + 12]
+ cpuid
+ push ecx
+ mov ecx, [ebp + 16]
+ jecxz .0
+ mov [ecx], eax
+.0:
+ mov ecx, [ebp + 20]
+ jecxz .1
+ mov [ecx], ebx
+.1:
+ mov ecx, [ebp + 24]
+ jecxz .2
+ pop DWORD [ecx]
+.2:
+ mov ecx, [ebp + 28]
+ jecxz .3
+ mov [ecx], edx
+.3:
+ mov eax, [ebp + 12]
+ leave
+ pop ebx
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/CpuIdEx.S b/MdePkg/Library/BaseLib/Ia32/CpuIdEx.S
new file mode 100644
index 000000000000..edcaa89b5141
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/CpuIdEx.S
@@ -0,0 +1,67 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# CpuIdEx.S
+#
+# Abstract:
+#
+# AsmCpuidEx function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+ .code:
+
+#------------------------------------------------------------------------------
+# UINT32
+# EFIAPI
+# AsmCpuidEx (
+# IN UINT32 RegisterInEax,
+# IN UINT32 RegisterInEcx,
+# OUT UINT32 *RegisterOutEax OPTIONAL,
+# OUT UINT32 *RegisterOutEbx OPTIONAL,
+# OUT UINT32 *RegisterOutEcx OPTIONAL,
+# OUT UINT32 *RegisterOutEdx OPTIONAL
+# )
+#------------------------------------------------------------------------------
+ASM_GLOBAL ASM_PFX(AsmCpuidEx)
+ASM_PFX(AsmCpuidEx):
+ push %ebx
+ push %ebp
+ movl %esp, %ebp
+ movl 12(%ebp), %eax
+ movl 16(%ebp), %ecx
+ cpuid
+ push %ecx
+ movl 20(%ebp), %ecx
+ jecxz L1
+ movl %eax, (%ecx)
+L1:
+ movl 24(%ebp), %ecx
+ jecxz L2
+ movl %ebx, (%ecx)
+L2:
+ movl 32(%ebp), %ecx
+ jecxz L3
+ movl %edx, (%ecx)
+L3:
+ movl 28(%ebp), %ecx
+ jecxz L4
+ popl (%ecx)
+L4:
+ movl 12(%ebp), %eax
+ leave
+ pop %ebx
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/CpuIdEx.asm b/MdePkg/Library/BaseLib/Ia32/CpuIdEx.asm
new file mode 100644
index 000000000000..1b2ccb58b047
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/CpuIdEx.asm
@@ -0,0 +1,68 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuIdEx.Asm
+;
+; Abstract:
+;
+; AsmCpuidEx function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; AsmCpuidEx (
+; IN UINT32 RegisterInEax,
+; IN UINT32 RegisterInEcx,
+; OUT UINT32 *RegisterOutEax OPTIONAL,
+; OUT UINT32 *RegisterOutEbx OPTIONAL,
+; OUT UINT32 *RegisterOutEcx OPTIONAL,
+; OUT UINT32 *RegisterOutEdx OPTIONAL
+; )
+;------------------------------------------------------------------------------
+AsmCpuidEx PROC USES ebx
+ push ebp
+ mov ebp, esp
+ mov eax, [ebp + 12]
+ mov ecx, [ebp + 16]
+ cpuid
+ push ecx
+ mov ecx, [ebp + 20]
+ jecxz @F
+ mov [ecx], eax
+@@:
+ mov ecx, [ebp + 24]
+ jecxz @F
+ mov [ecx], ebx
+@@:
+ mov ecx, [ebp + 32]
+ jecxz @F
+ mov [ecx], edx
+@@:
+ mov ecx, [ebp + 28]
+ jecxz @F
+ pop DWORD [ecx]
+@@:
+ mov eax, [ebp + 12]
+ leave
+ ret
+AsmCpuidEx ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/CpuIdEx.c b/MdePkg/Library/BaseLib/Ia32/CpuIdEx.c
new file mode 100644
index 000000000000..1b3d91dcaa4f
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/CpuIdEx.c
@@ -0,0 +1,82 @@
+/** @file
+ AsmCpuidEx function.
+
+ Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+/**
+ Retrieves CPUID information using an extended leaf identifier.
+
+ Executes the CPUID instruction with EAX set to the value specified by Index
+ and ECX set to the value specified by SubIndex. This function always returns
+ Index. This function is only available on IA-32 and x64.
+
+ If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.
+ If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.
+ If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.
+ If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.
+
+ @param Index The 32-bit value to load into EAX prior to invoking the
+ CPUID instruction.
+ @param SubIndex The 32-bit value to load into ECX prior to invoking the
+ CPUID instruction.
+ @param RegisterEax A pointer to the 32-bit EAX value returned by the CPUID
+ instruction. This is an optional parameter that may be
+ NULL.
+ @param RegisterEbx A pointer to the 32-bit EBX value returned by the CPUID
+ instruction. This is an optional parameter that may be
+ NULL.
+ @param RegisterEcx A pointer to the 32-bit ECX value returned by the CPUID
+ instruction. This is an optional parameter that may be
+ NULL.
+ @param RegisterEdx A pointer to the 32-bit EDX value returned by the CPUID
+ instruction. This is an optional parameter that may be
+ NULL.
+
+ @return Index.
+
+**/
+UINT32
+EFIAPI
+AsmCpuidEx (
+ IN UINT32 Index,
+ IN UINT32 SubIndex,
+ OUT UINT32 *RegisterEax, OPTIONAL
+ OUT UINT32 *RegisterEbx, OPTIONAL
+ OUT UINT32 *RegisterEcx, OPTIONAL
+ OUT UINT32 *RegisterEdx OPTIONAL
+ )
+{
+ _asm {
+ mov eax, Index
+ mov ecx, SubIndex
+ cpuid
+ push ecx
+ mov ecx, RegisterEax
+ jecxz SkipEax
+ mov [ecx], eax
+SkipEax:
+ mov ecx, RegisterEbx
+ jecxz SkipEbx
+ mov [ecx], ebx
+SkipEbx:
+ pop eax
+ mov ecx, RegisterEcx
+ jecxz SkipEcx
+ mov [ecx], eax
+SkipEcx:
+ mov ecx, RegisterEdx
+ jecxz SkipEdx
+ mov [ecx], edx
+SkipEdx:
+ mov eax, Index
+ }
+}
diff --git a/MdePkg/Library/BaseLib/Ia32/CpuIdEx.nasm b/MdePkg/Library/BaseLib/Ia32/CpuIdEx.nasm
new file mode 100644
index 000000000000..e3d16ec109f2
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/CpuIdEx.nasm
@@ -0,0 +1,67 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuIdEx.Asm
+;
+; Abstract:
+;
+; AsmCpuidEx function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; AsmCpuidEx (
+; IN UINT32 RegisterInEax,
+; IN UINT32 RegisterInEcx,
+; OUT UINT32 *RegisterOutEax OPTIONAL,
+; OUT UINT32 *RegisterOutEbx OPTIONAL,
+; OUT UINT32 *RegisterOutEcx OPTIONAL,
+; OUT UINT32 *RegisterOutEdx OPTIONAL
+; )
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmCpuidEx)
+ASM_PFX(AsmCpuidEx):
+ push ebx
+ push ebp
+ mov ebp, esp
+ mov eax, [ebp + 12]
+ mov ecx, [ebp + 16]
+ cpuid
+ push ecx
+ mov ecx, [ebp + 20]
+ jecxz .0
+ mov [ecx], eax
+.0:
+ mov ecx, [ebp + 24]
+ jecxz .1
+ mov [ecx], ebx
+.1:
+ mov ecx, [ebp + 32]
+ jecxz .2
+ mov [ecx], edx
+.2:
+ mov ecx, [ebp + 28]
+ jecxz .3
+ pop DWORD [ecx]
+.3:
+ mov eax, [ebp + 12]
+ leave
+ pop ebx
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/CpuPause.asm b/MdePkg/Library/BaseLib/Ia32/CpuPause.asm
new file mode 100644
index 000000000000..14ff32286b2a
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/CpuPause.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------ ;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuPause.Asm
+;
+; Abstract:
+;
+; CpuPause function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; CpuPause (
+; VOID
+; );
+;------------------------------------------------------------------------------
+CpuPause PROC
+ pause
+ ret
+CpuPause ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/CpuPause.c b/MdePkg/Library/BaseLib/Ia32/CpuPause.c
new file mode 100644
index 000000000000..e3094e228d88
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/CpuPause.c
@@ -0,0 +1,35 @@
+/** @file
+ CpuPause function.
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Requests CPU to pause for a short period of time.
+
+ Requests CPU to pause for a short period of time. Typically used in MP
+ systems to prevent memory starvation while waiting for a spin lock.
+
+**/
+VOID
+EFIAPI
+CpuPause (
+ VOID
+ )
+{
+ _asm {
+ pause
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/CpuPause.nasm b/MdePkg/Library/BaseLib/Ia32/CpuPause.nasm
new file mode 100644
index 000000000000..fb92687669fa
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/CpuPause.nasm
@@ -0,0 +1,36 @@
+;------------------------------------------------------------------------------ ;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuPause.Asm
+;
+; Abstract:
+;
+; CpuPause function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; CpuPause (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(CpuPause)
+ASM_PFX(CpuPause):
+ pause
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/DisableCache.S b/MdePkg/Library/BaseLib/Ia32/DisableCache.S
new file mode 100644
index 000000000000..cadfa7a496c3
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DisableCache.S
@@ -0,0 +1,39 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# DisableCache.S
+#
+# Abstract:
+#
+# Set the CD bit of CR0 to 1, clear the NW bit of CR0 to 0, and flush all caches with a
+# WBINVD instruction.
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmDisableCache (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_GLOBAL ASM_PFX(AsmDisableCache)
+ASM_PFX(AsmDisableCache):
+ movl %cr0, %eax
+ btsl $30, %eax
+ btrl $29, %eax
+ movl %eax, %cr0
+ wbinvd
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/DisableCache.asm b/MdePkg/Library/BaseLib/Ia32/DisableCache.asm
new file mode 100644
index 000000000000..35ed81c8617d
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DisableCache.asm
@@ -0,0 +1,45 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DisableCache.Asm
+;
+; Abstract:
+;
+; Set the CD bit of CR0 to 1, clear the NW bit of CR0 to 0, and flush all caches with a
+; WBINVD instruction.
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .486p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmDisableCache (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmDisableCache PROC
+ mov eax, cr0
+ bts eax, 30
+ btr eax, 29
+ mov cr0, eax
+ wbinvd
+ ret
+AsmDisableCache ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/DisableCache.c b/MdePkg/Library/BaseLib/Ia32/DisableCache.c
new file mode 100644
index 000000000000..598063949804
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DisableCache.c
@@ -0,0 +1,36 @@
+/** @file
+ AsmDisableCache function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+/**
+ Set CD bit and clear NW bit of CR0 followed by a WBINVD.
+
+ Disables the caches by setting the CD bit of CR0 to 1, clearing the NW bit of CR0 to 0,
+ and executing a WBINVD instruction. This function is only available on IA-32 and x64.
+
+**/
+VOID
+EFIAPI
+AsmDisableCache (
+ VOID
+ )
+{
+ _asm {
+ mov eax, cr0
+ bts eax, 30
+ btr eax, 29
+ mov cr0, eax
+ wbinvd
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/DisableCache.nasm b/MdePkg/Library/BaseLib/Ia32/DisableCache.nasm
new file mode 100644
index 000000000000..c956b7230b66
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DisableCache.nasm
@@ -0,0 +1,42 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DisableCache.Asm
+;
+; Abstract:
+;
+; Set the CD bit of CR0 to 1, clear the NW bit of CR0 to 0, and flush all caches with a
+; WBINVD instruction.
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmDisableCache (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmDisableCache)
+ASM_PFX(AsmDisableCache):
+ mov eax, cr0
+ bts eax, 30
+ btr eax, 29
+ mov cr0, eax
+ wbinvd
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/DisableInterrupts.asm b/MdePkg/Library/BaseLib/Ia32/DisableInterrupts.asm
new file mode 100644
index 000000000000..f6e47b5531bf
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DisableInterrupts.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DisableInterrupts.Asm
+;
+; Abstract:
+;
+; DisableInterrupts function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; DisableInterrupts (
+; VOID
+; );
+;------------------------------------------------------------------------------
+DisableInterrupts PROC
+ cli
+ ret
+DisableInterrupts ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/DisableInterrupts.c b/MdePkg/Library/BaseLib/Ia32/DisableInterrupts.c
new file mode 100644
index 000000000000..a20b3d3064d1
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DisableInterrupts.c
@@ -0,0 +1,32 @@
+/** @file
+ DisableInterrupts function.
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Disables CPU interrupts.
+
+**/
+VOID
+EFIAPI
+DisableInterrupts (
+ VOID
+ )
+{
+ _asm {
+ cli
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/DisableInterrupts.nasm b/MdePkg/Library/BaseLib/Ia32/DisableInterrupts.nasm
new file mode 100644
index 000000000000..ccf69b08a798
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DisableInterrupts.nasm
@@ -0,0 +1,37 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DisableInterrupts.Asm
+;
+; Abstract:
+;
+; DisableInterrupts function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; DisableInterrupts (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(DisableInterrupts)
+ASM_PFX(DisableInterrupts):
+ cli
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/DisablePaging32.S b/MdePkg/Library/BaseLib/Ia32/DisablePaging32.S
new file mode 100644
index 000000000000..08b3cc6b6859
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DisablePaging32.S
@@ -0,0 +1,52 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# DisablePaging32.S
+#
+# Abstract:
+#
+# InternalX86DisablePaging32 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+ASM_GLOBAL ASM_PFX(InternalX86DisablePaging32)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# InternalX86DisablePaging32 (
+# IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+# IN VOID *Context1, OPTIONAL
+# IN VOID *Context2, OPTIONAL
+# IN VOID *NewStack
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalX86DisablePaging32):
+ movl 4(%esp), %ebx
+ movl 8(%esp), %ecx
+ movl 12(%esp), %edx
+ pushfl
+ pop %edi # save EFLAGS to edi
+ cli
+ movl %cr0, %eax
+ btrl $31, %eax
+ movl 16(%esp), %esp
+ movl %eax, %cr0
+ push %edi
+ popfl # restore EFLAGS from edi
+ push %edx
+ push %ecx
+ call *%ebx
+ jmp . # EntryPoint() should not return
diff --git a/MdePkg/Library/BaseLib/Ia32/DisablePaging32.asm b/MdePkg/Library/BaseLib/Ia32/DisablePaging32.asm
new file mode 100644
index 000000000000..ce6f23f97b92
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DisablePaging32.asm
@@ -0,0 +1,57 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DisablePaging32.Asm
+;
+; Abstract:
+;
+; AsmDisablePaging32 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86DisablePaging32 (
+; IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+; IN VOID *Context1, OPTIONAL
+; IN VOID *Context2, OPTIONAL
+; IN VOID *NewStack
+; );
+;------------------------------------------------------------------------------
+InternalX86DisablePaging32 PROC
+ mov ebx, [esp + 4]
+ mov ecx, [esp + 8]
+ mov edx, [esp + 12]
+ pushfd
+ pop edi ; save EFLAGS to edi
+ cli
+ mov eax, cr0
+ btr eax, 31
+ mov esp, [esp + 16]
+ mov cr0, eax
+ push edi
+ popfd ; restore EFLAGS from edi
+ push edx
+ push ecx
+ call ebx
+ jmp $ ; EntryPoint() should not return
+InternalX86DisablePaging32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/DisablePaging32.c b/MdePkg/Library/BaseLib/Ia32/DisablePaging32.c
new file mode 100644
index 000000000000..eb7556652d45
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DisablePaging32.c
@@ -0,0 +1,77 @@
+/** @file
+ AsmDisablePaging32 function.
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Disables the 32-bit paging mode on the CPU.
+
+ Disables the 32-bit paging mode on the CPU and returns to 32-bit protected
+ mode. This function assumes the current execution mode is 32-paged protected
+ mode. This function is only available on IA-32. After the 32-bit paging mode
+ is disabled, control is transferred to the function specified by EntryPoint
+ using the new stack specified by NewStack and passing in the parameters
+ specified by Context1 and Context2. Context1 and Context2 are optional and
+ may be NULL. The function EntryPoint must never return.
+
+ There are a number of constraints that must be followed before calling this
+ function:
+ 1) Interrupts must be disabled.
+ 2) The caller must be in 32-bit paged mode.
+ 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.
+ 4) CR3 must point to valid page tables that guarantee that the pages for
+ this function and the stack are identity mapped.
+
+ @param EntryPoint A pointer to function to call with the new stack after
+ paging is disabled.
+ @param Context1 A pointer to the context to pass into the EntryPoint
+ function as the first parameter after paging is disabled.
+ @param Context2 A pointer to the context to pass into the EntryPoint
+ function as the second parameter after paging is
+ disabled.
+ @param NewStack A pointer to the new stack to use for the EntryPoint
+ function after paging is disabled.
+
+**/
+__declspec (naked)
+VOID
+EFIAPI
+InternalX86DisablePaging32 (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack
+ )
+{
+ _asm {
+ push ebp
+ mov ebp, esp
+ mov ebx, EntryPoint
+ mov ecx, Context1
+ mov edx, Context2
+ pushfd
+ pop edi // save EFLAGS to edi
+ cli
+ mov eax, cr0
+ btr eax, 31
+ mov esp, NewStack
+ mov cr0, eax
+ push edi
+ popfd // restore EFLAGS from edi
+ push edx
+ push ecx
+ call ebx
+ jmp $ // EntryPoint() should not return
+ }
+}
diff --git a/MdePkg/Library/BaseLib/Ia32/DisablePaging32.nasm b/MdePkg/Library/BaseLib/Ia32/DisablePaging32.nasm
new file mode 100644
index 000000000000..62813c968c00
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DisablePaging32.nasm
@@ -0,0 +1,54 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DisablePaging32.Asm
+;
+; Abstract:
+;
+; AsmDisablePaging32 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86DisablePaging32 (
+; IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+; IN VOID *Context1, OPTIONAL
+; IN VOID *Context2, OPTIONAL
+; IN VOID *NewStack
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(InternalX86DisablePaging32)
+ASM_PFX(InternalX86DisablePaging32):
+ mov ebx, [esp + 4]
+ mov ecx, [esp + 8]
+ mov edx, [esp + 12]
+ pushfd
+ pop edi ; save EFLAGS to edi
+ cli
+ mov eax, cr0
+ btr eax, 31
+ mov esp, [esp + 16]
+ mov cr0, eax
+ push edi
+ popfd ; restore EFLAGS from edi
+ push edx
+ push ecx
+ call ebx
+ jmp $ ; EntryPoint() should not return
+
diff --git a/MdePkg/Library/BaseLib/Ia32/DivS64x64Remainder.c b/MdePkg/Library/BaseLib/Ia32/DivS64x64Remainder.c
new file mode 100644
index 000000000000..90c1042a05eb
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DivS64x64Remainder.c
@@ -0,0 +1,53 @@
+/** @file
+ Integer division worker functions for Ia32.
+
+ Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Worker function that Divides a 64-bit signed integer by a 64-bit signed integer and
+ generates a 64-bit signed result and a optional 64-bit signed remainder.
+
+ This function divides the 64-bit signed value Dividend by the 64-bit
+ signed value Divisor and generates a 64-bit signed quotient. If Remainder
+ is not NULL, then the 64-bit signed remainder is returned in Remainder.
+ This function returns the 64-bit signed quotient.
+
+ @param Dividend A 64-bit signed value.
+ @param Divisor A 64-bit signed value.
+ @param Remainder A pointer to a 64-bit signed value. This parameter is
+ optional and may be NULL.
+
+ @return Dividend / Divisor
+
+**/
+INT64
+EFIAPI
+InternalMathDivRemS64x64 (
+ IN INT64 Dividend,
+ IN INT64 Divisor,
+ OUT INT64 *Remainder OPTIONAL
+ )
+{
+ INT64 Quot;
+
+ Quot = InternalMathDivRemU64x64 (
+ (UINT64) (Dividend >= 0 ? Dividend : -Dividend),
+ (UINT64) (Divisor >= 0 ? Divisor : -Divisor),
+ (UINT64 *) Remainder
+ );
+ if (Remainder != NULL && Dividend < 0) {
+ *Remainder = -*Remainder;
+ }
+ return (Dividend ^ Divisor) >= 0 ? Quot : -Quot;
+}
diff --git a/MdePkg/Library/BaseLib/Ia32/DivU64x32.S b/MdePkg/Library/BaseLib/Ia32/DivU64x32.S
new file mode 100644
index 000000000000..55a6854860c9
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DivU64x32.S
@@ -0,0 +1,41 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# DivU64x32.S
+#
+# Abstract:
+#
+# Calculate the quotient of a 64-bit integer by a 32-bit integer
+#
+#------------------------------------------------------------------------------
+
+ASM_GLOBAL ASM_PFX(InternalMathDivU64x32)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# InternalMathDivU64x32 (
+# IN UINT64 Dividend,
+# IN UINT32 Divisor
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalMathDivU64x32):
+ movl 8(%esp), %eax
+ movl 12(%esp), %ecx
+ xorl %edx, %edx
+ divl %ecx
+ push %eax # save quotient on stack
+ movl 8(%esp), %eax
+ divl %ecx
+ pop %edx # restore high-order dword of the quotient
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/DivU64x32.asm b/MdePkg/Library/BaseLib/Ia32/DivU64x32.asm
new file mode 100644
index 000000000000..838241fe12ae
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DivU64x32.asm
@@ -0,0 +1,46 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DivU64x32.asm
+;
+; Abstract:
+;
+; Calculate the quotient of a 64-bit integer by a 32-bit integer
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathDivU64x32 (
+; IN UINT64 Dividend,
+; IN UINT32 Divisor
+; );
+;------------------------------------------------------------------------------
+InternalMathDivU64x32 PROC
+ mov eax, [esp + 8]
+ mov ecx, [esp + 12]
+ xor edx, edx
+ div ecx
+ push eax ; save quotient on stack
+ mov eax, [esp + 8]
+ div ecx
+ pop edx ; restore high-order dword of the quotient
+ ret
+InternalMathDivU64x32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/DivU64x32.c b/MdePkg/Library/BaseLib/Ia32/DivU64x32.c
new file mode 100644
index 000000000000..e680bf2dd2c8
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DivU64x32.c
@@ -0,0 +1,50 @@
+/** @file
+ Calculate the quotient of a 64-bit integer by a 32-bit integer
+
+ Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Divides a 64-bit unsigned integer by a 32-bit unsigned integer and
+ generates a 64-bit unsigned result.
+
+ This function divides the 64-bit unsigned value Dividend by the 32-bit
+ unsigned value Divisor and generates a 64-bit unsigned quotient. This
+ function returns the 64-bit unsigned quotient.
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 32-bit unsigned value.
+
+ @return Dividend / Divisor
+
+**/
+UINT64
+EFIAPI
+InternalMathDivU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor
+ )
+{
+ _asm {
+ mov eax, dword ptr [Dividend + 4]
+ mov ecx, Divisor
+ xor edx, edx
+ div ecx
+ push eax ; save quotient on stack
+ mov eax, dword ptr [Dividend]
+ div ecx
+ pop edx ; restore high-order dword of the quotient
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/DivU64x32.nasm b/MdePkg/Library/BaseLib/Ia32/DivU64x32.nasm
new file mode 100644
index 000000000000..6b96f8299ea2
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DivU64x32.nasm
@@ -0,0 +1,43 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DivU64x32.nasm
+;
+; Abstract:
+;
+; Calculate the quotient of a 64-bit integer by a 32-bit integer
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathDivU64x32 (
+; IN UINT64 Dividend,
+; IN UINT32 Divisor
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(InternalMathDivU64x32)
+ASM_PFX(InternalMathDivU64x32):
+ mov eax, [esp + 8]
+ mov ecx, [esp + 12]
+ xor edx, edx
+ div ecx
+ push eax ; save quotient on stack
+ mov eax, [esp + 8]
+ div ecx
+ pop edx ; restore high-order dword of the quotient
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.S b/MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.S
new file mode 100644
index 000000000000..743abf272ba4
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.S
@@ -0,0 +1,46 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# DivError.S
+#
+# Abstract:
+#
+# Set error flag for all division functions
+#
+#------------------------------------------------------------------------------
+
+ASM_GLOBAL ASM_PFX(InternalMathDivRemU64x32)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# InternalMathDivRemU64x32 (
+# IN UINT64 Dividend,
+# IN UINT32 Divisor,
+# OUT UINT32 *Remainder
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalMathDivRemU64x32):
+ movl 12(%esp), %ecx # ecx <- divisor
+ movl 8(%esp), %eax # eax <- dividend[32..63]
+ xorl %edx, %edx
+ divl %ecx # eax <- quotient[32..63], edx <- remainder
+ push %eax
+ movl 8(%esp), %eax # eax <- dividend[0..31]
+ divl %ecx # eax <- quotient[0..31]
+ movl 20(%esp), %ecx # ecx <- Remainder
+ jecxz L1 # abandon remainder if Remainder == NULL
+ movl %edx, (%ecx)
+L1:
+ pop %edx # edx <- quotient[32..63]
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.asm b/MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.asm
new file mode 100644
index 000000000000..f5e0c11c6c5f
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.asm
@@ -0,0 +1,51 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DivError.asm
+;
+; Abstract:
+;
+; Set error flag for all division functions
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathDivRemU64x32 (
+; IN UINT64 Dividend,
+; IN UINT32 Divisor,
+; OUT UINT32 *Remainder
+; );
+;------------------------------------------------------------------------------
+InternalMathDivRemU64x32 PROC
+ mov ecx, [esp + 12] ; ecx <- divisor
+ mov eax, [esp + 8] ; eax <- dividend[32..63]
+ xor edx, edx
+ div ecx ; eax <- quotient[32..63], edx <- remainder
+ push eax
+ mov eax, [esp + 8] ; eax <- dividend[0..31]
+ div ecx ; eax <- quotient[0..31]
+ mov ecx, [esp + 20] ; ecx <- Remainder
+ jecxz @F ; abandon remainder if Remainder == NULL
+ mov [ecx], edx
+@@:
+ pop edx ; edx <- quotient[32..63]
+ ret
+InternalMathDivRemU64x32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.c b/MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.c
new file mode 100644
index 000000000000..87f9352cf436
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.c
@@ -0,0 +1,55 @@
+/** @file
+ Set error flag for all division functions
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+/**
+ Divides a 64-bit unsigned integer by a 32-bit unsigned integer and
+ generates a 64-bit unsigned result and an optional 32-bit unsigned remainder.
+
+ This function divides the 64-bit unsigned value Dividend by the 32-bit
+ unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
+ is not NULL, then the 32-bit unsigned remainder is returned in Remainder.
+ This function returns the 64-bit unsigned quotient.
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 32-bit unsigned value.
+ @param Remainder A pointer to a 32-bit unsigned value. This parameter is
+ optional and may be NULL.
+
+ @return Dividend / Divisor
+
+**/
+UINT64
+EFIAPI
+InternalMathDivRemU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor,
+ OUT UINT32 *Remainder
+ )
+{
+ _asm {
+ mov ecx, Divisor
+ mov eax, dword ptr [Dividend + 4]
+ xor edx, edx
+ div ecx
+ push eax
+ mov eax, dword ptr [Dividend + 0]
+ div ecx
+ mov ecx, Remainder
+ jecxz RemainderNull // abandon remainder if Remainder == NULL
+ mov [ecx], edx
+RemainderNull:
+ pop edx
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.nasm b/MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.nasm
new file mode 100644
index 000000000000..1ccc4de4aff2
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.nasm
@@ -0,0 +1,48 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DivError.asm
+;
+; Abstract:
+;
+; Set error flag for all division functions
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathDivRemU64x32 (
+; IN UINT64 Dividend,
+; IN UINT32 Divisor,
+; OUT UINT32 *Remainder
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(InternalMathDivRemU64x32)
+ASM_PFX(InternalMathDivRemU64x32):
+ mov ecx, [esp + 12] ; ecx <- divisor
+ mov eax, [esp + 8] ; eax <- dividend[32..63]
+ xor edx, edx
+ div ecx ; eax <- quotient[32..63], edx <- remainder
+ push eax
+ mov eax, [esp + 8] ; eax <- dividend[0..31]
+ div ecx ; eax <- quotient[0..31]
+ mov ecx, [esp + 20] ; ecx <- Remainder
+ jecxz .0 ; abandon remainder if Remainder == NULL
+ mov [ecx], edx
+.0:
+ pop edx ; edx <- quotient[32..63]
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.S b/MdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.S
new file mode 100644
index 000000000000..bd2aeba2e69b
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.S
@@ -0,0 +1,89 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# DivU64x64Remainder.S
+#
+# Abstract:
+#
+# Calculate the quotient of a 64-bit integer by a 64-bit integer and returns
+# both the quotient and the remainder
+#
+#------------------------------------------------------------------------------
+
+ASM_GLOBAL ASM_PFX(InternalMathDivRemU64x32), ASM_PFX(InternalMathDivRemU64x64)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# InternalMathDivRemU64x64 (
+# IN UINT64 Dividend,
+# IN UINT64 Divisor,
+# OUT UINT64 *Remainder OPTIONAL
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalMathDivRemU64x64):
+ movl 16(%esp), %ecx # ecx <- divisor[32..63]
+ testl %ecx, %ecx
+ jnz Hard # call _@DivRemU64x64 if Divisor > 2^32
+ movl 20(%esp), %ecx
+ jecxz L1
+ andl $0, 4(%ecx) # zero high dword of remainder
+ movl %ecx, 16(%esp) # set up stack frame to match DivRemU64x32
+L1:
+ jmp ASM_PFX(InternalMathDivRemU64x32)
+Hard:
+ push %ebx
+ push %esi
+ push %edi
+ mov 20(%esp), %edx
+ mov 16(%esp), %eax # edx:eax <- dividend
+ movl %edx, %edi
+ movl %eax, %esi # edi:esi <- dividend
+ mov 24(%esp), %ebx # ecx:ebx <- divisor
+L2:
+ shrl %edx
+ rcrl $1, %eax
+ shrdl $1, %ecx, %ebx
+ shrl %ecx
+ jnz L2
+ divl %ebx
+ movl %eax, %ebx # ebx <- quotient
+ movl 28(%esp), %ecx # ecx <- high dword of divisor
+ mull 24(%esp) # edx:eax <- quotient * divisor[0..31]
+ imull %ebx, %ecx # ecx <- quotient * divisor[32..63]
+ addl %ecx, %edx # edx <- (quotient * divisor)[32..63]
+ mov 32(%esp), %ecx # ecx <- addr for Remainder
+ jc TooLarge # product > 2^64
+ cmpl %edx, %edi # compare high 32 bits
+ ja Correct
+ jb TooLarge # product > dividend
+ cmpl %eax, %esi
+ jae Correct # product <= dividend
+TooLarge:
+ decl %ebx # adjust quotient by -1
+ jecxz Return # return if Remainder == NULL
+ sub 24(%esp), %eax
+ sbb 28(%esp), %edx # edx:eax <- (quotient - 1) * divisor
+Correct:
+ jecxz Return
+ subl %eax, %esi
+ sbbl %edx, %edi # edi:esi <- remainder
+ movl %esi, (%ecx)
+ movl %edi, 4(%ecx)
+Return:
+ movl %ebx, %eax # eax <- quotient
+ xorl %edx, %edx # quotient is 32 bits long
+ pop %edi
+ pop %esi
+ pop %ebx
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.asm b/MdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.asm
new file mode 100644
index 000000000000..ce352f13b429
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.asm
@@ -0,0 +1,92 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DivU64x64Remainder.asm
+;
+; Abstract:
+;
+; Calculate the quotient of a 64-bit integer by a 64-bit integer and returns
+; both the quotient and the remainder
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+EXTERN InternalMathDivRemU64x32:PROC
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathDivRemU64x64 (
+; IN UINT64 Dividend,
+; IN UINT64 Divisor,
+; OUT UINT64 *Remainder OPTIONAL
+; );
+;------------------------------------------------------------------------------
+InternalMathDivRemU64x64 PROC
+ mov ecx, [esp + 16] ; ecx <- divisor[32..63]
+ test ecx, ecx
+ jnz _@DivRemU64x64 ; call _@DivRemU64x64 if Divisor > 2^32
+ mov ecx, [esp + 20]
+ jecxz @F
+ and dword ptr [ecx + 4], 0 ; zero high dword of remainder
+ mov [esp + 16], ecx ; set up stack frame to match DivRemU64x32
+@@:
+ jmp InternalMathDivRemU64x32
+InternalMathDivRemU64x64 ENDP
+
+_@DivRemU64x64 PROC PRIVATE USES ebx esi edi
+ mov edx, dword ptr [esp + 20]
+ mov eax, dword ptr [esp + 16] ; edx:eax <- dividend
+ mov edi, edx
+ mov esi, eax ; edi:esi <- dividend
+ mov ebx, dword ptr [esp + 24] ; ecx:ebx <- divisor
+@@:
+ shr edx, 1
+ rcr eax, 1
+ shrd ebx, ecx, 1
+ shr ecx, 1
+ jnz @B
+ div ebx
+ mov ebx, eax ; ebx <- quotient
+ mov ecx, [esp + 28] ; ecx <- high dword of divisor
+ mul dword ptr [esp + 24] ; edx:eax <- quotient * divisor[0..31]
+ imul ecx, ebx ; ecx <- quotient * divisor[32..63]
+ add edx, ecx ; edx <- (quotient * divisor)[32..63]
+ mov ecx, dword ptr [esp + 32] ; ecx <- addr for Remainder
+ jc @TooLarge ; product > 2^64
+ cmp edi, edx ; compare high 32 bits
+ ja @Correct
+ jb @TooLarge ; product > dividend
+ cmp esi, eax
+ jae @Correct ; product <= dividend
+@TooLarge:
+ dec ebx ; adjust quotient by -1
+ jecxz @Return ; return if Remainder == NULL
+ sub eax, dword ptr [esp + 24]
+ sbb edx, dword ptr [esp + 28] ; edx:eax <- (quotient - 1) * divisor
+@Correct:
+ jecxz @Return
+ sub esi, eax
+ sbb edi, edx ; edi:esi <- remainder
+ mov [ecx], esi
+ mov [ecx + 4], edi
+@Return:
+ mov eax, ebx ; eax <- quotient
+ xor edx, edx ; quotient is 32 bits long
+ ret
+_@DivRemU64x64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.nasm b/MdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.nasm
new file mode 100644
index 000000000000..c70e1291a9eb
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.nasm
@@ -0,0 +1,94 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DivU64x64Remainder.nasm
+;
+; Abstract:
+;
+; Calculate the quotient of a 64-bit integer by a 64-bit integer and returns
+; both the quotient and the remainder
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+extern ASM_PFX(InternalMathDivRemU64x32)
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathDivRemU64x64 (
+; IN UINT64 Dividend,
+; IN UINT64 Divisor,
+; OUT UINT64 *Remainder OPTIONAL
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(InternalMathDivRemU64x64)
+ASM_PFX(InternalMathDivRemU64x64):
+ mov ecx, [esp + 16] ; ecx <- divisor[32..63]
+ test ecx, ecx
+ jnz _@DivRemU64x64 ; call _@DivRemU64x64 if Divisor > 2^32
+ mov ecx, [esp + 20]
+ jecxz .0
+ and dword [ecx + 4], 0 ; zero high dword of remainder
+ mov [esp + 16], ecx ; set up stack frame to match DivRemU64x32
+.0:
+ jmp ASM_PFX(InternalMathDivRemU64x32)
+
+_@DivRemU64x64:
+ push ebx
+ push esi
+ push edi
+ mov edx, dword [esp + 20]
+ mov eax, dword [esp + 16] ; edx:eax <- dividend
+ mov edi, edx
+ mov esi, eax ; edi:esi <- dividend
+ mov ebx, dword [esp + 24] ; ecx:ebx <- divisor
+.1:
+ shr edx, 1
+ rcr eax, 1
+ shrd ebx, ecx, 1
+ shr ecx, 1
+ jnz .1
+ div ebx
+ mov ebx, eax ; ebx <- quotient
+ mov ecx, [esp + 28] ; ecx <- high dword of divisor
+ mul dword [esp + 24] ; edx:eax <- quotient * divisor[0..31]
+ imul ecx, ebx ; ecx <- quotient * divisor[32..63]
+ add edx, ecx ; edx <- (quotient * divisor)[32..63]
+ mov ecx, dword [esp + 32] ; ecx <- addr for Remainder
+ jc @TooLarge ; product > 2^64
+ cmp edi, edx ; compare high 32 bits
+ ja @Correct
+ jb @TooLarge ; product > dividend
+ cmp esi, eax
+ jae @Correct ; product <= dividend
+@TooLarge:
+ dec ebx ; adjust quotient by -1
+ jecxz @Return ; return if Remainder == NULL
+ sub eax, dword [esp + 24]
+ sbb edx, dword [esp + 28] ; edx:eax <- (quotient - 1) * divisor
+@Correct:
+ jecxz @Return
+ sub esi, eax
+ sbb edi, edx ; edi:esi <- remainder
+ mov [ecx], esi
+ mov [ecx + 4], edi
+@Return:
+ mov eax, ebx ; eax <- quotient
+ xor edx, edx ; quotient is 32 bits long
+ pop edi
+ pop esi
+ pop ebx
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/EnableCache.S b/MdePkg/Library/BaseLib/Ia32/EnableCache.S
new file mode 100644
index 000000000000..fd7f7e0a6f7e
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/EnableCache.S
@@ -0,0 +1,39 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# EnableCache.S
+#
+# Abstract:
+#
+# Flush all caches with a WBINVD instruction, clear the CD bit of CR0 to 0, and clear
+# the NW bit of CR0 to 0
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmEnableCache (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_GLOBAL ASM_PFX(AsmEnableCache)
+ASM_PFX(AsmEnableCache):
+ wbinvd
+ movl %cr0, %eax
+ btrl $30, %eax
+ btrl $29, %eax
+ movl %eax, %cr0
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/EnableCache.asm b/MdePkg/Library/BaseLib/Ia32/EnableCache.asm
new file mode 100644
index 000000000000..124e10960d26
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/EnableCache.asm
@@ -0,0 +1,45 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnableCache.Asm
+;
+; Abstract:
+;
+; Flush all caches with a WBINVD instruction, clear the CD bit of CR0 to 0, and clear
+; the NW bit of CR0 to 0
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .486p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmEnableCache (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmEnableCache PROC
+ wbinvd
+ mov eax, cr0
+ btr eax, 29
+ btr eax, 30
+ mov cr0, eax
+ ret
+AsmEnableCache ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/EnableCache.c b/MdePkg/Library/BaseLib/Ia32/EnableCache.c
new file mode 100644
index 000000000000..912defb617ce
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/EnableCache.c
@@ -0,0 +1,36 @@
+/** @file
+ AsmEnableCache function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+/**
+ Perform a WBINVD and clear both the CD and NW bits of CR0.
+
+ Enables the caches by executing a WBINVD instruction and then clear both the CD and NW
+ bits of CR0 to 0. This function is only available on IA-32 and x64.
+
+**/
+VOID
+EFIAPI
+AsmEnableCache (
+ VOID
+ )
+{
+ _asm {
+ wbinvd
+ mov eax, cr0
+ btr eax, 30
+ btr eax, 29
+ mov cr0, eax
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/EnableCache.nasm b/MdePkg/Library/BaseLib/Ia32/EnableCache.nasm
new file mode 100644
index 000000000000..63c605df91b0
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/EnableCache.nasm
@@ -0,0 +1,42 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnableCache.Asm
+;
+; Abstract:
+;
+; Flush all caches with a WBINVD instruction, clear the CD bit of CR0 to 0, and clear
+; the NW bit of CR0 to 0
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmEnableCache (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmEnableCache)
+ASM_PFX(AsmEnableCache):
+ wbinvd
+ mov eax, cr0
+ btr eax, 29
+ btr eax, 30
+ mov cr0, eax
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.S b/MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.S
new file mode 100644
index 000000000000..446c36b57598
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.S
@@ -0,0 +1,36 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# EnableDisableInterrupts.S
+#
+# Abstract:
+#
+# EnableDisableInterrupts function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+ASM_GLOBAL ASM_PFX(EnableDisableInterrupts)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# EnableDisableInterrupts (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(EnableDisableInterrupts):
+ sti
+ cli
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.asm b/MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.asm
new file mode 100644
index 000000000000..8e707bfd0326
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnableDisableInterrupts.Asm
+;
+; Abstract:
+;
+; EnableDisableInterrupts function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; EnableDisableInterrupts (
+; VOID
+; );
+;------------------------------------------------------------------------------
+EnableDisableInterrupts PROC
+ sti
+ cli
+ ret
+EnableDisableInterrupts ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.c b/MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.c
new file mode 100644
index 000000000000..d351afb932f2
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.c
@@ -0,0 +1,36 @@
+/** @file
+ EnableDisableInterrupts function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Enables CPU interrupts for the smallest window required to capture any
+ pending interrupts.
+
+**/
+VOID
+EFIAPI
+EnableDisableInterrupts (
+ VOID
+ )
+{
+ _asm {
+ sti
+ nop
+ nop
+ cli
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.nasm b/MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.nasm
new file mode 100644
index 000000000000..d5cb3e6df3cf
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.nasm
@@ -0,0 +1,38 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnableDisableInterrupts.Asm
+;
+; Abstract:
+;
+; EnableDisableInterrupts function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; EnableDisableInterrupts (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(EnableDisableInterrupts)
+ASM_PFX(EnableDisableInterrupts):
+ sti
+ cli
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/EnableInterrupts.asm b/MdePkg/Library/BaseLib/Ia32/EnableInterrupts.asm
new file mode 100644
index 000000000000..891661992d9f
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/EnableInterrupts.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnableInterrupts.Asm
+;
+; Abstract:
+;
+; EnableInterrupts function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; EnableInterrupts (
+; VOID
+; );
+;------------------------------------------------------------------------------
+EnableInterrupts PROC
+ sti
+ ret
+EnableInterrupts ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/EnableInterrupts.c b/MdePkg/Library/BaseLib/Ia32/EnableInterrupts.c
new file mode 100644
index 000000000000..7fe14cb49fd8
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/EnableInterrupts.c
@@ -0,0 +1,32 @@
+/** @file
+ EnableInterrupts function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Enables CPU interrupts.
+
+**/
+VOID
+EFIAPI
+EnableInterrupts (
+ VOID
+ )
+{
+ _asm {
+ sti
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/EnableInterrupts.nasm b/MdePkg/Library/BaseLib/Ia32/EnableInterrupts.nasm
new file mode 100644
index 000000000000..f4a41117c93b
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/EnableInterrupts.nasm
@@ -0,0 +1,37 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnableInterrupts.Asm
+;
+; Abstract:
+;
+; EnableInterrupts function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; EnableInterrupts (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(EnableInterrupts)
+ASM_PFX(EnableInterrupts):
+ sti
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/EnablePaging32.S b/MdePkg/Library/BaseLib/Ia32/EnablePaging32.S
new file mode 100644
index 000000000000..2449556c45df
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/EnablePaging32.S
@@ -0,0 +1,52 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# EnablePaging32.S
+#
+# Abstract:
+#
+# InternalX86EnablePaging32 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+ASM_GLOBAL ASM_PFX(InternalX86EnablePaging32)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# InternalX86EnablePaging32 (
+# IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+# IN VOID *Context1, OPTIONAL
+# IN VOID *Context2, OPTIONAL
+# IN VOID *NewStack
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalX86EnablePaging32):
+ movl 4(%esp), %ebx
+ movl 8(%esp), %ecx
+ movl 12(%esp), %edx
+ pushfl
+ pop %edi # save flags in edi
+ cli
+ movl %cr0, %eax
+ btsl $31, %eax
+ movl 16(%esp), %esp
+ movl %eax, %cr0
+ push %edi
+ popfl # restore flags
+ push %edx
+ push %ecx
+ call *%ebx
+ jmp .
diff --git a/MdePkg/Library/BaseLib/Ia32/EnablePaging32.asm b/MdePkg/Library/BaseLib/Ia32/EnablePaging32.asm
new file mode 100644
index 000000000000..88191330f09c
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/EnablePaging32.asm
@@ -0,0 +1,57 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnablePaging32.Asm
+;
+; Abstract:
+;
+; AsmEnablePaging32 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86EnablePaging32 (
+; IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+; IN VOID *Context1, OPTIONAL
+; IN VOID *Context2, OPTIONAL
+; IN VOID *NewStack
+; );
+;------------------------------------------------------------------------------
+InternalX86EnablePaging32 PROC
+ mov ebx, [esp + 4]
+ mov ecx, [esp + 8]
+ mov edx, [esp + 12]
+ pushfd
+ pop edi ; save flags in edi
+ cli
+ mov eax, cr0
+ bts eax, 31
+ mov esp, [esp + 16]
+ mov cr0, eax
+ push edi
+ popfd ; restore flags
+ push edx
+ push ecx
+ call ebx
+ jmp $
+InternalX86EnablePaging32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/EnablePaging32.c b/MdePkg/Library/BaseLib/Ia32/EnablePaging32.c
new file mode 100644
index 000000000000..18e9d1129d59
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/EnablePaging32.c
@@ -0,0 +1,81 @@
+/** @file
+ AsmEnablePaging32 function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Enables the 32-bit paging mode on the CPU.
+
+ Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
+ must be properly initialized prior to calling this service. This function
+ assumes the current execution mode is 32-bit protected mode. This function is
+ only available on IA-32. After the 32-bit paging mode is enabled, control is
+ transferred to the function specified by EntryPoint using the new stack
+ specified by NewStack and passing in the parameters specified by Context1 and
+ Context2. Context1 and Context2 are optional and may be NULL. The function
+ EntryPoint must never return.
+
+ There are a number of constraints that must be followed before calling this
+ function:
+ 1) Interrupts must be disabled.
+ 2) The caller must be in 32-bit protected mode with flat descriptors. This
+ means all descriptors must have a base of 0 and a limit of 4GB.
+ 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat
+ descriptors.
+ 4) CR3 must point to valid page tables that will be used once the transition
+ is complete, and those page tables must guarantee that the pages for this
+ function and the stack are identity mapped.
+
+ @param EntryPoint A pointer to function to call with the new stack after
+ paging is enabled.
+ @param Context1 A pointer to the context to pass into the EntryPoint
+ function as the first parameter after paging is enabled.
+ @param Context2 A pointer to the context to pass into the EntryPoint
+ function as the second parameter after paging is enabled.
+ @param NewStack A pointer to the new stack to use for the EntryPoint
+ function after paging is enabled.
+
+**/
+__declspec (naked)
+VOID
+EFIAPI
+InternalX86EnablePaging32 (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack
+ )
+{
+ _asm {
+ push ebp
+ mov ebp, esp
+ mov ebx, EntryPoint
+ mov ecx, Context1
+ mov edx, Context2
+ pushfd
+ pop edi
+ cli
+ mov eax, cr0
+ bts eax, 31
+ mov esp, NewStack
+ mov cr0, eax
+ push edi
+ popfd
+ push edx
+ push ecx
+ call ebx
+ jmp $
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/EnablePaging32.nasm b/MdePkg/Library/BaseLib/Ia32/EnablePaging32.nasm
new file mode 100644
index 000000000000..f0949be1679a
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/EnablePaging32.nasm
@@ -0,0 +1,54 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnablePaging32.Asm
+;
+; Abstract:
+;
+; AsmEnablePaging32 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86EnablePaging32 (
+; IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+; IN VOID *Context1, OPTIONAL
+; IN VOID *Context2, OPTIONAL
+; IN VOID *NewStack
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(InternalX86EnablePaging32)
+ASM_PFX(InternalX86EnablePaging32):
+ mov ebx, [esp + 4]
+ mov ecx, [esp + 8]
+ mov edx, [esp + 12]
+ pushfd
+ pop edi ; save flags in edi
+ cli
+ mov eax, cr0
+ bts eax, 31
+ mov esp, [esp + 16]
+ mov cr0, eax
+ push edi
+ popfd ; restore flags
+ push edx
+ push ecx
+ call ebx
+ jmp $
+
diff --git a/MdePkg/Library/BaseLib/Ia32/EnablePaging64.S b/MdePkg/Library/BaseLib/Ia32/EnablePaging64.S
new file mode 100644
index 000000000000..e1c7f6047492
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/EnablePaging64.S
@@ -0,0 +1,63 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# EnablePaging64.S
+#
+# Abstract:
+#
+# InternalX86EnablePaging64 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+ASM_GLOBAL ASM_PFX(InternalX86EnablePaging64)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# InternalX86EnablePaging64 (
+# IN UINT16 CodeSelector,
+# IN UINT64 EntryPoint,
+# IN UINT64 Context1, OPTIONAL
+# IN UINT64 Context2, OPTIONAL
+# IN UINT64 NewStack
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalX86EnablePaging64):
+ cli
+ movl $LongStart, (%esp) # offset for far retf, seg is the 1st arg
+ movl %cr4, %eax
+ orb $0x20, %al
+ movl %eax, %cr4 # enable PAE
+ movl $0xc0000080, %ecx
+ rdmsr
+ orb $1, %ah # set LME
+ wrmsr
+ movl %cr0, %eax
+ btsl $31, %eax # set PG
+ movl %eax, %cr0 # enable paging
+ lret # topmost 2 dwords hold the address
+LongStart: # long mode starts here
+ .byte 0x67, 0x48 # 32-bit address size, 64-bit operand size
+ movl (%esp), %ebx # mov rbx, [esp]
+ .byte 0x67, 0x48
+ movl 8(%esp), %ecx # mov rcx, [esp + 8]
+ .byte 0x67, 0x48
+ movl 0x10(%esp), %edx # mov rdx, [esp + 10h]
+ .byte 0x67, 0x48
+ movl 0x18(%esp), %esp # mov rsp, [esp + 18h]
+ .byte 0x48
+ addl $-0x20, %esp # add rsp, -20h
+ call *%ebx # call rbx
+ jmp . # no one should get here
diff --git a/MdePkg/Library/BaseLib/Ia32/EnablePaging64.asm b/MdePkg/Library/BaseLib/Ia32/EnablePaging64.asm
new file mode 100644
index 000000000000..128310d1d122
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/EnablePaging64.asm
@@ -0,0 +1,68 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnablePaging64.Asm
+;
+; Abstract:
+;
+; AsmEnablePaging64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86EnablePaging64 (
+; IN UINT16 Cs,
+; IN UINT64 EntryPoint,
+; IN UINT64 Context1, OPTIONAL
+; IN UINT64 Context2, OPTIONAL
+; IN UINT64 NewStack
+; );
+;------------------------------------------------------------------------------
+InternalX86EnablePaging64 PROC
+ cli
+ mov DWORD PTR [esp], @F ; offset for far retf, seg is the 1st arg
+ mov eax, cr4
+ or al, (1 SHL 5)
+ mov cr4, eax ; enable PAE
+ mov ecx, 0c0000080h
+ rdmsr
+ or ah, 1 ; set LME
+ wrmsr
+ mov eax, cr0
+ bts eax, 31 ; set PG
+ mov cr0, eax ; enable paging
+ retf ; topmost 2 dwords hold the address
+@@: ; long mode starts here
+ DB 67h, 48h ; 32-bit address size, 64-bit operand size
+ mov ebx, [esp] ; mov rbx, [esp]
+ DB 67h, 48h
+ mov ecx, [esp + 8] ; mov rcx, [esp + 8]
+ DB 67h, 48h
+ mov edx, [esp + 10h] ; mov rdx, [esp + 10h]
+ DB 67h, 48h
+ mov esp, [esp + 18h] ; mov rsp, [esp + 18h]
+ DB 48h
+ add esp, -20h ; add rsp, -20h
+ call ebx ; call rbx
+ hlt ; no one should get here
+InternalX86EnablePaging64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/EnablePaging64.nasm b/MdePkg/Library/BaseLib/Ia32/EnablePaging64.nasm
new file mode 100644
index 000000000000..91c89ee4ae50
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/EnablePaging64.nasm
@@ -0,0 +1,65 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnablePaging64.Asm
+;
+; Abstract:
+;
+; AsmEnablePaging64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86EnablePaging64 (
+; IN UINT16 Cs,
+; IN UINT64 EntryPoint,
+; IN UINT64 Context1, OPTIONAL
+; IN UINT64 Context2, OPTIONAL
+; IN UINT64 NewStack
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(InternalX86EnablePaging64)
+ASM_PFX(InternalX86EnablePaging64):
+ cli
+ mov DWORD [esp], .0 ; offset for far retf, seg is the 1st arg
+ mov eax, cr4
+ or al, (1 << 5)
+ mov cr4, eax ; enable PAE
+ mov ecx, 0xc0000080
+ rdmsr
+ or ah, 1 ; set LME
+ wrmsr
+ mov eax, cr0
+ bts eax, 31 ; set PG
+ mov cr0, eax ; enable paging
+ retf ; topmost 2 dwords hold the address
+.0:
+ DB 0x67, 0x48 ; 32-bit address size, 64-bit operand size
+ mov ebx, [esp] ; mov rbx, [esp]
+ DB 0x67, 0x48
+ mov ecx, [esp + 8] ; mov rcx, [esp + 8]
+ DB 0x67, 0x48
+ mov edx, [esp + 0x10] ; mov rdx, [esp + 10h]
+ DB 0x67, 0x48
+ mov esp, [esp + 0x18] ; mov rsp, [esp + 18h]
+ DB 0x48
+ add esp, -0x20 ; add rsp, -20h
+ call ebx ; call rbx
+ hlt ; no one should get here
+
diff --git a/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.asm b/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.asm
new file mode 100644
index 000000000000..c6e704b38403
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.asm
@@ -0,0 +1,55 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; FlushCacheLine.Asm
+;
+; Abstract:
+;
+; AsmFlushCacheLine function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat,C
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID *
+; EFIAPI
+; AsmFlushCacheLine (
+; IN VOID *LinearAddress
+; );
+;------------------------------------------------------------------------------
+AsmFlushCacheLine PROC
+ ;
+ ; If the CPU does not support CLFLUSH instruction,
+ ; then promote flush range to flush entire cache.
+ ;
+ mov eax, 1
+ push ebx
+ cpuid
+ pop ebx
+ mov eax, [esp + 4]
+ test edx, BIT19
+ jz @F
+ clflush [eax]
+ ret
+@@:
+ wbinvd
+ ret
+AsmFlushCacheLine ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.c b/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.c
new file mode 100644
index 000000000000..9a73ddfb4898
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.c
@@ -0,0 +1,58 @@
+/** @file
+ AsmFlushCacheLine function
+
+ Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Flushes a cache line from all the instruction and data caches within the
+ coherency domain of the CPU.
+
+ Flushed the cache line specified by LinearAddress, and returns LinearAddress.
+ This function is only available on IA-32 and x64.
+
+ @param LinearAddress The address of the cache line to flush. If the CPU is
+ in a physical addressing mode, then LinearAddress is a
+ physical address. If the CPU is in a virtual
+ addressing mode, then LinearAddress is a virtual
+ address.
+
+ @return LinearAddress
+**/
+VOID *
+EFIAPI
+AsmFlushCacheLine (
+ IN VOID *LinearAddress
+ )
+{
+ //
+ // If the CPU does not support CLFLUSH instruction,
+ // then promote flush range to flush entire cache.
+ //
+ _asm {
+ mov eax, 1
+ cpuid
+ test edx, BIT19
+ jz NoClflush
+ mov eax, dword ptr [LinearAddress]
+ clflush [eax]
+ jmp Done
+NoClflush:
+ wbinvd
+Done:
+ }
+
+ return LinearAddress;
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.nasm b/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.nasm
new file mode 100644
index 000000000000..088b7aa80c7b
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.nasm
@@ -0,0 +1,51 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; FlushCacheLine.Asm
+;
+; Abstract:
+;
+; AsmFlushCacheLine function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID *
+; EFIAPI
+; AsmFlushCacheLine (
+; IN VOID *LinearAddress
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmFlushCacheLine)
+ASM_PFX(AsmFlushCacheLine):
+ ;
+ ; If the CPU does not support CLFLUSH instruction,
+ ; then promote flush range to flush entire cache.
+ ;
+ mov eax, 1
+ push ebx
+ cpuid
+ pop ebx
+ mov eax, [esp + 4]
+ test edx, BIT19
+ jz .0
+ clflush [eax]
+ ret
+.0:
+ wbinvd
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/FxRestore.asm b/MdePkg/Library/BaseLib/Ia32/FxRestore.asm
new file mode 100644
index 000000000000..a637b31b689b
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/FxRestore.asm
@@ -0,0 +1,42 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; FxRestore.Asm
+;
+; Abstract:
+;
+; AsmFxRestore function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86FxRestore (
+; IN CONST IA32_FX_BUFFER *Buffer
+; );
+;------------------------------------------------------------------------------
+InternalX86FxRestore PROC
+ mov eax, [esp + 4] ; Buffer must be 16-byte aligned
+ fxrstor [eax]
+ ret
+InternalX86FxRestore ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/FxRestore.c b/MdePkg/Library/BaseLib/Ia32/FxRestore.c
new file mode 100644
index 000000000000..b64284aa8dc2
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/FxRestore.c
@@ -0,0 +1,40 @@
+/** @file
+ AsmFxRestore function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+#include "BaseLibInternals.h"
+
+
+/**
+ Restores the current floating point/SSE/SSE2 context from a buffer.
+
+ Restores the current floating point/SSE/SSE2 state from the buffer specified
+ by Buffer. Buffer must be aligned on a 16-byte boundary. This function is
+ only available on IA-32 and x64.
+
+ @param Buffer The pointer to a buffer to save the floating point/SSE/SSE2 context.
+
+**/
+VOID
+EFIAPI
+InternalX86FxRestore (
+ IN CONST IA32_FX_BUFFER *Buffer
+ )
+{
+ _asm {
+ mov eax, Buffer
+ fxrstor [eax]
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/FxRestore.nasm b/MdePkg/Library/BaseLib/Ia32/FxRestore.nasm
new file mode 100644
index 000000000000..5c3374726597
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/FxRestore.nasm
@@ -0,0 +1,38 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; FxRestore.Asm
+;
+; Abstract:
+;
+; AsmFxRestore function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86FxRestore (
+; IN CONST IA32_FX_BUFFER *Buffer
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(InternalX86FxRestore)
+ASM_PFX(InternalX86FxRestore):
+ mov eax, [esp + 4] ; Buffer must be 16-byte aligned
+ fxrstor [eax]
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/FxSave.asm b/MdePkg/Library/BaseLib/Ia32/FxSave.asm
new file mode 100644
index 000000000000..20531de6b999
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/FxSave.asm
@@ -0,0 +1,42 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; FxSave.Asm
+;
+; Abstract:
+;
+; AsmFxSave function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86FxSave (
+; OUT IA32_FX_BUFFER *Buffer
+; );
+;------------------------------------------------------------------------------
+InternalX86FxSave PROC
+ mov eax, [esp + 4] ; Buffer must be 16-byte aligned
+ fxsave [eax]
+ ret
+InternalX86FxSave ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/FxSave.c b/MdePkg/Library/BaseLib/Ia32/FxSave.c
new file mode 100644
index 000000000000..0de252f43d45
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/FxSave.c
@@ -0,0 +1,40 @@
+/** @file
+ AsmFxSave function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+#include "BaseLibInternals.h"
+
+
+/**
+ Save the current floating point/SSE/SSE2 context to a buffer.
+
+ Saves the current floating point/SSE/SSE2 state to the buffer specified by
+ Buffer. Buffer must be aligned on a 16-byte boundary. This function is only
+ available on IA-32 and x64.
+
+ @param Buffer The pointer to a buffer to save the floating point/SSE/SSE2 context.
+
+**/
+VOID
+EFIAPI
+InternalX86FxSave (
+ OUT IA32_FX_BUFFER *Buffer
+ )
+{
+ _asm {
+ mov eax, Buffer
+ fxsave [eax]
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/FxSave.nasm b/MdePkg/Library/BaseLib/Ia32/FxSave.nasm
new file mode 100644
index 000000000000..f22e19e77bc3
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/FxSave.nasm
@@ -0,0 +1,38 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; FxSave.Asm
+;
+; Abstract:
+;
+; AsmFxSave function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86FxSave (
+; OUT IA32_FX_BUFFER *Buffer
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(InternalX86FxSave)
+ASM_PFX(InternalX86FxSave):
+ mov eax, [esp + 4] ; Buffer must be 16-byte aligned
+ fxsave [eax]
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/GccInline.c b/MdePkg/Library/BaseLib/Ia32/GccInline.c
new file mode 100644
index 000000000000..68d56754d2b8
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/GccInline.c
@@ -0,0 +1,1771 @@
+/** @file
+ GCC inline implementation of BaseLib processor specific functions.
+
+ Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+ Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+#include "BaseLibInternals.h"
+
+
+
+/**
+ Used to serialize load and store operations.
+
+ All loads and stores that proceed calls to this function are guaranteed to be
+ globally visible when this function returns.
+
+**/
+VOID
+EFIAPI
+MemoryFence (
+ VOID
+ )
+{
+ // This is a little bit of overkill and it is more about the compiler that it is
+ // actually processor synchronization. This is like the _ReadWriteBarrier
+ // Microsoft specific intrinsic
+ __asm__ __volatile__ ("":::"memory");
+}
+
+
+/**
+ Enables CPU interrupts.
+
+ Enables CPU interrupts.
+
+**/
+VOID
+EFIAPI
+EnableInterrupts (
+ VOID
+ )
+{
+ __asm__ __volatile__ ("sti"::: "memory");
+}
+
+
+/**
+ Disables CPU interrupts.
+
+ Disables CPU interrupts.
+
+**/
+VOID
+EFIAPI
+DisableInterrupts (
+ VOID
+ )
+{
+ __asm__ __volatile__ ("cli"::: "memory");
+}
+
+
+
+
+/**
+ Requests CPU to pause for a short period of time.
+
+ Requests CPU to pause for a short period of time. Typically used in MP
+ systems to prevent memory starvation while waiting for a spin lock.
+
+**/
+VOID
+EFIAPI
+CpuPause (
+ VOID
+ )
+{
+ __asm__ __volatile__ ("pause");
+}
+
+
+/**
+ Generates a breakpoint on the CPU.
+
+ Generates a breakpoint on the CPU. The breakpoint must be implemented such
+ that code can resume normal execution after the breakpoint.
+
+**/
+VOID
+EFIAPI
+CpuBreakpoint (
+ VOID
+ )
+{
+ __asm__ __volatile__ ("int $3");
+}
+
+
+
+/**
+ Returns a 64-bit Machine Specific Register(MSR).
+
+ Reads and returns the 64-bit MSR specified by Index. No parameter checking is
+ performed on Index, and some Index values may cause CPU exceptions. The
+ caller must either guarantee that Index is valid, or the caller must set up
+ exception handlers to catch the exceptions. This function is only available
+ on IA-32 and X64.
+
+ @param Index The 32-bit MSR index to read.
+
+ @return The value of the MSR identified by Index.
+
+**/
+UINT64
+EFIAPI
+AsmReadMsr64 (
+ IN UINT32 Index
+ )
+{
+ UINT64 Data;
+
+ __asm__ __volatile__ (
+ "rdmsr"
+ : "=A" (Data) // %0
+ : "c" (Index) // %1
+ );
+
+ return Data;
+}
+
+/**
+ Writes a 64-bit value to a Machine Specific Register(MSR), and returns the
+ value.
+
+ Writes the 64-bit value specified by Value to the MSR specified by Index. The
+ 64-bit value written to the MSR is returned. No parameter checking is
+ performed on Index or Value, and some of these may cause CPU exceptions. The
+ caller must either guarantee that Index and Value are valid, or the caller
+ must establish proper exception handlers. This function is only available on
+ IA-32 and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param Value The 64-bit value to write to the MSR.
+
+ @return Value
+
+**/
+UINT64
+EFIAPI
+AsmWriteMsr64 (
+ IN UINT32 Index,
+ IN UINT64 Value
+ )
+{
+ __asm__ __volatile__ (
+ "wrmsr"
+ :
+ : "c" (Index),
+ "A" (Value)
+ );
+
+ return Value;
+}
+
+
+
+/**
+ Reads the current value of the EFLAGS register.
+
+ Reads and returns the current value of the EFLAGS register. This function is
+ only available on IA-32 and X64. This returns a 32-bit value on IA-32 and a
+ 64-bit value on X64.
+
+ @return EFLAGS on IA-32 or RFLAGS on X64.
+
+**/
+UINTN
+EFIAPI
+AsmReadEflags (
+ VOID
+ )
+{
+ UINTN Eflags;
+
+ __asm__ __volatile__ (
+ "pushfl \n\t"
+ "popl %0 "
+ : "=r" (Eflags)
+ );
+
+ return Eflags;
+}
+
+
+
+/**
+ Reads the current value of the Control Register 0 (CR0).
+
+ Reads and returns the current value of CR0. This function is only available
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ X64.
+
+ @return The value of the Control Register 0 (CR0).
+
+**/
+UINTN
+EFIAPI
+AsmReadCr0 (
+ VOID
+ )
+{
+ UINTN Data;
+
+ __asm__ __volatile__ (
+ "movl %%cr0,%0"
+ : "=a" (Data)
+ );
+
+ return Data;
+}
+
+
+/**
+ Reads the current value of the Control Register 2 (CR2).
+
+ Reads and returns the current value of CR2. This function is only available
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ X64.
+
+ @return The value of the Control Register 2 (CR2).
+
+**/
+UINTN
+EFIAPI
+AsmReadCr2 (
+ VOID
+ )
+{
+ UINTN Data;
+
+ __asm__ __volatile__ (
+ "movl %%cr2, %0"
+ : "=r" (Data)
+ );
+
+ return Data;
+}
+
+/**
+ Reads the current value of the Control Register 3 (CR3).
+
+ Reads and returns the current value of CR3. This function is only available
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ X64.
+
+ @return The value of the Control Register 3 (CR3).
+
+**/
+UINTN
+EFIAPI
+AsmReadCr3 (
+ VOID
+ )
+{
+ UINTN Data;
+
+ __asm__ __volatile__ (
+ "movl %%cr3, %0"
+ : "=r" (Data)
+ );
+
+ return Data;
+}
+
+
+/**
+ Reads the current value of the Control Register 4 (CR4).
+
+ Reads and returns the current value of CR4. This function is only available
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ X64.
+
+ @return The value of the Control Register 4 (CR4).
+
+**/
+UINTN
+EFIAPI
+AsmReadCr4 (
+ VOID
+ )
+{
+ UINTN Data;
+
+ __asm__ __volatile__ (
+ "movl %%cr4, %0"
+ : "=a" (Data)
+ );
+
+ return Data;
+}
+
+
+/**
+ Writes a value to Control Register 0 (CR0).
+
+ Writes and returns a new value to CR0. This function is only available on
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
+
+ @param Cr0 The value to write to CR0.
+
+ @return The value written to CR0.
+
+**/
+UINTN
+EFIAPI
+AsmWriteCr0 (
+ UINTN Cr0
+ )
+{
+ __asm__ __volatile__ (
+ "movl %0, %%cr0"
+ :
+ : "r" (Cr0)
+ );
+ return Cr0;
+}
+
+
+/**
+ Writes a value to Control Register 2 (CR2).
+
+ Writes and returns a new value to CR2. This function is only available on
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
+
+ @param Cr2 The value to write to CR2.
+
+ @return The value written to CR2.
+
+**/
+UINTN
+EFIAPI
+AsmWriteCr2 (
+ UINTN Cr2
+ )
+{
+ __asm__ __volatile__ (
+ "movl %0, %%cr2"
+ :
+ : "r" (Cr2)
+ );
+ return Cr2;
+}
+
+
+/**
+ Writes a value to Control Register 3 (CR3).
+
+ Writes and returns a new value to CR3. This function is only available on
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
+
+ @param Cr3 The value to write to CR3.
+
+ @return The value written to CR3.
+
+**/
+UINTN
+EFIAPI
+AsmWriteCr3 (
+ UINTN Cr3
+ )
+{
+ __asm__ __volatile__ (
+ "movl %0, %%cr3"
+ :
+ : "r" (Cr3)
+ );
+ return Cr3;
+}
+
+
+/**
+ Writes a value to Control Register 4 (CR4).
+
+ Writes and returns a new value to CR4. This function is only available on
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
+
+ @param Cr4 The value to write to CR4.
+
+ @return The value written to CR4.
+
+**/
+UINTN
+EFIAPI
+AsmWriteCr4 (
+ UINTN Cr4
+ )
+{
+ __asm__ __volatile__ (
+ "movl %0, %%cr4"
+ :
+ : "r" (Cr4)
+ );
+ return Cr4;
+}
+
+
+/**
+ Reads the current value of Debug Register 0 (DR0).
+
+ Reads and returns the current value of DR0. This function is only available
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ X64.
+
+ @return The value of Debug Register 0 (DR0).
+
+**/
+UINTN
+EFIAPI
+AsmReadDr0 (
+ VOID
+ )
+{
+ UINTN Data;
+
+ __asm__ __volatile__ (
+ "movl %%dr0, %0"
+ : "=r" (Data)
+ );
+
+ return Data;
+}
+
+
+/**
+ Reads the current value of Debug Register 1 (DR1).
+
+ Reads and returns the current value of DR1. This function is only available
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ X64.
+
+ @return The value of Debug Register 1 (DR1).
+
+**/
+UINTN
+EFIAPI
+AsmReadDr1 (
+ VOID
+ )
+{
+ UINTN Data;
+
+ __asm__ __volatile__ (
+ "movl %%dr1, %0"
+ : "=r" (Data)
+ );
+
+ return Data;
+}
+
+
+/**
+ Reads the current value of Debug Register 2 (DR2).
+
+ Reads and returns the current value of DR2. This function is only available
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ X64.
+
+ @return The value of Debug Register 2 (DR2).
+
+**/
+UINTN
+EFIAPI
+AsmReadDr2 (
+ VOID
+ )
+{
+ UINTN Data;
+
+ __asm__ __volatile__ (
+ "movl %%dr2, %0"
+ : "=r" (Data)
+ );
+
+ return Data;
+}
+
+
+/**
+ Reads the current value of Debug Register 3 (DR3).
+
+ Reads and returns the current value of DR3. This function is only available
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ X64.
+
+ @return The value of Debug Register 3 (DR3).
+
+**/
+UINTN
+EFIAPI
+AsmReadDr3 (
+ VOID
+ )
+{
+ UINTN Data;
+
+ __asm__ __volatile__ (
+ "movl %%dr3, %0"
+ : "=r" (Data)
+ );
+
+ return Data;
+}
+
+
+/**
+ Reads the current value of Debug Register 4 (DR4).
+
+ Reads and returns the current value of DR4. This function is only available
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ X64.
+
+ @return The value of Debug Register 4 (DR4).
+
+**/
+UINTN
+EFIAPI
+AsmReadDr4 (
+ VOID
+ )
+{
+ UINTN Data;
+
+ __asm__ __volatile__ (
+ "movl %%dr4, %0"
+ : "=r" (Data)
+ );
+
+ return Data;
+}
+
+
+/**
+ Reads the current value of Debug Register 5 (DR5).
+
+ Reads and returns the current value of DR5. This function is only available
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ X64.
+
+ @return The value of Debug Register 5 (DR5).
+
+**/
+UINTN
+EFIAPI
+AsmReadDr5 (
+ VOID
+ )
+{
+ UINTN Data;
+
+ __asm__ __volatile__ (
+ "movl %%dr5, %0"
+ : "=r" (Data)
+ );
+
+ return Data;
+}
+
+
+/**
+ Reads the current value of Debug Register 6 (DR6).
+
+ Reads and returns the current value of DR6. This function is only available
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ X64.
+
+ @return The value of Debug Register 6 (DR6).
+
+**/
+UINTN
+EFIAPI
+AsmReadDr6 (
+ VOID
+ )
+{
+ UINTN Data;
+
+ __asm__ __volatile__ (
+ "movl %%dr6, %0"
+ : "=r" (Data)
+ );
+
+ return Data;
+}
+
+
+/**
+ Reads the current value of Debug Register 7 (DR7).
+
+ Reads and returns the current value of DR7. This function is only available
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ X64.
+
+ @return The value of Debug Register 7 (DR7).
+
+**/
+UINTN
+EFIAPI
+AsmReadDr7 (
+ VOID
+ )
+{
+ UINTN Data;
+
+ __asm__ __volatile__ (
+ "movl %%dr7, %0"
+ : "=r" (Data)
+ );
+
+ return Data;
+}
+
+
+/**
+ Writes a value to Debug Register 0 (DR0).
+
+ Writes and returns a new value to DR0. This function is only available on
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
+
+ @param Dr0 The value to write to Dr0.
+
+ @return The value written to Debug Register 0 (DR0).
+
+**/
+UINTN
+EFIAPI
+AsmWriteDr0 (
+ UINTN Dr0
+ )
+{
+ __asm__ __volatile__ (
+ "movl %0, %%dr0"
+ :
+ : "r" (Dr0)
+ );
+ return Dr0;
+}
+
+
+/**
+ Writes a value to Debug Register 1 (DR1).
+
+ Writes and returns a new value to DR1. This function is only available on
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
+
+ @param Dr1 The value to write to Dr1.
+
+ @return The value written to Debug Register 1 (DR1).
+
+**/
+UINTN
+EFIAPI
+AsmWriteDr1 (
+ UINTN Dr1
+ )
+{
+ __asm__ __volatile__ (
+ "movl %0, %%dr1"
+ :
+ : "r" (Dr1)
+ );
+ return Dr1;
+}
+
+
+/**
+ Writes a value to Debug Register 2 (DR2).
+
+ Writes and returns a new value to DR2. This function is only available on
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
+
+ @param Dr2 The value to write to Dr2.
+
+ @return The value written to Debug Register 2 (DR2).
+
+**/
+UINTN
+EFIAPI
+AsmWriteDr2 (
+ UINTN Dr2
+ )
+{
+ __asm__ __volatile__ (
+ "movl %0, %%dr2"
+ :
+ : "r" (Dr2)
+ );
+ return Dr2;
+}
+
+
+/**
+ Writes a value to Debug Register 3 (DR3).
+
+ Writes and returns a new value to DR3. This function is only available on
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
+
+ @param Dr3 The value to write to Dr3.
+
+ @return The value written to Debug Register 3 (DR3).
+
+**/
+UINTN
+EFIAPI
+AsmWriteDr3 (
+ UINTN Dr3
+ )
+{
+ __asm__ __volatile__ (
+ "movl %0, %%dr3"
+ :
+ : "r" (Dr3)
+ );
+ return Dr3;
+}
+
+
+/**
+ Writes a value to Debug Register 4 (DR4).
+
+ Writes and returns a new value to DR4. This function is only available on
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
+
+ @param Dr4 The value to write to Dr4.
+
+ @return The value written to Debug Register 4 (DR4).
+
+**/
+UINTN
+EFIAPI
+AsmWriteDr4 (
+ UINTN Dr4
+ )
+{
+ __asm__ __volatile__ (
+ "movl %0, %%dr4"
+ :
+ : "r" (Dr4)
+ );
+ return Dr4;
+}
+
+
+/**
+ Writes a value to Debug Register 5 (DR5).
+
+ Writes and returns a new value to DR5. This function is only available on
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
+
+ @param Dr5 The value to write to Dr5.
+
+ @return The value written to Debug Register 5 (DR5).
+
+**/
+UINTN
+EFIAPI
+AsmWriteDr5 (
+ UINTN Dr5
+ )
+{
+ __asm__ __volatile__ (
+ "movl %0, %%dr5"
+ :
+ : "r" (Dr5)
+ );
+ return Dr5;
+}
+
+
+/**
+ Writes a value to Debug Register 6 (DR6).
+
+ Writes and returns a new value to DR6. This function is only available on
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
+
+ @param Dr6 The value to write to Dr6.
+
+ @return The value written to Debug Register 6 (DR6).
+
+**/
+UINTN
+EFIAPI
+AsmWriteDr6 (
+ UINTN Dr6
+ )
+{
+ __asm__ __volatile__ (
+ "movl %0, %%dr6"
+ :
+ : "r" (Dr6)
+ );
+ return Dr6;
+}
+
+
+/**
+ Writes a value to Debug Register 7 (DR7).
+
+ Writes and returns a new value to DR7. This function is only available on
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
+
+ @param Dr7 The value to write to Dr7.
+
+ @return The value written to Debug Register 7 (DR7).
+
+**/
+UINTN
+EFIAPI
+AsmWriteDr7 (
+ UINTN Dr7
+ )
+{
+ __asm__ __volatile__ (
+ "movl %0, %%dr7"
+ :
+ : "r" (Dr7)
+ );
+ return Dr7;
+}
+
+
+/**
+ Reads the current value of Code Segment Register (CS).
+
+ Reads and returns the current value of CS. This function is only available on
+ IA-32 and X64.
+
+ @return The current value of CS.
+
+**/
+UINT16
+EFIAPI
+AsmReadCs (
+ VOID
+ )
+{
+ UINT16 Data;
+
+ __asm__ __volatile__ (
+ "mov %%cs, %0"
+ :"=a" (Data)
+ );
+
+ return Data;
+}
+
+
+/**
+ Reads the current value of Data Segment Register (DS).
+
+ Reads and returns the current value of DS. This function is only available on
+ IA-32 and X64.
+
+ @return The current value of DS.
+
+**/
+UINT16
+EFIAPI
+AsmReadDs (
+ VOID
+ )
+{
+ UINT16 Data;
+
+ __asm__ __volatile__ (
+ "mov %%ds, %0"
+ :"=a" (Data)
+ );
+
+ return Data;
+}
+
+
+/**
+ Reads the current value of Extra Segment Register (ES).
+
+ Reads and returns the current value of ES. This function is only available on
+ IA-32 and X64.
+
+ @return The current value of ES.
+
+**/
+UINT16
+EFIAPI
+AsmReadEs (
+ VOID
+ )
+{
+ UINT16 Data;
+
+ __asm__ __volatile__ (
+ "mov %%es, %0"
+ :"=a" (Data)
+ );
+
+ return Data;
+}
+
+
+/**
+ Reads the current value of FS Data Segment Register (FS).
+
+ Reads and returns the current value of FS. This function is only available on
+ IA-32 and X64.
+
+ @return The current value of FS.
+
+**/
+UINT16
+EFIAPI
+AsmReadFs (
+ VOID
+ )
+{
+ UINT16 Data;
+
+ __asm__ __volatile__ (
+ "mov %%fs, %0"
+ :"=a" (Data)
+ );
+
+ return Data;
+}
+
+
+/**
+ Reads the current value of GS Data Segment Register (GS).
+
+ Reads and returns the current value of GS. This function is only available on
+ IA-32 and X64.
+
+ @return The current value of GS.
+
+**/
+UINT16
+EFIAPI
+AsmReadGs (
+ VOID
+ )
+{
+ UINT16 Data;
+
+ __asm__ __volatile__ (
+ "mov %%gs, %0"
+ :"=a" (Data)
+ );
+
+ return Data;
+}
+
+
+/**
+ Reads the current value of Stack Segment Register (SS).
+
+ Reads and returns the current value of SS. This function is only available on
+ IA-32 and X64.
+
+ @return The current value of SS.
+
+**/
+UINT16
+EFIAPI
+AsmReadSs (
+ VOID
+ )
+{
+ UINT16 Data;
+
+ __asm__ __volatile__ (
+ "mov %%ds, %0"
+ :"=a" (Data)
+ );
+
+ return Data;
+}
+
+
+/**
+ Reads the current value of Task Register (TR).
+
+ Reads and returns the current value of TR. This function is only available on
+ IA-32 and X64.
+
+ @return The current value of TR.
+
+**/
+UINT16
+EFIAPI
+AsmReadTr (
+ VOID
+ )
+{
+ UINT16 Data;
+
+ __asm__ __volatile__ (
+ "str %0"
+ : "=a" (Data)
+ );
+
+ return Data;
+}
+
+
+/**
+ Reads the current Global Descriptor Table Register(GDTR) descriptor.
+
+ Reads and returns the current GDTR descriptor and returns it in Gdtr. This
+ function is only available on IA-32 and X64.
+
+ @param Gdtr The pointer to a GDTR descriptor.
+
+**/
+VOID
+EFIAPI
+InternalX86ReadGdtr (
+ OUT IA32_DESCRIPTOR *Gdtr
+ )
+{
+ __asm__ __volatile__ (
+ "sgdt %0"
+ : "=m" (*Gdtr)
+ );
+}
+
+
+/**
+ Writes the current Global Descriptor Table Register (GDTR) descriptor.
+
+ Writes and the current GDTR descriptor specified by Gdtr. This function is
+ only available on IA-32 and X64.
+
+ @param Gdtr The pointer to a GDTR descriptor.
+
+**/
+VOID
+EFIAPI
+InternalX86WriteGdtr (
+ IN CONST IA32_DESCRIPTOR *Gdtr
+ )
+{
+ __asm__ __volatile__ (
+ "lgdt %0"
+ :
+ : "m" (*Gdtr)
+ );
+
+}
+
+
+/**
+ Reads the current Interrupt Descriptor Table Register(GDTR) descriptor.
+
+ Reads and returns the current IDTR descriptor and returns it in Idtr. This
+ function is only available on IA-32 and X64.
+
+ @param Idtr The pointer to a IDTR descriptor.
+
+**/
+VOID
+EFIAPI
+InternalX86ReadIdtr (
+ OUT IA32_DESCRIPTOR *Idtr
+ )
+{
+ __asm__ __volatile__ (
+ "sidt %0"
+ : "=m" (*Idtr)
+ );
+}
+
+
+/**
+ Writes the current Interrupt Descriptor Table Register(GDTR) descriptor.
+
+ Writes the current IDTR descriptor and returns it in Idtr. This function is
+ only available on IA-32 and X64.
+
+ @param Idtr The pointer to a IDTR descriptor.
+
+**/
+VOID
+EFIAPI
+InternalX86WriteIdtr (
+ IN CONST IA32_DESCRIPTOR *Idtr
+ )
+{
+ __asm__ __volatile__ (
+ "lidt %0"
+ :
+ : "m" (*Idtr)
+ );
+}
+
+
+/**
+ Reads the current Local Descriptor Table Register(LDTR) selector.
+
+ Reads and returns the current 16-bit LDTR descriptor value. This function is
+ only available on IA-32 and X64.
+
+ @return The current selector of LDT.
+
+**/
+UINT16
+EFIAPI
+AsmReadLdtr (
+ VOID
+ )
+{
+ UINT16 Data;
+
+ __asm__ __volatile__ (
+ "sldt %0"
+ : "=g" (Data) // %0
+ );
+
+ return Data;
+}
+
+
+/**
+ Writes the current Local Descriptor Table Register (GDTR) selector.
+
+ Writes and the current LDTR descriptor specified by Ldtr. This function is
+ only available on IA-32 and X64.
+
+ @param Ldtr 16-bit LDTR selector value.
+
+**/
+VOID
+EFIAPI
+AsmWriteLdtr (
+ IN UINT16 Ldtr
+ )
+{
+ __asm__ __volatile__ (
+ "lldtw %0"
+ :
+ : "g" (Ldtr) // %0
+ );
+}
+
+
+/**
+ Save the current floating point/SSE/SSE2 context to a buffer.
+
+ Saves the current floating point/SSE/SSE2 state to the buffer specified by
+ Buffer. Buffer must be aligned on a 16-byte boundary. This function is only
+ available on IA-32 and X64.
+
+ @param Buffer The pointer to a buffer to save the floating point/SSE/SSE2 context.
+
+**/
+VOID
+EFIAPI
+InternalX86FxSave (
+ OUT IA32_FX_BUFFER *Buffer
+ )
+{
+ __asm__ __volatile__ (
+ "fxsave %0"
+ :
+ : "m" (*Buffer) // %0
+ );
+}
+
+
+/**
+ Restores the current floating point/SSE/SSE2 context from a buffer.
+
+ Restores the current floating point/SSE/SSE2 state from the buffer specified
+ by Buffer. Buffer must be aligned on a 16-byte boundary. This function is
+ only available on IA-32 and X64.
+
+ @param Buffer The pointer to a buffer to save the floating point/SSE/SSE2 context.
+
+**/
+VOID
+EFIAPI
+InternalX86FxRestore (
+ IN CONST IA32_FX_BUFFER *Buffer
+ )
+{
+ __asm__ __volatile__ (
+ "fxrstor %0"
+ :
+ : "m" (*Buffer) // %0
+ );
+}
+
+
+/**
+ Reads the current value of 64-bit MMX Register #0 (MM0).
+
+ Reads and returns the current value of MM0. This function is only available
+ on IA-32 and X64.
+
+ @return The current value of MM0.
+
+**/
+UINT64
+EFIAPI
+AsmReadMm0 (
+ VOID
+ )
+{
+ UINT64 Data;
+
+ __asm__ __volatile__ (
+ "push %%eax \n\t"
+ "push %%eax \n\t"
+ "movq %%mm0, (%%esp)\n\t"
+ "pop %%eax \n\t"
+ "pop %%edx \n\t"
+ : "=A" (Data) // %0
+ );
+
+ return Data;
+}
+
+
+/**
+ Reads the current value of 64-bit MMX Register #1 (MM1).
+
+ Reads and returns the current value of MM1. This function is only available
+ on IA-32 and X64.
+
+ @return The current value of MM1.
+
+**/
+UINT64
+EFIAPI
+AsmReadMm1 (
+ VOID
+ )
+{
+ UINT64 Data;
+
+ __asm__ __volatile__ (
+ "push %%eax \n\t"
+ "push %%eax \n\t"
+ "movq %%mm1, (%%esp)\n\t"
+ "pop %%eax \n\t"
+ "pop %%edx \n\t"
+ : "=A" (Data) // %0
+ );
+
+ return Data;
+}
+
+
+/**
+ Reads the current value of 64-bit MMX Register #2 (MM2).
+
+ Reads and returns the current value of MM2. This function is only available
+ on IA-32 and X64.
+
+ @return The current value of MM2.
+
+**/
+UINT64
+EFIAPI
+AsmReadMm2 (
+ VOID
+ )
+{
+ UINT64 Data;
+
+ __asm__ __volatile__ (
+ "push %%eax \n\t"
+ "push %%eax \n\t"
+ "movq %%mm2, (%%esp)\n\t"
+ "pop %%eax \n\t"
+ "pop %%edx \n\t"
+ : "=A" (Data) // %0
+ );
+
+ return Data;
+}
+
+
+/**
+ Reads the current value of 64-bit MMX Register #3 (MM3).
+
+ Reads and returns the current value of MM3. This function is only available
+ on IA-32 and X64.
+
+ @return The current value of MM3.
+
+**/
+UINT64
+EFIAPI
+AsmReadMm3 (
+ VOID
+ )
+{
+ UINT64 Data;
+
+ __asm__ __volatile__ (
+ "push %%eax \n\t"
+ "push %%eax \n\t"
+ "movq %%mm3, (%%esp)\n\t"
+ "pop %%eax \n\t"
+ "pop %%edx \n\t"
+ : "=A" (Data) // %0
+ );
+
+ return Data;
+}
+
+
+/**
+ Reads the current value of 64-bit MMX Register #4 (MM4).
+
+ Reads and returns the current value of MM4. This function is only available
+ on IA-32 and X64.
+
+ @return The current value of MM4.
+
+**/
+UINT64
+EFIAPI
+AsmReadMm4 (
+ VOID
+ )
+{
+ UINT64 Data;
+
+ __asm__ __volatile__ (
+ "push %%eax \n\t"
+ "push %%eax \n\t"
+ "movq %%mm4, (%%esp)\n\t"
+ "pop %%eax \n\t"
+ "pop %%edx \n\t"
+ : "=A" (Data) // %0
+ );
+
+ return Data;
+}
+
+
+/**
+ Reads the current value of 64-bit MMX Register #5 (MM5).
+
+ Reads and returns the current value of MM5. This function is only available
+ on IA-32 and X64.
+
+ @return The current value of MM5.
+
+**/
+UINT64
+EFIAPI
+AsmReadMm5 (
+ VOID
+ )
+{
+ UINT64 Data;
+
+ __asm__ __volatile__ (
+ "push %%eax \n\t"
+ "push %%eax \n\t"
+ "movq %%mm5, (%%esp)\n\t"
+ "pop %%eax \n\t"
+ "pop %%edx \n\t"
+ : "=A" (Data) // %0
+ );
+
+ return Data;
+}
+
+
+/**
+ Reads the current value of 64-bit MMX Register #6 (MM6).
+
+ Reads and returns the current value of MM6. This function is only available
+ on IA-32 and X64.
+
+ @return The current value of MM6.
+
+**/
+UINT64
+EFIAPI
+AsmReadMm6 (
+ VOID
+ )
+{
+ UINT64 Data;
+
+ __asm__ __volatile__ (
+ "push %%eax \n\t"
+ "push %%eax \n\t"
+ "movq %%mm6, (%%esp)\n\t"
+ "pop %%eax \n\t"
+ "pop %%edx \n\t"
+ : "=A" (Data) // %0
+ );
+
+ return Data;
+}
+
+
+/**
+ Reads the current value of 64-bit MMX Register #7 (MM7).
+
+ Reads and returns the current value of MM7. This function is only available
+ on IA-32 and X64.
+
+ @return The current value of MM7.
+
+**/
+UINT64
+EFIAPI
+AsmReadMm7 (
+ VOID
+ )
+{
+ UINT64 Data;
+
+ __asm__ __volatile__ (
+ "push %%eax \n\t"
+ "push %%eax \n\t"
+ "movq %%mm7, (%%esp)\n\t"
+ "pop %%eax \n\t"
+ "pop %%edx \n\t"
+ : "=A" (Data) // %0
+ );
+
+ return Data;
+}
+
+
+/**
+ Writes the current value of 64-bit MMX Register #0 (MM0).
+
+ Writes the current value of MM0. This function is only available on IA32 and
+ X64.
+
+ @param Value The 64-bit value to write to MM0.
+
+**/
+VOID
+EFIAPI
+AsmWriteMm0 (
+ IN UINT64 Value
+ )
+{
+ __asm__ __volatile__ (
+ "movq %0, %%mm0" // %0
+ :
+ : "m" (Value)
+ );
+}
+
+
+/**
+ Writes the current value of 64-bit MMX Register #1 (MM1).
+
+ Writes the current value of MM1. This function is only available on IA32 and
+ X64.
+
+ @param Value The 64-bit value to write to MM1.
+
+**/
+VOID
+EFIAPI
+AsmWriteMm1 (
+ IN UINT64 Value
+ )
+{
+ __asm__ __volatile__ (
+ "movq %0, %%mm1" // %0
+ :
+ : "m" (Value)
+ );
+}
+
+
+/**
+ Writes the current value of 64-bit MMX Register #2 (MM2).
+
+ Writes the current value of MM2. This function is only available on IA32 and
+ X64.
+
+ @param Value The 64-bit value to write to MM2.
+
+**/
+VOID
+EFIAPI
+AsmWriteMm2 (
+ IN UINT64 Value
+ )
+{
+ __asm__ __volatile__ (
+ "movq %0, %%mm2" // %0
+ :
+ : "m" (Value)
+ );
+}
+
+
+/**
+ Writes the current value of 64-bit MMX Register #3 (MM3).
+
+ Writes the current value of MM3. This function is only available on IA32 and
+ X64.
+
+ @param Value The 64-bit value to write to MM3.
+
+**/
+VOID
+EFIAPI
+AsmWriteMm3 (
+ IN UINT64 Value
+ )
+{
+ __asm__ __volatile__ (
+ "movq %0, %%mm3" // %0
+ :
+ : "m" (Value)
+ );
+}
+
+
+/**
+ Writes the current value of 64-bit MMX Register #4 (MM4).
+
+ Writes the current value of MM4. This function is only available on IA32 and
+ X64.
+
+ @param Value The 64-bit value to write to MM4.
+
+**/
+VOID
+EFIAPI
+AsmWriteMm4 (
+ IN UINT64 Value
+ )
+{
+ __asm__ __volatile__ (
+ "movq %0, %%mm4" // %0
+ :
+ : "m" (Value)
+ );
+}
+
+
+/**
+ Writes the current value of 64-bit MMX Register #5 (MM5).
+
+ Writes the current value of MM5. This function is only available on IA32 and
+ X64.
+
+ @param Value The 64-bit value to write to MM5.
+
+**/
+VOID
+EFIAPI
+AsmWriteMm5 (
+ IN UINT64 Value
+ )
+{
+ __asm__ __volatile__ (
+ "movq %0, %%mm5" // %0
+ :
+ : "m" (Value)
+ );
+}
+
+
+/**
+ Writes the current value of 64-bit MMX Register #6 (MM6).
+
+ Writes the current value of MM6. This function is only available on IA32 and
+ X64.
+
+ @param Value The 64-bit value to write to MM6.
+
+**/
+VOID
+EFIAPI
+AsmWriteMm6 (
+ IN UINT64 Value
+ )
+{
+ __asm__ __volatile__ (
+ "movq %0, %%mm6" // %0
+ :
+ : "m" (Value)
+ );
+}
+
+
+/**
+ Writes the current value of 64-bit MMX Register #7 (MM7).
+
+ Writes the current value of MM7. This function is only available on IA32 and
+ X64.
+
+ @param Value The 64-bit value to write to MM7.
+
+**/
+VOID
+EFIAPI
+AsmWriteMm7 (
+ IN UINT64 Value
+ )
+{
+ __asm__ __volatile__ (
+ "movq %0, %%mm7" // %0
+ :
+ : "m" (Value)
+ );
+}
+
+
+/**
+ Reads the current value of Time Stamp Counter (TSC).
+
+ Reads and returns the current value of TSC. This function is only available
+ on IA-32 and X64.
+
+ @return The current value of TSC
+
+**/
+UINT64
+EFIAPI
+AsmReadTsc (
+ VOID
+ )
+{
+ UINT64 Data;
+
+ __asm__ __volatile__ (
+ "rdtsc"
+ : "=A" (Data)
+ );
+
+ return Data;
+}
+
+
+/**
+ Reads the current value of a Performance Counter (PMC).
+
+ Reads and returns the current value of performance counter specified by
+ Index. This function is only available on IA-32 and X64.
+
+ @param Index The 32-bit Performance Counter index to read.
+
+ @return The value of the PMC specified by Index.
+
+**/
+UINT64
+EFIAPI
+AsmReadPmc (
+ IN UINT32 Index
+ )
+{
+ UINT64 Data;
+
+ __asm__ __volatile__ (
+ "rdpmc"
+ : "=A" (Data)
+ : "c" (Index)
+ );
+
+ return Data;
+}
+
+
+
+
+/**
+ Executes a WBINVD instruction.
+
+ Executes a WBINVD instruction. This function is only available on IA-32 and
+ X64.
+
+**/
+VOID
+EFIAPI
+AsmWbinvd (
+ VOID
+ )
+{
+ __asm__ __volatile__ ("wbinvd":::"memory");
+}
+
+
+/**
+ Executes a INVD instruction.
+
+ Executes a INVD instruction. This function is only available on IA-32 and
+ X64.
+
+**/
+VOID
+EFIAPI
+AsmInvd (
+ VOID
+ )
+{
+ __asm__ __volatile__ ("invd":::"memory");
+
+}
+
+
+/**
+ Flushes a cache line from all the instruction and data caches within the
+ coherency domain of the CPU.
+
+ Flushed the cache line specified by LinearAddress, and returns LinearAddress.
+ This function is only available on IA-32 and X64.
+
+ @param LinearAddress The address of the cache line to flush. If the CPU is
+ in a physical addressing mode, then LinearAddress is a
+ physical address. If the CPU is in a virtual
+ addressing mode, then LinearAddress is a virtual
+ address.
+
+ @return LinearAddress
+**/
+VOID *
+EFIAPI
+AsmFlushCacheLine (
+ IN VOID *LinearAddress
+ )
+{
+ UINT32 RegEdx;
+
+ //
+ // If the CPU does not support CLFLUSH instruction,
+ // then promote flush range to flush entire cache.
+ //
+ AsmCpuid (0x01, NULL, NULL, NULL, &RegEdx);
+ if ((RegEdx & BIT19) == 0) {
+ __asm__ __volatile__ ("wbinvd":::"memory");
+ return LinearAddress;
+ }
+
+
+ __asm__ __volatile__ (
+ "clflush (%0)"
+ : "+a" (LinearAddress)
+ :
+ : "memory"
+ );
+
+ return LinearAddress;
+}
+
+
diff --git a/MdePkg/Library/BaseLib/Ia32/InternalSwitchStack.S b/MdePkg/Library/BaseLib/Ia32/InternalSwitchStack.S
new file mode 100644
index 000000000000..97e3ff3e7d7a
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/InternalSwitchStack.S
@@ -0,0 +1,48 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+# Portions copyright (c) 2011, Apple Inc. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# InternalSwitchStack.S
+#
+# Abstract:
+#
+# Implementation of a stack switch on IA-32.
+#
+#------------------------------------------------------------------------------
+
+ASM_GLOBAL ASM_PFX(InternalSwitchStack)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# InternalSwitchStack (
+# IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+# IN VOID *Context1, OPTIONAL
+# IN VOID *Context2, OPTIONAL
+# IN VOID *NewStack
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalSwitchStack):
+ pushl %ebp
+ movl %esp, %ebp
+
+ movl 20(%ebp), %esp # switch stack
+ subl $8, %esp
+
+ movl 16(%ebp), %eax
+ movl %eax, 4(%esp)
+ movl 12(%ebp), %eax
+ movl %eax, (%esp)
+ pushl $0 # keeps gdb from unwinding stack
+ jmp *8(%ebp) # call and never return
+
diff --git a/MdePkg/Library/BaseLib/Ia32/InternalSwitchStack.c b/MdePkg/Library/BaseLib/Ia32/InternalSwitchStack.c
new file mode 100644
index 000000000000..182b0b046e7a
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/InternalSwitchStack.c
@@ -0,0 +1,60 @@
+/** @file
+ SwitchStack() function for IA-32.
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Transfers control to a function starting with a new stack.
+
+ Transfers control to the function specified by EntryPoint using the
+ new stack specified by NewStack and passing in the parameters specified
+ by Context1 and Context2. Context1 and Context2 are optional and may
+ be NULL. The function EntryPoint must never return.
+ Marker will be ignored on IA-32, x64, and EBC.
+ IPF CPUs expect one additional parameter of type VOID * that specifies
+ the new backing store pointer.
+
+ If EntryPoint is NULL, then ASSERT().
+ If NewStack is NULL, then ASSERT().
+
+ @param EntryPoint A pointer to function to call with the new stack.
+ @param Context1 A pointer to the context to pass into the EntryPoint
+ function.
+ @param Context2 A pointer to the context to pass into the EntryPoint
+ function.
+ @param NewStack A pointer to the new stack to use for the EntryPoint
+ function.
+ @param Marker VA_LIST marker for the variable argument list.
+
+**/
+VOID
+EFIAPI
+InternalSwitchStack (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack,
+ IN VA_LIST Marker
+ )
+{
+ BASE_LIBRARY_JUMP_BUFFER JumpBuffer;
+
+ JumpBuffer.Eip = (UINTN)EntryPoint;
+ JumpBuffer.Esp = (UINTN)NewStack - sizeof (VOID*);
+ JumpBuffer.Esp -= sizeof (Context1) + sizeof (Context2);
+ ((VOID**)JumpBuffer.Esp)[1] = Context1;
+ ((VOID**)JumpBuffer.Esp)[2] = Context2;
+
+ LongJump (&JumpBuffer, (UINTN)-1);
+}
diff --git a/MdePkg/Library/BaseLib/Ia32/InternalSwitchStack.nasm b/MdePkg/Library/BaseLib/Ia32/InternalSwitchStack.nasm
new file mode 100644
index 000000000000..b3c4f7bf7816
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/InternalSwitchStack.nasm
@@ -0,0 +1,47 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+; Portions copyright (c) 2011, Apple Inc. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; InternalSwitchStack.nasm
+;
+; Abstract:
+;
+; Implementation of a stack switch on IA-32.
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalSwitchStack (
+; IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+; IN VOID *Context1, OPTIONAL
+; IN VOID *Context2, OPTIONAL
+; IN VOID *NewStack
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(InternalSwitchStack)
+ASM_PFX(InternalSwitchStack):
+ push ebp
+ mov ebp, esp
+
+ mov esp, [ebp + 20] ; switch stack
+ sub esp, 8
+ mov eax, [ebp + 16]
+ mov [esp + 4], eax
+ mov eax, [ebp + 12]
+ mov [esp], eax
+ push 0 ; keeps gdb from unwinding stack
+ jmp dword [ebp + 8] ; call and never return
diff --git a/MdePkg/Library/BaseLib/Ia32/Invd.asm b/MdePkg/Library/BaseLib/Ia32/Invd.asm
new file mode 100644
index 000000000000..4cffebf06f33
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/Invd.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Invd.Asm
+;
+; Abstract:
+;
+; AsmInvd function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .486p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmInvd (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmInvd PROC
+ invd
+ ret
+AsmInvd ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/Invd.c b/MdePkg/Library/BaseLib/Ia32/Invd.c
new file mode 100644
index 000000000000..e5c29b6f5131
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/Invd.c
@@ -0,0 +1,35 @@
+/** @file
+ AsmInvd function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Executes a INVD instruction.
+
+ Executes a INVD instruction. This function is only available on IA-32 and
+ x64.
+
+**/
+VOID
+EFIAPI
+AsmInvd (
+ VOID
+ )
+{
+ _asm {
+ invd
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/Invd.nasm b/MdePkg/Library/BaseLib/Ia32/Invd.nasm
new file mode 100644
index 000000000000..13b8795e00c6
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/Invd.nasm
@@ -0,0 +1,37 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Invd.Asm
+;
+; Abstract:
+;
+; AsmInvd function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmInvd (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmInvd)
+ASM_PFX(AsmInvd):
+ invd
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/LRotU64.S b/MdePkg/Library/BaseLib/Ia32/LRotU64.S
new file mode 100644
index 000000000000..87a6b5b9a20d
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/LRotU64.S
@@ -0,0 +1,48 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# LRotU64.S
+#
+# Abstract:
+#
+# 64-bit left rotation for Ia32
+#
+#------------------------------------------------------------------------------
+
+ASM_GLOBAL ASM_PFX(InternalMathLRotU64)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# InternalMathLRotU64 (
+# IN UINT64 Operand,
+# IN UINTN Count
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalMathLRotU64):
+ push %ebx
+ movb 16(%esp), %cl
+ movl 12(%esp), %edx
+ movl 8(%esp), %eax
+ shldl %cl, %edx, %ebx
+ shldl %cl, %eax, %edx
+ rorl %cl, %ebx
+ shldl %cl, %ebx, %eax
+ testb $32, %cl # Count >= 32?
+ jz L0
+ movl %eax, %ecx
+ movl %edx, %eax
+ movl %ecx, %edx
+L0:
+ pop %ebx
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/LRotU64.asm b/MdePkg/Library/BaseLib/Ia32/LRotU64.asm
new file mode 100644
index 000000000000..c8c1eabab000
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/LRotU64.asm
@@ -0,0 +1,51 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; LRotU64.asm
+;
+; Abstract:
+;
+; 64-bit left rotation for Ia32
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathLRotU64 (
+; IN UINT64 Operand,
+; IN UINTN Count
+; );
+;------------------------------------------------------------------------------
+InternalMathLRotU64 PROC USES ebx
+ mov cl, [esp + 16]
+ mov edx, [esp + 12]
+ mov eax, [esp + 8]
+ shld ebx, edx, cl
+ shld edx, eax, cl
+ ror ebx, cl
+ shld eax, ebx, cl
+ test cl, 32 ; Count >= 32?
+ jz @F
+ mov ecx, eax
+ mov eax, edx
+ mov edx, ecx
+@@:
+ ret
+InternalMathLRotU64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/LRotU64.c b/MdePkg/Library/BaseLib/Ia32/LRotU64.c
new file mode 100644
index 000000000000..1dfef3b6e0f3
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/LRotU64.c
@@ -0,0 +1,55 @@
+/** @file
+ 64-bit left rotation for Ia32
+
+ Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Rotates a 64-bit integer left between 0 and 63 bits, filling
+ the low bits with the high bits that were rotated.
+
+ This function rotates the 64-bit value Operand to the left by Count bits. The
+ low Count bits are fill with the high Count bits of Operand. The rotated
+ value is returned.
+
+ @param Operand The 64-bit operand to rotate left.
+ @param Count The number of bits to rotate left.
+
+ @return Operand <<< Count
+
+**/
+UINT64
+EFIAPI
+InternalMathLRotU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ _asm {
+ mov cl, byte ptr [Count]
+ mov edx, dword ptr [Operand + 4]
+ mov eax, dword ptr [Operand + 0]
+ shld ebx, edx, cl
+ shld edx, eax, cl
+ ror ebx, cl
+ shld eax, ebx, cl
+ test cl, 32 ; Count >= 32?
+ jz L0
+ mov ecx, eax
+ mov eax, edx
+ mov edx, ecx
+L0:
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/LRotU64.nasm b/MdePkg/Library/BaseLib/Ia32/LRotU64.nasm
new file mode 100644
index 000000000000..e3dc015225fc
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/LRotU64.nasm
@@ -0,0 +1,50 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; LRotU64.nasm
+;
+; Abstract:
+;
+; 64-bit left rotation for Ia32
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathLRotU64 (
+; IN UINT64 Operand,
+; IN UINTN Count
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(InternalMathLRotU64)
+ASM_PFX(InternalMathLRotU64):
+ push ebx
+ mov cl, [esp + 16]
+ mov edx, [esp + 12]
+ mov eax, [esp + 8]
+ shld ebx, edx, cl
+ shld edx, eax, cl
+ ror ebx, cl
+ shld eax, ebx, cl
+ test cl, 32 ; Count >= 32?
+ jz .0
+ mov ecx, eax
+ mov eax, edx
+ mov edx, ecx
+.0:
+ pop ebx
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/LShiftU64.S b/MdePkg/Library/BaseLib/Ia32/LShiftU64.S
new file mode 100644
index 000000000000..574583a0308e
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/LShiftU64.S
@@ -0,0 +1,43 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# LShiftU64.S
+#
+# Abstract:
+#
+# 64-bit left shift function for IA-32
+#
+#------------------------------------------------------------------------------
+
+ASM_GLOBAL ASM_PFX(InternalMathLShiftU64)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# InternalMathLShiftU64 (
+# IN UINT64 Operand,
+# IN UINTN Count
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalMathLShiftU64):
+ movb 12(%esp), %cl
+ xorl %eax, %eax
+ movl 4(%esp), %edx
+ testb $32, %cl # Count >= 32?
+ jnz L0
+ movl %edx, %eax
+ movl 0x8(%esp), %edx
+L0:
+ shld %cl, %eax, %edx
+ shl %cl, %eax
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/LShiftU64.asm b/MdePkg/Library/BaseLib/Ia32/LShiftU64.asm
new file mode 100644
index 000000000000..59cba4a81c00
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/LShiftU64.asm
@@ -0,0 +1,48 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; LShiftU64.asm
+;
+; Abstract:
+;
+; 64-bit left shift function for IA-32
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathLShiftU64 (
+; IN UINT64 Operand,
+; IN UINTN Count
+; );
+;------------------------------------------------------------------------------
+InternalMathLShiftU64 PROC
+ mov cl, [esp + 12]
+ xor eax, eax
+ mov edx, [esp + 4]
+ test cl, 32 ; Count >= 32?
+ jnz @F
+ mov eax, edx
+ mov edx, [esp + 8]
+@@:
+ shld edx, eax, cl
+ shl eax, cl
+ ret
+InternalMathLShiftU64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/LShiftU64.c b/MdePkg/Library/BaseLib/Ia32/LShiftU64.c
new file mode 100644
index 000000000000..08266f786f63
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/LShiftU64.c
@@ -0,0 +1,51 @@
+/** @file
+ 64-bit left shift function for IA-32.
+
+ Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Shifts a 64-bit integer left between 0 and 63 bits. The low bits
+ are filled with zeros. The shifted value is returned.
+
+ This function shifts the 64-bit value Operand to the left by Count bits. The
+ low Count bits are set to zero. The shifted value is returned.
+
+ @param Operand The 64-bit operand to shift left.
+ @param Count The number of bits to shift left.
+
+ @return Operand << Count
+
+**/
+UINT64
+EFIAPI
+InternalMathLShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ _asm {
+ mov cl, byte ptr [Count]
+ xor eax, eax
+ mov edx, dword ptr [Operand + 0]
+ test cl, 32 // Count >= 32?
+ jnz L0
+ mov eax, edx
+ mov edx, dword ptr [Operand + 4]
+L0:
+ shld edx, eax, cl
+ shl eax, cl
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/LShiftU64.nasm b/MdePkg/Library/BaseLib/Ia32/LShiftU64.nasm
new file mode 100644
index 000000000000..93de11dfef5e
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/LShiftU64.nasm
@@ -0,0 +1,45 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; LShiftU64.nasm
+;
+; Abstract:
+;
+; 64-bit left shift function for IA-32
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathLShiftU64 (
+; IN UINT64 Operand,
+; IN UINTN Count
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(InternalMathLShiftU64)
+ASM_PFX(InternalMathLShiftU64):
+ mov cl, [esp + 12]
+ xor eax, eax
+ mov edx, [esp + 4]
+ test cl, 32 ; Count >= 32?
+ jnz .0
+ mov eax, edx
+ mov edx, [esp + 8]
+.0:
+ shld edx, eax, cl
+ shl eax, cl
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/LongJump.S b/MdePkg/Library/BaseLib/Ia32/LongJump.S
new file mode 100644
index 000000000000..dfd52f23e9f0
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/LongJump.S
@@ -0,0 +1,41 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# LongJump.S
+#
+# Abstract:
+#
+# Implementation of _LongJump() on IA-32.
+#
+#------------------------------------------------------------------------------
+
+ASM_GLOBAL ASM_PFX(InternalLongJump)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# InternalLongJump (
+# IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,
+# IN UINTN Value
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalLongJump):
+ pop %eax # skip return address
+ pop %edx # edx <- JumpBuffer
+ pop %eax # eax <- Value
+ movl (%edx), %ebx
+ movl 4(%edx), %esi
+ movl 8(%edx), %edi
+ movl 12(%edx), %ebp
+ movl 16(%edx), %esp
+ jmp *20(%edx) # restore "eip"
diff --git a/MdePkg/Library/BaseLib/Ia32/LongJump.asm b/MdePkg/Library/BaseLib/Ia32/LongJump.asm
new file mode 100644
index 000000000000..17d1006fe672
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/LongJump.asm
@@ -0,0 +1,46 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; LongJump.Asm
+;
+; Abstract:
+;
+; Implementation of _LongJump() on IA-32.
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalLongJump (
+; IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+InternalLongJump PROC
+ pop eax ; skip return address
+ pop edx ; edx <- JumpBuffer
+ pop eax ; eax <- Value
+ mov ebx, [edx]
+ mov esi, [edx + 4]
+ mov edi, [edx + 8]
+ mov ebp, [edx + 12]
+ mov esp, [edx + 16]
+ jmp dword ptr [edx + 20] ; restore "eip"
+InternalLongJump ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/LongJump.c b/MdePkg/Library/BaseLib/Ia32/LongJump.c
new file mode 100644
index 000000000000..8eb013f97334
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/LongJump.c
@@ -0,0 +1,50 @@
+/** @file
+ Implementation of _LongJump() on IA-32.
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+#include "BaseLibInternals.h"
+
+
+/**
+ Restores the CPU context that was saved with SetJump().
+
+ Restores the CPU context from the buffer specified by JumpBuffer.
+ This function never returns to the caller.
+ Instead is resumes execution based on the state of JumpBuffer.
+
+ @param JumpBuffer A pointer to CPU context buffer.
+ @param Value The value to return when the SetJump() context is restored.
+
+**/
+__declspec (naked)
+VOID
+EFIAPI
+InternalLongJump (
+ IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,
+ IN UINTN Value
+ )
+{
+ _asm {
+ pop eax ; skip return address
+ pop edx ; edx <- JumpBuffer
+ pop eax ; eax <- Value
+ mov ebx, [edx]
+ mov esi, [edx + 4]
+ mov edi, [edx + 8]
+ mov ebp, [edx + 12]
+ mov esp, [edx + 16]
+ jmp dword ptr [edx + 20]
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/LongJump.nasm b/MdePkg/Library/BaseLib/Ia32/LongJump.nasm
new file mode 100644
index 000000000000..5e643c0dcf99
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/LongJump.nasm
@@ -0,0 +1,43 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; LongJump.Asm
+;
+; Abstract:
+;
+; Implementation of _LongJump() on IA-32.
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalLongJump (
+; IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(InternalLongJump)
+ASM_PFX(InternalLongJump):
+ pop eax ; skip return address
+ pop edx ; edx <- JumpBuffer
+ pop eax ; eax <- Value
+ mov ebx, [edx]
+ mov esi, [edx + 4]
+ mov edi, [edx + 8]
+ mov ebp, [edx + 12]
+ mov esp, [edx + 16]
+ jmp dword [edx + 20] ; restore "eip"
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ModU64x32.S b/MdePkg/Library/BaseLib/Ia32/ModU64x32.S
new file mode 100644
index 000000000000..91ea4630a00e
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ModU64x32.S
@@ -0,0 +1,40 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# DivU64x32.S
+#
+# Abstract:
+#
+# Calculate the remainder of a 64-bit integer by a 32-bit integer
+#
+#------------------------------------------------------------------------------
+
+ASM_GLOBAL ASM_PFX(InternalMathModU64x32)
+
+#------------------------------------------------------------------------------
+# UINT32
+# EFIAPI
+# InternalMathModU64x32 (
+# IN UINT64 Dividend,
+# IN UINT32 Divisor
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalMathModU64x32):
+ movl 8(%esp), %eax
+ movl 12(%esp), %ecx
+ xorl %edx, %edx
+ divl %ecx
+ movl 4(%esp), %eax
+ divl %ecx
+ movl %edx, %eax
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ModU64x32.asm b/MdePkg/Library/BaseLib/Ia32/ModU64x32.asm
new file mode 100644
index 000000000000..babaa4fc4c67
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ModU64x32.asm
@@ -0,0 +1,45 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DivU64x32.asm
+;
+; Abstract:
+;
+; Calculate the remainder of a 64-bit integer by a 32-bit integer
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; InternalMathModU64x32 (
+; IN UINT64 Dividend,
+; IN UINT32 Divisor
+; );
+;------------------------------------------------------------------------------
+InternalMathModU64x32 PROC
+ mov eax, [esp + 8]
+ mov ecx, [esp + 12]
+ xor edx, edx
+ div ecx
+ mov eax, [esp + 4]
+ div ecx
+ mov eax, edx
+ ret
+InternalMathModU64x32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ModU64x32.c b/MdePkg/Library/BaseLib/Ia32/ModU64x32.c
new file mode 100644
index 000000000000..3186ccb2a265
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ModU64x32.c
@@ -0,0 +1,48 @@
+/** @file
+ Calculate the remainder of a 64-bit integer by a 32-bit integer
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Divides a 64-bit unsigned integer by a 32-bit unsigned integer and
+ generates a 32-bit unsigned remainder.
+
+ This function divides the 64-bit unsigned value Dividend by the 32-bit
+ unsigned value Divisor and generates a 32-bit remainder. This function
+ returns the 32-bit unsigned remainder.
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 32-bit unsigned value.
+
+ @return Dividend % Divisor
+
+**/
+UINT32
+EFIAPI
+InternalMathModU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor
+ )
+{
+ _asm {
+ mov eax, dword ptr [Dividend + 4]
+ mov ecx, Divisor
+ xor edx, edx
+ div ecx
+ mov eax, dword ptr [Dividend + 0]
+ div ecx
+ mov eax, edx
+ }
+}
diff --git a/MdePkg/Library/BaseLib/Ia32/ModU64x32.nasm b/MdePkg/Library/BaseLib/Ia32/ModU64x32.nasm
new file mode 100644
index 000000000000..cb3681cd2334
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ModU64x32.nasm
@@ -0,0 +1,42 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DivU64x32.asm
+;
+; Abstract:
+;
+; Calculate the remainder of a 64-bit integer by a 32-bit integer
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; InternalMathModU64x32 (
+; IN UINT64 Dividend,
+; IN UINT32 Divisor
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(InternalMathModU64x32)
+ASM_PFX(InternalMathModU64x32):
+ mov eax, [esp + 8]
+ mov ecx, [esp + 12]
+ xor edx, edx
+ div ecx
+ mov eax, [esp + 4]
+ div ecx
+ mov eax, edx
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/Monitor.S b/MdePkg/Library/BaseLib/Ia32/Monitor.S
new file mode 100644
index 000000000000..b6bfbeedf1f4
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/Monitor.S
@@ -0,0 +1,40 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# Monitor.S
+#
+# Abstract:
+#
+# AsmMonitor function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+ASM_GLOBAL ASM_PFX(AsmMonitor)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmMonitor (
+# IN UINTN Eax,
+# IN UINTN Ecx,
+# IN UINTN Edx
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmMonitor):
+ movl 4(%esp), %eax
+ movl 8(%esp), %ecx
+ movl 12(%esp), %edx
+ monitor %eax, %ecx, %edx # monitor
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/Monitor.asm b/MdePkg/Library/BaseLib/Ia32/Monitor.asm
new file mode 100644
index 000000000000..cd298bd37c6b
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/Monitor.asm
@@ -0,0 +1,45 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Monitor.Asm
+;
+; Abstract:
+;
+; AsmMonitor function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmMonitor (
+; IN UINTN Eax,
+; IN UINTN Ecx,
+; IN UINTN Edx
+; );
+;------------------------------------------------------------------------------
+AsmMonitor PROC
+ mov eax, [esp + 4]
+ mov ecx, [esp + 8]
+ mov edx, [esp + 12]
+ DB 0fh, 1, 0c8h ; monitor
+ ret
+AsmMonitor ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/Monitor.c b/MdePkg/Library/BaseLib/Ia32/Monitor.c
new file mode 100644
index 000000000000..d9c93255c96b
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/Monitor.c
@@ -0,0 +1,48 @@
+/** @file
+ AsmMonitor function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+/**
+ Sets up a monitor buffer that is used by AsmMwait().
+
+ Executes a MONITOR instruction with the register state specified by Eax, Ecx
+ and Edx. Returns Eax. This function is only available on IA-32 and x64.
+
+ @param RegisterEax The value to load into EAX or RAX before executing the MONITOR
+ instruction.
+ @param RegisterEcx The value to load into ECX or RCX before executing the MONITOR
+ instruction.
+ @param RegisterEdx The value to load into EDX or RDX before executing the MONITOR
+ instruction.
+
+ @return RegisterEax
+
+**/
+UINTN
+EFIAPI
+AsmMonitor (
+ IN UINTN RegisterEax,
+ IN UINTN RegisterEcx,
+ IN UINTN RegisterEdx
+ )
+{
+ _asm {
+ mov eax, RegisterEax
+ mov ecx, RegisterEcx
+ mov edx, RegisterEdx
+ _emit 0x0f // monitor
+ _emit 0x01
+ _emit 0xc8
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/Monitor.nasm b/MdePkg/Library/BaseLib/Ia32/Monitor.nasm
new file mode 100644
index 000000000000..6cf8ffd4d38a
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/Monitor.nasm
@@ -0,0 +1,42 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Monitor.Asm
+;
+; Abstract:
+;
+; AsmMonitor function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmMonitor (
+; IN UINTN Eax,
+; IN UINTN Ecx,
+; IN UINTN Edx
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmMonitor)
+ASM_PFX(AsmMonitor):
+ mov eax, [esp + 4]
+ mov ecx, [esp + 8]
+ mov edx, [esp + 12]
+ DB 0xf, 1, 0xc8 ; monitor
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/MultU64x32.S b/MdePkg/Library/BaseLib/Ia32/MultU64x32.S
new file mode 100644
index 000000000000..245687a24366
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/MultU64x32.S
@@ -0,0 +1,41 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# MultU64x32.S
+#
+# Abstract:
+#
+# Calculate the product of a 64-bit integer and a 32-bit integer
+#
+#------------------------------------------------------------------------------
+
+
+ .code:
+
+ASM_GLOBAL ASM_PFX(InternalMathMultU64x32)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# InternalMathMultU64x32 (
+# IN UINT64 Multiplicand,
+# IN UINT32 Multiplier
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalMathMultU64x32):
+ movl 12(%esp), %ecx
+ movl %ecx, %eax
+ imull 8(%esp), %ecx # overflow not detectable
+ mull 0x4(%esp)
+ addl %ecx, %edx
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/MultU64x32.asm b/MdePkg/Library/BaseLib/Ia32/MultU64x32.asm
new file mode 100644
index 000000000000..5ea1ce705f59
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/MultU64x32.asm
@@ -0,0 +1,43 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; MultU64x32.asm
+;
+; Abstract:
+;
+; Calculate the product of a 64-bit integer and a 32-bit integer
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathMultU64x32 (
+; IN UINT64 Multiplicand,
+; IN UINT32 Multiplier
+; );
+;------------------------------------------------------------------------------
+InternalMathMultU64x32 PROC
+ mov ecx, [esp + 12]
+ mov eax, ecx
+ imul ecx, [esp + 8] ; overflow not detectable
+ mul dword ptr [esp + 4]
+ add edx, ecx
+ ret
+InternalMathMultU64x32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/MultU64x32.c b/MdePkg/Library/BaseLib/Ia32/MultU64x32.c
new file mode 100644
index 000000000000..8b534aab2bd2
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/MultU64x32.c
@@ -0,0 +1,47 @@
+/** @file
+ Calculate the product of a 64-bit integer and a 32-bit integer
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Multiples a 64-bit unsigned integer by a 32-bit unsigned integer
+ and generates a 64-bit unsigned result.
+
+ This function multiples the 64-bit unsigned value Multiplicand by the 32-bit
+ unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
+ bit unsigned result is returned.
+
+ @param Multiplicand A 64-bit unsigned value.
+ @param Multiplier A 32-bit unsigned value.
+
+ @return Multiplicand * Multiplier
+
+**/
+UINT64
+EFIAPI
+InternalMathMultU64x32 (
+ IN UINT64 Multiplicand,
+ IN UINT32 Multiplier
+ )
+{
+ _asm {
+ mov ecx, Multiplier
+ mov eax, ecx
+ imul ecx, dword ptr [Multiplicand + 4] // overflow not detectable
+ mul dword ptr [Multiplicand + 0]
+ add edx, ecx
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/MultU64x32.nasm b/MdePkg/Library/BaseLib/Ia32/MultU64x32.nasm
new file mode 100644
index 000000000000..d4c9e512e06b
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/MultU64x32.nasm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; MultU64x32.nasm
+;
+; Abstract:
+;
+; Calculate the product of a 64-bit integer and a 32-bit integer
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathMultU64x32 (
+; IN UINT64 Multiplicand,
+; IN UINT32 Multiplier
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(InternalMathMultU64x32)
+ASM_PFX(InternalMathMultU64x32):
+ mov ecx, [esp + 12]
+ mov eax, ecx
+ imul ecx, [esp + 8] ; overflow not detectable
+ mul dword [esp + 4]
+ add edx, ecx
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/MultU64x64.S b/MdePkg/Library/BaseLib/Ia32/MultU64x64.S
new file mode 100644
index 000000000000..3aae054813c2
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/MultU64x64.S
@@ -0,0 +1,44 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# MultU64x64.S
+#
+# Abstract:
+#
+# Calculate the product of a 64-bit integer and another 64-bit integer
+#
+#------------------------------------------------------------------------------
+
+ASM_GLOBAL ASM_PFX(InternalMathMultU64x64)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# InternalMathMultU64x64 (
+# IN UINT64 Multiplicand,
+# IN UINT64 Multiplier
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalMathMultU64x64):
+ push %ebx
+ movl 8(%esp), %ebx # ebx <- M1[0..31]
+ movl 16(%esp), %edx # edx <- M2[0..31]
+ movl %ebx, %ecx
+ movl %edx, %eax
+ imull 20(%esp), %ebx # ebx <- M1[0..31] * M2[32..63]
+ imull 12(%esp), %edx # edx <- M1[32..63] * M2[0..31]
+ addl %edx, %ebx # carries are abandoned
+ mull %ecx # edx:eax <- M1[0..31] * M2[0..31]
+ addl %ebx, %edx # carries are abandoned
+ pop %ebx
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/MultU64x64.asm b/MdePkg/Library/BaseLib/Ia32/MultU64x64.asm
new file mode 100644
index 000000000000..8dfdf2a80fb8
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/MultU64x64.asm
@@ -0,0 +1,47 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; MultU64x64.asm
+;
+; Abstract:
+;
+; Calculate the product of a 64-bit integer and another 64-bit integer
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathMultU64x64 (
+; IN UINT64 Multiplicand,
+; IN UINT64 Multiplier
+; );
+;------------------------------------------------------------------------------
+InternalMathMultU64x64 PROC USES ebx
+ mov ebx, [esp + 8] ; ebx <- M1[0..31]
+ mov edx, [esp + 16] ; edx <- M2[0..31]
+ mov ecx, ebx
+ mov eax, edx
+ imul ebx, [esp + 20] ; ebx <- M1[0..31] * M2[32..63]
+ imul edx, [esp + 12] ; edx <- M1[32..63] * M2[0..31]
+ add ebx, edx ; carries are abandoned
+ mul ecx ; edx:eax <- M1[0..31] * M2[0..31]
+ add edx, ebx ; carries are abandoned
+ ret
+InternalMathMultU64x64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/MultU64x64.c b/MdePkg/Library/BaseLib/Ia32/MultU64x64.c
new file mode 100644
index 000000000000..5f1048627565
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/MultU64x64.c
@@ -0,0 +1,51 @@
+/** @file
+ Calculate the product of a 64-bit integer and another 64-bit integer
+
+ Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Multiplies a 64-bit unsigned integer by a 64-bit unsigned integer
+ and generates a 64-bit unsigned result.
+
+ This function multiplies the 64-bit unsigned value Multiplicand by the 64-bit
+ unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
+ bit unsigned result is returned.
+
+ @param Multiplicand A 64-bit unsigned value.
+ @param Multiplier A 64-bit unsigned value.
+
+ @return Multiplicand * Multiplier
+
+**/
+UINT64
+EFIAPI
+InternalMathMultU64x64 (
+ IN UINT64 Multiplicand,
+ IN UINT64 Multiplier
+ )
+{
+ _asm {
+ mov ebx, dword ptr [Multiplicand + 0]
+ mov edx, dword ptr [Multiplier + 0]
+ mov ecx, ebx
+ mov eax, edx
+ imul ebx, dword ptr [Multiplier + 4]
+ imul edx, dword ptr [Multiplicand + 4]
+ add ebx, edx
+ mul ecx
+ add edx, ebx
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/MultU64x64.nasm b/MdePkg/Library/BaseLib/Ia32/MultU64x64.nasm
new file mode 100644
index 000000000000..4fdbf86be207
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/MultU64x64.nasm
@@ -0,0 +1,46 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; MultU64x64.nasm
+;
+; Abstract:
+;
+; Calculate the product of a 64-bit integer and another 64-bit integer
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathMultU64x64 (
+; IN UINT64 Multiplicand,
+; IN UINT64 Multiplier
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(InternalMathMultU64x64)
+ASM_PFX(InternalMathMultU64x64):
+ push ebx
+ mov ebx, [esp + 8] ; ebx <- M1[0..31]
+ mov edx, [esp + 16] ; edx <- M2[0..31]
+ mov ecx, ebx
+ mov eax, edx
+ imul ebx, [esp + 20] ; ebx <- M1[0..31] * M2[32..63]
+ imul edx, [esp + 12] ; edx <- M1[32..63] * M2[0..31]
+ add ebx, edx ; carries are abandoned
+ mul ecx ; edx:eax <- M1[0..31] * M2[0..31]
+ add edx, ebx ; carries are abandoned
+ pop ebx
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/Mwait.S b/MdePkg/Library/BaseLib/Ia32/Mwait.S
new file mode 100644
index 000000000000..1b8ef9bad5e4
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/Mwait.S
@@ -0,0 +1,38 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# Mwait.S
+#
+# Abstract:
+#
+# AsmMwait function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+ASM_GLOBAL ASM_PFX(AsmMwait)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmMwait (
+# IN UINTN Eax,
+# IN UINTN Ecx
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmMwait):
+ movl 4(%esp), %eax
+ movl 8(%esp), %ecx
+ mwait
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/Mwait.asm b/MdePkg/Library/BaseLib/Ia32/Mwait.asm
new file mode 100644
index 000000000000..51af87705bb3
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/Mwait.asm
@@ -0,0 +1,43 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Mwait.Asm
+;
+; Abstract:
+;
+; AsmMwait function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmMwait (
+; IN UINTN Eax,
+; IN UINTN Ecx
+; );
+;------------------------------------------------------------------------------
+AsmMwait PROC
+ mov eax, [esp + 4]
+ mov ecx, [esp + 8]
+ DB 0fh, 1, 0c9h ; mwait
+ ret
+AsmMwait ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/Mwait.c b/MdePkg/Library/BaseLib/Ia32/Mwait.c
new file mode 100644
index 000000000000..0cac0ac3169d
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/Mwait.c
@@ -0,0 +1,44 @@
+/** @file
+ AsmMwait function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+/**
+ Executes an MWAIT instruction.
+
+ Executes an MWAIT instruction with the register state specified by Eax and
+ Ecx. Returns Eax. This function is only available on IA-32 and x64.
+
+ @param RegisterEax The value to load into EAX or RAX before executing the MONITOR
+ instruction.
+ @param RegisterEcx The value to load into ECX or RCX before executing the MONITOR
+ instruction.
+
+ @return RegisterEax
+
+**/
+UINTN
+EFIAPI
+AsmMwait (
+ IN UINTN RegisterEax,
+ IN UINTN RegisterEcx
+ )
+{
+ _asm {
+ mov eax, RegisterEax
+ mov ecx, RegisterEcx
+ _emit 0x0f // mwait
+ _emit 0x01
+ _emit 0xC9
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/Mwait.nasm b/MdePkg/Library/BaseLib/Ia32/Mwait.nasm
new file mode 100644
index 000000000000..1a369d37b4ba
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/Mwait.nasm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Mwait.Asm
+;
+; Abstract:
+;
+; AsmMwait function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmMwait (
+; IN UINTN Eax,
+; IN UINTN Ecx
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmMwait)
+ASM_PFX(AsmMwait):
+ mov eax, [esp + 4]
+ mov ecx, [esp + 8]
+ DB 0xf, 1, 0xc9 ; mwait
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/Non-existing.c b/MdePkg/Library/BaseLib/Ia32/Non-existing.c
new file mode 100644
index 000000000000..20146c07e373
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/Non-existing.c
@@ -0,0 +1,57 @@
+/** @file
+ Non-existing BaseLib functions on Ia32
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <Library/DebugLib.h>
+
+/**
+ Disables the 64-bit paging mode on the CPU.
+
+ Disables the 64-bit paging mode on the CPU and returns to 32-bit protected
+ mode. This function assumes the current execution mode is 64-paging mode.
+ This function is only available on x64. After the 64-bit paging mode is
+ disabled, control is transferred to the function specified by EntryPoint
+ using the new stack specified by NewStack and passing in the parameters
+ specified by Context1 and Context2. Context1 and Context2 are optional and
+ may be 0. The function EntryPoint must never return.
+
+ @param CodeSelector The 16-bit selector to load in the CS before EntryPoint
+ is called. The descriptor in the GDT that this selector
+ references must be setup for 32-bit protected mode.
+ @param EntryPoint The 64-bit virtual address of the function to call with
+ the new stack after paging is disabled.
+ @param Context1 The 64-bit virtual address of the context to pass into
+ the EntryPoint function as the first parameter after
+ paging is disabled.
+ @param Context2 The 64-bit virtual address of the context to pass into
+ the EntryPoint function as the second parameter after
+ paging is disabled.
+ @param NewStack The 64-bit virtual address of the new stack to use for
+ the EntryPoint function after paging is disabled.
+
+**/
+VOID
+EFIAPI
+InternalX86DisablePaging64 (
+ IN UINT16 CodeSelector,
+ IN UINT32 EntryPoint,
+ IN UINT32 Context1, OPTIONAL
+ IN UINT32 Context2, OPTIONAL
+ IN UINT32 NewStack
+ )
+{
+ //
+ // This function cannot work on IA32 platform
+ //
+ ASSERT (FALSE);
+}
diff --git a/MdePkg/Library/BaseLib/Ia32/RRotU64.S b/MdePkg/Library/BaseLib/Ia32/RRotU64.S
new file mode 100644
index 000000000000..a504f820185c
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/RRotU64.S
@@ -0,0 +1,48 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# RRotU64.S
+#
+# Abstract:
+#
+# 64-bit right rotation for Ia32
+#
+#------------------------------------------------------------------------------
+
+ASM_GLOBAL ASM_PFX(InternalMathRRotU64)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# InternalMathRRotU64 (
+# IN UINT64 Operand,
+# IN UINTN Count
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalMathRRotU64):
+ push %ebx
+ movb 16(%esp), %cl
+ movl 8(%esp), %eax
+ movl 12(%esp), %edx
+ shrdl %cl, %eax, %ebx
+ shrdl %cl, %edx, %eax
+ roll %cl, %ebx
+ shrdl %cl, %ebx, %edx
+ testb $32, %cl # Count >= 32?
+ jz L0
+ movl %eax, %ecx # switch eax & edx if Count >= 32
+ movl %edx, %eax
+ movl %ecx, %edx
+L0:
+ pop %ebx
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/RRotU64.asm b/MdePkg/Library/BaseLib/Ia32/RRotU64.asm
new file mode 100644
index 000000000000..261db376015d
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/RRotU64.asm
@@ -0,0 +1,51 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; RRotU64.asm
+;
+; Abstract:
+;
+; 64-bit right rotation for Ia32
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathRRotU64 (
+; IN UINT64 Operand,
+; IN UINTN Count
+; );
+;------------------------------------------------------------------------------
+InternalMathRRotU64 PROC USES ebx
+ mov cl, [esp + 16]
+ mov eax, [esp + 8]
+ mov edx, [esp + 12]
+ shrd ebx, eax, cl
+ shrd eax, edx, cl
+ rol ebx, cl
+ shrd edx, ebx, cl
+ test cl, 32 ; Count >= 32?
+ jz @F
+ mov ecx, eax ; switch eax & edx if Count >= 32
+ mov eax, edx
+ mov edx, ecx
+@@:
+ ret
+InternalMathRRotU64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/RRotU64.c b/MdePkg/Library/BaseLib/Ia32/RRotU64.c
new file mode 100644
index 000000000000..bbf0146fc6eb
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/RRotU64.c
@@ -0,0 +1,55 @@
+/** @file
+ 64-bit right rotation for Ia32
+
+ Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Rotates a 64-bit integer right between 0 and 63 bits, filling
+ the high bits with the high low bits that were rotated.
+
+ This function rotates the 64-bit value Operand to the right by Count bits.
+ The high Count bits are fill with the low Count bits of Operand. The rotated
+ value is returned.
+
+ @param Operand The 64-bit operand to rotate right.
+ @param Count The number of bits to rotate right.
+
+ @return Operand >>> Count
+
+**/
+UINT64
+EFIAPI
+InternalMathRRotU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ _asm {
+ mov cl, byte ptr [Count]
+ mov eax, dword ptr [Operand + 0]
+ mov edx, dword ptr [Operand + 4]
+ shrd ebx, eax, cl
+ shrd eax, edx, cl
+ rol ebx, cl
+ shrd edx, ebx, cl
+ test cl, 32 // Count >= 32?
+ jz L0
+ mov ecx, eax
+ mov eax, edx
+ mov edx, ecx
+L0:
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/RRotU64.nasm b/MdePkg/Library/BaseLib/Ia32/RRotU64.nasm
new file mode 100644
index 000000000000..5946b3dc2ca7
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/RRotU64.nasm
@@ -0,0 +1,50 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; RRotU64.nasm
+;
+; Abstract:
+;
+; 64-bit right rotation for Ia32
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathRRotU64 (
+; IN UINT64 Operand,
+; IN UINTN Count
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(InternalMathRRotU64)
+ASM_PFX(InternalMathRRotU64):
+ push ebx
+ mov cl, [esp + 16]
+ mov eax, [esp + 8]
+ mov edx, [esp + 12]
+ shrd ebx, eax, cl
+ shrd eax, edx, cl
+ rol ebx, cl
+ shrd edx, ebx, cl
+ test cl, 32 ; Count >= 32?
+ jz .0
+ mov ecx, eax ; switch eax & edx if Count >= 32
+ mov eax, edx
+ mov edx, ecx
+.0:
+ pop ebx
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/RShiftU64.S b/MdePkg/Library/BaseLib/Ia32/RShiftU64.S
new file mode 100644
index 000000000000..8e1cec882857
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/RShiftU64.S
@@ -0,0 +1,46 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# RShiftU64.S
+#
+# Abstract:
+#
+# 64-bit logical right shift function for IA-32
+#
+#------------------------------------------------------------------------------
+
+
+ .code:
+
+ASM_GLOBAL ASM_PFX(InternalMathRShiftU64)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# InternalMathRShiftU64 (
+# IN UINT64 Operand,
+# IN UINTN Count
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalMathRShiftU64):
+ movb 12(%esp), %cl # cl <- Count
+ xorl %edx, %edx
+ movl 8(%esp), %eax
+ testb $32, %cl # Count >= 32?
+ jnz L0
+ movl %eax, %edx
+ movl 0x4(%esp), %eax
+L0:
+ shrdl %cl, %edx, %eax
+ shr %cl, %edx
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/RShiftU64.asm b/MdePkg/Library/BaseLib/Ia32/RShiftU64.asm
new file mode 100644
index 000000000000..ad49536209a4
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/RShiftU64.asm
@@ -0,0 +1,48 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; RShiftU64.asm
+;
+; Abstract:
+;
+; 64-bit logical right shift function for IA-32
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathRShiftU64 (
+; IN UINT64 Operand,
+; IN UINTN Count
+; );
+;------------------------------------------------------------------------------
+InternalMathRShiftU64 PROC
+ mov cl, [esp + 12] ; cl <- Count
+ xor edx, edx
+ mov eax, [esp + 8]
+ test cl, 32 ; Count >= 32?
+ jnz @F
+ mov edx, eax
+ mov eax, [esp + 4]
+@@:
+ shrd eax, edx, cl
+ shr edx, cl
+ ret
+InternalMathRShiftU64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/RShiftU64.c b/MdePkg/Library/BaseLib/Ia32/RShiftU64.c
new file mode 100644
index 000000000000..2db0d9752ff4
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/RShiftU64.c
@@ -0,0 +1,51 @@
+/** @file
+ 64-bit logical right shift function for IA-32
+
+ Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Shifts a 64-bit integer right between 0 and 63 bits. This high bits
+ are filled with zeros. The shifted value is returned.
+
+ This function shifts the 64-bit value Operand to the right by Count bits. The
+ high Count bits are set to zero. The shifted value is returned.
+
+ @param Operand The 64-bit operand to shift right.
+ @param Count The number of bits to shift right.
+
+ @return Operand >> Count
+
+**/
+UINT64
+EFIAPI
+InternalMathRShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ _asm {
+ mov cl, byte ptr [Count]
+ xor edx, edx
+ mov eax, dword ptr [Operand + 4]
+ test cl, 32
+ jnz L0
+ mov edx, eax
+ mov eax, dword ptr [Operand + 0]
+L0:
+ shrd eax, edx, cl
+ shr edx, cl
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/RShiftU64.nasm b/MdePkg/Library/BaseLib/Ia32/RShiftU64.nasm
new file mode 100644
index 000000000000..67de7ee38602
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/RShiftU64.nasm
@@ -0,0 +1,45 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; RShiftU64.nasm
+;
+; Abstract:
+;
+; 64-bit logical right shift function for IA-32
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathRShiftU64 (
+; IN UINT64 Operand,
+; IN UINTN Count
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(InternalMathRShiftU64)
+ASM_PFX(InternalMathRShiftU64):
+ mov cl, [esp + 12] ; cl <- Count
+ xor edx, edx
+ mov eax, [esp + 8]
+ test cl, 32 ; Count >= 32?
+ jnz .0
+ mov edx, eax
+ mov eax, [esp + 4]
+.0:
+ shrd eax, edx, cl
+ shr edx, cl
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/RdRand.S b/MdePkg/Library/BaseLib/Ia32/RdRand.S
new file mode 100644
index 000000000000..92048b32518f
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/RdRand.S
@@ -0,0 +1,80 @@
+#------------------------------------------------------------------------------ ;
+# Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# RdRand.S
+#
+# Abstract:
+#
+# Generates random number through CPU RdRand instruction under 32-bit platform.
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+// Generates a 16 bit random number through RDRAND instruction.
+// Return TRUE if Rand generated successfully, or FALSE if not.
+//
+// BOOLEAN EFIAPI InternalX86RdRand16 (UINT16 *Rand);
+//------------------------------------------------------------------------------
+ASM_GLOBAL ASM_PFX(InternalX86RdRand16)
+ASM_PFX(InternalX86RdRand16):
+ .byte 0x0f, 0xc7, 0xf0 // rdrand r16: "0f c7 /6 ModRM:r/m(w)"
+ jc rn16_ok // jmp if CF=1
+ xor %eax, %eax // reg=0 if CF=0
+ ret // return with failure status
+rn16_ok:
+ mov 0x4(%esp), %edx
+ mov %ax, (%edx)
+ mov $0x1, %eax
+ ret
+
+//------------------------------------------------------------------------------
+// Generates a 32 bit random number through RDRAND instruction.
+// Return TRUE if Rand generated successfully, or FALSE if not.
+//
+// BOOLEAN EFIAPI InternalX86RdRand32 (UINT32 *Rand);
+//------------------------------------------------------------------------------
+ASM_GLOBAL ASM_PFX(InternalX86RdRand32)
+ASM_PFX(InternalX86RdRand32):
+ .byte 0x0f, 0xc7, 0xf0 // rdrand r32: "0f c7 /6 ModRM:r/m(w)"
+ jc rn32_ok // jmp if CF=1
+ xor %eax, %eax // reg=0 if CF=0
+ ret // return with failure status
+rn32_ok:
+ mov 0x4(%esp), %edx
+ mov %eax, (%edx)
+ mov $0x1, %eax
+ ret
+
+//------------------------------------------------------------------------------
+// Generates a 64 bit random number through RDRAND instruction.
+// Return TRUE if Rand generated successfully, or FALSE if not.
+//
+// BOOLEAN EFIAPI InternalX86RdRand64 (UINT64 *Rand);
+//------------------------------------------------------------------------------
+ASM_GLOBAL ASM_PFX(InternalX86RdRand64)
+ASM_PFX(InternalX86RdRand64):
+ .byte 0x0f, 0xc7, 0xf0 // rdrand r32: "0f c7 /6 ModRM:r/m(w)"
+ jnc rn64_ret // jmp if CF=0
+ mov 0x4(%esp), %edx
+ mov %eax, (%edx)
+
+ .byte 0x0f, 0xc7, 0xf0 // generate another 32 bit RN
+ jnc rn64_ret // jmp if CF=0
+ mov %eax, 0x4(%edx)
+
+ mov $0x1, %eax
+ ret
+rn64_ret:
+ xor %eax, %eax
+ ret // return with failure status
diff --git a/MdePkg/Library/BaseLib/Ia32/RdRand.asm b/MdePkg/Library/BaseLib/Ia32/RdRand.asm
new file mode 100644
index 000000000000..b7af662e0b76
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/RdRand.asm
@@ -0,0 +1,94 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; RdRand.asm
+;
+; Abstract:
+;
+; Generates random number through CPU RdRand instruction under 32-bit platform.
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+.686P
+.model flat, C
+
+.code
+
+;------------------------------------------------------------------------------
+; Generates a 16 bit random number through RDRAND instruction.
+; Return TRUE if Rand generated successfully, or FALSE if not.
+;
+; BOOLEAN EFIAPI InternalX86RdRand16 (UINT16 *Rand);
+;------------------------------------------------------------------------------
+InternalX86RdRand16 PROC
+ ; rdrand ax ; generate a 16 bit RN into ax
+ ; CF=1 if RN generated ok, otherwise CF=0
+ db 0fh, 0c7h, 0f0h ; rdrand r16: "0f c7 /6 ModRM:r/m(w)"
+ jc rn16_ok ; jmp if CF=1
+ xor eax, eax ; reg=0 if CF=0
+ ret ; return with failure status
+rn16_ok:
+ mov edx, dword ptr [esp + 4]
+ mov [edx], ax
+ mov eax, 1
+ ret
+InternalX86RdRand16 ENDP
+
+;------------------------------------------------------------------------------
+; Generates a 32 bit random number through RDRAND instruction.
+; Return TRUE if Rand generated successfully, or FALSE if not.
+;
+; BOOLEAN EFIAPI InternalX86RdRand32 (UINT32 *Rand);
+;------------------------------------------------------------------------------
+InternalX86RdRand32 PROC
+ ; rdrand eax ; generate a 32 bit RN into eax
+ ; CF=1 if RN generated ok, otherwise CF=0
+ db 0fh, 0c7h, 0f0h ; rdrand r32: "0f c7 /6 ModRM:r/m(w)"
+ jc rn32_ok ; jmp if CF=1
+ xor eax, eax ; reg=0 if CF=0
+ ret ; return with failure status
+rn32_ok:
+ mov edx, dword ptr [esp + 4]
+ mov [edx], eax
+ mov eax, 1
+ ret
+InternalX86RdRand32 ENDP
+
+;------------------------------------------------------------------------------
+; Generates a 64 bit random number through RDRAND instruction.
+; Return TRUE if Rand generated successfully, or FALSE if not.
+;
+; BOOLEAN EFIAPI InternalX86RdRand64 (UINT64 *Rand);
+;------------------------------------------------------------------------------
+InternalX86RdRand64 PROC
+ ; rdrand eax ; generate a 32 bit RN into eax
+ ; CF=1 if RN generated ok, otherwise CF=0
+ db 0fh, 0c7h, 0f0h ; rdrand r32: "0f c7 /6 ModRM:r/m(w)"
+ jnc rn64_ret ; jmp if CF=0
+ mov edx, dword ptr [esp + 4]
+ mov [edx], eax
+
+ db 0fh, 0c7h, 0f0h ; generate another 32 bit RN
+ jnc rn64_ret ; jmp if CF=0
+ mov [edx + 4], eax
+
+ mov eax, 1
+ ret
+rn64_ret:
+ xor eax, eax
+ ret ; return with failure status
+InternalX86RdRand64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/RdRand.nasm b/MdePkg/Library/BaseLib/Ia32/RdRand.nasm
new file mode 100644
index 000000000000..0668f43be967
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/RdRand.nasm
@@ -0,0 +1,90 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; RdRand.nasm
+;
+; Abstract:
+;
+; Generates random number through CPU RdRand instruction under 32-bit platform.
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+SECTION .text
+
+;------------------------------------------------------------------------------
+; Generates a 16 bit random number through RDRAND instruction.
+; Return TRUE if Rand generated successfully, or FALSE if not.
+;
+; BOOLEAN EFIAPI InternalX86RdRand16 (UINT16 *Rand);
+;------------------------------------------------------------------------------
+global ASM_PFX(InternalX86RdRand16)
+ASM_PFX(InternalX86RdRand16):
+ ; rdrand ax ; generate a 16 bit RN into ax
+ ; CF=1 if RN generated ok, otherwise CF=0
+ db 0xf, 0xc7, 0xf0 ; rdrand r16: "0f c7 /6 ModRM:r/m(w)"
+ jc rn16_ok ; jmp if CF=1
+ xor eax, eax ; reg=0 if CF=0
+ ret ; return with failure status
+rn16_ok:
+ mov edx, dword [esp + 4]
+ mov [edx], ax
+ mov eax, 1
+ ret
+
+;------------------------------------------------------------------------------
+; Generates a 32 bit random number through RDRAND instruction.
+; Return TRUE if Rand generated successfully, or FALSE if not.
+;
+; BOOLEAN EFIAPI InternalX86RdRand32 (UINT32 *Rand);
+;------------------------------------------------------------------------------
+global ASM_PFX(InternalX86RdRand32)
+ASM_PFX(InternalX86RdRand32):
+ ; rdrand eax ; generate a 32 bit RN into eax
+ ; CF=1 if RN generated ok, otherwise CF=0
+ db 0xf, 0xc7, 0xf0 ; rdrand r32: "0f c7 /6 ModRM:r/m(w)"
+ jc rn32_ok ; jmp if CF=1
+ xor eax, eax ; reg=0 if CF=0
+ ret ; return with failure status
+rn32_ok:
+ mov edx, dword [esp + 4]
+ mov [edx], eax
+ mov eax, 1
+ ret
+
+;------------------------------------------------------------------------------
+; Generates a 64 bit random number through RDRAND instruction.
+; Return TRUE if Rand generated successfully, or FALSE if not.
+;
+; BOOLEAN EFIAPI InternalX86RdRand64 (UINT64 *Rand);
+;------------------------------------------------------------------------------
+global ASM_PFX(InternalX86RdRand64)
+ASM_PFX(InternalX86RdRand64):
+ ; rdrand eax ; generate a 32 bit RN into eax
+ ; CF=1 if RN generated ok, otherwise CF=0
+ db 0xf, 0xc7, 0xf0 ; rdrand r32: "0f c7 /6 ModRM:r/m(w)"
+ jnc rn64_ret ; jmp if CF=0
+ mov edx, dword [esp + 4]
+ mov [edx], eax
+
+ db 0xf, 0xc7, 0xf0 ; generate another 32 bit RN
+ jnc rn64_ret ; jmp if CF=0
+ mov [edx + 4], eax
+
+ mov eax, 1
+ ret
+rn64_ret:
+ xor eax, eax
+ ret ; return with failure status
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCr0.asm b/MdePkg/Library/BaseLib/Ia32/ReadCr0.asm
new file mode 100644
index 000000000000..ceb935700e07
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadCr0.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCr0.Asm
+;
+; Abstract:
+;
+; AsmReadCr0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadCr0 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadCr0 PROC
+ mov eax, cr0
+ ret
+AsmReadCr0 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCr0.c b/MdePkg/Library/BaseLib/Ia32/ReadCr0.c
new file mode 100644
index 000000000000..0e39ee777613
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadCr0.c
@@ -0,0 +1,37 @@
+/** @file
+ AsmReadCr0 function
+
+ Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Reads the current value of the Control Register 0 (CR0).
+
+ Reads and returns the current value of CR0. This function is only available
+ on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ x64.
+
+ @return The value of the Control Register 0 (CR0).
+
+**/
+UINTN
+EFIAPI
+AsmReadCr0 (
+ VOID
+ )
+{
+ __asm {
+ mov eax, cr0
+ }
+}
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCr0.nasm b/MdePkg/Library/BaseLib/Ia32/ReadCr0.nasm
new file mode 100644
index 000000000000..d09ceeac1880
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadCr0.nasm
@@ -0,0 +1,37 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCr0.Asm
+;
+; Abstract:
+;
+; AsmReadCr0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadCr0 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmReadCr0)
+ASM_PFX(AsmReadCr0):
+ mov eax, cr0
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCr2.asm b/MdePkg/Library/BaseLib/Ia32/ReadCr2.asm
new file mode 100644
index 000000000000..0391aad3d0af
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadCr2.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCr2.Asm
+;
+; Abstract:
+;
+; AsmReadCr2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadCr2 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadCr2 PROC
+ mov eax, cr2
+ ret
+AsmReadCr2 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCr2.c b/MdePkg/Library/BaseLib/Ia32/ReadCr2.c
new file mode 100644
index 000000000000..e75b9506e168
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadCr2.c
@@ -0,0 +1,38 @@
+/** @file
+ AsmReadCr2 function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Reads the current value of the Control Register 2 (CR2).
+
+ Reads and returns the current value of CR2. This function is only available
+ on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ x64.
+
+ @return The value of the Control Register 2 (CR2).
+
+**/
+UINTN
+EFIAPI
+AsmReadCr2 (
+ VOID
+ )
+{
+ __asm {
+ mov eax, cr2
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCr2.nasm b/MdePkg/Library/BaseLib/Ia32/ReadCr2.nasm
new file mode 100644
index 000000000000..5b83d8946498
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadCr2.nasm
@@ -0,0 +1,37 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCr2.Asm
+;
+; Abstract:
+;
+; AsmReadCr2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadCr2 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmReadCr2)
+ASM_PFX(AsmReadCr2):
+ mov eax, cr2
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCr3.asm b/MdePkg/Library/BaseLib/Ia32/ReadCr3.asm
new file mode 100644
index 000000000000..41c5df6a64e1
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadCr3.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCr3.Asm
+;
+; Abstract:
+;
+; AsmReadCr3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadCr3 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadCr3 PROC
+ mov eax, cr3
+ ret
+AsmReadCr3 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCr3.c b/MdePkg/Library/BaseLib/Ia32/ReadCr3.c
new file mode 100644
index 000000000000..2f01731f75a2
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadCr3.c
@@ -0,0 +1,38 @@
+/** @file
+ AsmReadCr3 function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Reads the current value of the Control Register 3 (CR3).
+
+ Reads and returns the current value of CR3. This function is only available
+ on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ x64.
+
+ @return The value of the Control Register 3 (CR3).
+
+**/
+UINTN
+EFIAPI
+AsmReadCr3 (
+ VOID
+ )
+{
+ __asm {
+ mov eax, cr3
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCr3.nasm b/MdePkg/Library/BaseLib/Ia32/ReadCr3.nasm
new file mode 100644
index 000000000000..366e4ccd36b9
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadCr3.nasm
@@ -0,0 +1,37 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCr3.Asm
+;
+; Abstract:
+;
+; AsmReadCr3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadCr3 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmReadCr3)
+ASM_PFX(AsmReadCr3):
+ mov eax, cr3
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCr4.asm b/MdePkg/Library/BaseLib/Ia32/ReadCr4.asm
new file mode 100644
index 000000000000..38d1258d9faa
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadCr4.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCr4.Asm
+;
+; Abstract:
+;
+; AsmReadCr4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadCr4 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadCr4 PROC
+ mov eax, cr4
+ ret
+AsmReadCr4 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCr4.c b/MdePkg/Library/BaseLib/Ia32/ReadCr4.c
new file mode 100644
index 000000000000..d12bf5cb55b7
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadCr4.c
@@ -0,0 +1,40 @@
+/** @file
+ AsmReadCr4 function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Reads the current value of the Control Register 4 (CR4).
+
+ Reads and returns the current value of CR4. This function is only available
+ on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ x64.
+
+ @return The value of the Control Register 4 (CR4).
+
+**/
+UINTN
+EFIAPI
+AsmReadCr4 (
+ VOID
+ )
+{
+ __asm {
+ _emit 0x0f // mov eax, cr4
+ _emit 0x20
+ _emit 0xE0
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCr4.nasm b/MdePkg/Library/BaseLib/Ia32/ReadCr4.nasm
new file mode 100644
index 000000000000..7276092b0dfc
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadCr4.nasm
@@ -0,0 +1,37 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCr4.Asm
+;
+; Abstract:
+;
+; AsmReadCr4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadCr4 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmReadCr4)
+ASM_PFX(AsmReadCr4):
+ mov eax, cr4
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCs.asm b/MdePkg/Library/BaseLib/Ia32/ReadCs.asm
new file mode 100644
index 000000000000..11f205bb46f2
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadCs.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCs.Asm
+;
+; Abstract:
+;
+; AsmReadCs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadCs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadCs PROC
+ mov eax, cs
+ ret
+AsmReadCs ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCs.c b/MdePkg/Library/BaseLib/Ia32/ReadCs.c
new file mode 100644
index 000000000000..fe107029a172
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadCs.c
@@ -0,0 +1,38 @@
+/** @file
+ AsmReadCs function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Reads the current value of Code Segment Register (CS).
+
+ Reads and returns the current value of CS. This function is only available on
+ IA-32 and x64.
+
+ @return The current value of CS.
+
+**/
+UINT16
+EFIAPI
+AsmReadCs (
+ VOID
+ )
+{
+ __asm {
+ xor eax, eax
+ mov ax, cs
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCs.nasm b/MdePkg/Library/BaseLib/Ia32/ReadCs.nasm
new file mode 100644
index 000000000000..3bfa816527ae
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadCs.nasm
@@ -0,0 +1,37 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCs.Asm
+;
+; Abstract:
+;
+; AsmReadCs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadCs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmReadCs)
+ASM_PFX(AsmReadCs):
+ mov eax, cs
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr0.asm b/MdePkg/Library/BaseLib/Ia32/ReadDr0.asm
new file mode 100644
index 000000000000..6f0d61084ffc
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr0.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr0.Asm
+;
+; Abstract:
+;
+; AsmReadDr0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr0 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr0 PROC
+ mov eax, dr0
+ ret
+AsmReadDr0 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr0.c b/MdePkg/Library/BaseLib/Ia32/ReadDr0.c
new file mode 100644
index 000000000000..a3a9387e3975
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr0.c
@@ -0,0 +1,38 @@
+/** @file
+ AsmReadDr0 function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Reads the current value of Debug Register 0 (DR0).
+
+ Reads and returns the current value of DR0. This function is only available
+ on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ x64.
+
+ @return The value of Debug Register 0 (DR0).
+
+**/
+UINTN
+EFIAPI
+AsmReadDr0 (
+ VOID
+ )
+{
+ __asm {
+ mov eax, dr0
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr0.nasm b/MdePkg/Library/BaseLib/Ia32/ReadDr0.nasm
new file mode 100644
index 000000000000..28a846e60252
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr0.nasm
@@ -0,0 +1,37 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr0.Asm
+;
+; Abstract:
+;
+; AsmReadDr0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr0 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmReadDr0)
+ASM_PFX(AsmReadDr0):
+ mov eax, dr0
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr1.asm b/MdePkg/Library/BaseLib/Ia32/ReadDr1.asm
new file mode 100644
index 000000000000..e77265677c54
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr1.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr1.Asm
+;
+; Abstract:
+;
+; AsmReadDr1 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr1 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr1 PROC
+ mov eax, dr1
+ ret
+AsmReadDr1 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr1.c b/MdePkg/Library/BaseLib/Ia32/ReadDr1.c
new file mode 100644
index 000000000000..7adbd78ec1d1
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr1.c
@@ -0,0 +1,38 @@
+/** @file
+ AsmReadDr1 function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Reads the current value of Debug Register 1 (DR1).
+
+ Reads and returns the current value of DR1. This function is only available
+ on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ x64.
+
+ @return The value of Debug Register 1 (DR1).
+
+**/
+UINTN
+EFIAPI
+AsmReadDr1 (
+ VOID
+ )
+{
+ __asm {
+ mov eax, dr1
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr1.nasm b/MdePkg/Library/BaseLib/Ia32/ReadDr1.nasm
new file mode 100644
index 000000000000..63c3341582d8
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr1.nasm
@@ -0,0 +1,37 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr1.Asm
+;
+; Abstract:
+;
+; AsmReadDr1 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr1 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmReadDr1)
+ASM_PFX(AsmReadDr1):
+ mov eax, dr1
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr2.asm b/MdePkg/Library/BaseLib/Ia32/ReadDr2.asm
new file mode 100644
index 000000000000..cdb2ec6dd94b
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr2.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr2.Asm
+;
+; Abstract:
+;
+; AsmReadDr2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr2 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr2 PROC
+ mov eax, dr2
+ ret
+AsmReadDr2 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr2.c b/MdePkg/Library/BaseLib/Ia32/ReadDr2.c
new file mode 100644
index 000000000000..5ec96951e064
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr2.c
@@ -0,0 +1,38 @@
+/** @file
+ AsmReadDr2 function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Reads the current value of Debug Register 2 (DR2).
+
+ Reads and returns the current value of DR2. This function is only available
+ on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ x64.
+
+ @return The value of Debug Register 2 (DR2).
+
+**/
+UINTN
+EFIAPI
+AsmReadDr2 (
+ VOID
+ )
+{
+ __asm {
+ mov eax, dr2
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr2.nasm b/MdePkg/Library/BaseLib/Ia32/ReadDr2.nasm
new file mode 100644
index 000000000000..49f16bba89ad
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr2.nasm
@@ -0,0 +1,37 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr2.Asm
+;
+; Abstract:
+;
+; AsmReadDr2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr2 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmReadDr2)
+ASM_PFX(AsmReadDr2):
+ mov eax, dr2
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr3.asm b/MdePkg/Library/BaseLib/Ia32/ReadDr3.asm
new file mode 100644
index 000000000000..807bef9ba794
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr3.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr3.Asm
+;
+; Abstract:
+;
+; AsmReadDr3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr3 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr3 PROC
+ mov eax, dr3
+ ret
+AsmReadDr3 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr3.c b/MdePkg/Library/BaseLib/Ia32/ReadDr3.c
new file mode 100644
index 000000000000..07b587cbb506
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr3.c
@@ -0,0 +1,38 @@
+/** @file
+ AsmReadDr3 function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Reads the current value of Debug Register 3 (DR3).
+
+ Reads and returns the current value of DR3. This function is only available
+ on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ x64.
+
+ @return The value of Debug Register 3 (DR3).
+
+**/
+UINTN
+EFIAPI
+AsmReadDr3 (
+ VOID
+ )
+{
+ __asm {
+ mov eax, dr3
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr3.nasm b/MdePkg/Library/BaseLib/Ia32/ReadDr3.nasm
new file mode 100644
index 000000000000..c09b2a1e1504
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr3.nasm
@@ -0,0 +1,37 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr3.Asm
+;
+; Abstract:
+;
+; AsmReadDr3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr3 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmReadDr3)
+ASM_PFX(AsmReadDr3):
+ mov eax, dr3
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr4.asm b/MdePkg/Library/BaseLib/Ia32/ReadDr4.asm
new file mode 100644
index 000000000000..47ed5853b398
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr4.asm
@@ -0,0 +1,47 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr4.Asm
+;
+; Abstract:
+;
+; AsmReadDr4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr4 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr4 PROC
+ ;
+ ; DR4 is alias to DR6 only if DE (in CR4) is cleared. Otherwise, reading
+ ; this register will cause a #UD exception.
+ ;
+ ; MS assembler doesn't support this instruction since no one would use it
+ ; under normal circustances. Here opcode is used.
+ ;
+ DB 0fh, 21h, 0e0h
+ ret
+AsmReadDr4 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr4.c b/MdePkg/Library/BaseLib/Ia32/ReadDr4.c
new file mode 100644
index 000000000000..c42fb1c4c224
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr4.c
@@ -0,0 +1,40 @@
+/** @file
+ AsmReadDr4 function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Reads the current value of Debug Register 4 (DR4).
+
+ Reads and returns the current value of DR4. This function is only available
+ on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ x64.
+
+ @return The value of Debug Register 4 (DR4).
+
+**/
+UINTN
+EFIAPI
+AsmReadDr4 (
+ VOID
+ )
+{
+ __asm {
+ _emit 0x0f
+ _emit 0x21
+ _emit 0xe0
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr4.nasm b/MdePkg/Library/BaseLib/Ia32/ReadDr4.nasm
new file mode 100644
index 000000000000..5d784dfe8ae7
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr4.nasm
@@ -0,0 +1,44 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr4.Asm
+;
+; Abstract:
+;
+; AsmReadDr4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr4 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmReadDr4)
+ASM_PFX(AsmReadDr4):
+ ;
+ ; DR4 is alias to DR6 only if DE (in CR4) is cleared. Otherwise, reading
+ ; this register will cause a #UD exception.
+ ;
+ ; MS assembler doesn't support this instruction since no one would use it
+ ; under normal circustances. Here opcode is used.
+ ;
+ DB 0xf, 0x21, 0xe0
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr5.asm b/MdePkg/Library/BaseLib/Ia32/ReadDr5.asm
new file mode 100644
index 000000000000..09154f663681
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr5.asm
@@ -0,0 +1,47 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr5.Asm
+;
+; Abstract:
+;
+; AsmReadDr5 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr5 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr5 PROC
+ ;
+ ; DR5 is alias to DR7 only if DE (in CR4) is cleared. Otherwise, reading
+ ; this register will cause a #UD exception.
+ ;
+ ; MS assembler doesn't support this instruction since no one would use it
+ ; under normal circustances. Here opcode is used.
+ ;
+ DB 0fh, 21h, 0e8h
+ ret
+AsmReadDr5 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr5.c b/MdePkg/Library/BaseLib/Ia32/ReadDr5.c
new file mode 100644
index 000000000000..9743fe2cff3e
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr5.c
@@ -0,0 +1,40 @@
+/** @file
+ AsmReadDr5 function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Reads the current value of Debug Register 5 (DR5).
+
+ Reads and returns the current value of DR5. This function is only available
+ on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ x64.
+
+ @return The value of Debug Register 5 (DR5).
+
+**/
+UINTN
+EFIAPI
+AsmReadDr5 (
+ VOID
+ )
+{
+ __asm {
+ _emit 0x0f
+ _emit 0x21
+ _emit 0xe8
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr5.nasm b/MdePkg/Library/BaseLib/Ia32/ReadDr5.nasm
new file mode 100644
index 000000000000..a12ecb6a1d15
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr5.nasm
@@ -0,0 +1,44 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr5.Asm
+;
+; Abstract:
+;
+; AsmReadDr5 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr5 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmReadDr5)
+ASM_PFX(AsmReadDr5):
+ ;
+ ; DR5 is alias to DR7 only if DE (in CR4) is cleared. Otherwise, reading
+ ; this register will cause a #UD exception.
+ ;
+ ; MS assembler doesn't support this instruction since no one would use it
+ ; under normal circustances. Here opcode is used.
+ ;
+ DB 0xf, 0x21, 0xe8
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr6.asm b/MdePkg/Library/BaseLib/Ia32/ReadDr6.asm
new file mode 100644
index 000000000000..5ad9dcbd3339
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr6.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr6.Asm
+;
+; Abstract:
+;
+; AsmReadDr6 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr6 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr6 PROC
+ mov eax, dr6
+ ret
+AsmReadDr6 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr6.c b/MdePkg/Library/BaseLib/Ia32/ReadDr6.c
new file mode 100644
index 000000000000..da0496531996
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr6.c
@@ -0,0 +1,38 @@
+/** @file
+ AsmReadDr6 function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Reads the current value of Debug Register 6 (DR6).
+
+ Reads and returns the current value of DR6. This function is only available
+ on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ x64.
+
+ @return The value of Debug Register 6 (DR6).
+
+**/
+UINTN
+EFIAPI
+AsmReadDr6 (
+ VOID
+ )
+{
+ __asm {
+ mov eax, dr6
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr6.nasm b/MdePkg/Library/BaseLib/Ia32/ReadDr6.nasm
new file mode 100644
index 000000000000..1daa3612e3a8
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr6.nasm
@@ -0,0 +1,37 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr6.Asm
+;
+; Abstract:
+;
+; AsmReadDr6 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr6 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmReadDr6)
+ASM_PFX(AsmReadDr6):
+ mov eax, dr6
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr7.asm b/MdePkg/Library/BaseLib/Ia32/ReadDr7.asm
new file mode 100644
index 000000000000..215a079f4644
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr7.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr7.Asm
+;
+; Abstract:
+;
+; AsmReadDr7 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr7 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr7 PROC
+ mov eax, dr7
+ ret
+AsmReadDr7 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr7.c b/MdePkg/Library/BaseLib/Ia32/ReadDr7.c
new file mode 100644
index 000000000000..e3ec1eb347c4
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr7.c
@@ -0,0 +1,38 @@
+/** @file
+ AsmReadDr7 function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Reads the current value of Debug Register 7 (DR7).
+
+ Reads and returns the current value of DR7. This function is only available
+ on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ x64.
+
+ @return The value of Debug Register 7 (DR7).
+
+**/
+UINTN
+EFIAPI
+AsmReadDr7 (
+ VOID
+ )
+{
+ __asm {
+ mov eax, dr7
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr7.nasm b/MdePkg/Library/BaseLib/Ia32/ReadDr7.nasm
new file mode 100644
index 000000000000..2777a118edd9
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr7.nasm
@@ -0,0 +1,37 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr7.Asm
+;
+; Abstract:
+;
+; AsmReadDr7 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr7 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmReadDr7)
+ASM_PFX(AsmReadDr7):
+ mov eax, dr7
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDs.asm b/MdePkg/Library/BaseLib/Ia32/ReadDs.asm
new file mode 100644
index 000000000000..68decd33f9fc
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDs.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDs.Asm
+;
+; Abstract:
+;
+; AsmReadDs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadDs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDs PROC
+ mov eax, ds
+ ret
+AsmReadDs ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDs.c b/MdePkg/Library/BaseLib/Ia32/ReadDs.c
new file mode 100644
index 000000000000..a73aa2e1a774
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDs.c
@@ -0,0 +1,38 @@
+/** @file
+ AsmReadDs function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Reads the current value of Data Segment Register (DS).
+
+ Reads and returns the current value of DS. This function is only available on
+ IA-32 and x64.
+
+ @return The current value of DS.
+
+**/
+UINT16
+EFIAPI
+AsmReadDs (
+ VOID
+ )
+{
+ __asm {
+ xor eax, eax
+ mov ax, ds
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDs.nasm b/MdePkg/Library/BaseLib/Ia32/ReadDs.nasm
new file mode 100644
index 000000000000..f9b194c4ab0d
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDs.nasm
@@ -0,0 +1,37 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDs.Asm
+;
+; Abstract:
+;
+; AsmReadDs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadDs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmReadDs)
+ASM_PFX(AsmReadDs):
+ mov eax, ds
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadEflags.asm b/MdePkg/Library/BaseLib/Ia32/ReadEflags.asm
new file mode 100644
index 000000000000..4ef74e2d06fd
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadEflags.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadEflags.Asm
+;
+; Abstract:
+;
+; AsmReadEflags function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadEflags (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadEflags PROC
+ pushfd
+ pop eax
+ ret
+AsmReadEflags ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadEflags.c b/MdePkg/Library/BaseLib/Ia32/ReadEflags.c
new file mode 100644
index 000000000000..f53747442b28
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadEflags.c
@@ -0,0 +1,39 @@
+/** @file
+ AsmReadEflags function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Reads the current value of the EFLAGS register.
+
+ Reads and returns the current value of the EFLAGS register. This function is
+ only available on IA-32 and x64. This returns a 32-bit value on IA-32 and a
+ 64-bit value on x64.
+
+ @return EFLAGS on IA-32 or RFLAGS on x64.
+
+**/
+UINTN
+EFIAPI
+AsmReadEflags (
+ VOID
+ )
+{
+ __asm {
+ pushfd
+ pop eax
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadEflags.nasm b/MdePkg/Library/BaseLib/Ia32/ReadEflags.nasm
new file mode 100644
index 000000000000..51c520263709
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadEflags.nasm
@@ -0,0 +1,38 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadEflags.Asm
+;
+; Abstract:
+;
+; AsmReadEflags function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadEflags (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmReadEflags)
+ASM_PFX(AsmReadEflags):
+ pushfd
+ pop eax
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadEs.asm b/MdePkg/Library/BaseLib/Ia32/ReadEs.asm
new file mode 100644
index 000000000000..7e5d929be7b2
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadEs.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadEs.Asm
+;
+; Abstract:
+;
+; AsmReadEs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadEs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadEs PROC
+ mov eax, es
+ ret
+AsmReadEs ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadEs.c b/MdePkg/Library/BaseLib/Ia32/ReadEs.c
new file mode 100644
index 000000000000..d537fcd8e5ac
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadEs.c
@@ -0,0 +1,38 @@
+/** @file
+ AsmReadEs function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Reads the current value of ES Data Segment Register (ES).
+
+ Reads and returns the current value of ES. This function is only available on
+ IA-32 and x64.
+
+ @return The current value of ES.
+
+**/
+UINT16
+EFIAPI
+AsmReadEs (
+ VOID
+ )
+{
+ __asm {
+ xor eax, eax
+ mov ax, es
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadEs.nasm b/MdePkg/Library/BaseLib/Ia32/ReadEs.nasm
new file mode 100644
index 000000000000..497c647e3814
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadEs.nasm
@@ -0,0 +1,37 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadEs.Asm
+;
+; Abstract:
+;
+; AsmReadEs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadEs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmReadEs)
+ASM_PFX(AsmReadEs):
+ mov eax, es
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadFs.asm b/MdePkg/Library/BaseLib/Ia32/ReadFs.asm
new file mode 100644
index 000000000000..9a5730866226
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadFs.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadFs.Asm
+;
+; Abstract:
+;
+; AsmReadFs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadFs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadFs PROC
+ mov eax, fs
+ ret
+AsmReadFs ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadFs.c b/MdePkg/Library/BaseLib/Ia32/ReadFs.c
new file mode 100644
index 000000000000..9cc92b559f56
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadFs.c
@@ -0,0 +1,38 @@
+/** @file
+ AsmReadFs function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Reads the current value of FS Data Segment Register (FS).
+
+ Reads and returns the current value of FS. This function is only available on
+ IA-32 and x64.
+
+ @return The current value of FS.
+
+**/
+UINT16
+EFIAPI
+AsmReadFs (
+ VOID
+ )
+{
+ __asm {
+ xor eax, eax
+ mov ax, fs
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadFs.nasm b/MdePkg/Library/BaseLib/Ia32/ReadFs.nasm
new file mode 100644
index 000000000000..2de629679b31
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadFs.nasm
@@ -0,0 +1,37 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadFs.Asm
+;
+; Abstract:
+;
+; AsmReadFs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadFs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmReadFs)
+ASM_PFX(AsmReadFs):
+ mov eax, fs
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadGdtr.asm b/MdePkg/Library/BaseLib/Ia32/ReadGdtr.asm
new file mode 100644
index 000000000000..b74c50a02e25
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadGdtr.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadGdtr.Asm
+;
+; Abstract:
+;
+; AsmReadGdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86ReadGdtr (
+; OUT IA32_DESCRIPTOR *Gdtr
+; );
+;------------------------------------------------------------------------------
+InternalX86ReadGdtr PROC
+ mov eax, [esp + 4]
+ sgdt fword ptr [eax]
+ ret
+InternalX86ReadGdtr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadGdtr.c b/MdePkg/Library/BaseLib/Ia32/ReadGdtr.c
new file mode 100644
index 000000000000..01d0a7260175
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadGdtr.c
@@ -0,0 +1,39 @@
+/** @file
+ AsmReadGdtr function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+#include "BaseLibInternals.h"
+
+
+/**
+ Reads the current Global Descriptor Table Register(GDTR) descriptor.
+
+ Reads and returns the current GDTR descriptor and returns it in Gdtr. This
+ function is only available on IA-32 and x64.
+
+ @param Gdtr The pointer to a GDTR descriptor.
+
+**/
+VOID
+EFIAPI
+InternalX86ReadGdtr (
+ OUT IA32_DESCRIPTOR *Gdtr
+ )
+{
+ _asm {
+ mov eax, Gdtr
+ sgdt fword ptr [eax]
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadGdtr.nasm b/MdePkg/Library/BaseLib/Ia32/ReadGdtr.nasm
new file mode 100644
index 000000000000..2637cbd14bcd
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadGdtr.nasm
@@ -0,0 +1,38 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadGdtr.Asm
+;
+; Abstract:
+;
+; AsmReadGdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86ReadGdtr (
+; OUT IA32_DESCRIPTOR *Gdtr
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(InternalX86ReadGdtr)
+ASM_PFX(InternalX86ReadGdtr):
+ mov eax, [esp + 4]
+ sgdt [eax]
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadGs.asm b/MdePkg/Library/BaseLib/Ia32/ReadGs.asm
new file mode 100644
index 000000000000..99dad143762d
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadGs.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadGs.Asm
+;
+; Abstract:
+;
+; AsmReadGs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadGs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadGs PROC
+ mov eax, gs
+ ret
+AsmReadGs ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadGs.c b/MdePkg/Library/BaseLib/Ia32/ReadGs.c
new file mode 100644
index 000000000000..53eab438c55c
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadGs.c
@@ -0,0 +1,38 @@
+/** @file
+ AsmReadGs function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Reads the current value of GS Data Segment Register (GS).
+
+ Reads and returns the current value of GS. This function is only available on
+ IA-32 and x64.
+
+ @return The current value of GS.
+
+**/
+UINT16
+EFIAPI
+AsmReadGs (
+ VOID
+ )
+{
+ __asm {
+ xor eax, eax
+ mov ax, gs
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadGs.nasm b/MdePkg/Library/BaseLib/Ia32/ReadGs.nasm
new file mode 100644
index 000000000000..9c6fcee30368
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadGs.nasm
@@ -0,0 +1,37 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadGs.Asm
+;
+; Abstract:
+;
+; AsmReadGs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadGs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmReadGs)
+ASM_PFX(AsmReadGs):
+ mov eax, gs
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadIdtr.asm b/MdePkg/Library/BaseLib/Ia32/ReadIdtr.asm
new file mode 100644
index 000000000000..803cfa781244
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadIdtr.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadIdtr.Asm
+;
+; Abstract:
+;
+; AsmReadIdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86ReadIdtr (
+; OUT IA32_DESCRIPTOR *Idtr
+; );
+;------------------------------------------------------------------------------
+InternalX86ReadIdtr PROC
+ mov eax, [esp + 4]
+ sidt fword ptr [eax]
+ ret
+InternalX86ReadIdtr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadIdtr.c b/MdePkg/Library/BaseLib/Ia32/ReadIdtr.c
new file mode 100644
index 000000000000..42d9aab2eb17
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadIdtr.c
@@ -0,0 +1,38 @@
+/** @file
+ AsmReadIdtr function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+#include "BaseLibInternals.h"
+
+
+/**
+ Reads the current Interrupt Descriptor Table Register(GDTR) descriptor.
+
+ Reads and returns the current IDTR descriptor and returns it in Idtr. This
+ function is only available on IA-32 and x64.
+
+ @param Idtr The pointer to a IDTR descriptor.
+
+**/
+VOID
+EFIAPI
+InternalX86ReadIdtr (
+ OUT IA32_DESCRIPTOR *Idtr
+ )
+{
+ _asm {
+ mov eax, Idtr
+ sidt fword ptr [eax]
+ }
+}
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadIdtr.nasm b/MdePkg/Library/BaseLib/Ia32/ReadIdtr.nasm
new file mode 100644
index 000000000000..3ee40e5d51e7
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadIdtr.nasm
@@ -0,0 +1,38 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadIdtr.Asm
+;
+; Abstract:
+;
+; AsmReadIdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86ReadIdtr (
+; OUT IA32_DESCRIPTOR *Idtr
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(InternalX86ReadIdtr)
+ASM_PFX(InternalX86ReadIdtr):
+ mov eax, [esp + 4]
+ sidt [eax]
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadLdtr.asm b/MdePkg/Library/BaseLib/Ia32/ReadLdtr.asm
new file mode 100644
index 000000000000..19c48d58b54f
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadLdtr.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadLdtr.Asm
+;
+; Abstract:
+;
+; AsmReadLdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadLdtr (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadLdtr PROC
+ sldt ax
+ ret
+AsmReadLdtr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadLdtr.c b/MdePkg/Library/BaseLib/Ia32/ReadLdtr.c
new file mode 100644
index 000000000000..d185572ff8e0
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadLdtr.c
@@ -0,0 +1,37 @@
+/** @file
+ AsmReadLdtr function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Reads the current Local Descriptor Table Register(LDTR) selector.
+
+ Reads and returns the current 16-bit LDTR descriptor value. This function is
+ only available on IA-32 and x64.
+
+ @return The current selector of LDT.
+
+**/
+UINT16
+EFIAPI
+AsmReadLdtr (
+ VOID
+ )
+{
+ _asm {
+ sldt ax
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadLdtr.nasm b/MdePkg/Library/BaseLib/Ia32/ReadLdtr.nasm
new file mode 100644
index 000000000000..29eddf2c8a3c
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadLdtr.nasm
@@ -0,0 +1,37 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadLdtr.Asm
+;
+; Abstract:
+;
+; AsmReadLdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadLdtr (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmReadLdtr)
+ASM_PFX(AsmReadLdtr):
+ sldt ax
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm0.asm b/MdePkg/Library/BaseLib/Ia32/ReadMm0.asm
new file mode 100644
index 000000000000..68113d8f9f54
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm0.asm
@@ -0,0 +1,45 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm0.Asm
+;
+; Abstract:
+;
+; AsmReadMm0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm0 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm0 PROC
+ push eax
+ push eax
+ movq [esp], mm0
+ pop eax
+ pop edx
+ ret
+AsmReadMm0 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm0.c b/MdePkg/Library/BaseLib/Ia32/ReadMm0.c
new file mode 100644
index 000000000000..8db4ca535610
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm0.c
@@ -0,0 +1,42 @@
+/** @file
+ AsmReadMm0 function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Reads the current value of 64-bit MMX Register #0 (MM0).
+
+ Reads and returns the current value of MM0. This function is only available
+ on IA-32 and x64.
+
+ @return The current value of MM0.
+
+**/
+UINT64
+EFIAPI
+AsmReadMm0 (
+ VOID
+ )
+{
+ _asm {
+ push eax
+ push eax
+ movq [esp], mm0
+ pop eax
+ pop edx
+ emms
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm0.nasm b/MdePkg/Library/BaseLib/Ia32/ReadMm0.nasm
new file mode 100644
index 000000000000..1330c71a6863
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm0.nasm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm0.Asm
+;
+; Abstract:
+;
+; AsmReadMm0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm0 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmReadMm0)
+ASM_PFX(AsmReadMm0):
+ push eax
+ push eax
+ movq [esp], mm0
+ pop eax
+ pop edx
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm1.asm b/MdePkg/Library/BaseLib/Ia32/ReadMm1.asm
new file mode 100644
index 000000000000..4cc2a36d086d
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm1.asm
@@ -0,0 +1,45 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm1.Asm
+;
+; Abstract:
+;
+; AsmReadMm1 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm1 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm1 PROC
+ push eax
+ push eax
+ movq [esp], mm1
+ pop eax
+ pop edx
+ ret
+AsmReadMm1 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm1.c b/MdePkg/Library/BaseLib/Ia32/ReadMm1.c
new file mode 100644
index 000000000000..f0750f420d92
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm1.c
@@ -0,0 +1,42 @@
+/** @file
+ AsmReadMm1 function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Reads the current value of 64-bit MMX Register #1 (MM1).
+
+ Reads and returns the current value of MM1. This function is only available
+ on IA-32 and x64.
+
+ @return The current value of MM1.
+
+**/
+UINT64
+EFIAPI
+AsmReadMm1 (
+ VOID
+ )
+{
+ _asm {
+ push eax
+ push eax
+ movq [esp], mm1
+ pop eax
+ pop edx
+ emms
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm1.nasm b/MdePkg/Library/BaseLib/Ia32/ReadMm1.nasm
new file mode 100644
index 000000000000..e411df817f83
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm1.nasm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm1.Asm
+;
+; Abstract:
+;
+; AsmReadMm1 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm1 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmReadMm1)
+ASM_PFX(AsmReadMm1):
+ push eax
+ push eax
+ movq [esp], mm1
+ pop eax
+ pop edx
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm2.asm b/MdePkg/Library/BaseLib/Ia32/ReadMm2.asm
new file mode 100644
index 000000000000..7980b68eb132
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm2.asm
@@ -0,0 +1,45 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm2.Asm
+;
+; Abstract:
+;
+; AsmReadMm2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm2 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm2 PROC
+ push eax
+ push eax
+ movq [esp], mm2
+ pop eax
+ pop edx
+ ret
+AsmReadMm2 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm2.c b/MdePkg/Library/BaseLib/Ia32/ReadMm2.c
new file mode 100644
index 000000000000..17929b2f6419
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm2.c
@@ -0,0 +1,42 @@
+/** @file
+ AsmReadMm2 function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Reads the current value of 64-bit MMX Register #2 (MM2).
+
+ Reads and returns the current value of MM2. This function is only available
+ on IA-32 and x64.
+
+ @return The current value of MM2.
+
+**/
+UINT64
+EFIAPI
+AsmReadMm2 (
+ VOID
+ )
+{
+ _asm {
+ push eax
+ push eax
+ movq [esp], mm2
+ pop eax
+ pop edx
+ emms
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm2.nasm b/MdePkg/Library/BaseLib/Ia32/ReadMm2.nasm
new file mode 100644
index 000000000000..4190119c399b
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm2.nasm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm2.Asm
+;
+; Abstract:
+;
+; AsmReadMm2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm2 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmReadMm2)
+ASM_PFX(AsmReadMm2):
+ push eax
+ push eax
+ movq [esp], mm2
+ pop eax
+ pop edx
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm3.asm b/MdePkg/Library/BaseLib/Ia32/ReadMm3.asm
new file mode 100644
index 000000000000..d557e4c84dd3
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm3.asm
@@ -0,0 +1,45 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm3.Asm
+;
+; Abstract:
+;
+; AsmReadMm3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm3 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm3 PROC
+ push eax
+ push eax
+ movq [esp], mm3
+ pop eax
+ pop edx
+ ret
+AsmReadMm3 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm3.c b/MdePkg/Library/BaseLib/Ia32/ReadMm3.c
new file mode 100644
index 000000000000..a505f180ec61
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm3.c
@@ -0,0 +1,42 @@
+/** @file
+ AsmReadMm3 function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Reads the current value of 64-bit MMX Register #3 (MM3).
+
+ Reads and returns the current value of MM3. This function is only available
+ on IA-32 and x64.
+
+ @return The current value of MM3.
+
+**/
+UINT64
+EFIAPI
+AsmReadMm3 (
+ VOID
+ )
+{
+ _asm {
+ push eax
+ push eax
+ movq [esp], mm3
+ pop eax
+ pop edx
+ emms
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm3.nasm b/MdePkg/Library/BaseLib/Ia32/ReadMm3.nasm
new file mode 100644
index 000000000000..89125e8d3714
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm3.nasm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm3.Asm
+;
+; Abstract:
+;
+; AsmReadMm3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm3 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmReadMm3)
+ASM_PFX(AsmReadMm3):
+ push eax
+ push eax
+ movq [esp], mm3
+ pop eax
+ pop edx
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm4.asm b/MdePkg/Library/BaseLib/Ia32/ReadMm4.asm
new file mode 100644
index 000000000000..c1507729ddf7
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm4.asm
@@ -0,0 +1,45 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm4.Asm
+;
+; Abstract:
+;
+; AsmReadMm4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm4 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm4 PROC
+ push eax
+ push eax
+ movq [esp], mm4
+ pop eax
+ pop edx
+ ret
+AsmReadMm4 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm4.c b/MdePkg/Library/BaseLib/Ia32/ReadMm4.c
new file mode 100644
index 000000000000..ecc3896cfc07
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm4.c
@@ -0,0 +1,42 @@
+/** @file
+ AsmReadMm4 function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Reads the current value of 64-bit MMX Register #4 (MM4).
+
+ Reads and returns the current value of MM4. This function is only available
+ on IA-32 and x64.
+
+ @return The current value of MM4.
+
+**/
+UINT64
+EFIAPI
+AsmReadMm4 (
+ VOID
+ )
+{
+ _asm {
+ push eax
+ push eax
+ movq [esp], mm4
+ pop eax
+ pop edx
+ emms
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm4.nasm b/MdePkg/Library/BaseLib/Ia32/ReadMm4.nasm
new file mode 100644
index 000000000000..a0e8d1681e99
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm4.nasm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm4.Asm
+;
+; Abstract:
+;
+; AsmReadMm4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm4 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmReadMm4)
+ASM_PFX(AsmReadMm4):
+ push eax
+ push eax
+ movq [esp], mm4
+ pop eax
+ pop edx
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm5.asm b/MdePkg/Library/BaseLib/Ia32/ReadMm5.asm
new file mode 100644
index 000000000000..a6cfbf2fd386
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm5.asm
@@ -0,0 +1,45 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm5.Asm
+;
+; Abstract:
+;
+; AsmReadMm5 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm5 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm5 PROC
+ push eax
+ push eax
+ movq [esp], mm5
+ pop eax
+ pop edx
+ ret
+AsmReadMm5 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm5.c b/MdePkg/Library/BaseLib/Ia32/ReadMm5.c
new file mode 100644
index 000000000000..e97471757e96
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm5.c
@@ -0,0 +1,42 @@
+/** @file
+ AsmReadMm5 function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Reads the current value of 64-bit MMX Register #5 (MM5).
+
+ Reads and returns the current value of MM5. This function is only available
+ on IA-32 and x64.
+
+ @return The current value of MM5.
+
+**/
+UINT64
+EFIAPI
+AsmReadMm5 (
+ VOID
+ )
+{
+ _asm {
+ push eax
+ push eax
+ movq [esp], mm5
+ pop eax
+ pop edx
+ emms
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm5.nasm b/MdePkg/Library/BaseLib/Ia32/ReadMm5.nasm
new file mode 100644
index 000000000000..2c96bfa20fdc
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm5.nasm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm5.Asm
+;
+; Abstract:
+;
+; AsmReadMm5 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm5 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmReadMm5)
+ASM_PFX(AsmReadMm5):
+ push eax
+ push eax
+ movq [esp], mm5
+ pop eax
+ pop edx
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm6.asm b/MdePkg/Library/BaseLib/Ia32/ReadMm6.asm
new file mode 100644
index 000000000000..753670851ff8
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm6.asm
@@ -0,0 +1,45 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm6.Asm
+;
+; Abstract:
+;
+; AsmReadMm6 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm6 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm6 PROC
+ push eax
+ push eax
+ movq [esp], mm6
+ pop eax
+ pop edx
+ ret
+AsmReadMm6 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm6.c b/MdePkg/Library/BaseLib/Ia32/ReadMm6.c
new file mode 100644
index 000000000000..a64cf507a0aa
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm6.c
@@ -0,0 +1,42 @@
+/** @file
+ AsmReadMm6 function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Reads the current value of 64-bit MMX Register #6 (MM6).
+
+ Reads and returns the current value of MM6. This function is only available
+ on IA-32 and x64.
+
+ @return The current value of MM6.
+
+**/
+UINT64
+EFIAPI
+AsmReadMm6 (
+ VOID
+ )
+{
+ _asm {
+ push eax
+ push eax
+ movq [esp], mm6
+ pop eax
+ pop edx
+ emms
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm6.nasm b/MdePkg/Library/BaseLib/Ia32/ReadMm6.nasm
new file mode 100644
index 000000000000..f6a6047a542e
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm6.nasm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm6.Asm
+;
+; Abstract:
+;
+; AsmReadMm6 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm6 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmReadMm6)
+ASM_PFX(AsmReadMm6):
+ push eax
+ push eax
+ movq [esp], mm6
+ pop eax
+ pop edx
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm7.asm b/MdePkg/Library/BaseLib/Ia32/ReadMm7.asm
new file mode 100644
index 000000000000..64ad7ab299a0
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm7.asm
@@ -0,0 +1,45 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm7.Asm
+;
+; Abstract:
+;
+; AsmReadMm7 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm7 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm7 PROC
+ push eax
+ push eax
+ movq [esp], mm7
+ pop eax
+ pop edx
+ ret
+AsmReadMm7 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm7.c b/MdePkg/Library/BaseLib/Ia32/ReadMm7.c
new file mode 100644
index 000000000000..0cea21956c12
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm7.c
@@ -0,0 +1,42 @@
+/** @file
+ AsmReadMm7 function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Reads the current value of 64-bit MMX Register #7 (MM7).
+
+ Reads and returns the current value of MM7. This function is only available
+ on IA-32 and x64.
+
+ @return The current value of MM7.
+
+**/
+UINT64
+EFIAPI
+AsmReadMm7 (
+ VOID
+ )
+{
+ _asm {
+ push eax
+ push eax
+ movq [esp], mm7
+ pop eax
+ pop edx
+ emms
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm7.nasm b/MdePkg/Library/BaseLib/Ia32/ReadMm7.nasm
new file mode 100644
index 000000000000..655aa40761b6
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm7.nasm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm7.Asm
+;
+; Abstract:
+;
+; AsmReadMm7 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm7 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmReadMm7)
+ASM_PFX(AsmReadMm7):
+ push eax
+ push eax
+ movq [esp], mm7
+ pop eax
+ pop edx
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMsr64.asm b/MdePkg/Library/BaseLib/Ia32/ReadMsr64.asm
new file mode 100644
index 000000000000..e04808937cbf
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMsr64.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMsr64.Asm
+;
+; Abstract:
+;
+; AsmReadMsr64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMsr64 (
+; IN UINT64 Index
+; );
+;------------------------------------------------------------------------------
+AsmReadMsr64 PROC
+ mov ecx, [esp + 4]
+ rdmsr
+ ret
+AsmReadMsr64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMsr64.c b/MdePkg/Library/BaseLib/Ia32/ReadMsr64.c
new file mode 100644
index 000000000000..e16c91744c36
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMsr64.c
@@ -0,0 +1,43 @@
+/** @file
+ AsmReadMsr64 function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Returns a 64-bit Machine Specific Register(MSR).
+
+ Reads and returns the 64-bit MSR specified by Index. No parameter checking is
+ performed on Index, and some Index values may cause CPU exceptions. The
+ caller must either guarantee that Index is valid, or the caller must set up
+ exception handlers to catch the exceptions. This function is only available
+ on IA-32 and x64.
+
+ @param Index The 32-bit MSR index to read.
+
+ @return The value of the MSR identified by Index.
+
+**/
+UINT64
+EFIAPI
+AsmReadMsr64 (
+ IN UINT32 Index
+ )
+{
+ _asm {
+ mov ecx, Index
+ rdmsr
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMsr64.nasm b/MdePkg/Library/BaseLib/Ia32/ReadMsr64.nasm
new file mode 100644
index 000000000000..f1dbd4111401
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMsr64.nasm
@@ -0,0 +1,38 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMsr64.Asm
+;
+; Abstract:
+;
+; AsmReadMsr64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMsr64 (
+; IN UINT64 Index
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmReadMsr64)
+ASM_PFX(AsmReadMsr64):
+ mov ecx, [esp + 4]
+ rdmsr
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadPmc.asm b/MdePkg/Library/BaseLib/Ia32/ReadPmc.asm
new file mode 100644
index 000000000000..0e87bfa03cc1
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadPmc.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadPmc.Asm
+;
+; Abstract:
+;
+; AsmReadPmc function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadPmc (
+; IN UINT32 PmcIndex
+; );
+;------------------------------------------------------------------------------
+AsmReadPmc PROC
+ mov ecx, [esp + 4]
+ rdpmc
+ ret
+AsmReadPmc ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadPmc.c b/MdePkg/Library/BaseLib/Ia32/ReadPmc.c
new file mode 100644
index 000000000000..faa1f565810a
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadPmc.c
@@ -0,0 +1,37 @@
+/** @file
+ AsmReadPmc function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+/**
+ Reads the current value of a Performance Counter (PMC).
+
+ Reads and returns the current value of performance counter specified by
+ Index. This function is only available on IA-32 and x64.
+
+ @param Index The 32-bit Performance Counter index to read.
+
+ @return The value of the PMC specified by Index.
+
+**/
+UINT64
+EFIAPI
+AsmReadPmc (
+ IN UINT32 Index
+ )
+{
+ _asm {
+ mov ecx, Index
+ rdpmc
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadPmc.nasm b/MdePkg/Library/BaseLib/Ia32/ReadPmc.nasm
new file mode 100644
index 000000000000..8eb0501a6251
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadPmc.nasm
@@ -0,0 +1,38 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadPmc.Asm
+;
+; Abstract:
+;
+; AsmReadPmc function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadPmc (
+; IN UINT32 PmcIndex
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmReadPmc)
+ASM_PFX(AsmReadPmc):
+ mov ecx, [esp + 4]
+ rdpmc
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadSs.asm b/MdePkg/Library/BaseLib/Ia32/ReadSs.asm
new file mode 100644
index 000000000000..f881751d6dde
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadSs.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadSs.Asm
+;
+; Abstract:
+;
+; AsmReadSs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadSs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadSs PROC
+ mov eax, ss
+ ret
+AsmReadSs ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadSs.c b/MdePkg/Library/BaseLib/Ia32/ReadSs.c
new file mode 100644
index 000000000000..f1ced5e0ed49
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadSs.c
@@ -0,0 +1,38 @@
+/** @file
+ AsmReadSs function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Reads the current value of Stack Segment Register (SS).
+
+ Reads and returns the current value of SS. This function is only available on
+ IA-32 and x64.
+
+ @return The current value of SS.
+
+**/
+UINT16
+EFIAPI
+AsmReadSs (
+ VOID
+ )
+{
+ __asm {
+ xor eax, eax
+ mov ax, ss
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadSs.nasm b/MdePkg/Library/BaseLib/Ia32/ReadSs.nasm
new file mode 100644
index 000000000000..6b3da79270bf
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadSs.nasm
@@ -0,0 +1,37 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadSs.Asm
+;
+; Abstract:
+;
+; AsmReadSs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadSs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmReadSs)
+ASM_PFX(AsmReadSs):
+ mov eax, ss
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadTr.asm b/MdePkg/Library/BaseLib/Ia32/ReadTr.asm
new file mode 100644
index 000000000000..703bec7ef6b2
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadTr.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadTr.Asm
+;
+; Abstract:
+;
+; AsmReadTr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadTr (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadTr PROC
+ str ax
+ ret
+AsmReadTr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadTr.c b/MdePkg/Library/BaseLib/Ia32/ReadTr.c
new file mode 100644
index 000000000000..23273f385356
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadTr.c
@@ -0,0 +1,37 @@
+/** @file
+ AsmReadTr function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Reads the current value of Task Register (TR).
+
+ Reads and returns the current value of TR. This function is only available on
+ IA-32 and x64.
+
+ @return The current value of TR.
+
+**/
+UINT16
+EFIAPI
+AsmReadTr (
+ VOID
+ )
+{
+ _asm {
+ str ax
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadTr.nasm b/MdePkg/Library/BaseLib/Ia32/ReadTr.nasm
new file mode 100644
index 000000000000..811153c418e7
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadTr.nasm
@@ -0,0 +1,37 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadTr.Asm
+;
+; Abstract:
+;
+; AsmReadTr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadTr (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmReadTr)
+ASM_PFX(AsmReadTr):
+ str ax
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadTsc.asm b/MdePkg/Library/BaseLib/Ia32/ReadTsc.asm
new file mode 100644
index 000000000000..5c2004153a09
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadTsc.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadTsc.Asm
+;
+; Abstract:
+;
+; AsmReadTsc function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadTsc (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadTsc PROC
+ rdtsc
+ ret
+AsmReadTsc ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadTsc.c b/MdePkg/Library/BaseLib/Ia32/ReadTsc.c
new file mode 100644
index 000000000000..79f676e6d9ee
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadTsc.c
@@ -0,0 +1,37 @@
+/** @file
+ AsmReadTsc function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Reads the current value of Time Stamp Counter (TSC).
+
+ Reads and returns the current value of TSC. This function is only available
+ on IA-32 and x64.
+
+ @return The current value of TSC
+
+**/
+UINT64
+EFIAPI
+AsmReadTsc (
+ VOID
+ )
+{
+ _asm {
+ rdtsc
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadTsc.nasm b/MdePkg/Library/BaseLib/Ia32/ReadTsc.nasm
new file mode 100644
index 000000000000..f28e20e445d6
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadTsc.nasm
@@ -0,0 +1,37 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadTsc.Asm
+;
+; Abstract:
+;
+; AsmReadTsc function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadTsc (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmReadTsc)
+ASM_PFX(AsmReadTsc):
+ rdtsc
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/SetJump.S b/MdePkg/Library/BaseLib/Ia32/SetJump.S
new file mode 100644
index 000000000000..744a77e7dc79
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/SetJump.S
@@ -0,0 +1,44 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# SetJump.S
+#
+# Abstract:
+#
+# Implementation of SetJump() on IA-32.
+#
+#------------------------------------------------------------------------------
+
+ASM_GLOBAL ASM_PFX(SetJump), ASM_PFX(InternalAssertJumpBuffer)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# SetJump (
+# OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(SetJump):
+ pushl 0x4(%esp)
+ call ASM_PFX(InternalAssertJumpBuffer) # To validate JumpBuffer
+ pop %ecx
+ pop %ecx # ecx <- return address
+ movl (%esp), %edx
+ movl %ebx, (%edx)
+ movl %esi, 4(%edx)
+ movl %edi, 8(%edx)
+ movl %ebp, 12(%edx)
+ movl %esp, 16(%edx)
+ movl %ecx, 20(%edx) # eip value to restore in LongJump
+ xorl %eax, %eax
+ jmp *%ecx
diff --git a/MdePkg/Library/BaseLib/Ia32/SetJump.asm b/MdePkg/Library/BaseLib/Ia32/SetJump.asm
new file mode 100644
index 000000000000..3c078ff97bd7
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/SetJump.asm
@@ -0,0 +1,51 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SetJump.Asm
+;
+; Abstract:
+;
+; Implementation of SetJump() on IA-32.
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+InternalAssertJumpBuffer PROTO C
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; SetJump (
+; OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
+; );
+;------------------------------------------------------------------------------
+SetJump PROC
+ push DWORD [esp + 4]
+ call InternalAssertJumpBuffer ; To validate JumpBuffer
+ pop ecx
+ pop ecx ; ecx <- return address
+ mov edx, [esp]
+ mov [edx], ebx
+ mov [edx + 4], esi
+ mov [edx + 8], edi
+ mov [edx + 12], ebp
+ mov [edx + 16], esp
+ mov [edx + 20], ecx ; eip value to restore in LongJump
+ xor eax, eax
+ jmp ecx
+SetJump ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/SetJump.c b/MdePkg/Library/BaseLib/Ia32/SetJump.c
new file mode 100644
index 000000000000..414c36e0f2d5
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/SetJump.c
@@ -0,0 +1,74 @@
+/** @file
+ Implementation of SetJump() on IA-32.
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+#include "BaseLibInternals.h"
+
+/**
+ Worker function that checks ASSERT condition for JumpBuffer
+
+ Checks ASSERT condition for JumpBuffer.
+
+ If JumpBuffer is NULL, then ASSERT().
+ For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
+
+ @param JumpBuffer A pointer to CPU context buffer.
+
+**/
+VOID
+EFIAPI
+InternalAssertJumpBuffer (
+ IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
+ );
+
+/**
+ Saves the current CPU context that can be restored with a call to LongJump()
+ and returns 0.
+
+ Saves the current CPU context in the buffer specified by JumpBuffer and
+ returns 0. The initial call to SetJump() must always return 0. Subsequent
+ calls to LongJump() cause a non-zero value to be returned by SetJump().
+
+ If JumpBuffer is NULL, then ASSERT().
+ For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
+
+ @param JumpBuffer A pointer to CPU context buffer.
+
+ @retval 0 Indicates a return from SetJump().
+
+**/
+_declspec (naked)
+UINTN
+EFIAPI
+SetJump (
+ OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
+ )
+{
+ _asm {
+ push [esp + 4]
+ call InternalAssertJumpBuffer
+ pop ecx
+ pop ecx
+ mov edx, [esp]
+ mov [edx], ebx
+ mov [edx + 4], esi
+ mov [edx + 8], edi
+ mov [edx + 12], ebp
+ mov [edx + 16], esp
+ mov [edx + 20], ecx
+ xor eax, eax
+ jmp ecx
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/SetJump.nasm b/MdePkg/Library/BaseLib/Ia32/SetJump.nasm
new file mode 100644
index 000000000000..58074b87ccb6
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/SetJump.nasm
@@ -0,0 +1,48 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SetJump.Asm
+;
+; Abstract:
+;
+; Implementation of SetJump() on IA-32.
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+extern ASM_PFX(InternalAssertJumpBuffer)
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; SetJump (
+; OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(SetJump)
+ASM_PFX(SetJump):
+ push DWORD [esp + 4]
+ call ASM_PFX(InternalAssertJumpBuffer) ; To validate JumpBuffer
+ pop ecx
+ pop ecx ; ecx <- return address
+ mov edx, [esp]
+ mov [edx], ebx
+ mov [edx + 4], esi
+ mov [edx + 8], edi
+ mov [edx + 12], ebp
+ mov [edx + 16], esp
+ mov [edx + 20], ecx ; eip value to restore in LongJump
+ xor eax, eax
+ jmp ecx
+
diff --git a/MdePkg/Library/BaseLib/Ia32/SwapBytes64.S b/MdePkg/Library/BaseLib/Ia32/SwapBytes64.S
new file mode 100644
index 000000000000..265b6b72fe95
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/SwapBytes64.S
@@ -0,0 +1,38 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# CpuId.S
+#
+# Abstract:
+#
+# AsmCpuid function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# InternalMathSwapBytes64 (
+# IN UINT64 Operand
+# );
+#------------------------------------------------------------------------------
+ASM_GLOBAL ASM_PFX(InternalMathSwapBytes64)
+ASM_PFX(InternalMathSwapBytes64):
+ movl 8(%esp), %eax # eax <- upper 32 bits
+ movl 4(%esp), %edx # edx <- lower 32 bits
+ bswapl %eax
+ bswapl %edx
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/SwapBytes64.asm b/MdePkg/Library/BaseLib/Ia32/SwapBytes64.asm
new file mode 100644
index 000000000000..1ab67db482c4
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/SwapBytes64.asm
@@ -0,0 +1,43 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuId.Asm
+;
+; Abstract:
+;
+; AsmCpuid function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathSwapBytes64 (
+; IN UINT64 Operand
+; );
+;------------------------------------------------------------------------------
+InternalMathSwapBytes64 PROC
+ mov eax, [esp + 8] ; eax <- upper 32 bits
+ mov edx, [esp + 4] ; edx <- lower 32 bits
+ bswap eax
+ bswap edx
+ ret
+InternalMathSwapBytes64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/SwapBytes64.c b/MdePkg/Library/BaseLib/Ia32/SwapBytes64.c
new file mode 100644
index 000000000000..3e03b6547489
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/SwapBytes64.c
@@ -0,0 +1,43 @@
+/** @file
+ Implementation of 64-bit swap bytes
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Switches the endianess of a 64-bit integer.
+
+ This function swaps the bytes in a 64-bit unsigned value to switch the value
+ from little endian to big endian or vice versa. The byte swapped value is
+ returned.
+
+ @param Operand A 64-bit unsigned value.
+
+ @return The byte swaped Operand.
+
+**/
+UINT64
+EFIAPI
+InternalMathSwapBytes64 (
+ IN UINT64 Operand
+ )
+{
+ _asm {
+ mov eax, dword ptr [Operand + 4]
+ mov edx, dword ptr [Operand + 0]
+ bswap eax
+ bswap edx
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/SwapBytes64.nasm b/MdePkg/Library/BaseLib/Ia32/SwapBytes64.nasm
new file mode 100644
index 000000000000..32fc1a6457b8
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/SwapBytes64.nasm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuId.Asm
+;
+; Abstract:
+;
+; AsmCpuid function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathSwapBytes64 (
+; IN UINT64 Operand
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(InternalMathSwapBytes64)
+ASM_PFX(InternalMathSwapBytes64):
+ mov eax, [esp + 8] ; eax <- upper 32 bits
+ mov edx, [esp + 4] ; edx <- lower 32 bits
+ bswap eax
+ bswap edx
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/Thunk16.S b/MdePkg/Library/BaseLib/Ia32/Thunk16.S
new file mode 100644
index 000000000000..f5189d0515e2
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/Thunk16.S
@@ -0,0 +1,222 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# Thunk16.S
+#
+# Abstract:
+#
+# Real mode thunk
+#
+#------------------------------------------------------------------------------
+
+#include <Library/BaseLib.h>
+
+ASM_GLOBAL ASM_PFX(m16Start), ASM_PFX(m16Size), ASM_PFX(mThunk16Attr), ASM_PFX(m16Gdt), ASM_PFX(m16GdtrBase), ASM_PFX(mTransition)
+ASM_GLOBAL ASM_PFX(InternalAsmThunk16)
+
+# define the structure of IA32_REGS
+.set _EDI, 0 #size 4
+.set _ESI, 4 #size 4
+.set _EBP, 8 #size 4
+.set _ESP, 12 #size 4
+.set _EBX, 16 #size 4
+.set _EDX, 20 #size 4
+.set _ECX, 24 #size 4
+.set _EAX, 28 #size 4
+.set _DS, 32 #size 2
+.set _ES, 34 #size 2
+.set _FS, 36 #size 2
+.set _GS, 38 #size 2
+.set _EFLAGS, 40 #size 4
+.set _EIP, 44 #size 4
+.set _CS, 48 #size 2
+.set _SS, 50 #size 2
+.set IA32_REGS_SIZE, 52
+
+ .text
+ .code16
+
+ASM_PFX(m16Start):
+
+SavedGdt: .space 6
+
+ASM_PFX(BackFromUserCode):
+ push %ss
+ push %cs
+
+ calll L_Base1 # push eip
+L_Base1:
+ pushfl
+ cli # disable interrupts
+ push %gs
+ push %fs
+ push %es
+ push %ds
+ pushal
+ .byte 0x66, 0xba # mov edx, imm32
+ASM_PFX(ThunkAttr): .space 4
+ testb $THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15, %dl
+ jz 1f
+ movw $0x2401, %ax
+ int $0x15
+ cli # disable interrupts
+ jnc 2f
+1:
+ testb $THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL, %dl
+ jz 2f
+ inb $0x92, %al
+ orb $2, %al
+ outb %al, $0x92 # deactivate A20M#
+2:
+ xorl %eax, %eax
+ movw %ss, %ax
+ leal IA32_REGS_SIZE(%esp), %ebp
+ mov %ebp, (_ESP - IA32_REGS_SIZE)(%bp)
+ mov (_EIP - IA32_REGS_SIZE)(%bp), %bx
+ shll $4, %eax
+ addl %eax, %ebp
+ .byte 0x66, 0xb8 # mov eax, imm32
+SavedCr4: .space 4
+ movl %eax, %cr4
+ lgdtl %cs:(SavedGdt - L_Base1)(%bx)
+ .byte 0x66, 0xb8 # mov eax, imm32
+SavedCr0: .space 4
+ movl %eax, %cr0
+ .byte 0xb8 # mov ax, imm16
+SavedSs: .space 2
+ movl %eax, %ss
+ .byte 0x66, 0xbc # mov esp, imm32
+SavedEsp: .space 4
+ lretl # return to protected mode
+
+_EntryPoint: .long ASM_PFX(ToUserCode) - ASM_PFX(m16Start)
+ .word 0x8
+_16Idtr: .word 0x3ff
+ .long 0
+_16Gdtr: .word GdtEnd - _NullSegDesc - 1
+_16GdtrBase: .long _NullSegDesc
+
+ASM_PFX(ToUserCode):
+ movw %ss, %dx
+ movw %cx, %ss # set new segment selectors
+ movw %cx, %ds
+ movw %cx, %es
+ movw %cx, %fs
+ movw %cx, %gs
+ movl %eax, %cr0 # real mode starts at next instruction
+ # which (per SDM) *must* be a far JMP.
+ ljmpw $0,$0 # will be filled in by InternalAsmThunk16
+L_Base: # to point here.
+ movl %ebp, %cr4
+ movw %si, %ss # set up 16-bit stack segment
+ xchgl %ebx, %esp # set up 16-bit stack pointer
+
+ movw IA32_REGS_SIZE(%esp), %bp # get BackToUserCode address from stack
+ mov %dx, %cs:(SavedSs - ASM_PFX(BackFromUserCode))(%bp)
+ mov %ebx, %cs:(SavedEsp - ASM_PFX(BackFromUserCode))(%bp)
+ lidtl %cs:(_16Idtr - ASM_PFX(BackFromUserCode))(%bp)
+ popal
+ pop %ds
+ pop %es
+ pop %fs
+ pop %gs
+ popfl
+ lretl # transfer control to user code
+
+_NullSegDesc: .quad 0
+_16CsDesc:
+ .word -1
+ .word 0
+ .byte 0
+ .byte 0x9b
+ .byte 0x8f # 16-bit segment, 4GB limit
+ .byte 0
+_16DsDesc:
+ .word -1
+ .word 0
+ .byte 0
+ .byte 0x93
+ .byte 0x8f # 16-bit segment, 4GB limit
+ .byte 0
+GdtEnd:
+
+ .code32
+#
+# @param RegSet The pointer to a IA32_DWORD_REGS structure
+# @param Transition The pointer to the transition code
+# @return The address of the 16-bit stack after returning from user code
+#
+ASM_PFX(InternalAsmThunk16):
+ push %ebp
+ push %ebx
+ push %esi
+ push %edi
+ push %ds
+ push %es
+ push %fs
+ push %gs
+ movl 36(%esp), %esi # esi <- RegSet
+ movzwl _SS(%esi), %edx
+ mov _ESP(%esi), %edi
+ add $(-(IA32_REGS_SIZE + 4)), %edi
+ movl %edi, %ebx # ebx <- stack offset
+ imul $0x10, %edx, %eax
+ push $(IA32_REGS_SIZE / 4)
+ addl %eax, %edi # edi <- linear address of 16-bit stack
+ pop %ecx
+ rep
+ movsl # copy RegSet
+ movl 40(%esp), %eax # eax <- address of transition code
+ movl %edx, %esi # esi <- 16-bit stack segment
+ lea (SavedCr0 - ASM_PFX(m16Start))(%eax), %edx
+ movl %eax, %ecx
+ andl $0xf, %ecx
+ shll $12, %eax
+ lea (ASM_PFX(BackFromUserCode) - ASM_PFX(m16Start))(%ecx), %ecx
+ movw %cx, %ax
+ stosl # [edi] <- return address of user code
+ addl $(L_Base - ASM_PFX(BackFromUserCode)), %eax
+ movl %eax, (L_Base - SavedCr0 - 4)(%edx)
+ sgdtl (SavedGdt - SavedCr0)(%edx)
+ sidtl 0x24(%esp)
+ movl %cr0, %eax
+ movl %eax, (%edx) # save CR0 in SavedCr0
+ andl $0x7ffffffe, %eax # clear PE, PG bits
+ movl %cr4, %ebp
+ mov %ebp, (SavedCr4 - SavedCr0)(%edx)
+ andl $0xffffffcf, %ebp # clear PAE, PSE bits
+ pushl $0x10
+ pop %ecx # ecx <- selector for data segments
+ lgdtl (_16Gdtr - SavedCr0)(%edx)
+ pushfl
+ lcall *(_EntryPoint - SavedCr0)(%edx)
+ popfl
+ lidtl 0x24(%esp)
+ lea -IA32_REGS_SIZE(%ebp), %eax
+ pop %gs
+ pop %fs
+ pop %es
+ pop %ds
+ pop %edi
+ pop %esi
+ pop %ebx
+ pop %ebp
+ ret
+
+ .const:
+
+ASM_PFX(m16Size): .word ASM_PFX(InternalAsmThunk16) - ASM_PFX(m16Start)
+ASM_PFX(mThunk16Attr): .word ASM_PFX(ThunkAttr) - ASM_PFX(m16Start)
+ASM_PFX(m16Gdt): .word _NullSegDesc - ASM_PFX(m16Start)
+ASM_PFX(m16GdtrBase): .word _16GdtrBase - ASM_PFX(m16Start)
+ASM_PFX(mTransition): .word _EntryPoint - ASM_PFX(m16Start)
diff --git a/MdePkg/Library/BaseLib/Ia32/Thunk16.asm b/MdePkg/Library/BaseLib/Ia32/Thunk16.asm
new file mode 100644
index 000000000000..9311c1161f0e
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/Thunk16.asm
@@ -0,0 +1,260 @@
+
+#include "BaseLibInternals.h"
+
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Thunk.asm
+;
+; Abstract:
+;
+; Real mode thunk
+;
+;------------------------------------------------------------------------------
+
+ .686p
+ .model flat,C
+
+EXTERNDEF C m16Start:BYTE
+EXTERNDEF C m16Size:WORD
+EXTERNDEF C mThunk16Attr:WORD
+EXTERNDEF C m16Gdt:WORD
+EXTERNDEF C m16GdtrBase:WORD
+EXTERNDEF C mTransition:WORD
+
+;
+; Here is the layout of the real mode stack. _ToUserCode() is responsible for
+; loading all these registers from real mode stack.
+;
+IA32_REGS STRUC 4t
+_EDI DD ?
+_ESI DD ?
+_EBP DD ?
+_ESP DD ?
+_EBX DD ?
+_EDX DD ?
+_ECX DD ?
+_EAX DD ?
+_DS DW ?
+_ES DW ?
+_FS DW ?
+_GS DW ?
+_EFLAGS DD ?
+_EIP DD ?
+_CS DW ?
+_SS DW ?
+IA32_REGS ENDS
+
+ .const
+
+;
+; These are global constant to convey information to C code.
+;
+m16Size DW InternalAsmThunk16 - m16Start
+mThunk16Attr DW _ThunkAttr - m16Start
+m16Gdt DW _NullSegDesc - m16Start
+m16GdtrBase DW _16GdtrBase - m16Start
+mTransition DW _EntryPoint - m16Start
+
+ .code
+
+m16Start LABEL BYTE
+
+SavedGdt LABEL FWORD
+ DW ?
+ DD ?
+;------------------------------------------------------------------------------
+; _BackFromUserCode() takes control in real mode after 'retf' has been executed
+; by user code. It will be shadowed to somewhere in memory below 1MB.
+;------------------------------------------------------------------------------
+_BackFromUserCode PROC
+ ;
+ ; The order of saved registers on the stack matches the order they appears
+ ; in IA32_REGS structure. This facilitates wrapper function to extract them
+ ; into that structure.
+ ;
+ push ss
+ push cs
+ DB 66h
+ call @Base ; push eip
+@Base:
+ pushf ; pushfd actually
+ cli ; disable interrupts
+ push gs
+ push fs
+ push es
+ push ds
+ pushaw ; pushad actually
+ DB 66h, 0bah ; mov edx, imm32
+_ThunkAttr DD ?
+ test dl, THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15
+ jz @1
+ mov eax, 15cd2401h ; mov ax, 2401h & int 15h
+ cli ; disable interrupts
+ jnc @2
+@1:
+ test dl, THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL
+ jz @2
+ in al, 92h
+ or al, 2
+ out 92h, al ; deactivate A20M#
+@2:
+ xor ax, ax ; xor eax, eax
+ mov eax, ss ; mov ax, ss
+ DB 67h
+ lea bp, [esp + sizeof (IA32_REGS)]
+ ;
+ ; esi's in the following 2 instructions are indeed bp in 16-bit code. Fact
+ ; is "esi" in 32-bit addressing mode has the same encoding of "bp" in 16-
+ ; bit addressing mode.
+ ;
+ mov word ptr (IA32_REGS ptr [esi - sizeof (IA32_REGS)])._ESP, bp
+ mov ebx, (IA32_REGS ptr [esi - sizeof (IA32_REGS)])._EIP
+ shl ax, 4 ; shl eax, 4
+ add bp, ax ; add ebp, eax
+ DB 66h, 0b8h ; mov eax, imm32
+SavedCr4 DD ?
+ mov cr4, eax
+ DB 66h
+ lgdt fword ptr cs:[edi + (SavedGdt - @Base)]
+ DB 66h, 0b8h ; mov eax, imm32
+SavedCr0 DD ?
+ mov cr0, eax
+ DB 0b8h ; mov ax, imm16
+SavedSs DW ?
+ mov ss, eax
+ DB 66h, 0bch ; mov esp, imm32
+SavedEsp DD ?
+ DB 66h
+ retf ; return to protected mode
+_BackFromUserCode ENDP
+
+_EntryPoint DD _ToUserCode - m16Start
+ DW 8h
+_16Idtr FWORD (1 SHL 10) - 1
+_16Gdtr LABEL FWORD
+ DW GdtEnd - _NullSegDesc - 1
+_16GdtrBase DD _NullSegDesc
+
+;------------------------------------------------------------------------------
+; _ToUserCode() takes control in real mode before passing control to user code.
+; It will be shadowed to somewhere in memory below 1MB.
+;------------------------------------------------------------------------------
+_ToUserCode PROC
+ mov edx, ss
+ mov ss, ecx ; set new segment selectors
+ mov ds, ecx
+ mov es, ecx
+ mov fs, ecx
+ mov gs, ecx
+ mov cr0, eax ; real mode starts at next instruction
+ ; which (per SDM) *must* be a far JMP.
+ DB 0eah
+_RealAddr DW 0,0 ; filled in by InternalAsmThunk16
+
+ mov cr4, ebp
+ mov ss, esi ; set up 16-bit stack segment
+ xchg sp, bx ; set up 16-bit stack pointer
+
+; mov bp, [esp + sizeof(IA32_REGS)
+ DB 67h
+ mov ebp, [esp + sizeof(IA32_REGS)] ; BackFromUserCode address from stack
+
+; mov cs:[bp + (SavedSs - _BackFromUserCode)], dx
+ mov cs:[esi + (SavedSs - _BackFromUserCode)], edx
+
+; mov cs:[bp + (SavedEsp - _BackFromUserCode)], ebx
+ DB 2eh, 66h, 89h, 9eh
+ DW SavedEsp - _BackFromUserCode
+
+; lidt cs:[bp + (_16Idtr - _BackFromUserCode)]
+ DB 2eh, 66h, 0fh, 01h, 9eh
+ DW _16Idtr - _BackFromUserCode
+
+ popaw ; popad actually
+ pop ds
+ pop es
+ pop fs
+ pop gs
+ popf ; popfd
+ DB 66h ; Use 32-bit addressing for "retf" below
+ retf ; transfer control to user code
+_ToUserCode ENDP
+
+_NullSegDesc DQ 0
+_16CsDesc LABEL QWORD
+ DW -1
+ DW 0
+ DB 0
+ DB 9bh
+ DB 8fh ; 16-bit segment, 4GB limit
+ DB 0
+_16DsDesc LABEL QWORD
+ DW -1
+ DW 0
+ DB 0
+ DB 93h
+ DB 8fh ; 16-bit segment, 4GB limit
+ DB 0
+GdtEnd LABEL QWORD
+
+;------------------------------------------------------------------------------
+; IA32_REGISTER_SET *
+; EFIAPI
+; InternalAsmThunk16 (
+; IN IA32_REGISTER_SET *RegisterSet,
+; IN OUT VOID *Transition
+; );
+;------------------------------------------------------------------------------
+InternalAsmThunk16 PROC USES ebp ebx esi edi ds es fs gs
+ mov esi, [esp + 36] ; esi <- RegSet, the 1st parameter
+ movzx edx, (IA32_REGS ptr [esi])._SS
+ mov edi, (IA32_REGS ptr [esi])._ESP
+ add edi, - (sizeof (IA32_REGS) + 4) ; reserve stack space
+ mov ebx, edi ; ebx <- stack offset
+ imul eax, edx, 16 ; eax <- edx * 16
+ push sizeof (IA32_REGS) / 4
+ add edi, eax ; edi <- linear address of 16-bit stack
+ pop ecx
+ rep movsd ; copy RegSet
+ mov eax, [esp + 40] ; eax <- address of transition code
+ mov esi, edx ; esi <- 16-bit stack segment
+ lea edx, [eax + (SavedCr0 - m16Start)]
+ mov ecx, eax
+ and ecx, 0fh
+ shl eax, 12
+ lea ecx, [ecx + (_BackFromUserCode - m16Start)]
+ mov ax, cx
+ stosd ; [edi] <- return address of user code
+ add eax, _RealAddr + 4 - _BackFromUserCode
+ mov dword ptr [edx + (_RealAddr - SavedCr0)], eax
+ sgdt fword ptr [edx + (SavedGdt - SavedCr0)]
+ sidt fword ptr [esp + 36] ; save IDT stack in argument space
+ mov eax, cr0
+ mov [edx], eax ; save CR0 in SavedCr0
+ and eax, 7ffffffeh ; clear PE, PG bits
+ mov ebp, cr4
+ mov [edx + (SavedCr4 - SavedCr0)], ebp
+ and ebp, NOT 30h ; clear PAE, PSE bits
+ push 10h
+ pop ecx ; ecx <- selector for data segments
+ lgdt fword ptr [edx + (_16Gdtr - SavedCr0)]
+ pushfd ; Save df/if indeed
+ call fword ptr [edx + (_EntryPoint - SavedCr0)]
+ popfd
+ lidt fword ptr [esp + 36] ; restore protected mode IDTR
+ lea eax, [ebp - sizeof (IA32_REGS)] ; eax <- the address of IA32_REGS
+ ret
+InternalAsmThunk16 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/Thunk16.nasm b/MdePkg/Library/BaseLib/Ia32/Thunk16.nasm
new file mode 100644
index 000000000000..1c02140595dc
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/Thunk16.nasm
@@ -0,0 +1,263 @@
+
+#include "BaseLibInternals.h"
+
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Thunk.asm
+;
+; Abstract:
+;
+; Real mode thunk
+;
+;------------------------------------------------------------------------------
+
+global ASM_PFX(m16Size)
+global ASM_PFX(mThunk16Attr)
+global ASM_PFX(m16Gdt)
+global ASM_PFX(m16GdtrBase)
+global ASM_PFX(mTransition)
+global ASM_PFX(m16Start)
+
+struc IA32_REGS
+
+ ._EDI: resd 1
+ ._ESI: resd 1
+ ._EBP: resd 1
+ ._ESP: resd 1
+ ._EBX: resd 1
+ ._EDX: resd 1
+ ._ECX: resd 1
+ ._EAX: resd 1
+ ._DS: resw 1
+ ._ES: resw 1
+ ._FS: resw 1
+ ._GS: resw 1
+ ._EFLAGS: resd 1
+ ._EIP: resd 1
+ ._CS: resw 1
+ ._SS: resw 1
+ .size:
+
+endstruc
+
+;; .const
+
+SECTION .data
+
+;
+; These are global constant to convey information to C code.
+;
+ASM_PFX(m16Size) DW ASM_PFX(InternalAsmThunk16) - ASM_PFX(m16Start)
+ASM_PFX(mThunk16Attr) DW _BackFromUserCode.ThunkAttrEnd - 4 - ASM_PFX(m16Start)
+ASM_PFX(m16Gdt) DW _NullSegDesc - ASM_PFX(m16Start)
+ASM_PFX(m16GdtrBase) DW _16GdtrBase - ASM_PFX(m16Start)
+ASM_PFX(mTransition) DW _EntryPoint - ASM_PFX(m16Start)
+
+SECTION .text
+
+ASM_PFX(m16Start):
+
+SavedGdt:
+ dw 0
+ dd 0
+
+;------------------------------------------------------------------------------
+; _BackFromUserCode() takes control in real mode after 'retf' has been executed
+; by user code. It will be shadowed to somewhere in memory below 1MB.
+;------------------------------------------------------------------------------
+_BackFromUserCode:
+ ;
+ ; The order of saved registers on the stack matches the order they appears
+ ; in IA32_REGS structure. This facilitates wrapper function to extract them
+ ; into that structure.
+ ;
+BITS 16
+ push ss
+ push cs
+ ;
+ ; Note: We can't use o32 on the next instruction because of a bug
+ ; in NASM 2.09.04 through 2.10rc1.
+ ;
+ call dword .Base ; push eip
+.Base:
+ pushfd
+ cli ; disable interrupts
+ push gs
+ push fs
+ push es
+ push ds
+ pushad
+ mov edx, strict dword 0
+.ThunkAttrEnd:
+ test dl, THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15
+ jz .1
+ mov ax, 2401h
+ int 15h
+ cli ; disable interrupts
+ jnc .2
+.1:
+ test dl, THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL
+ jz .2
+ in al, 92h
+ or al, 2
+ out 92h, al ; deactivate A20M#
+.2:
+ xor eax, eax
+ mov ax, ss
+ lea ebp, [esp + IA32_REGS.size]
+ mov [bp - IA32_REGS.size + IA32_REGS._ESP], ebp
+ mov bx, [bp - IA32_REGS.size + IA32_REGS._EIP]
+ shl eax, 4 ; shl eax, 4
+ add ebp, eax ; add ebp, eax
+ mov eax, strict dword 0
+.SavedCr4End:
+ mov cr4, eax
+o32 lgdt [cs:bx + (SavedGdt - .Base)]
+ mov eax, strict dword 0
+.SavedCr0End:
+ mov cr0, eax
+ mov ax, strict word 0
+.SavedSsEnd:
+ mov ss, eax
+ mov esp, strict dword 0
+.SavedEspEnd:
+o32 retf ; return to protected mode
+
+_EntryPoint:
+ DD _ToUserCode - ASM_PFX(m16Start)
+ DW 8h
+_16Idtr:
+ DW (1 << 10) - 1
+ DD 0
+_16Gdtr:
+ DW GdtEnd - _NullSegDesc - 1
+_16GdtrBase:
+ DD 0
+
+;------------------------------------------------------------------------------
+; _ToUserCode() takes control in real mode before passing control to user code.
+; It will be shadowed to somewhere in memory below 1MB.
+;------------------------------------------------------------------------------
+_ToUserCode:
+BITS 16
+ mov dx, ss
+ mov ss, cx ; set new segment selectors
+ mov ds, cx
+ mov es, cx
+ mov fs, cx
+ mov gs, cx
+ mov cr0, eax ; real mode starts at next instruction
+ ; which (per SDM) *must* be a far JMP.
+ jmp 0:strict word 0
+.RealAddrEnd:
+ mov cr4, ebp
+ mov ss, si ; set up 16-bit stack segment
+ xchg esp, ebx ; set up 16-bit stack pointer
+ mov bp, [esp + IA32_REGS.size]
+ mov [cs:bp + (_BackFromUserCode.SavedSsEnd - 2 - _BackFromUserCode)], dx
+ mov [cs:bp + (_BackFromUserCode.SavedEspEnd - 4 - _BackFromUserCode)], ebx
+ lidt [cs:bp + (_16Idtr - _BackFromUserCode)]
+
+ popad
+ pop ds
+ pop es
+ pop fs
+ pop gs
+ popfd
+
+o32 retf ; transfer control to user code
+
+ALIGN 16
+_NullSegDesc DQ 0
+_16CsDesc:
+ DW -1
+ DW 0
+ DB 0
+ DB 9bh
+ DB 8fh ; 16-bit segment, 4GB limit
+ DB 0
+_16DsDesc:
+ DW -1
+ DW 0
+ DB 0
+ DB 93h
+ DB 8fh ; 16-bit segment, 4GB limit
+ DB 0
+GdtEnd:
+
+;------------------------------------------------------------------------------
+; IA32_REGISTER_SET *
+; EFIAPI
+; InternalAsmThunk16 (
+; IN IA32_REGISTER_SET *RegisterSet,
+; IN OUT VOID *Transition
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(InternalAsmThunk16)
+ASM_PFX(InternalAsmThunk16):
+BITS 32
+ push ebp
+ push ebx
+ push esi
+ push edi
+ push ds
+ push es
+ push fs
+ push gs
+ mov esi, [esp + 36] ; esi <- RegSet, the 1st parameter
+ movzx edx, word [esi + IA32_REGS._SS]
+ mov edi, [esi + IA32_REGS._ESP]
+ add edi, - (IA32_REGS.size + 4) ; reserve stack space
+ mov ebx, edi ; ebx <- stack offset
+ imul eax, edx, 16 ; eax <- edx * 16
+ push IA32_REGS.size / 4
+ add edi, eax ; edi <- linear address of 16-bit stack
+ pop ecx
+ rep movsd ; copy RegSet
+ mov eax, [esp + 40] ; eax <- address of transition code
+ mov esi, edx ; esi <- 16-bit stack segment
+ lea edx, [eax + (_BackFromUserCode.SavedCr0End - ASM_PFX(m16Start))]
+ mov ecx, eax
+ and ecx, 0fh
+ shl eax, 12
+ lea ecx, [ecx + (_BackFromUserCode - ASM_PFX(m16Start))]
+ mov ax, cx
+ stosd ; [edi] <- return address of user code
+ add eax, _ToUserCode.RealAddrEnd - _BackFromUserCode
+ mov [edx + (_ToUserCode.RealAddrEnd - 4 - _BackFromUserCode.SavedCr0End)], eax
+ sgdt [edx + (SavedGdt - _BackFromUserCode.SavedCr0End)]
+ sidt [esp + 36] ; save IDT stack in argument space
+ mov eax, cr0
+ mov [edx - 4], eax ; save CR0 in _BackFromUserCode.SavedCr0End - 4
+ and eax, 7ffffffeh ; clear PE, PG bits
+ mov ebp, cr4
+ mov [edx + (_BackFromUserCode.SavedCr4End - 4 - _BackFromUserCode.SavedCr0End)], ebp
+ and ebp, ~30h ; clear PAE, PSE bits
+ push 10h
+ pop ecx ; ecx <- selector for data segments
+ lgdt [edx + (_16Gdtr - _BackFromUserCode.SavedCr0End)]
+ pushfd ; Save df/if indeed
+ call dword far [edx + (_EntryPoint - _BackFromUserCode.SavedCr0End)]
+ popfd
+ lidt [esp + 36] ; restore protected mode IDTR
+ lea eax, [ebp - IA32_REGS.size] ; eax <- the address of IA32_REGS
+ pop gs
+ pop fs
+ pop es
+ pop ds
+ pop edi
+ pop esi
+ pop ebx
+ pop ebp
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/Wbinvd.asm b/MdePkg/Library/BaseLib/Ia32/Wbinvd.asm
new file mode 100644
index 000000000000..1200101eb0ca
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/Wbinvd.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Wbinvd.Asm
+;
+; Abstract:
+;
+; AsmWbinvd function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .486p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWbinvd (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWbinvd PROC
+ wbinvd
+ ret
+AsmWbinvd ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/Wbinvd.c b/MdePkg/Library/BaseLib/Ia32/Wbinvd.c
new file mode 100644
index 000000000000..16b9cf7baf88
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/Wbinvd.c
@@ -0,0 +1,35 @@
+/** @file
+ AsmWbinvd function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Executes a WBINVD instruction.
+
+ Executes a WBINVD instruction. This function is only available on IA-32 and
+ x64.
+
+**/
+VOID
+EFIAPI
+AsmWbinvd (
+ VOID
+ )
+{
+ _asm {
+ wbinvd
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/Wbinvd.nasm b/MdePkg/Library/BaseLib/Ia32/Wbinvd.nasm
new file mode 100644
index 000000000000..7bdf793ebdf8
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/Wbinvd.nasm
@@ -0,0 +1,37 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Wbinvd.Asm
+;
+; Abstract:
+;
+; AsmWbinvd function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWbinvd (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmWbinvd)
+ASM_PFX(AsmWbinvd):
+ wbinvd
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteCr0.asm b/MdePkg/Library/BaseLib/Ia32/WriteCr0.asm
new file mode 100644
index 000000000000..d61df0eda1b2
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteCr0.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteCr0.Asm
+;
+; Abstract:
+;
+; AsmWriteCr0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteCr0 (
+; UINTN Cr0
+; );
+;------------------------------------------------------------------------------
+AsmWriteCr0 PROC
+ mov eax, [esp + 4]
+ mov cr0, eax
+ ret
+AsmWriteCr0 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteCr0.c b/MdePkg/Library/BaseLib/Ia32/WriteCr0.c
new file mode 100644
index 000000000000..177da8084498
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteCr0.c
@@ -0,0 +1,37 @@
+/** @file
+ AsmWriteCr0 function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+/**
+ Writes a value to Control Register 0 (CR0).
+
+ Writes and returns a new value to CR0. This function is only available on
+ IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
+
+ @param Value The value to write to CR0.
+
+ @return The value written to CR0.
+
+**/
+UINTN
+EFIAPI
+AsmWriteCr0 (
+ UINTN Value
+ )
+{
+ _asm {
+ mov eax, Value
+ mov cr0, eax
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteCr0.nasm b/MdePkg/Library/BaseLib/Ia32/WriteCr0.nasm
new file mode 100644
index 000000000000..0c0ea5cca58f
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteCr0.nasm
@@ -0,0 +1,38 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteCr0.Asm
+;
+; Abstract:
+;
+; AsmWriteCr0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteCr0 (
+; UINTN Cr0
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmWriteCr0)
+ASM_PFX(AsmWriteCr0):
+ mov eax, [esp + 4]
+ mov cr0, eax
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteCr2.asm b/MdePkg/Library/BaseLib/Ia32/WriteCr2.asm
new file mode 100644
index 000000000000..27e355033aaa
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteCr2.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteCr2.Asm
+;
+; Abstract:
+;
+; AsmWriteCr2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteCr2 (
+; UINTN Cr2
+; );
+;------------------------------------------------------------------------------
+AsmWriteCr2 PROC
+ mov eax, [esp + 4]
+ mov cr2, eax
+ ret
+AsmWriteCr2 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteCr2.c b/MdePkg/Library/BaseLib/Ia32/WriteCr2.c
new file mode 100644
index 000000000000..efbdf63e14ab
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteCr2.c
@@ -0,0 +1,37 @@
+/** @file
+ AsmWriteCr2 function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+/**
+ Writes a value to Control Register 2 (CR2).
+
+ Writes and returns a new value to CR2. This function is only available on
+ IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
+
+ @param Value The value to write to CR2.
+
+ @return The value written to CR2.
+
+**/
+UINTN
+EFIAPI
+AsmWriteCr2 (
+ UINTN Value
+ )
+{
+ _asm {
+ mov eax, Value
+ mov cr2, eax
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteCr2.nasm b/MdePkg/Library/BaseLib/Ia32/WriteCr2.nasm
new file mode 100644
index 000000000000..2b7afa812c8d
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteCr2.nasm
@@ -0,0 +1,38 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteCr2.Asm
+;
+; Abstract:
+;
+; AsmWriteCr2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteCr2 (
+; UINTN Cr2
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmWriteCr2)
+ASM_PFX(AsmWriteCr2):
+ mov eax, [esp + 4]
+ mov cr2, eax
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteCr3.asm b/MdePkg/Library/BaseLib/Ia32/WriteCr3.asm
new file mode 100644
index 000000000000..8132253b09ee
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteCr3.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteCr3.Asm
+;
+; Abstract:
+;
+; AsmWriteCr3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteCr3 (
+; UINTN Cr3
+; );
+;------------------------------------------------------------------------------
+AsmWriteCr3 PROC
+ mov eax, [esp + 4]
+ mov cr3, eax
+ ret
+AsmWriteCr3 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteCr3.c b/MdePkg/Library/BaseLib/Ia32/WriteCr3.c
new file mode 100644
index 000000000000..6aeb0f277a01
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteCr3.c
@@ -0,0 +1,37 @@
+/** @file
+ AsmWriteCr3 function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+/**
+ Writes a value to Control Register 3 (CR3).
+
+ Writes and returns a new value to CR3. This function is only available on
+ IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
+
+ @param Value The value to write to CR3.
+
+ @return The value written to CR3.
+
+**/
+UINTN
+EFIAPI
+AsmWriteCr3 (
+ UINTN Value
+ )
+{
+ _asm {
+ mov eax, Value
+ mov cr3, eax
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteCr3.nasm b/MdePkg/Library/BaseLib/Ia32/WriteCr3.nasm
new file mode 100644
index 000000000000..90a22198c200
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteCr3.nasm
@@ -0,0 +1,38 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteCr3.Asm
+;
+; Abstract:
+;
+; AsmWriteCr3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteCr3 (
+; UINTN Cr3
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmWriteCr3)
+ASM_PFX(AsmWriteCr3):
+ mov eax, [esp + 4]
+ mov cr3, eax
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteCr4.asm b/MdePkg/Library/BaseLib/Ia32/WriteCr4.asm
new file mode 100644
index 000000000000..011d511d8043
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteCr4.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteCr4.Asm
+;
+; Abstract:
+;
+; AsmWriteCr4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteCr4 (
+; UINTN Cr4
+; );
+;------------------------------------------------------------------------------
+AsmWriteCr4 PROC
+ mov eax, [esp + 4]
+ mov cr4, eax
+ ret
+AsmWriteCr4 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteCr4.c b/MdePkg/Library/BaseLib/Ia32/WriteCr4.c
new file mode 100644
index 000000000000..f14556462d3a
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteCr4.c
@@ -0,0 +1,39 @@
+/** @file
+ AsmWriteCr4 function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+/**
+ Writes a value to Control Register 4 (CR4).
+
+ Writes and returns a new value to CR4. This function is only available on
+ IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
+
+ @param Value The value to write to CR4.
+
+ @return The value written to CR4.
+
+**/
+UINTN
+EFIAPI
+AsmWriteCr4 (
+ UINTN Value
+ )
+{
+ _asm {
+ mov eax, Value
+ _emit 0x0f // mov cr4, eax
+ _emit 0x22
+ _emit 0xE0
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteCr4.nasm b/MdePkg/Library/BaseLib/Ia32/WriteCr4.nasm
new file mode 100644
index 000000000000..486fe2443084
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteCr4.nasm
@@ -0,0 +1,38 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteCr4.Asm
+;
+; Abstract:
+;
+; AsmWriteCr4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteCr4 (
+; UINTN Cr4
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmWriteCr4)
+ASM_PFX(AsmWriteCr4):
+ mov eax, [esp + 4]
+ mov cr4, eax
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr0.asm b/MdePkg/Library/BaseLib/Ia32/WriteDr0.asm
new file mode 100644
index 000000000000..bd426a8cd3ae
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr0.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr0.Asm
+;
+; Abstract:
+;
+; AsmWriteDr0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr0 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr0 PROC
+ mov eax, [esp + 4]
+ mov dr0, eax
+ ret
+AsmWriteDr0 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr0.c b/MdePkg/Library/BaseLib/Ia32/WriteDr0.c
new file mode 100644
index 000000000000..bd5e10119ac1
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr0.c
@@ -0,0 +1,37 @@
+/** @file
+ AsmWriteDr0 function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+/**
+ Writes a value to Debug Register 0 (DR0).
+
+ Writes and returns a new value to DR0. This function is only available on
+ IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
+
+ @param Value The value to write to Dr0.
+
+ @return The value written to Debug Register 0 (DR0).
+
+**/
+UINTN
+EFIAPI
+AsmWriteDr0 (
+ IN UINTN Value
+ )
+{
+ _asm {
+ mov eax, Value
+ mov dr0, eax
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr0.nasm b/MdePkg/Library/BaseLib/Ia32/WriteDr0.nasm
new file mode 100644
index 000000000000..5c2af942a200
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr0.nasm
@@ -0,0 +1,38 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr0.Asm
+;
+; Abstract:
+;
+; AsmWriteDr0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr0 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmWriteDr0)
+ASM_PFX(AsmWriteDr0):
+ mov eax, [esp + 4]
+ mov dr0, eax
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr1.asm b/MdePkg/Library/BaseLib/Ia32/WriteDr1.asm
new file mode 100644
index 000000000000..accf95b79359
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr1.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr1.Asm
+;
+; Abstract:
+;
+; AsmWriteDr1 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr1 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr1 PROC
+ mov eax, [esp + 4]
+ mov dr1, eax
+ ret
+AsmWriteDr1 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr1.c b/MdePkg/Library/BaseLib/Ia32/WriteDr1.c
new file mode 100644
index 000000000000..695f3460c204
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr1.c
@@ -0,0 +1,37 @@
+/** @file
+ AsmWriteDr1 function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+/**
+ Writes a value to Debug Register 1 (DR1).
+
+ Writes and returns a new value to DR1. This function is only available on
+ IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
+
+ @param Value The value to write to Dr1.
+
+ @return The value written to Debug Register 1 (DR1).
+
+**/
+UINTN
+EFIAPI
+AsmWriteDr1 (
+ IN UINTN Value
+ )
+{
+ _asm {
+ mov eax, Value
+ mov dr1, eax
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr1.nasm b/MdePkg/Library/BaseLib/Ia32/WriteDr1.nasm
new file mode 100644
index 000000000000..a35389e03862
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr1.nasm
@@ -0,0 +1,38 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr1.Asm
+;
+; Abstract:
+;
+; AsmWriteDr1 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr1 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmWriteDr1)
+ASM_PFX(AsmWriteDr1):
+ mov eax, [esp + 4]
+ mov dr1, eax
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr2.asm b/MdePkg/Library/BaseLib/Ia32/WriteDr2.asm
new file mode 100644
index 000000000000..d311fb017f6d
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr2.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr2.Asm
+;
+; Abstract:
+;
+; AsmWriteDr2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr2 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr2 PROC
+ mov eax, [esp + 4]
+ mov dr2, eax
+ ret
+AsmWriteDr2 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr2.c b/MdePkg/Library/BaseLib/Ia32/WriteDr2.c
new file mode 100644
index 000000000000..8a24b94a9b56
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr2.c
@@ -0,0 +1,37 @@
+/** @file
+ AsmWriteDr2 function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+/**
+ Writes a value to Debug Register 2 (DR2).
+
+ Writes and returns a new value to DR2. This function is only available on
+ IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
+
+ @param Value The value to write to Dr2.
+
+ @return The value written to Debug Register 2 (DR2).
+
+**/
+UINTN
+EFIAPI
+AsmWriteDr2 (
+ IN UINTN Value
+ )
+{
+ _asm {
+ mov eax, Value
+ mov dr2, eax
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr2.nasm b/MdePkg/Library/BaseLib/Ia32/WriteDr2.nasm
new file mode 100644
index 000000000000..936cefc8857d
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr2.nasm
@@ -0,0 +1,38 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr2.Asm
+;
+; Abstract:
+;
+; AsmWriteDr2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr2 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmWriteDr2)
+ASM_PFX(AsmWriteDr2):
+ mov eax, [esp + 4]
+ mov dr2, eax
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr3.asm b/MdePkg/Library/BaseLib/Ia32/WriteDr3.asm
new file mode 100644
index 000000000000..59282da5ef36
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr3.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr3.Asm
+;
+; Abstract:
+;
+; AsmWriteDr3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr3 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr3 PROC
+ mov eax, [esp + 4]
+ mov dr3, eax
+ ret
+AsmWriteDr3 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr3.c b/MdePkg/Library/BaseLib/Ia32/WriteDr3.c
new file mode 100644
index 000000000000..3a0921bffa52
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr3.c
@@ -0,0 +1,37 @@
+/** @file
+ AsmWriteDr3 function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+/**
+ Writes a value to Debug Register 3 (DR3).
+
+ Writes and returns a new value to DR3. This function is only available on
+ IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
+
+ @param Value The value to write to Dr3.
+
+ @return The value written to Debug Register 3 (DR3).
+
+**/
+UINTN
+EFIAPI
+AsmWriteDr3 (
+ IN UINTN Value
+ )
+{
+ _asm {
+ mov eax, Value
+ mov dr3, eax
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr3.nasm b/MdePkg/Library/BaseLib/Ia32/WriteDr3.nasm
new file mode 100644
index 000000000000..d7a58cff6401
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr3.nasm
@@ -0,0 +1,38 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr3.Asm
+;
+; Abstract:
+;
+; AsmWriteDr3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr3 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmWriteDr3)
+ASM_PFX(AsmWriteDr3):
+ mov eax, [esp + 4]
+ mov dr3, eax
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr4.asm b/MdePkg/Library/BaseLib/Ia32/WriteDr4.asm
new file mode 100644
index 000000000000..4d61dc7c68b8
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr4.asm
@@ -0,0 +1,48 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr4.Asm
+;
+; Abstract:
+;
+; AsmWriteDr4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr4 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr4 PROC
+ mov eax, [esp + 4]
+ ;
+ ; DR4 is alias to DR6 only if DE (in CR4) is cleared. Otherwise, writing to
+ ; this register will cause a #UD exception.
+ ;
+ ; MS assembler doesn't support this instruction since no one would use it
+ ; under normal circustances. Here opcode is used.
+ ;
+ DB 0fh, 23h, 0e0h
+ ret
+AsmWriteDr4 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr4.c b/MdePkg/Library/BaseLib/Ia32/WriteDr4.c
new file mode 100644
index 000000000000..acfe93f3569d
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr4.c
@@ -0,0 +1,39 @@
+/** @file
+ AsmWriteDr4 function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+/**
+ Writes a value to Debug Register 4 (DR4).
+
+ Writes and returns a new value to DR4. This function is only available on
+ IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
+
+ @param Value The value to write to Dr4.
+
+ @return The value written to Debug Register 4 (DR4).
+
+**/
+UINTN
+EFIAPI
+AsmWriteDr4 (
+ IN UINTN Value
+ )
+{
+ _asm {
+ mov eax, Value
+ _emit 0x0f // mov dr4, eax
+ _emit 0x23
+ _emit 0xe0
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr4.nasm b/MdePkg/Library/BaseLib/Ia32/WriteDr4.nasm
new file mode 100644
index 000000000000..95c6d06315c8
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr4.nasm
@@ -0,0 +1,45 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr4.Asm
+;
+; Abstract:
+;
+; AsmWriteDr4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr4 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmWriteDr4)
+ASM_PFX(AsmWriteDr4):
+ mov eax, [esp + 4]
+ ;
+ ; DR4 is alias to DR6 only if DE (in CR4) is cleared. Otherwise, writing to
+ ; this register will cause a #UD exception.
+ ;
+ ; MS assembler doesn't support this instruction since no one would use it
+ ; under normal circustances. Here opcode is used.
+ ;
+ DB 0xf, 0x23, 0xe0
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr5.asm b/MdePkg/Library/BaseLib/Ia32/WriteDr5.asm
new file mode 100644
index 000000000000..733f59964dc3
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr5.asm
@@ -0,0 +1,48 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr5.Asm
+;
+; Abstract:
+;
+; AsmWriteDr5 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr5 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr5 PROC
+ mov eax, [esp + 4]
+ ;
+ ; DR5 is alias to DR7 only if DE (in CR4) is cleared. Otherwise, writing to
+ ; this register will cause a #UD exception.
+ ;
+ ; MS assembler doesn't support this instruction since no one would use it
+ ; under normal circustances. Here opcode is used.
+ ;
+ DB 0fh, 23h, 0e8h
+ ret
+AsmWriteDr5 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr5.c b/MdePkg/Library/BaseLib/Ia32/WriteDr5.c
new file mode 100644
index 000000000000..4e00cebf9f40
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr5.c
@@ -0,0 +1,39 @@
+/** @file
+ AsmWriteDr5 function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+/**
+ Writes a value to Debug Register 5 (DR5).
+
+ Writes and returns a new value to DR5. This function is only available on
+ IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
+
+ @param Value The value to write to Dr5.
+
+ @return The value written to Debug Register 5 (DR5).
+
+**/
+UINTN
+EFIAPI
+AsmWriteDr5 (
+ IN UINTN Value
+ )
+{
+ _asm {
+ mov eax, Value
+ _emit 0x0f // mov dr5, eax
+ _emit 0x23
+ _emit 0xe8
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr5.nasm b/MdePkg/Library/BaseLib/Ia32/WriteDr5.nasm
new file mode 100644
index 000000000000..a6256eff1918
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr5.nasm
@@ -0,0 +1,45 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr5.Asm
+;
+; Abstract:
+;
+; AsmWriteDr5 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr5 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmWriteDr5)
+ASM_PFX(AsmWriteDr5):
+ mov eax, [esp + 4]
+ ;
+ ; DR5 is alias to DR7 only if DE (in CR4) is cleared. Otherwise, writing to
+ ; this register will cause a #UD exception.
+ ;
+ ; MS assembler doesn't support this instruction since no one would use it
+ ; under normal circustances. Here opcode is used.
+ ;
+ DB 0xf, 0x23, 0xe8
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr6.asm b/MdePkg/Library/BaseLib/Ia32/WriteDr6.asm
new file mode 100644
index 000000000000..132c96015a30
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr6.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr6.Asm
+;
+; Abstract:
+;
+; AsmWriteDr6 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr6 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr6 PROC
+ mov eax, [esp + 4]
+ mov dr6, eax
+ ret
+AsmWriteDr6 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr6.c b/MdePkg/Library/BaseLib/Ia32/WriteDr6.c
new file mode 100644
index 000000000000..29ab48318011
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr6.c
@@ -0,0 +1,37 @@
+/** @file
+ AsmWriteDr6 function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+/**
+ Writes a value to Debug Register 6 (DR6).
+
+ Writes and returns a new value to DR6. This function is only available on
+ IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
+
+ @param Value The value to write to Dr6.
+
+ @return The value written to Debug Register 6 (DR6).
+
+**/
+UINTN
+EFIAPI
+AsmWriteDr6 (
+ IN UINTN Value
+ )
+{
+ _asm {
+ mov eax, Value
+ mov dr6, eax
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr6.nasm b/MdePkg/Library/BaseLib/Ia32/WriteDr6.nasm
new file mode 100644
index 000000000000..75ae84bd2f4d
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr6.nasm
@@ -0,0 +1,38 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr6.Asm
+;
+; Abstract:
+;
+; AsmWriteDr6 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr6 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmWriteDr6)
+ASM_PFX(AsmWriteDr6):
+ mov eax, [esp + 4]
+ mov dr6, eax
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr7.asm b/MdePkg/Library/BaseLib/Ia32/WriteDr7.asm
new file mode 100644
index 000000000000..5978821a53f7
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr7.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr7.Asm
+;
+; Abstract:
+;
+; AsmWriteDr7 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr7 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr7 PROC
+ mov eax, [esp + 4]
+ mov dr7, eax
+ ret
+AsmWriteDr7 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr7.c b/MdePkg/Library/BaseLib/Ia32/WriteDr7.c
new file mode 100644
index 000000000000..aa2286f4e33b
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr7.c
@@ -0,0 +1,37 @@
+/** @file
+ AsmWriteDr7 function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+/**
+ Writes a value to Debug Register 7 (DR7).
+
+ Writes and returns a new value to DR7. This function is only available on
+ IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
+
+ @param Value The value to write to Dr7.
+
+ @return The value written to Debug Register 7 (DR7).
+
+**/
+UINTN
+EFIAPI
+AsmWriteDr7 (
+ IN UINTN Value
+ )
+{
+ _asm {
+ mov eax, Value
+ mov dr7, eax
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr7.nasm b/MdePkg/Library/BaseLib/Ia32/WriteDr7.nasm
new file mode 100644
index 000000000000..06539e342d5d
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr7.nasm
@@ -0,0 +1,38 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr7.Asm
+;
+; Abstract:
+;
+; AsmWriteDr7 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr7 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmWriteDr7)
+ASM_PFX(AsmWriteDr7):
+ mov eax, [esp + 4]
+ mov dr7, eax
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteGdtr.asm b/MdePkg/Library/BaseLib/Ia32/WriteGdtr.asm
new file mode 100644
index 000000000000..c93b634e8fda
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteGdtr.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteGdtr.Asm
+;
+; Abstract:
+;
+; AsmWriteGdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86WriteGdtr (
+; IN CONST IA32_DESCRIPTOR *Idtr
+; );
+;------------------------------------------------------------------------------
+InternalX86WriteGdtr PROC
+ mov eax, [esp + 4]
+ lgdt fword ptr [eax]
+ ret
+InternalX86WriteGdtr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteGdtr.c b/MdePkg/Library/BaseLib/Ia32/WriteGdtr.c
new file mode 100644
index 000000000000..905d585e4a4f
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteGdtr.c
@@ -0,0 +1,39 @@
+/** @file
+ AsmWriteGdtr function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+#include "BaseLibInternals.h"
+
+
+/**
+ Writes the current Global Descriptor Table Register (GDTR) descriptor.
+
+ Writes and the current GDTR descriptor specified by Gdtr. This function is
+ only available on IA-32 and x64.
+
+ @param Gdtr The pointer to a GDTR descriptor.
+
+**/
+VOID
+EFIAPI
+InternalX86WriteGdtr (
+ IN CONST IA32_DESCRIPTOR *Gdtr
+ )
+{
+ _asm {
+ mov eax, Gdtr
+ lgdt fword ptr [eax]
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteGdtr.nasm b/MdePkg/Library/BaseLib/Ia32/WriteGdtr.nasm
new file mode 100644
index 000000000000..4f4f590ab7ea
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteGdtr.nasm
@@ -0,0 +1,38 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteGdtr.Asm
+;
+; Abstract:
+;
+; AsmWriteGdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86WriteGdtr (
+; IN CONST IA32_DESCRIPTOR *Idtr
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(InternalX86WriteGdtr)
+ASM_PFX(InternalX86WriteGdtr):
+ mov eax, [esp + 4]
+ lgdt [eax]
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteIdtr.asm b/MdePkg/Library/BaseLib/Ia32/WriteIdtr.asm
new file mode 100644
index 000000000000..1765b817d14b
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteIdtr.asm
@@ -0,0 +1,44 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteIdtr.Asm
+;
+; Abstract:
+;
+; AsmWriteIdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86WriteIdtr (
+; IN CONST IA32_DESCRIPTOR *Idtr
+; );
+;------------------------------------------------------------------------------
+InternalX86WriteIdtr PROC
+ mov eax, [esp + 4]
+ pushfd
+ cli
+ lidt fword ptr [eax]
+ popfd
+ ret
+InternalX86WriteIdtr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteIdtr.c b/MdePkg/Library/BaseLib/Ia32/WriteIdtr.c
new file mode 100644
index 000000000000..ceef0e83aeff
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteIdtr.c
@@ -0,0 +1,41 @@
+/** @file
+ AsmWriteIdtr function
+
+ Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+#include "BaseLibInternals.h"
+
+/**
+ Writes the current Interrupt Descriptor Table Register(GDTR) descriptor.
+
+ Writes the current IDTR descriptor and returns it in Idtr. This function is
+ only available on IA-32 and x64.
+
+ @param Idtr The pointer to a IDTR descriptor.
+
+**/
+VOID
+EFIAPI
+InternalX86WriteIdtr (
+ IN CONST IA32_DESCRIPTOR *Idtr
+ )
+{
+ _asm {
+ mov eax, Idtr
+ pushfd
+ cli
+ lidt fword ptr [eax]
+ popfd
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteIdtr.nasm b/MdePkg/Library/BaseLib/Ia32/WriteIdtr.nasm
new file mode 100644
index 000000000000..f82f3a8e4f95
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteIdtr.nasm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteIdtr.Asm
+;
+; Abstract:
+;
+; AsmWriteIdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86WriteIdtr (
+; IN CONST IA32_DESCRIPTOR *Idtr
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(InternalX86WriteIdtr)
+ASM_PFX(InternalX86WriteIdtr):
+ mov eax, [esp + 4]
+ pushfd
+ cli
+ lidt [eax]
+ popfd
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteLdtr.asm b/MdePkg/Library/BaseLib/Ia32/WriteLdtr.asm
new file mode 100644
index 000000000000..f5adf84e522e
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteLdtr.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteLdtr.Asm
+;
+; Abstract:
+;
+; AsmWriteLdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteLdtr (
+; IN UINT16 Ldtr
+; );
+;------------------------------------------------------------------------------
+AsmWriteLdtr PROC
+ mov eax, [esp + 4]
+ lldt ax
+ ret
+AsmWriteLdtr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteLdtr.c b/MdePkg/Library/BaseLib/Ia32/WriteLdtr.c
new file mode 100644
index 000000000000..fe9ad0f55e5c
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteLdtr.c
@@ -0,0 +1,39 @@
+/** @file
+ AsmWriteLdtr function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Writes the current Local Descriptor Table Register (GDTR) selector.
+
+ Writes and the current LDTR descriptor specified by Ldtr. This function is
+ only available on IA-32 and x64.
+
+ @param Ldtr 16-bit LDTR selector value.
+
+**/
+VOID
+EFIAPI
+AsmWriteLdtr (
+ IN UINT16 Ldtr
+ )
+{
+ _asm {
+ xor eax, eax
+ mov ax, Ldtr
+ lldt ax
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteLdtr.nasm b/MdePkg/Library/BaseLib/Ia32/WriteLdtr.nasm
new file mode 100644
index 000000000000..e3d9e0d7df8a
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteLdtr.nasm
@@ -0,0 +1,38 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteLdtr.Asm
+;
+; Abstract:
+;
+; AsmWriteLdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteLdtr (
+; IN UINT16 Ldtr
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmWriteLdtr)
+ASM_PFX(AsmWriteLdtr):
+ mov eax, [esp + 4]
+ lldt ax
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm0.asm b/MdePkg/Library/BaseLib/Ia32/WriteMm0.asm
new file mode 100644
index 000000000000..dcb42fdedb4a
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteMm0.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm0.Asm
+;
+; Abstract:
+;
+; AsmWriteMm0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteMm0 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm0 PROC
+ movq mm0, [esp + 4]
+ ret
+AsmWriteMm0 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm0.c b/MdePkg/Library/BaseLib/Ia32/WriteMm0.c
new file mode 100644
index 000000000000..076ccd98fa8d
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteMm0.c
@@ -0,0 +1,38 @@
+/** @file
+ AsmWriteMm0 function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Writes the current value of 64-bit MMX Register #0 (MM0).
+
+ Writes the current value of MM0. This function is only available on IA32 and
+ x64.
+
+ @param Value The 64-bit value to write to MM0.
+
+**/
+VOID
+EFIAPI
+AsmWriteMm0 (
+ IN UINT64 Value
+ )
+{
+ _asm {
+ movq mm0, qword ptr [Value]
+ emms
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm0.nasm b/MdePkg/Library/BaseLib/Ia32/WriteMm0.nasm
new file mode 100644
index 000000000000..c43005bb1eee
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteMm0.nasm
@@ -0,0 +1,37 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm0.Asm
+;
+; Abstract:
+;
+; AsmWriteMm0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteMm0 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmWriteMm0)
+ASM_PFX(AsmWriteMm0):
+ movq mm0, [esp + 4]
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm1.asm b/MdePkg/Library/BaseLib/Ia32/WriteMm1.asm
new file mode 100644
index 000000000000..3e3cdc5696fa
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteMm1.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm1.Asm
+;
+; Abstract:
+;
+; AsmWriteMm1 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteMm1 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm1 PROC
+ movq mm1, [esp + 4]
+ ret
+AsmWriteMm1 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm1.c b/MdePkg/Library/BaseLib/Ia32/WriteMm1.c
new file mode 100644
index 000000000000..dadf7c1fc493
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteMm1.c
@@ -0,0 +1,38 @@
+/** @file
+ AsmWriteMm1 function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Writes the current value of 64-bit MMX Register #1 (MM1).
+
+ Writes the current value of MM1. This function is only available on IA32 and
+ x64.
+
+ @param Value The 64-bit value to write to MM1.
+
+**/
+VOID
+EFIAPI
+AsmWriteMm1 (
+ IN UINT64 Value
+ )
+{
+ _asm {
+ movq mm1, qword ptr [Value]
+ emms
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm1.nasm b/MdePkg/Library/BaseLib/Ia32/WriteMm1.nasm
new file mode 100644
index 000000000000..b3171b64a767
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteMm1.nasm
@@ -0,0 +1,37 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm1.Asm
+;
+; Abstract:
+;
+; AsmWriteMm1 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteMm1 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmWriteMm1)
+ASM_PFX(AsmWriteMm1):
+ movq mm1, [esp + 4]
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm2.asm b/MdePkg/Library/BaseLib/Ia32/WriteMm2.asm
new file mode 100644
index 000000000000..d7c157b722a2
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteMm2.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm2.Asm
+;
+; Abstract:
+;
+; AsmWriteMm2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteMm2 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm2 PROC
+ movq mm2, [esp + 4]
+ ret
+AsmWriteMm2 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm2.c b/MdePkg/Library/BaseLib/Ia32/WriteMm2.c
new file mode 100644
index 000000000000..830a03e15470
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteMm2.c
@@ -0,0 +1,38 @@
+/** @file
+ AsmWriteMm2 function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Writes the current value of 64-bit MMX Register #2 (MM2).
+
+ Writes the current value of MM2. This function is only available on IA32 and
+ x64.
+
+ @param Value The 64-bit value to write to MM2.
+
+**/
+VOID
+EFIAPI
+AsmWriteMm2 (
+ IN UINT64 Value
+ )
+{
+ _asm {
+ movq mm2, qword ptr [Value]
+ emms
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm2.nasm b/MdePkg/Library/BaseLib/Ia32/WriteMm2.nasm
new file mode 100644
index 000000000000..ff7bcee971e7
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteMm2.nasm
@@ -0,0 +1,37 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm2.Asm
+;
+; Abstract:
+;
+; AsmWriteMm2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteMm2 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmWriteMm2)
+ASM_PFX(AsmWriteMm2):
+ movq mm2, [esp + 4]
+ ret
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm3.asm b/MdePkg/Library/BaseLib/Ia32/WriteMm3.asm
new file mode 100644
index 000000000000..236517d65b49
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteMm3.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm3.Asm
+;
+; Abstract:
+;
+; AsmWriteMm3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteMm3 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm3 PROC
+ movq mm3, [esp + 4]
+ ret
+AsmWriteMm3 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm3.c b/MdePkg/Library/BaseLib/Ia32/WriteMm3.c
new file mode 100644
index 000000000000..c9c6476faa72
--- /dev/null
+++ b/