aboutsummaryrefslogtreecommitdiffstats
path: root/MdePkg/Library/BaseIoLibIntrinsic
diff options
context:
space:
mode:
Diffstat (limited to 'MdePkg/Library/BaseIoLibIntrinsic')
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/AArch64/ArmVirtMmio.S142
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/AArch64/ArmVirtMmio.asm143
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.S141
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.asm145
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf37
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.uni7
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.inf46
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.uni17
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicInternal.h7
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicSev.inf52
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.asm141
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm8
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifoSev.nasm293
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/IoHighLevel.c48
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/IoLib.c32
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/IoLibArmVirt.c (renamed from MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c)607
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c8
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c22
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/IoLibIcc.c214
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/IoLibMmioBuffer.c120
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/IoLibMsc.c16
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c (renamed from MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c)14
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.asm127
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm8
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifoSev.nasm282
25 files changed, 1683 insertions, 994 deletions
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/AArch64/ArmVirtMmio.S b/MdePkg/Library/BaseIoLibIntrinsic/AArch64/ArmVirtMmio.S
new file mode 100644
index 000000000000..34aaba8e4f60
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/AArch64/ArmVirtMmio.S
@@ -0,0 +1,142 @@
+#
+# Copyright (c) 2014-2018, Linaro Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+
+.text
+.align 3
+
+GCC_ASM_EXPORT(MmioRead8Internal)
+GCC_ASM_EXPORT(MmioWrite8Internal)
+GCC_ASM_EXPORT(MmioRead16Internal)
+GCC_ASM_EXPORT(MmioWrite16Internal)
+GCC_ASM_EXPORT(MmioRead32Internal)
+GCC_ASM_EXPORT(MmioWrite32Internal)
+GCC_ASM_EXPORT(MmioRead64Internal)
+GCC_ASM_EXPORT(MmioWrite64Internal)
+
+//
+// Reads an 8-bit MMIO register.
+//
+// Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
+// returned. This function must guarantee that all MMIO read and write
+// operations are serialized.
+//
+// @param Address The MMIO register to read.
+//
+// @return The value read.
+//
+ASM_PFX(MmioRead8Internal):
+ ldrb w0, [x0]
+ dmb ld
+ ret
+
+//
+// Writes an 8-bit MMIO register.
+//
+// Writes the 8-bit MMIO register specified by Address with the value specified
+// by Value and returns Value. This function must guarantee that all MMIO read
+// and write operations are serialized.
+//
+// @param Address The MMIO register to write.
+// @param Value The value to write to the MMIO register.
+//
+ASM_PFX(MmioWrite8Internal):
+ dmb st
+ strb w1, [x0]
+ ret
+
+//
+// Reads a 16-bit MMIO register.
+//
+// Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
+// returned. This function must guarantee that all MMIO read and write
+// operations are serialized.
+//
+// @param Address The MMIO register to read.
+//
+// @return The value read.
+//
+ASM_PFX(MmioRead16Internal):
+ ldrh w0, [x0]
+ dmb ld
+ ret
+
+//
+// Writes a 16-bit MMIO register.
+//
+// Writes the 16-bit MMIO register specified by Address with the value specified
+// by Value and returns Value. This function must guarantee that all MMIO read
+// and write operations are serialized.
+//
+// @param Address The MMIO register to write.
+// @param Value The value to write to the MMIO register.
+//
+ASM_PFX(MmioWrite16Internal):
+ dmb st
+ strh w1, [x0]
+ ret
+
+//
+// Reads a 32-bit MMIO register.
+//
+// Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
+// returned. This function must guarantee that all MMIO read and write
+// operations are serialized.
+//
+// @param Address The MMIO register to read.
+//
+// @return The value read.
+//
+ASM_PFX(MmioRead32Internal):
+ ldr w0, [x0]
+ dmb ld
+ ret
+
+//
+// Writes a 32-bit MMIO register.
+//
+// Writes the 32-bit MMIO register specified by Address with the value specified
+// by Value and returns Value. This function must guarantee that all MMIO read
+// and write operations are serialized.
+//
+// @param Address The MMIO register to write.
+// @param Value The value to write to the MMIO register.
+//
+ASM_PFX(MmioWrite32Internal):
+ dmb st
+ str w1, [x0]
+ ret
+
+//
+// Reads a 64-bit MMIO register.
+//
+// Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
+// returned. This function must guarantee that all MMIO read and write
+// operations are serialized.
+//
+// @param Address The MMIO register to read.
+//
+// @return The value read.
+//
+ASM_PFX(MmioRead64Internal):
+ ldr x0, [x0]
+ dmb ld
+ ret
+
+//
+// Writes a 64-bit MMIO register.
+//
+// Writes the 64-bit MMIO register specified by Address with the value specified
+// by Value and returns Value. This function must guarantee that all MMIO read
+// and write operations are serialized.
+//
+// @param Address The MMIO register to write.
+// @param Value The value to write to the MMIO register.
+//
+ASM_PFX(MmioWrite64Internal):
+ dmb st
+ str x1, [x0]
+ ret
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/AArch64/ArmVirtMmio.asm b/MdePkg/Library/BaseIoLibIntrinsic/AArch64/ArmVirtMmio.asm
new file mode 100644
index 000000000000..32771ec63b96
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/AArch64/ArmVirtMmio.asm
@@ -0,0 +1,143 @@
+;
+; Copyright (c) 2014-2018, Linaro Limited. All rights reserved.
+;
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+
+
+AREA IoLibMmio, CODE, READONLY
+
+EXPORT MmioRead8Internal
+EXPORT MmioWrite8Internal
+EXPORT MmioRead16Internal
+EXPORT MmioWrite16Internal
+EXPORT MmioRead32Internal
+EXPORT MmioWrite32Internal
+EXPORT MmioRead64Internal
+EXPORT MmioWrite64Internal
+
+;
+; Reads an 8-bit MMIO register.
+;
+; Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
+; returned. This function must guarantee that all MMIO read and write
+; operations are serialized.
+;
+; @param Address The MMIO register to read.
+;
+; @return The value read.
+;
+MmioRead8Internal
+ ldrb w0, [x0]
+ dmb ld
+ ret
+
+;
+; Writes an 8-bit MMIO register.
+;
+; Writes the 8-bit MMIO register specified by Address with the value specified
+; by Value and returns Value. This function must guarantee that all MMIO read
+; and write operations are serialized.
+;
+; @param Address The MMIO register to write.
+; @param Value The value to write to the MMIO register.
+;
+MmioWrite8Internal
+ dmb st
+ strb w1, [x0]
+ ret
+
+;
+; Reads a 16-bit MMIO register.
+;
+; Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
+; returned. This function must guarantee that all MMIO read and write
+; operations are serialized.
+;
+; @param Address The MMIO register to read.
+;
+; @return The value read.
+;
+MmioRead16Internal
+ ldrh w0, [x0]
+ dmb ld
+ ret
+
+;
+; Writes a 16-bit MMIO register.
+;
+; Writes the 16-bit MMIO register specified by Address with the value specified
+; by Value and returns Value. This function must guarantee that all MMIO read
+; and write operations are serialized.
+;
+; @param Address The MMIO register to write.
+; @param Value The value to write to the MMIO register.
+;
+MmioWrite16Internal
+ dmb st
+ strh w1, [x0]
+ ret
+
+;
+; Reads a 32-bit MMIO register.
+;
+; Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
+; returned. This function must guarantee that all MMIO read and write
+; operations are serialized.
+;
+; @param Address The MMIO register to read.
+;
+; @return The value read.
+;
+MmioRead32Internal
+ ldr w0, [x0]
+ dmb ld
+ ret
+
+;
+; Writes a 32-bit MMIO register.
+;
+; Writes the 32-bit MMIO register specified by Address with the value specified
+; by Value and returns Value. This function must guarantee that all MMIO read
+; and write operations are serialized.
+;
+; @param Address The MMIO register to write.
+; @param Value The value to write to the MMIO register.
+;
+MmioWrite32Internal
+ dmb st
+ str w1, [x0]
+ ret
+
+;
+; Reads a 64-bit MMIO register.
+;
+; Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
+; returned. This function must guarantee that all MMIO read and write
+; operations are serialized.
+;
+; @param Address The MMIO register to read.
+;
+; @return The value read.
+;
+MmioRead64Internal
+ ldr x0, [x0]
+ dmb ld
+ ret
+
+;
+; Writes a 64-bit MMIO register.
+;
+; Writes the 64-bit MMIO register specified by Address with the value specified
+; by Value and returns Value. This function must guarantee that all MMIO read
+; and write operations are serialized.
+;
+; @param Address The MMIO register to write.
+; @param Value The value to write to the MMIO register.
+;
+MmioWrite64Internal
+ dmb st
+ str x1, [x0]
+ ret
+
+ END
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.S b/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.S
new file mode 100644
index 000000000000..0bc606285171
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.S
@@ -0,0 +1,141 @@
+#
+# Copyright (c) 2014-2018, Linaro Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+
+GCC_ASM_EXPORT(MmioRead8Internal)
+GCC_ASM_EXPORT(MmioWrite8Internal)
+GCC_ASM_EXPORT(MmioRead16Internal)
+GCC_ASM_EXPORT(MmioWrite16Internal)
+GCC_ASM_EXPORT(MmioRead32Internal)
+GCC_ASM_EXPORT(MmioWrite32Internal)
+GCC_ASM_EXPORT(MmioRead64Internal)
+GCC_ASM_EXPORT(MmioWrite64Internal)
+
+//
+// Reads an 8-bit MMIO register.
+//
+// Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
+// returned. This function must guarantee that all MMIO read and write
+// operations are serialized.
+//
+// @param Address The MMIO register to read.
+//
+// @return The value read.
+//
+ASM_PFX(MmioRead8Internal):
+ ldrb r0, [r0]
+ dmb
+ bx lr
+
+//
+// Writes an 8-bit MMIO register.
+//
+// Writes the 8-bit MMIO register specified by Address with the value specified
+// by Value and returns Value. This function must guarantee that all MMIO read
+// and write operations are serialized.
+//
+// @param Address The MMIO register to write.
+// @param Value The value to write to the MMIO register.
+//
+ASM_PFX(MmioWrite8Internal):
+ dmb st
+ strb r1, [r0]
+ bx lr
+
+//
+// Reads a 16-bit MMIO register.
+//
+// Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
+// returned. This function must guarantee that all MMIO read and write
+// operations are serialized.
+//
+// @param Address The MMIO register to read.
+//
+// @return The value read.
+//
+ASM_PFX(MmioRead16Internal):
+ ldrh r0, [r0]
+ dmb
+ bx lr
+
+//
+// Writes a 16-bit MMIO register.
+//
+// Writes the 16-bit MMIO register specified by Address with the value specified
+// by Value and returns Value. This function must guarantee that all MMIO read
+// and write operations are serialized.
+//
+// @param Address The MMIO register to write.
+// @param Value The value to write to the MMIO register.
+//
+ASM_PFX(MmioWrite16Internal):
+ dmb st
+ strh r1, [r0]
+ bx lr
+
+//
+// Reads a 32-bit MMIO register.
+//
+// Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
+// returned. This function must guarantee that all MMIO read and write
+// operations are serialized.
+//
+// @param Address The MMIO register to read.
+//
+// @return The value read.
+//
+ASM_PFX(MmioRead32Internal):
+ ldr r0, [r0]
+ dmb
+ bx lr
+
+//
+// Writes a 32-bit MMIO register.
+//
+// Writes the 32-bit MMIO register specified by Address with the value specified
+// by Value and returns Value. This function must guarantee that all MMIO read
+// and write operations are serialized.
+//
+// @param Address The MMIO register to write.
+// @param Value The value to write to the MMIO register.
+//
+ASM_PFX(MmioWrite32Internal):
+ dmb st
+ str r1, [r0]
+ bx lr
+
+//
+// Reads a 64-bit MMIO register.
+//
+// Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
+// returned. This function must guarantee that all MMIO read and write
+// operations are serialized.
+//
+// @param Address The MMIO register to read.
+//
+// @return The value read.
+//
+ASM_PFX(MmioRead64Internal):
+ ldr r1, [r0, #4]
+ ldr r0, [r0]
+ dmb
+ bx lr
+
+//
+// Writes a 64-bit MMIO register.
+//
+// Writes the 64-bit MMIO register specified by Address with the value specified
+// by Value and returns Value. This function must guarantee that all MMIO read
+// and write operations are serialized.
+//
+// @param Address The MMIO register to write.
+// @param Value The value to write to the MMIO register.
+//
+ASM_PFX(MmioWrite64Internal):
+ dmb st
+ str r2, [r0]
+ str r3, [r0, #4]
+ bx lr
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.asm b/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.asm
new file mode 100644
index 000000000000..93fe59b3cd46
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.asm
@@ -0,0 +1,145 @@
+;
+; Copyright (c) 2014-2018, Linaro Limited. All rights reserved.
+;
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+
+
+AREA IoLibMmio, CODE, READONLY
+
+EXPORT MmioRead8Internal
+EXPORT MmioWrite8Internal
+EXPORT MmioRead16Internal
+EXPORT MmioWrite16Internal
+EXPORT MmioRead32Internal
+EXPORT MmioWrite32Internal
+EXPORT MmioRead64Internal
+EXPORT MmioWrite64Internal
+
+;
+; Reads an 8-bit MMIO register.
+;
+; Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
+; returned. This function must guarantee that all MMIO read and write
+; operations are serialized.
+;
+; @param Address The MMIO register to read.
+;
+; @return The value read.
+;
+MmioRead8Internal
+ ldrb r0, [r0]
+ dmb
+ bx lr
+
+;
+; Writes an 8-bit MMIO register.
+;
+; Writes the 8-bit MMIO register specified by Address with the value specified
+; by Value and returns Value. This function must guarantee that all MMIO read
+; and write operations are serialized.
+;
+; @param Address The MMIO register to write.
+; @param Value The value to write to the MMIO register.
+;
+MmioWrite8Internal
+ dmb st
+ strb r1, [r0]
+ bx lr
+
+;
+; Reads a 16-bit MMIO register.
+;
+; Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
+; returned. This function must guarantee that all MMIO read and write
+; operations are serialized.
+;
+; @param Address The MMIO register to read.
+;
+; @return The value read.
+;
+MmioRead16Internal
+ ldrh r0, [r0]
+ dmb
+ bx lr
+
+;
+; Writes a 16-bit MMIO register.
+;
+; Writes the 16-bit MMIO register specified by Address with the value specified
+; by Value and returns Value. This function must guarantee that all MMIO read
+; and write operations are serialized.
+;
+; @param Address The MMIO register to write.
+; @param Value The value to write to the MMIO register.
+;
+MmioWrite16Internal
+ dmb st
+ strh r1, [r0]
+ bx lr
+
+;
+; Reads a 32-bit MMIO register.
+;
+; Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
+; returned. This function must guarantee that all MMIO read and write
+; operations are serialized.
+;
+; @param Address The MMIO register to read.
+;
+; @return The value read.
+;
+MmioRead32Internal
+ ldr r0, [r0]
+ dmb
+ bx lr
+
+;
+; Writes a 32-bit MMIO register.
+;
+; Writes the 32-bit MMIO register specified by Address with the value specified
+; by Value and returns Value. This function must guarantee that all MMIO read
+; and write operations are serialized.
+;
+; @param Address The MMIO register to write.
+; @param Value The value to write to the MMIO register.
+;
+MmioWrite32Internal
+ dmb st
+ str r1, [r0]
+ bx lr
+
+;
+; Reads a 64-bit MMIO register.
+;
+; Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
+; returned. This function must guarantee that all MMIO read and write
+; operations are serialized.
+;
+; @param Address The MMIO register to read.
+;
+; @return The value read.
+;
+MmioRead64Internal
+ ldr r1, [r0, #4]
+ ldr r0, [r0]
+ dmb
+ bx lr
+
+;
+; Writes a 64-bit MMIO register.
+;
+; Writes the 64-bit MMIO register specified by Address with the value specified
+; by Value and returns Value. This function must guarantee that all MMIO read
+; and write operations are serialized.
+;
+; @param Address The MMIO register to write.
+; @param Value The value to write to the MMIO register.
+;
+MmioWrite64Internal
+ dmb st
+ str r2, [r0]
+ str r3, [r0, #4]
+ bx lr
+
+ END
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
index f41c4a4c715f..ede0e8e6ae0f 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
+++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
@@ -4,18 +4,15 @@
# I/O Library that uses compiler intrinsics to perform IN and OUT instructions
# for IA-32 and x64. On IPF, I/O port requests are translated into MMIO requests.
# MMIO requests are forwarded directly to memory. For EBC, I/O port requests
-# ASSERT().
+# ASSERT(). For ARM, AARCH64 and RISCV64, this I/O library only provides non I/O
+# read and write.
#
-# Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
# Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+# Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -26,11 +23,11 @@
FILE_GUID = 926c9cd0-4bb8-479b-9ac4-8a2a23f85307
MODULE_TYPE = BASE
VERSION_STRING = 1.0
- LIBRARY_CLASS = IoLib
+ LIBRARY_CLASS = IoLib
#
-# VALID_ARCHITECTURES = IA32 X64 EBC IPF ARM AARCH64
+# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64
#
[Sources]
@@ -41,31 +38,27 @@
[Sources.IA32]
IoLibGcc.c | GCC
IoLibMsc.c | MSFT
- IoLibIcc.c | INTEL
IoLib.c
Ia32/IoFifo.nasm
- Ia32/IoFifo.asm
[Sources.X64]
IoLibGcc.c | GCC
IoLibMsc.c | MSFT
- IoLibIcc.c | INTEL
IoLib.c
X64/IoFifo.nasm
- X64/IoFifo.asm
[Sources.EBC]
IoLibEbc.c
IoLib.c
-[Sources.IPF]
- IoLibIpf.c
-
[Sources.ARM]
- IoLibArm.c
+ IoLibNoIo.c
[Sources.AARCH64]
- IoLibArm.c
+ IoLibNoIo.c
+
+[Sources.RISCV64]
+ IoLibNoIo.c
[Packages]
MdePkg/MdePkg.dec
@@ -74,9 +67,3 @@
DebugLib
BaseLib
-[LibraryClasses.IPF]
- PcdLib
-
-[Pcd.IPF]
- gEfiMdePkgTokenSpaceGuid.PcdIoBlockBaseAddressForIpf ## SOMETIMES_CONSUMES
-
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.uni b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.uni
index 3696eda9b6af..955e21633d0d 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.uni
+++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.uni
@@ -8,12 +8,7 @@
// Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
// Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php.
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+// SPDX-License-Identifier: BSD-2-Clause-Patent
//
// **/
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.inf b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.inf
new file mode 100644
index 000000000000..d97050df163a
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.inf
@@ -0,0 +1,46 @@
+## @file
+# Instance of I/O Library using KVM/ARM safe assembler routines
+#
+# Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>
+# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+# Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+# Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001A
+ BASE_NAME = BaseIoLibIntrinsicArmVirt
+ MODULE_UNI_FILE = BaseIoLibIntrinsicArmVirt.uni
+ FILE_GUID = 217102b4-b465-4a1d-a2de-93dd385ec480
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = IoLib
+
+#
+# VALID_ARCHITECTURES = ARM AARCH64
+#
+
+[Sources]
+ IoLibMmioBuffer.c
+ BaseIoLibIntrinsicInternal.h
+ IoHighLevel.c
+
+[Sources.ARM]
+ IoLibArmVirt.c
+ Arm/ArmVirtMmio.S | GCC
+ Arm/ArmVirtMmio.asm | RVCT
+
+[Sources.AARCH64]
+ IoLibArmVirt.c
+ AArch64/ArmVirtMmio.S | GCC
+ AArch64/ArmVirtMmio.asm | MSFT
+
+[Packages]
+ MdePkg/MdePkg.dec
+
+[LibraryClasses]
+ DebugLib
+ BaseLib
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.uni b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.uni
new file mode 100644
index 000000000000..1104094d659c
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.uni
@@ -0,0 +1,17 @@
+// /** @file
+// Instance of I/O Library using KVM/ARM safe assembler routines
+//
+// Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>
+// Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+// Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+// Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+
+#string STR_MODULE_ABSTRACT #language en-US "Instance of I/O Library using KVM/ARM safe assembler routines"
+
+#string STR_MODULE_DESCRIPTION #language en-US "I/O Library that uses assembler routines to perform MMIO accesses, to prevent link time code generation under LTO from emitting instructions that KVM on ARM cannot deal with."
+
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicInternal.h b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicInternal.h
index 9b20df0b6926..1e709ce3e9ce 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicInternal.h
+++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicInternal.h
@@ -4,12 +4,7 @@
This file includes package header files, dependent library classes.
Copyright (c) 2007 - 2008, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __BASEIOLIB_INTRINSIC_INTERNAL_H_
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicSev.inf b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicSev.inf
new file mode 100644
index 000000000000..84fdf6adb79c
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicSev.inf
@@ -0,0 +1,52 @@
+## @file
+# Instance of I/O Library using compiler intrinsics.
+#
+# I/O Library that uses compiler intrinsics to perform IN and OUT instructions
+# for IA-32 and x64.
+#
+# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
+# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+# Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = BaseIoLibIntrinsicSev
+ MODULE_UNI_FILE = BaseIoLibIntrinsic.uni
+ FILE_GUID = 93742f95-6e71-4581-b600-8e1da443f95a
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = IoLib
+
+
+#
+# VALID_ARCHITECTURES = IA32 X64
+#
+
+[Sources]
+ IoLibMmioBuffer.c
+ BaseIoLibIntrinsicInternal.h
+ IoHighLevel.c
+
+[Sources.IA32]
+ IoLibGcc.c | GCC
+ IoLibMsc.c | MSFT
+ IoLib.c
+ Ia32/IoFifoSev.nasm
+
+[Sources.X64]
+ IoLibGcc.c | GCC
+ IoLibMsc.c | MSFT
+ IoLib.c
+ X64/IoFifoSev.nasm
+
+[Packages]
+ MdePkg/MdePkg.dec
+
+[LibraryClasses]
+ DebugLib
+ BaseLib
+
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.asm b/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.asm
deleted file mode 100644
index 729880d62914..000000000000
--- a/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.asm
+++ /dev/null
@@ -1,141 +0,0 @@
-;------------------------------------------------------------------------------
-;
-; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
-; Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
-;
-; This program and the accompanying materials are licensed and made available
-; under the terms and conditions of the BSD License which accompanies this
-; distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
- .586P
- .model flat,C
- .code
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo8 (
-; IN UINTN Port,
-; IN UINTN Size,
-; OUT VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-IoReadFifo8 PROC
- push edi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov edi, [esp + 16]
-rep insb
- pop edi
- ret
-IoReadFifo8 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo16 (
-; IN UINTN Port,
-; IN UINTN Size,
-; OUT VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-IoReadFifo16 PROC
- push edi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov edi, [esp + 16]
-rep insw
- pop edi
- ret
-IoReadFifo16 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo32 (
-; IN UINTN Port,
-; IN UINTN Size,
-; OUT VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-IoReadFifo32 PROC
- push edi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov edi, [esp + 16]
-rep insd
- pop edi
- ret
-IoReadFifo32 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo8 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-IoWriteFifo8 PROC
- push esi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov esi, [esp + 16]
-rep outsb
- pop esi
- ret
-IoWriteFifo8 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo16 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-IoWriteFifo16 PROC
- push esi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov esi, [esp + 16]
-rep outsw
- pop esi
- ret
-IoWriteFifo16 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo32 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-IoWriteFifo32 PROC
- push esi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov esi, [esp + 16]
-rep outsd
- pop esi
- ret
-IoWriteFifo32 ENDP
-
- END
-
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm b/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm
index 102bbb865448..554585733049 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm
+++ b/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm
@@ -3,13 +3,7 @@
; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
;
-; This program and the accompanying materials are licensed and made available
-; under the terms and conditions of the BSD License which accompanies this
-; distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+; SPDX-License-Identifier: BSD-2-Clause-Patent
;
;------------------------------------------------------------------------------
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifoSev.nasm b/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifoSev.nasm
new file mode 100644
index 000000000000..3a7a25bb2716
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifoSev.nasm
@@ -0,0 +1,293 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+;
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; Check whether we need to unroll the String I/O under SEV guest
+;
+; Return // eax (1 - unroll, 0 - no unroll)
+;------------------------------------------------------------------------------
+global ASM_PFX(SevNoRepIo)
+ASM_PFX(SevNoRepIo):
+
+ ; CPUID clobbers ebx, ecx and edx
+ push ebx
+ push ecx
+ push edx
+
+ ; Check if we are running under hypervisor
+ ; CPUID(1).ECX Bit 31
+ mov eax, 1
+ cpuid
+ bt ecx, 31
+ jnc @UseRepIo
+
+ ; Check if we have Memory encryption CPUID leaf
+ mov eax, 0x80000000
+ cpuid
+ cmp eax, 0x8000001f
+ jl @UseRepIo
+
+ ; Check for memory encryption feature:
+ ; CPUID Fn8000_001F[EAX] - Bit 1
+ ;
+ mov eax, 0x8000001f
+ cpuid
+ bt eax, 1
+ jnc @UseRepIo
+
+ ; Check if memory encryption is enabled
+ ; MSR_0xC0010131 - Bit 0 (SEV enabled)
+ ; MSR_0xC0010131 - Bit 1 (SEV-ES enabled)
+ mov ecx, 0xc0010131
+ rdmsr
+
+ ; Check for (SevEsEnabled == 0 && SevEnabled == 1)
+ and eax, 3
+ cmp eax, 1
+ je @SevNoRepIo_Done
+
+@UseRepIo:
+ xor eax, eax
+
+@SevNoRepIo_Done:
+ pop edx
+ pop ecx
+ pop ebx
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo8 (
+; IN UINTN Port,
+; IN UINTN Size,
+; OUT VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo8)
+ASM_PFX(IoReadFifo8):
+ push edi
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov edi, [esp + 16]
+
+ ; Check if we need to unroll String I/O
+ call ASM_PFX(SevNoRepIo)
+ test eax, eax
+ jnz @IoReadFifo8_NoRep
+
+ cld
+ rep insb
+ jmp @IoReadFifo8_Done
+
+@IoReadFifo8_NoRep:
+ jecxz @IoReadFifo8_Done
+
+@IoReadFifo8_Loop:
+ in al, dx
+ mov byte [edi], al
+ inc edi
+ loop @IoReadFifo8_Loop
+
+@IoReadFifo8_Done:
+ pop edi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo16 (
+; IN UINTN Port,
+; IN UINTN Size,
+; OUT VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo16)
+ASM_PFX(IoReadFifo16):
+ push edi
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov edi, [esp + 16]
+
+ ; Check if we need to unroll String I/O
+ call ASM_PFX(SevNoRepIo)
+ test eax, eax
+ jnz @IoReadFifo16_NoRep
+
+ cld
+ rep insw
+ jmp @IoReadFifo16_Done
+
+@IoReadFifo16_NoRep:
+ jecxz @IoReadFifo16_Done
+
+@IoReadFifo16_Loop:
+ in ax, dx
+ mov word [edi], ax
+ add edi, 2
+ loop @IoReadFifo16_Loop
+
+@IoReadFifo16_Done:
+ pop edi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo32 (
+; IN UINTN Port,
+; IN UINTN Size,
+; OUT VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo32)
+ASM_PFX(IoReadFifo32):
+ push edi
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov edi, [esp + 16]
+
+ ; Check if we need to unroll String I/O
+ call ASM_PFX(SevNoRepIo)
+ test eax, eax
+ jnz @IoReadFifo32_NoRep
+
+ cld
+ rep insd
+ jmp @IoReadFifo32_Done
+
+@IoReadFifo32_NoRep:
+ jecxz @IoReadFifo32_Done
+
+@IoReadFifo32_Loop:
+ in eax, dx
+ mov dword [edi], eax
+ add edi, 4
+ loop @IoReadFifo32_Loop
+
+@IoReadFifo32_Done:
+ pop edi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo8 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo8)
+ASM_PFX(IoWriteFifo8):
+ push esi
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov esi, [esp + 16]
+
+ ; Check if we need to unroll String I/O
+ call ASM_PFX(SevNoRepIo)
+ test eax, eax
+ jnz @IoWriteFifo8_NoRep
+
+ cld
+ rep outsb
+ jmp @IoWriteFifo8_Done
+
+@IoWriteFifo8_NoRep:
+ jecxz @IoWriteFifo8_Done
+
+@IoWriteFifo8_Loop:
+ mov al, byte [esi]
+ out dx, al
+ inc esi
+ loop @IoWriteFifo8_Loop
+
+@IoWriteFifo8_Done:
+ pop esi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo16 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo16)
+ASM_PFX(IoWriteFifo16):
+ push esi
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov esi, [esp + 16]
+
+ ; Check if we need to unroll String I/O
+ call ASM_PFX(SevNoRepIo)
+ test eax, eax
+ jnz @IoWriteFifo16_NoRep
+
+ cld
+ rep outsw
+ jmp @IoWriteFifo16_Done
+
+@IoWriteFifo16_NoRep:
+ jecxz @IoWriteFifo16_Done
+
+@IoWriteFifo16_Loop:
+ mov ax, word [esi]
+ out dx, ax
+ add esi, 2
+ loop @IoWriteFifo16_Loop
+
+@IoWriteFifo16_Done:
+ pop esi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo32 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo32)
+ASM_PFX(IoWriteFifo32):
+ push esi
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov esi, [esp + 16]
+
+ ; Check if we need to unroll String I/O
+ call ASM_PFX(SevNoRepIo)
+ test eax, eax
+ jnz @IoWriteFifo32_NoRep
+
+ cld
+ rep outsd
+ jmp @IoWriteFifo32_Done
+
+@IoWriteFifo32_NoRep:
+ jecxz @IoWriteFifo32_Done
+
+@IoWriteFifo32_Loop:
+ mov eax, dword [esi]
+ out dx, eax
+ add esi, 4
+ loop @IoWriteFifo32_Loop
+
+@IoWriteFifo32_Done:
+ pop esi
+ ret
+
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoHighLevel.c b/MdePkg/Library/BaseIoLibIntrinsic/IoHighLevel.c
index 8a03e33934fe..ff54bf7e5e94 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/IoHighLevel.c
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoHighLevel.c
@@ -4,14 +4,8 @@
All assertions for bit field operations are handled bit field functions in the
Base Library.
- Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
The following IoLib instances contain the same copy of this file:
@@ -80,7 +74,7 @@ IoAnd8 (
}
/**
- Reads an 8-bit I/O port, performs a bitwise AND followed by a bitwise
+ Reads an 8-bit I/O port, performs a bitwise AND followed by a bitwise
OR, and writes the result back to the 8-bit I/O port.
Reads the 8-bit I/O port specified by Port, performs a bitwise AND between
@@ -146,7 +140,7 @@ IoBitFieldRead8 (
Writes Value to the bit field of the I/O register. The bit field is specified
by the StartBit and the EndBit. All other bits in the destination I/O
- register are preserved. The value written to the I/O port is returned.
+ register are preserved. The value written to the I/O port is returned.
If 8-bit I/O port operations are not supported, then ASSERT().
If StartBit is greater than 7, then ASSERT().
@@ -348,7 +342,7 @@ IoOr16 (
If 16-bit I/O port operations are not supported, then ASSERT().
If Port is not aligned on a 16-bit boundary, then ASSERT().
-
+
@param Port The I/O port to write.
@param AndData The value to AND with the read value from the I/O port.
@@ -366,7 +360,7 @@ IoAnd16 (
}
/**
- Reads a 16-bit I/O port, performs a bitwise AND followed by a bitwise
+ Reads a 16-bit I/O port, performs a bitwise AND followed by a bitwise
OR, and writes the result back to the 16-bit I/O port.
Reads the 16-bit I/O port specified by Port, performs a bitwise AND between
@@ -378,7 +372,7 @@ IoAnd16 (
If 16-bit I/O port operations are not supported, then ASSERT().
If Port is not aligned on a 16-bit boundary, then ASSERT().
-
+
@param Port The I/O port to write.
@param AndData The value to AND with the read value from the I/O port.
@param OrData The value to OR with the result of the AND operation.
@@ -659,7 +653,7 @@ IoAnd32 (
}
/**
- Reads a 32-bit I/O port, performs a bitwise AND followed by a bitwise
+ Reads a 32-bit I/O port, performs a bitwise AND followed by a bitwise
OR, and writes the result back to the 32-bit I/O port.
Reads the 32-bit I/O port specified by Port, performs a bitwise AND between
@@ -952,7 +946,7 @@ IoAnd64 (
}
/**
- Reads a 64-bit I/O port, performs a bitwise AND followed by a bitwise
+ Reads a 64-bit I/O port, performs a bitwise AND followed by a bitwise
OR, and writes the result back to the 64-bit I/O port.
Reads the 64-bit I/O port specified by Port, performs a bitwise AND between
@@ -1190,7 +1184,7 @@ IoBitFieldAndThenOr64 (
Reads an 8-bit MMIO register, performs a bitwise OR, and writes the
result back to the 8-bit MMIO register.
- Reads the 8-bit MMIO register specified by Address, performs a bitwise
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise
OR between the read result and the value specified by OrData, and
writes the result to the 8-bit MMIO register specified by Address. The value
written to the MMIO register is returned. This function must guarantee that
@@ -1243,7 +1237,7 @@ MmioAnd8 (
}
/**
- Reads an 8-bit MMIO register, performs a bitwise AND followed by a bitwise
+ Reads an 8-bit MMIO register, performs a bitwise AND followed by a bitwise
OR, and writes the result back to the 8-bit MMIO register.
Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
@@ -1347,7 +1341,7 @@ MmioBitFieldWrite8 (
Reads a bit field in an 8-bit MMIO register, performs a bitwise OR, and
writes the result back to the bit field in the 8-bit MMIO register.
- Reads the 8-bit MMIO register specified by Address, performs a bitwise
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise
OR between the read result and the value specified by OrData, and
writes the result to the 8-bit MMIO register specified by Address. The value
written to the MMIO register is returned. This function must guarantee that
@@ -1477,7 +1471,7 @@ MmioBitFieldAndThenOr8 (
Reads a 16-bit MMIO register, performs a bitwise OR, and writes the
result back to the 16-bit MMIO register.
- Reads the 16-bit MMIO register specified by Address, performs a bitwise
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise
OR between the read result and the value specified by OrData, and
writes the result to the 16-bit MMIO register specified by Address. The value
written to the MMIO register is returned. This function must guarantee that
@@ -1532,7 +1526,7 @@ MmioAnd16 (
}
/**
- Reads a 16-bit MMIO register, performs a bitwise AND followed by a bitwise
+ Reads a 16-bit MMIO register, performs a bitwise AND followed by a bitwise
OR, and writes the result back to the 16-bit MMIO register.
Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
@@ -1638,7 +1632,7 @@ MmioBitFieldWrite16 (
Reads a bit field in a 16-bit MMIO register, performs a bitwise OR, and
writes the result back to the bit field in the 16-bit MMIO register.
- Reads the 16-bit MMIO register specified by Address, performs a bitwise
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise
OR between the read result and the value specified by OrData, and
writes the result to the 16-bit MMIO register specified by Address. The value
written to the MMIO register is returned. This function must guarantee that
@@ -1771,7 +1765,7 @@ MmioBitFieldAndThenOr16 (
Reads a 32-bit MMIO register, performs a bitwise OR, and writes the
result back to the 32-bit MMIO register.
- Reads the 32-bit MMIO register specified by Address, performs a bitwise
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise
OR between the read result and the value specified by OrData, and
writes the result to the 32-bit MMIO register specified by Address. The value
written to the MMIO register is returned. This function must guarantee that
@@ -1826,7 +1820,7 @@ MmioAnd32 (
}
/**
- Reads a 32-bit MMIO register, performs a bitwise AND followed by a bitwise
+ Reads a 32-bit MMIO register, performs a bitwise AND followed by a bitwise
OR, and writes the result back to the 32-bit MMIO register.
Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
@@ -1932,7 +1926,7 @@ MmioBitFieldWrite32 (
Reads a bit field in a 32-bit MMIO register, performs a bitwise OR, and
writes the result back to the bit field in the 32-bit MMIO register.
- Reads the 32-bit MMIO register specified by Address, performs a bitwise
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise
OR between the read result and the value specified by OrData, and
writes the result to the 32-bit MMIO register specified by Address. The value
written to the MMIO register is returned. This function must guarantee that
@@ -2065,7 +2059,7 @@ MmioBitFieldAndThenOr32 (
Reads a 64-bit MMIO register, performs a bitwise OR, and writes the
result back to the 64-bit MMIO register.
- Reads the 64-bit MMIO register specified by Address, performs a bitwise
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise
OR between the read result and the value specified by OrData, and
writes the result to the 64-bit MMIO register specified by Address. The value
written to the MMIO register is returned. This function must guarantee that
@@ -2120,7 +2114,7 @@ MmioAnd64 (
}
/**
- Reads a 64-bit MMIO register, performs a bitwise AND followed by a bitwise
+ Reads a 64-bit MMIO register, performs a bitwise AND followed by a bitwise
OR, and writes the result back to the 64-bit MMIO register.
Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
@@ -2226,7 +2220,7 @@ MmioBitFieldWrite64 (
Reads a bit field in a 64-bit MMIO register, performs a bitwise OR, and
writes the result back to the bit field in the 64-bit MMIO register.
- Reads the 64-bit MMIO register specified by Address, performs a bitwise
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise
OR between the read result and the value specified by OrData, and
writes the result to the 64-bit MMIO register specified by Address. The value
written to the MMIO register is returned. This function must guarantee that
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLib.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLib.c
index 407c66a03ae5..f55b328d5a7f 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/IoLib.c
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLib.c
@@ -1,14 +1,8 @@
/** @file
Common I/O Library routines.
- Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -107,7 +101,7 @@ MmioRead8 (
@param Address The MMIO register to write.
@param Value The value to write to the MMIO register.
-
+
@return Value.
**/
@@ -169,7 +163,7 @@ MmioRead16 (
@param Address The MMIO register to write.
@param Value The value to write to the MMIO register.
-
+
@return Value.
**/
@@ -185,7 +179,7 @@ MmioWrite16 (
MemoryFence ();
*(volatile UINT16*)Address = Value;
MemoryFence ();
-
+
return Value;
}
@@ -213,11 +207,11 @@ MmioRead32 (
UINT32 Value;
ASSERT ((Address & 3) == 0);
-
+
MemoryFence ();
Value = *(volatile UINT32*)Address;
MemoryFence ();
-
+
return Value;
}
@@ -233,7 +227,7 @@ MmioRead32 (
@param Address The MMIO register to write.
@param Value The value to write to the MMIO register.
-
+
@return Value.
**/
@@ -245,11 +239,11 @@ MmioWrite32 (
)
{
ASSERT ((Address & 3) == 0);
-
+
MemoryFence ();
*(volatile UINT32*)Address = Value;
MemoryFence ();
-
+
return Value;
}
@@ -277,7 +271,7 @@ MmioRead64 (
UINT64 Value;
ASSERT ((Address & 7) == 0);
-
+
MemoryFence ();
Value = *(volatile UINT64*)Address;
MemoryFence ();
@@ -307,11 +301,11 @@ MmioWrite64 (
)
{
ASSERT ((Address & 7) == 0);
-
+
MemoryFence ();
*(volatile UINT64*)Address = Value;
MemoryFence ();
-
+
return Value;
}
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibArmVirt.c
index e5fccb76ff7e..763441e0709f 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibArmVirt.c
@@ -1,147 +1,178 @@
/** @file
- Common I/O Library routines.
+ I/O Library for ARM.
- Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+ Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+ Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
-
#include "BaseIoLibIntrinsicInternal.h"
-#include <Library/PcdLib.h>
-
-#define MAP_PORT_BASE_TO_MEM(_Port) \
- ((((_Port) & 0xfffc) << 10) | ((_Port) & 0x0fff))
/**
- Translates I/O port address to memory address.
+ Reads an 8-bit MMIO register.
- This function translates I/O port address to memory address by adding the 64MB
- aligned I/O Port space to the I/O address.
- If I/O Port space base is not 64MB aligned, then ASSERT ().
+ Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
- @param Port The I/O port to read.
+ @param Address The MMIO register to read.
- @return The memory address.
+ @return The value read.
**/
-UINTN
-InternalGetMemoryMapAddress (
- IN UINTN Port
- )
-{
- UINTN Address;
- UINTN IoBlockBaseAddress;
+UINT8
+EFIAPI
+MmioRead8Internal (
+ IN UINTN Address
+ );
- Address = MAP_PORT_BASE_TO_MEM (Port);
- IoBlockBaseAddress = PcdGet64(PcdIoBlockBaseAddressForIpf);
+/**
+ Writes an 8-bit MMIO register.
- //
- // Make sure that the I/O Port space base is 64MB aligned.
- //
- ASSERT ((IoBlockBaseAddress & 0x3ffffff) == 0);
- Address += IoBlockBaseAddress;
+ Writes the 8-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
- return Address;
-}
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
-/**
- Reads an 8-bit I/O port.
+**/
+VOID
+EFIAPI
+MmioWrite8Internal (
+ IN UINTN Address,
+ IN UINT8 Value
+ );
- Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
- This function must guarantee that all I/O read and write operations are
- serialized.
+/**
+ Reads a 16-bit MMIO register.
- If 8-bit I/O port operations are not supported, then ASSERT().
+ Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
- @param Port The I/O port to read.
+ @param Address The MMIO register to read.
@return The value read.
**/
-UINT8
+UINT16
EFIAPI
-IoRead8 (
- IN UINTN Port
- )
-{
- return MmioRead8 (InternalGetMemoryMapAddress (Port));
-}
+MmioRead16Internal (
+ IN UINTN Address
+ );
/**
- Reads a 16-bit I/O port.
+ Writes a 16-bit MMIO register.
- Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
- This function must guarantee that all I/O read and write operations are
- serialized.
+ Writes the 16-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
- If 16-bit I/O port operations are not supported, then ASSERT().
- If Port is not aligned on a 16-bit boundary, then ASSERT().
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
- @param Port The I/O port to read.
+**/
+VOID
+EFIAPI
+MmioWrite16Internal (
+ IN UINTN Address,
+ IN UINT16 Value
+ );
+
+/**
+ Reads a 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ @param Address The MMIO register to read.
@return The value read.
**/
-UINT16
+UINT32
EFIAPI
-IoRead16 (
- IN UINTN Port
- )
-{
- return MmioRead16 (InternalGetMemoryMapAddress (Port));
-}
+MmioRead32Internal (
+ IN UINTN Address
+ );
/**
- Reads a 32-bit I/O port.
+ Writes a 32-bit MMIO register.
- Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
- This function must guarantee that all I/O read and write operations are
- serialized.
+ Writes the 32-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
- If 32-bit I/O port operations are not supported, then ASSERT().
- If Port is not aligned on a 32-bit boundary, then ASSERT().
-
- @param Port The I/O port to read.
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+VOID
+EFIAPI
+MmioWrite32Internal (
+ IN UINTN Address,
+ IN UINT32 Value
+ );
+
+/**
+ Reads a 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ @param Address The MMIO register to read.
@return The value read.
**/
-UINT32
+UINT64
EFIAPI
-IoRead32 (
- IN UINTN Port
- )
-{
- return MmioRead32 (InternalGetMemoryMapAddress (Port));
-}
+MmioRead64Internal (
+ IN UINTN Address
+ );
/**
- Reads a 64-bit I/O port.
+ Writes a 64-bit MMIO register.
- Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.
+ Writes the 64-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+VOID
+EFIAPI
+MmioWrite64Internal (
+ IN UINTN Address,
+ IN UINT64 Value
+ );
+
+/**
+ Reads an 8-bit I/O port.
+
+ Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
This function must guarantee that all I/O read and write operations are
serialized.
- If 64-bit I/O port operations are not supported, then ASSERT().
- If Port is not aligned on a 64-bit boundary, then ASSERT().
+ If 8-bit I/O port operations are not supported, then ASSERT().
@param Port The I/O port to read.
@return The value read.
**/
-UINT64
+UINT8
EFIAPI
-IoRead64 (
+IoRead8 (
IN UINTN Port
)
{
@@ -149,7 +180,6 @@ IoRead64 (
return 0;
}
-
/**
Writes an 8-bit I/O port.
@@ -172,7 +202,32 @@ IoWrite8 (
IN UINT8 Value
)
{
- return MmioWrite8 (InternalGetMemoryMapAddress (Port), Value);
+ ASSERT (FALSE);
+ return Value;
+}
+
+/**
+ Reads a 16-bit I/O port.
+
+ Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+IoRead16 (
+ IN UINTN Port
+ )
+{
+ ASSERT (FALSE);
+ return 0;
}
/**
@@ -183,8 +238,7 @@ IoWrite8 (
operations are serialized.
If 16-bit I/O port operations are not supported, then ASSERT().
- If Port is not aligned on a 16-bit boundary, then ASSERT().
-
+
@param Port The I/O port to write.
@param Value The value to write to the I/O port.
@@ -198,7 +252,32 @@ IoWrite16 (
IN UINT16 Value
)
{
- return MmioWrite16 (InternalGetMemoryMapAddress (Port), Value);
+ ASSERT (FALSE);
+ return Value;
+}
+
+/**
+ Reads a 32-bit I/O port.
+
+ Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+IoRead32 (
+ IN UINTN Port
+ )
+{
+ ASSERT (FALSE);
+ return 0;
}
/**
@@ -209,8 +288,7 @@ IoWrite16 (
operations are serialized.
If 32-bit I/O port operations are not supported, then ASSERT().
- If Port is not aligned on a 32-bit boundary, then ASSERT().
-
+
@param Port The I/O port to write.
@param Value The value to write to the I/O port.
@@ -224,7 +302,33 @@ IoWrite32 (
IN UINT32 Value
)
{
- return MmioWrite32 (InternalGetMemoryMapAddress (Port), Value);
+ ASSERT (FALSE);
+ return Value;
+}
+
+/**
+ Reads a 64-bit I/O port.
+
+ Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If Port is not aligned on a 64-bit boundary, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+IoRead64 (
+ IN UINTN Port
+ )
+{
+ ASSERT (FALSE);
+ return 0;
}
/**
@@ -240,7 +344,7 @@ IoWrite32 (
@param Port The I/O port to write.
@param Value The value to write to the I/O port.
- @return The value written the I/O port.
+ @return The value written to the I/O port.
**/
UINT64
@@ -279,58 +383,48 @@ IoReadFifo8 (
OUT VOID *Buffer
)
{
- UINT8 *Buffer8;
-
- Buffer8 = (UINT8 *)Buffer;
- while (Count-- > 0) {
- *Buffer8++ = IoRead8 (Port);
- }
+ ASSERT (FALSE);
}
/**
- Reads a 16-bit I/O port fifo into a block of memory.
+ Writes a block of memory into an 8-bit I/O port fifo.
- Reads the 16-bit I/O fifo port specified by Port.
- The port is read Count times, and the read data is
- stored in the provided Buffer.
+ Writes the 8-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
- This function must guarantee that all I/O read and write operations are
+ This function must guarantee that all I/O write and write operations are
serialized.
- If 16-bit I/O port operations are not supported, then ASSERT().
+ If 8-bit I/O port operations are not supported, then ASSERT().
- @param Port The I/O port to read.
- @param Count The number of times to read I/O port.
- @param Buffer The buffer to store the read data into.
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
**/
VOID
EFIAPI
-IoReadFifo16 (
+IoWriteFifo8 (
IN UINTN Port,
IN UINTN Count,
- OUT VOID *Buffer
+ IN VOID *Buffer
)
{
- UINT16 *Buffer16;
-
- Buffer16 = (UINT16 *)Buffer;
- while (Count-- > 0) {
- *Buffer16++ = IoRead16 (Port);
- }
+ ASSERT (FALSE);
}
/**
- Reads a 32-bit I/O port fifo into a block of memory.
+ Reads a 16-bit I/O port fifo into a block of memory.
- Reads the 32-bit I/O fifo port specified by Port.
+ Reads the 16-bit I/O fifo port specified by Port.
The port is read Count times, and the read data is
stored in the provided Buffer.
This function must guarantee that all I/O read and write operations are
serialized.
- If 32-bit I/O port operations are not supported, then ASSERT().
+ If 16-bit I/O port operations are not supported, then ASSERT().
@param Port The I/O port to read.
@param Count The number of times to read I/O port.
@@ -339,31 +433,26 @@ IoReadFifo16 (
**/
VOID
EFIAPI
-IoReadFifo32 (
+IoReadFifo16 (
IN UINTN Port,
IN UINTN Count,
OUT VOID *Buffer
)
{
- UINT32 *Buffer32;
-
- Buffer32 = (UINT32 *)Buffer;
- while (Count-- > 0) {
- *Buffer32++ = IoRead32 (Port);
- }
+ ASSERT (FALSE);
}
/**
- Writes a block of memory into an 8-bit I/O port fifo.
+ Writes a block of memory into a 16-bit I/O port fifo.
- Writes the 8-bit I/O fifo port specified by Port.
+ Writes the 16-bit I/O fifo port specified by Port.
The port is written Count times, and the write data is
retrieved from the provided Buffer.
This function must guarantee that all I/O write and write operations are
serialized.
- If 8-bit I/O port operations are not supported, then ASSERT().
+ If 16-bit I/O port operations are not supported, then ASSERT().
@param Port The I/O port to write.
@param Count The number of times to write I/O port.
@@ -372,51 +461,41 @@ IoReadFifo32 (
**/
VOID
EFIAPI
-IoWriteFifo8 (
+IoWriteFifo16 (
IN UINTN Port,
IN UINTN Count,
IN VOID *Buffer
)
{
- UINT8 *Buffer8;
-
- Buffer8 = (UINT8 *)Buffer;
- while (Count-- > 0) {
- IoWrite8 (Port, *Buffer8++);
- }
+ ASSERT (FALSE);
}
/**
- Writes a block of memory into a 16-bit I/O port fifo.
+ Reads a 32-bit I/O port fifo into a block of memory.
- Writes the 16-bit I/O fifo port specified by Port.
- The port is written Count times, and the write data is
- retrieved from the provided Buffer.
+ Reads the 32-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
- This function must guarantee that all I/O write and write operations are
+ This function must guarantee that all I/O read and write operations are
serialized.
- If 16-bit I/O port operations are not supported, then ASSERT().
+ If 32-bit I/O port operations are not supported, then ASSERT().
- @param Port The I/O port to write.
- @param Count The number of times to write I/O port.
- @param Buffer The buffer to retrieve the write data from.
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
**/
VOID
EFIAPI
-IoWriteFifo16 (
+IoReadFifo32 (
IN UINTN Port,
IN UINTN Count,
- IN VOID *Buffer
+ OUT VOID *Buffer
)
{
- UINT16 *Buffer16;
-
- Buffer16 = (UINT16 *)Buffer;
- while (Count-- > 0) {
- IoWrite16 (Port, *Buffer16++);
- }
+ ASSERT (FALSE);
}
/**
@@ -444,12 +523,7 @@ IoWriteFifo32 (
IN VOID *Buffer
)
{
- UINT32 *Buffer32;
-
- Buffer32 = (UINT32 *)Buffer;
- while (Count-- > 0) {
- IoWrite32 (Port, *Buffer32++);
- }
+ ASSERT (FALSE);
}
/**
@@ -472,15 +546,31 @@ MmioRead8 (
IN UINTN Address
)
{
- UINT8 Data;
+ return MmioRead8Internal (Address);
+}
+
+/**
+ Writes an 8-bit MMIO register.
+
+ Writes the 8-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
- Address |= BIT63;
+ If 8-bit MMIO register operations are not supported, then ASSERT().
- MemoryFence ();
- Data = *((volatile UINT8 *) Address);
- MemoryFence ();
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
- return Data;
+**/
+UINT8
+EFIAPI
+MmioWrite8 (
+ IN UINTN Address,
+ IN UINT8 Value
+ )
+{
+ MmioWrite8Internal (Address, Value);
+ return Value;
}
/**
@@ -491,7 +581,6 @@ MmioRead8 (
operations are serialized.
If 16-bit MMIO register operations are not supported, then ASSERT().
- If Address is not aligned on a 16-bit boundary, then ASSERT().
@param Address The MMIO register to read.
@@ -504,200 +593,111 @@ MmioRead16 (
IN UINTN Address
)
{
- UINT16 Data;
-
- //
- // Make sure that Address is 16-bit aligned.
- //
ASSERT ((Address & 1) == 0);
- Address |= BIT63;
-
- MemoryFence ();
- Data = *((volatile UINT16 *) Address);
- MemoryFence ();
-
- return Data;
+ return MmioRead16Internal (Address);
}
/**
- Reads a 32-bit MMIO register.
-
- Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
- returned. This function must guarantee that all MMIO read and write
- operations are serialized.
+ Writes a 16-bit MMIO register.
- If 32-bit MMIO register operations are not supported, then ASSERT().
- If Address is not aligned on a 32-bit boundary, then ASSERT().
+ Writes the 16-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
- @param Address The MMIO register to read.
+ If 16-bit MMIO register operations are not supported, then ASSERT().
- @return The value read.
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
**/
-UINT32
+UINT16
EFIAPI
-MmioRead32 (
- IN UINTN Address
+MmioWrite16 (
+ IN UINTN Address,
+ IN UINT16 Value
)
{
- UINT32 Data;
-
- //
- // Make sure that Address is 32-bit aligned.
- //
- ASSERT ((Address & 3) == 0);
-
- Address |= BIT63;
-
- MemoryFence ();
- Data = *((volatile UINT32 *) Address);
- MemoryFence ();
+ ASSERT ((Address & 1) == 0);
- return Data;
+ MmioWrite16Internal (Address, Value);
+ return Value;
}
/**
- Reads a 64-bit MMIO register.
+ Reads a 32-bit MMIO register.
- Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
+ Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
returned. This function must guarantee that all MMIO read and write
operations are serialized.
- If 64-bit MMIO register operations are not supported, then ASSERT().
- If Address is not aligned on a 64-bit boundary, then ASSERT().
+ If 32-bit MMIO register operations are not supported, then ASSERT().
@param Address The MMIO register to read.
@return The value read.
**/
-UINT64
+UINT32
EFIAPI
-MmioRead64 (
+MmioRead32 (
IN UINTN Address
)
{
- UINT64 Data;
-
- //
- // Make sure that Address is 64-bit aligned.
- //
- ASSERT ((Address & 7) == 0);
-
- Address |= BIT63;
-
- MemoryFence ();
- Data = *((volatile UINT64 *) Address);
- MemoryFence ();
-
- return Data;
+ ASSERT ((Address & 3) == 0);
+ return MmioRead32Internal (Address);
}
/**
- Writes an 8-bit MMIO register.
+ Writes a 32-bit MMIO register.
- Writes the 8-bit MMIO register specified by Address with the value specified
+ Writes the 32-bit MMIO register specified by Address with the value specified
by Value and returns Value. This function must guarantee that all MMIO read
and write operations are serialized.
- If 8-bit MMIO register operations are not supported, then ASSERT().
+ If 32-bit MMIO register operations are not supported, then ASSERT().
@param Address The MMIO register to write.
@param Value The value to write to the MMIO register.
-
- @return Value.
**/
-UINT8
+UINT32
EFIAPI
-MmioWrite8 (
+MmioWrite32 (
IN UINTN Address,
- IN UINT8 Value
+ IN UINT32 Value
)
{
- Address |= BIT63;
-
- MemoryFence ();
- *((volatile UINT8 *) Address) = Value;
- MemoryFence ();
+ ASSERT ((Address & 3) == 0);
+ MmioWrite32Internal (Address, Value);
return Value;
}
/**
- Writes a 16-bit MMIO register.
-
- Writes the 16-bit MMIO register specified by Address with the value specified
- by Value and returns Value. This function must guarantee that all MMIO read
- and write operations are serialized.
-
- If 16-bit MMIO register operations are not supported, then ASSERT().
- If Address is not aligned on a 16-bit boundary, then ASSERT().
-
- @param Address The MMIO register to write.
- @param Value The value to write to the MMIO register.
-
- @return Value.
-
-**/
-UINT16
-EFIAPI
-MmioWrite16 (
- IN UINTN Address,
- IN UINT16 Value
- )
-{
- //
- // Make sure that Address is 16-bit aligned.
- //
- ASSERT ((Address & 1) == 0);
-
- Address |= BIT63;
-
- MemoryFence ();
- *((volatile UINT16 *) Address) = Value;
- MemoryFence ();
-
- return Value;
-}
+ Reads a 64-bit MMIO register.
-/**
- Writes a 32-bit MMIO register.
+ Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
- Writes the 32-bit MMIO register specified by Address with the value specified
- by Value and returns Value. This function must guarantee that all MMIO read
- and write operations are serialized.
+ If 64-bit MMIO register operations are not supported, then ASSERT().
- If 32-bit MMIO register operations are not supported, then ASSERT().
- If Address is not aligned on a 32-bit boundary, then ASSERT().
+ @param Address The MMIO register to read.
- @param Address The MMIO register to write.
- @param Value The value to write to the MMIO register.
-
- @return Value.
+ @return The value read.
**/
-UINT32
+UINT64
EFIAPI
-MmioWrite32 (
- IN UINTN Address,
- IN UINT32 Value
+MmioRead64 (
+ IN UINTN Address
)
{
- //
- // Make sure that Address is 32-bit aligned.
- //
- ASSERT ((Address & 3) == 0);
-
- Address |= BIT63;
-
- MemoryFence ();
- *((volatile UINT32 *) Address) = Value;
- MemoryFence ();
+ ASSERT ((Address & 7) == 0);
- return Value;
+ return MmioRead64Internal (Address);
}
/**
@@ -708,7 +708,6 @@ MmioWrite32 (
and write operations are serialized.
If 64-bit MMIO register operations are not supported, then ASSERT().
- If Address is not aligned on a 64-bit boundary, then ASSERT().
@param Address The MMIO register to write.
@param Value The value to write to the MMIO register.
@@ -721,16 +720,8 @@ MmioWrite64 (
IN UINT64 Value
)
{
- //
- // Make sure that Address is 64-bit aligned.
- //
ASSERT ((Address & 7) == 0);
- Address |= BIT63;
-
- MemoryFence ();
- *((volatile UINT64 *) Address) = Value;
- MemoryFence ();
-
+ MmioWrite64Internal (Address, Value);
return Value;
}
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c
index d000675767c2..10ba764764a7 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c
@@ -6,13 +6,7 @@
Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c
index c57da737ec9d..313a38e3d80b 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c
@@ -10,14 +10,8 @@
We don't advocate putting compiler specifics in libraries or drivers but there
is no other way to make this work.
- Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -38,7 +32,6 @@
@return The value read.
**/
-__inline__
UINT8
EFIAPI
IoRead8 (
@@ -66,7 +59,6 @@ IoRead8 (
@return The value written the I/O port.
**/
-__inline__
UINT8
EFIAPI
IoWrite8 (
@@ -93,7 +85,6 @@ IoWrite8 (
@return The value read.
**/
-__inline__
UINT16
EFIAPI
IoRead16 (
@@ -116,14 +107,13 @@ IoRead16 (
If 16-bit I/O port operations are not supported, then ASSERT().
If Port is not aligned on a 16-bit boundary, then ASSERT().
-
+
@param Port The I/O port to write.
@param Value The value to write to the I/O port.
@return The value written the I/O port.
**/
-__inline__
UINT16
EFIAPI
IoWrite16 (
@@ -145,13 +135,12 @@ IoWrite16 (
If 32-bit I/O port operations are not supported, then ASSERT().
If Port is not aligned on a 32-bit boundary, then ASSERT().
-
+
@param Port The I/O port to read.
@return The value read.
**/
-__inline__
UINT32
EFIAPI
IoRead32 (
@@ -174,14 +163,13 @@ IoRead32 (
If 32-bit I/O port operations are not supported, then ASSERT().
If Port is not aligned on a 32-bit boundary, then ASSERT().
-
+
@param Port The I/O port to write.
@param Value The value to write to the I/O port.
@return The value written the I/O port.
**/
-__inline__
UINT32
EFIAPI
IoWrite32 (
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibIcc.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibIcc.c
deleted file mode 100644
index adb2eff9403c..000000000000
--- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibIcc.c
+++ /dev/null
@@ -1,214 +0,0 @@
-/** @file
- I/O Library. This file has compiler specifics for ICC as there
- is no ANSI C standard for doing IO.
-
- Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials are
- licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "BaseIoLibIntrinsicInternal.h"
-
-/**
- Reads an 8-bit I/O port.
-
- Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
- This function must guarantee that all I/O read and write operations are
- serialized.
-
- If 8-bit I/O port operations are not supported, then ASSERT().
-
- @param Port The I/O port to read.
-
- @return The value read.
-
-**/
-UINT8
-EFIAPI
-IoRead8 (
- IN UINTN Port
- )
-{
- UINT8 Data;
-
- __asm {
- mov dx, word ptr [Port]
- in al, dx
-
- mov Data, al
- }
- return Data;
-}
-
-/**
- Writes an 8-bit I/O port.
-
- Writes the 8-bit I/O port specified by Port with the value specified by Value
- and returns Value. This function must guarantee that all I/O read and write
- operations are serialized.
-
- If 8-bit I/O port operations are not supported, then ASSERT().
-
- @param Port The I/O port to write.
- @param Value The value to write to the I/O port.
-
- @return The value written the I/O port.
-
-**/
-UINT8
-EFIAPI
-IoWrite8 (
- IN UINTN Port,
- IN UINT8 Value
- )
-{
- __asm {
- mov al, byte ptr [Value]
- mov dx, word ptr [Port]
- out dx, al
- }
- return Value;
-}
-
-/**
- Reads a 16-bit I/O port.
-
- Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
- This function must guarantee that all I/O read and write operations are
- serialized.
-
- If 16-bit I/O port operations are not supported, then ASSERT().
- If Port is not aligned on a 16-bit boundary, then ASSERT().
-
- @param Port The I/O port to read.
-
- @return The value read.
-
-**/
-UINT16
-EFIAPI
-IoRead16 (
- IN UINTN Port
- )
-{
- UINT16 Data;
-
- ASSERT ((Port & 1) == 0);
-
- __asm {
- mov dx, word ptr [Port]
- in ax, dx
- mov word ptr [Data], ax
- }
-
- return Data;
-}
-
-/**
- Writes a 16-bit I/O port.
-
- Writes the 16-bit I/O port specified by Port with the value specified by Value
- and returns Value. This function must guarantee that all I/O read and write
- operations are serialized.
-
- If 16-bit I/O port operations are not supported, then ASSERT().
- If Port is not aligned on a 16-bit boundary, then ASSERT().
-
- @param Port The I/O port to write.
- @param Value The value to write to the I/O port.
-
- @return The value written the I/O port.
-
-**/
-UINT16
-EFIAPI
-IoWrite16 (
- IN UINTN Port,
- IN UINT16 Value
- )
-{
- ASSERT ((Port & 1) == 0);
-
- __asm {
- mov ax, word ptr [Value]
- mov dx, word ptr [Port]
- out dx, ax
- }
-
- return Value;
-}
-
-/**
- Reads a 32-bit I/O port.
-
- Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
- This function must guarantee that all I/O read and write operations are
- serialized.
-
- If 32-bit I/O port operations are not supported, then ASSERT().
- If Port is not aligned on a 32-bit boundary, then ASSERT().
-
- @param Port The I/O port to read.
-
- @return The value read.
-
-**/
-UINT32
-EFIAPI
-IoRead32 (
- IN UINTN Port
- )
-{
- UINT32 Data;
-
- ASSERT ((Port & 3) == 0);
-
- __asm {
- mov dx, word ptr [Port]
- in eax, dx
- mov dword ptr [Data], eax
- }
-
- return Data;
-}
-
-/**
- Writes a 32-bit I/O port.
-
- Writes the 32-bit I/O port specified by Port with the value specified by Value
- and returns Value. This function must guarantee that all I/O read and write
- operations are serialized.
-
- If 32-bit I/O port operations are not supported, then ASSERT().
- If Port is not aligned on a 32-bit boundary, then ASSERT().
-
- @param Port The I/O port to write.
- @param Value The value to write to the I/O port.
-
- @return The value written the I/O port.
-
-**/
-UINT32
-EFIAPI
-IoWrite32 (
- IN UINTN Port,
- IN UINT32 Value
- )
-{
- ASSERT ((Port & 3) == 0);
-
- __asm {
- mov eax, dword ptr [Value]
- mov dx, word ptr [Port]
- out dx, eax
- }
-
- return Value;
-}
-
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibMmioBuffer.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibMmioBuffer.c
index 8163f8d7ac6e..a07897338ba2 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibMmioBuffer.c
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibMmioBuffer.c
@@ -1,14 +1,8 @@
/** @file
I/O Library MMIO Buffer Functions.
- Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -17,11 +11,11 @@
/**
Copy data from the MMIO region to system memory by using 8-bit access.
- Copy data from the MMIO region specified by starting address StartAddress
- to system memory specified by Buffer by using 8-bit access. The total
+ Copy data from the MMIO region specified by starting address StartAddress
+ to system memory specified by Buffer by using 8-bit access. The total
number of byte to be copied is specified by Length. Buffer is returned.
-
- If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
@@ -44,9 +38,9 @@ MmioReadBuffer8 (
ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
-
+
ReturnBuffer = Buffer;
-
+
while (Length-- != 0) {
*(Buffer++) = MmioRead8 (StartAddress++);
}
@@ -57,13 +51,13 @@ MmioReadBuffer8 (
/**
Copy data from the MMIO region to system memory by using 16-bit access.
- Copy data from the MMIO region specified by starting address StartAddress
- to system memory specified by Buffer by using 16-bit access. The total
+ Copy data from the MMIO region specified by starting address StartAddress
+ to system memory specified by Buffer by using 16-bit access. The total
number of byte to be copied is specified by Length. Buffer is returned.
-
+
If StartAddress is not aligned on a 16-bit boundary, then ASSERT().
- If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
If Length is not aligned on a 16-bit boundary, then ASSERT().
@@ -87,15 +81,15 @@ MmioReadBuffer16 (
UINT16 *ReturnBuffer;
ASSERT ((StartAddress & (sizeof (UINT16) - 1)) == 0);
-
+
ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
ASSERT ((Length & (sizeof (UINT16) - 1)) == 0);
ASSERT (((UINTN) Buffer & (sizeof (UINT16) - 1)) == 0);
-
+
ReturnBuffer = Buffer;
-
+
while (Length != 0) {
*(Buffer++) = MmioRead16 (StartAddress);
StartAddress += sizeof (UINT16);
@@ -108,13 +102,13 @@ MmioReadBuffer16 (
/**
Copy data from the MMIO region to system memory by using 32-bit access.
- Copy data from the MMIO region specified by starting address StartAddress
- to system memory specified by Buffer by using 32-bit access. The total
+ Copy data from the MMIO region specified by starting address StartAddress
+ to system memory specified by Buffer by using 32-bit access. The total
number of byte to be copied is specified by Length. Buffer is returned.
-
+
If StartAddress is not aligned on a 32-bit boundary, then ASSERT().
- If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
If Length is not aligned on a 32-bit boundary, then ASSERT().
@@ -138,15 +132,15 @@ MmioReadBuffer32 (
UINT32 *ReturnBuffer;
ASSERT ((StartAddress & (sizeof (UINT32) - 1)) == 0);
-
+
ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
ASSERT ((Length & (sizeof (UINT32) - 1)) == 0);
ASSERT (((UINTN) Buffer & (sizeof (UINT32) - 1)) == 0);
-
+
ReturnBuffer = Buffer;
-
+
while (Length != 0) {
*(Buffer++) = MmioRead32 (StartAddress);
StartAddress += sizeof (UINT32);
@@ -159,13 +153,13 @@ MmioReadBuffer32 (
/**
Copy data from the MMIO region to system memory by using 64-bit access.
- Copy data from the MMIO region specified by starting address StartAddress
- to system memory specified by Buffer by using 64-bit access. The total
+ Copy data from the MMIO region specified by starting address StartAddress
+ to system memory specified by Buffer by using 64-bit access. The total
number of byte to be copied is specified by Length. Buffer is returned.
-
+
If StartAddress is not aligned on a 64-bit boundary, then ASSERT().
- If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
If Length is not aligned on a 64-bit boundary, then ASSERT().
@@ -189,15 +183,15 @@ MmioReadBuffer64 (
UINT64 *ReturnBuffer;
ASSERT ((StartAddress & (sizeof (UINT64) - 1)) == 0);
-
+
ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
ASSERT ((Length & (sizeof (UINT64) - 1)) == 0);
ASSERT (((UINTN) Buffer & (sizeof (UINT64) - 1)) == 0);
-
+
ReturnBuffer = Buffer;
-
+
while (Length != 0) {
*(Buffer++) = MmioRead64 (StartAddress);
StartAddress += sizeof (UINT64);
@@ -211,11 +205,11 @@ MmioReadBuffer64 (
/**
Copy data from system memory to the MMIO region by using 8-bit access.
- Copy data from system memory specified by Buffer to the MMIO region specified
- by starting address StartAddress by using 8-bit access. The total number
+ Copy data from system memory specified by Buffer to the MMIO region specified
+ by starting address StartAddress by using 8-bit access. The total number
of byte to be copied is specified by Length. Buffer is returned.
-
- If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().
@@ -238,27 +232,27 @@ MmioWriteBuffer8 (
ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
-
+
ReturnBuffer = (UINT8 *) Buffer;
-
+
while (Length-- != 0) {
MmioWrite8 (StartAddress++, *(Buffer++));
}
return ReturnBuffer;
-
+
}
/**
Copy data from system memory to the MMIO region by using 16-bit access.
- Copy data from system memory specified by Buffer to the MMIO region specified
- by starting address StartAddress by using 16-bit access. The total number
+ Copy data from system memory specified by Buffer to the MMIO region specified
+ by starting address StartAddress by using 16-bit access. The total number
of byte to be copied is specified by Length. Buffer is returned.
-
+
If StartAddress is not aligned on a 16-bit boundary, then ASSERT().
- If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().
If Length is not aligned on a 16-bit boundary, then ASSERT().
@@ -283,7 +277,7 @@ MmioWriteBuffer16 (
UINT16 *ReturnBuffer;
ASSERT ((StartAddress & (sizeof (UINT16) - 1)) == 0);
-
+
ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
@@ -291,10 +285,10 @@ MmioWriteBuffer16 (
ASSERT (((UINTN) Buffer & (sizeof (UINT16) - 1)) == 0);
ReturnBuffer = (UINT16 *) Buffer;
-
+
while (Length != 0) {
MmioWrite16 (StartAddress, *(Buffer++));
-
+
StartAddress += sizeof (UINT16);
Length -= sizeof (UINT16);
}
@@ -306,13 +300,13 @@ MmioWriteBuffer16 (
/**
Copy data from system memory to the MMIO region by using 32-bit access.
- Copy data from system memory specified by Buffer to the MMIO region specified
- by starting address StartAddress by using 32-bit access. The total number
+ Copy data from system memory specified by Buffer to the MMIO region specified
+ by starting address StartAddress by using 32-bit access. The total number
of byte to be copied is specified by Length. Buffer is returned.
-
+
If StartAddress is not aligned on a 32-bit boundary, then ASSERT().
- If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().
If Length is not aligned on a 32-bit boundary, then ASSERT().
@@ -337,7 +331,7 @@ MmioWriteBuffer32 (
UINT32 *ReturnBuffer;
ASSERT ((StartAddress & (sizeof (UINT32) - 1)) == 0);
-
+
ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
@@ -345,10 +339,10 @@ MmioWriteBuffer32 (
ASSERT (((UINTN) Buffer & (sizeof (UINT32) - 1)) == 0);
ReturnBuffer = (UINT32 *) Buffer;
-
+
while (Length != 0) {
MmioWrite32 (StartAddress, *(Buffer++));
-
+
StartAddress += sizeof (UINT32);
Length -= sizeof (UINT32);
}
@@ -359,13 +353,13 @@ MmioWriteBuffer32 (
/**
Copy data from system memory to the MMIO region by using 64-bit access.
- Copy data from system memory specified by Buffer to the MMIO region specified
- by starting address StartAddress by using 64-bit access. The total number
+ Copy data from system memory specified by Buffer to the MMIO region specified
+ by starting address StartAddress by using 64-bit access. The total number
of byte to be copied is specified by Length. Buffer is returned.
-
+
If StartAddress is not aligned on a 64-bit boundary, then ASSERT().
- If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().
If Length is not aligned on a 64-bit boundary, then ASSERT().
@@ -390,7 +384,7 @@ MmioWriteBuffer64 (
UINT64 *ReturnBuffer;
ASSERT ((StartAddress & (sizeof (UINT64) - 1)) == 0);
-
+
ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
@@ -398,10 +392,10 @@ MmioWriteBuffer64 (
ASSERT (((UINTN) Buffer & (sizeof (UINT64) - 1)) == 0);
ReturnBuffer = (UINT64 *) Buffer;
-
+
while (Length != 0) {
MmioWrite64 (StartAddress, *(Buffer++));
-
+
StartAddress += sizeof (UINT64);
Length -= sizeof (UINT64);
}
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibMsc.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibMsc.c
index 3a7608752090..01aa48edc4da 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibMsc.c
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibMsc.c
@@ -8,14 +8,8 @@
We don't advocate putting compiler specifics in libraries or drivers but there
is no other way to make this work.
- Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -146,7 +140,7 @@ IoRead16 (
If 16-bit I/O port operations are not supported, then ASSERT().
If Port is not aligned on a 16-bit boundary, then ASSERT().
-
+
@param Port The I/O port to write.
@param Value The value to write to the I/O port.
@@ -176,7 +170,7 @@ IoWrite16 (
If 32-bit I/O port operations are not supported, then ASSERT().
If Port is not aligned on a 32-bit boundary, then ASSERT().
-
+
@param Port The I/O port to read.
@return The value read.
@@ -206,7 +200,7 @@ IoRead32 (
If 32-bit I/O port operations are not supported, then ASSERT().
If Port is not aligned on a 32-bit boundary, then ASSERT().
-
+
@param Port The I/O port to write.
@param Value The value to write to the I/O port.
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c
index 3192c172a2ab..fd43d809de85 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c
@@ -1,17 +1,13 @@
/** @file
- I/O Library for ARM.
+ I/O library for non I/O read and write access (memory map I/O read and
+ write only) architecture, such as ARM and RISC-V processor.
- Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+ Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.asm b/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.asm
deleted file mode 100644
index 7e294a620201..000000000000
--- a/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.asm
+++ /dev/null
@@ -1,127 +0,0 @@
-;------------------------------------------------------------------------------
-;
-; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
-; Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
-;
-; This program and the accompanying materials are licensed and made available
-; under the terms and conditions of the BSD License which accompanies this
-; distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
- .code
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo8 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; OUT VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-IoReadFifo8 PROC
- cld
- xchg rcx, rdx
- xchg rdi, r8 ; rdi: buffer address; r8: save rdi
-rep insb
- mov rdi, r8 ; restore rdi
- ret
-IoReadFifo8 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo16 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; OUT VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-IoReadFifo16 PROC
- cld
- xchg rcx, rdx
- xchg rdi, r8 ; rdi: buffer address; r8: save rdi
-rep insw
- mov rdi, r8 ; restore rdi
- ret
-IoReadFifo16 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo32 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; OUT VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-IoReadFifo32 PROC
- cld
- xchg rcx, rdx
- xchg rdi, r8 ; rdi: buffer address; r8: save rdi
-rep insd
- mov rdi, r8 ; restore rdi
- ret
-IoReadFifo32 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo8 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-IoWriteFifo8 PROC
- cld
- xchg rcx, rdx
- xchg rsi, r8 ; rsi: buffer address; r8: save rsi
-rep outsb
- mov rsi, r8 ; restore rsi
- ret
-IoWriteFifo8 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo16 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-IoWriteFifo16 PROC
- cld
- xchg rcx, rdx
- xchg rsi, r8 ; rsi: buffer address; r8: save rsi
-rep outsw
- mov rsi, r8 ; restore rsi
- ret
-IoWriteFifo16 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo32 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-IoWriteFifo32 PROC
- cld
- xchg rcx, rdx
- xchg rsi, r8 ; rsi: buffer address; r8: save rsi
-rep outsd
- mov rsi, r8 ; restore rsi
- ret
-IoWriteFifo32 ENDP
-
- END
-
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm b/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm
index 27c97d23c741..4b6f8118aacb 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm
+++ b/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm
@@ -3,13 +3,7 @@
; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
;
-; This program and the accompanying materials are licensed and made available
-; under the terms and conditions of the BSD License which accompanies this
-; distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+; SPDX-License-Identifier: BSD-2-Clause-Patent
;
;------------------------------------------------------------------------------
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifoSev.nasm b/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifoSev.nasm
new file mode 100644
index 000000000000..1ff063a74ce6
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifoSev.nasm
@@ -0,0 +1,282 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+;
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+;------------------------------------------------------------------------------
+
+ DEFAULT REL
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; Check whether we need to unroll the String I/O in SEV guest
+;
+; Return // eax (1 - unroll, 0 - no unroll)
+;------------------------------------------------------------------------------
+global ASM_PFX(SevNoRepIo)
+ASM_PFX(SevNoRepIo):
+
+ ; CPUID clobbers ebx, ecx and edx
+ push rbx
+ push rcx
+ push rdx
+
+ ; Check if we are runing under hypervisor
+ ; CPUID(1).ECX Bit 31
+ mov eax, 1
+ cpuid
+ bt ecx, 31
+ jnc @UseRepIo
+
+ ; Check if we have Memory encryption CPUID leaf
+ mov eax, 0x80000000
+ cpuid
+ cmp eax, 0x8000001f
+ jl @UseRepIo
+
+ ; Check for memory encryption feature:
+ ; CPUID Fn8000_001F[EAX] - Bit 1
+ ;
+ mov eax, 0x8000001f
+ cpuid
+ bt eax, 1
+ jnc @UseRepIo
+
+ ; Check if memory encryption is enabled
+ ; MSR_0xC0010131 - Bit 0 (SEV enabled)
+ ; MSR_0xC0010131 - Bit 1 (SEV-ES enabled)
+ mov ecx, 0xc0010131
+ rdmsr
+
+ ; Check for (SevEsEnabled == 0 && SevEnabled == 1)
+ and eax, 3
+ cmp eax, 1
+ je @SevNoRepIo_Done
+
+@UseRepIo:
+ xor eax, eax
+
+@SevNoRepIo_Done:
+ pop rdx
+ pop rcx
+ pop rbx
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo8 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; OUT VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo8)
+ASM_PFX(IoReadFifo8):
+ xchg rcx, rdx
+ xchg rdi, r8 ; rdi: buffer address; r8: save rdi
+
+ ; Check if we need to unroll String I/O
+ call ASM_PFX(SevNoRepIo)
+ test eax, eax
+ jnz @IoReadFifo8_NoRep
+
+ cld
+ rep insb
+ jmp @IoReadFifo8_Done
+
+@IoReadFifo8_NoRep:
+ jrcxz @IoReadFifo8_Done
+
+@IoReadFifo8_Loop:
+ in al, dx
+ mov byte [rdi], al
+ inc rdi
+ loop @IoReadFifo8_Loop
+
+@IoReadFifo8_Done:
+ mov rdi, r8 ; restore rdi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo16 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; OUT VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo16)
+ASM_PFX(IoReadFifo16):
+ xchg rcx, rdx
+ xchg rdi, r8 ; rdi: buffer address; r8: save rdi
+
+ ; Check if we need to unroll String I/O
+ call ASM_PFX(SevNoRepIo)
+ test eax, eax
+ jnz @IoReadFifo16_NoRep
+
+ cld
+ rep insw
+ jmp @IoReadFifo16_Done
+
+@IoReadFifo16_NoRep:
+ jrcxz @IoReadFifo16_Done
+
+@IoReadFifo16_Loop:
+ in ax, dx
+ mov word [rdi], ax
+ add rdi, 2
+ loop @IoReadFifo16_Loop
+
+@IoReadFifo16_Done:
+ mov rdi, r8 ; restore rdi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo32 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; OUT VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo32)
+ASM_PFX(IoReadFifo32):
+ xchg rcx, rdx
+ xchg rdi, r8 ; rdi: buffer address; r8: save rdi
+
+ ; Check if we need to unroll String I/O
+ call ASM_PFX(SevNoRepIo)
+ test eax, eax
+ jnz @IoReadFifo32_NoRep
+
+ cld
+ rep insd
+ jmp @IoReadFifo32_Done
+
+@IoReadFifo32_NoRep:
+ jrcxz @IoReadFifo32_Done
+
+@IoReadFifo32_Loop:
+ in eax, dx
+ mov dword [rdi], eax
+ add rdi, 4
+ loop @IoReadFifo32_Loop
+
+@IoReadFifo32_Done:
+ mov rdi, r8 ; restore rdi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo8 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo8)
+ASM_PFX(IoWriteFifo8):
+ xchg rcx, rdx
+ xchg rsi, r8 ; rsi: buffer address; r8: save rsi
+
+ ; Check if we need to unroll String I/O
+ call ASM_PFX(SevNoRepIo)
+ test eax, eax
+ jnz @IoWriteFifo8_NoRep
+
+ cld
+ rep outsb
+ jmp @IoWriteFifo8_Done
+
+@IoWriteFifo8_NoRep:
+ jrcxz @IoWriteFifo8_Done
+
+@IoWriteFifo8_Loop:
+ mov al, byte [rsi]
+ out dx, al
+ inc rsi
+ loop @IoWriteFifo8_Loop
+
+@IoWriteFifo8_Done:
+ mov rsi, r8 ; restore rsi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo16 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo16)
+ASM_PFX(IoWriteFifo16):
+ xchg rcx, rdx
+ xchg rsi, r8 ; rsi: buffer address; r8: save rsi
+
+ ; Check if we need to unroll String I/O
+ call ASM_PFX(SevNoRepIo)
+ test eax, eax
+ jnz @IoWriteFifo16_NoRep
+
+ cld
+ rep outsw
+ jmp @IoWriteFifo16_Done
+
+@IoWriteFifo16_NoRep:
+ jrcxz @IoWriteFifo16_Done
+
+@IoWriteFifo16_Loop:
+ mov ax, word [rsi]
+ out dx, ax
+ add rsi, 2
+ loop @IoWriteFifo16_Loop
+
+@IoWriteFifo16_Done:
+ mov rsi, r8 ; restore rsi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo32 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo32)
+ASM_PFX(IoWriteFifo32):
+ xchg rcx, rdx
+ xchg rsi, r8 ; rsi: buffer address; r8: save rsi
+
+ ; Check if we need to unroll String I/O
+ call ASM_PFX(SevNoRepIo)
+ test eax, eax
+ jnz @IoWriteFifo32_NoRep
+
+ cld
+ rep outsd
+ jmp @IoWriteFifo32_Done
+
+@IoWriteFifo32_NoRep:
+ jrcxz @IoWriteFifo32_Done
+
+@IoWriteFifo32_Loop:
+ mov eax, dword [rsi]
+ out dx, eax
+ add rsi, 4
+ loop @IoWriteFifo32_Loop
+
+@IoWriteFifo32_Done:
+ mov rsi, r8 ; restore rsi
+ ret
+