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-rw-r--r--MdePkg/Include/AArch64/ProcessorBind.h154
-rw-r--r--MdePkg/Include/Arm/ProcessorBind.h182
-rw-r--r--MdePkg/Include/Base.h1270
-rw-r--r--MdePkg/Include/Ebc/ProcessorBind.h152
-rw-r--r--MdePkg/Include/Guid/Acpi.h46
-rw-r--r--MdePkg/Include/Guid/Apriori.h30
-rw-r--r--MdePkg/Include/Guid/AprioriFileName.h44
-rw-r--r--MdePkg/Include/Guid/CapsuleReport.h105
-rw-r--r--MdePkg/Include/Guid/Cper.h1235
-rw-r--r--MdePkg/Include/Guid/DebugImageInfoTable.h80
-rw-r--r--MdePkg/Include/Guid/DxeServices.h28
-rw-r--r--MdePkg/Include/Guid/EventGroup.h52
-rw-r--r--MdePkg/Include/Guid/EventLegacyBios.h28
-rw-r--r--MdePkg/Include/Guid/FileInfo.h71
-rw-r--r--MdePkg/Include/Guid/FileSystemInfo.h63
-rw-r--r--MdePkg/Include/Guid/FileSystemVolumeLabelInfo.h37
-rw-r--r--MdePkg/Include/Guid/FirmwareContentsSigned.h26
-rw-r--r--MdePkg/Include/Guid/FirmwareFileSystem2.h40
-rw-r--r--MdePkg/Include/Guid/FirmwareFileSystem3.h30
-rw-r--r--MdePkg/Include/Guid/FmpCapsule.h98
-rw-r--r--MdePkg/Include/Guid/GlobalVariable.h192
-rw-r--r--MdePkg/Include/Guid/Gpt.h43
-rw-r--r--MdePkg/Include/Guid/GraphicsInfoHob.h51
-rw-r--r--MdePkg/Include/Guid/HardwareErrorVariable.h28
-rw-r--r--MdePkg/Include/Guid/HiiFormMapMethodGuid.h25
-rw-r--r--MdePkg/Include/Guid/HiiKeyBoardLayout.h27
-rw-r--r--MdePkg/Include/Guid/HiiPlatformSetupFormset.h35
-rw-r--r--MdePkg/Include/Guid/HobList.h30
-rw-r--r--MdePkg/Include/Guid/ImageAuthentication.h352
-rw-r--r--MdePkg/Include/Guid/MdePkgTokenSpace.h25
-rw-r--r--MdePkg/Include/Guid/MemoryAllocationHob.h34
-rw-r--r--MdePkg/Include/Guid/MemoryAttributesTable.h34
-rw-r--r--MdePkg/Include/Guid/MemoryOverwriteControl.h76
-rw-r--r--MdePkg/Include/Guid/Mps.h35
-rw-r--r--MdePkg/Include/Guid/PcAnsi.h58
-rw-r--r--MdePkg/Include/Guid/PropertiesTable.h37
-rw-r--r--MdePkg/Include/Guid/SalSystemTable.h31
-rw-r--r--MdePkg/Include/Guid/SmBios.h38
-rw-r--r--MdePkg/Include/Guid/StatusCodeDataTypeId.h789
-rw-r--r--MdePkg/Include/Guid/SystemResourceTable.h125
-rw-r--r--MdePkg/Include/Guid/VectorHandoffTable.h33
-rw-r--r--MdePkg/Include/Guid/WinCertificate.h128
-rw-r--r--MdePkg/Include/Ia32/ProcessorBind.h318
-rw-r--r--MdePkg/Include/IndustryStandard/Acpi.h21
-rw-r--r--MdePkg/Include/IndustryStandard/Acpi10.h661
-rw-r--r--MdePkg/Include/IndustryStandard/Acpi20.h545
-rw-r--r--MdePkg/Include/IndustryStandard/Acpi30.h729
-rw-r--r--MdePkg/Include/IndustryStandard/Acpi40.h1309
-rw-r--r--MdePkg/Include/IndustryStandard/Acpi50.h2119
-rw-r--r--MdePkg/Include/IndustryStandard/Acpi51.h2139
-rw-r--r--MdePkg/Include/IndustryStandard/Acpi60.h2346
-rw-r--r--MdePkg/Include/IndustryStandard/Acpi61.h2378
-rw-r--r--MdePkg/Include/IndustryStandard/AcpiAml.h175
-rw-r--r--MdePkg/Include/IndustryStandard/AlertStandardFormatTable.h146
-rw-r--r--MdePkg/Include/IndustryStandard/Atapi.h857
-rw-r--r--MdePkg/Include/IndustryStandard/Bluetooth.h47
-rw-r--r--MdePkg/Include/IndustryStandard/Bmp.h48
-rw-r--r--MdePkg/Include/IndustryStandard/DebugPort2Table.h79
-rw-r--r--MdePkg/Include/IndustryStandard/DebugPortTable.h50
-rw-r--r--MdePkg/Include/IndustryStandard/Dhcp.h282
-rw-r--r--MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h261
-rw-r--r--MdePkg/Include/IndustryStandard/ElTorito.h147
-rw-r--r--MdePkg/Include/IndustryStandard/Emmc.h297
-rw-r--r--MdePkg/Include/IndustryStandard/HighPrecisionEventTimerTable.h52
-rw-r--r--MdePkg/Include/IndustryStandard/Hsti.h82
-rw-r--r--MdePkg/Include/IndustryStandard/Http11.h254
-rw-r--r--MdePkg/Include/IndustryStandard/IScsiBootFirmwareTable.h167
-rw-r--r--MdePkg/Include/IndustryStandard/Ipmi.h29
-rw-r--r--MdePkg/Include/IndustryStandard/IpmiNetFnApp.h623
-rw-r--r--MdePkg/Include/IndustryStandard/IpmiNetFnBridge.h243
-rw-r--r--MdePkg/Include/IndustryStandard/IpmiNetFnChassis.h303
-rw-r--r--MdePkg/Include/IndustryStandard/IpmiNetFnFirmware.h26
-rw-r--r--MdePkg/Include/IndustryStandard/IpmiNetFnGroupExtension.h26
-rw-r--r--MdePkg/Include/IndustryStandard/IpmiNetFnSensorEvent.h52
-rw-r--r--MdePkg/Include/IndustryStandard/IpmiNetFnStorage.h542
-rw-r--r--MdePkg/Include/IndustryStandard/IpmiNetFnTransport.h566
-rw-r--r--MdePkg/Include/IndustryStandard/LegacyBiosMpTable.h294
-rw-r--r--MdePkg/Include/IndustryStandard/LowPowerIdleTable.h82
-rw-r--r--MdePkg/Include/IndustryStandard/Mbr.h60
-rw-r--r--MdePkg/Include/IndustryStandard/MemoryMappedConfigurationSpaceAccessTable.h53
-rw-r--r--MdePkg/Include/IndustryStandard/MemoryOverwriteRequestControlLock.h43
-rw-r--r--MdePkg/Include/IndustryStandard/Nvme.h935
-rw-r--r--MdePkg/Include/IndustryStandard/Pal.h3302
-rw-r--r--MdePkg/Include/IndustryStandard/Pci.h23
-rw-r--r--MdePkg/Include/IndustryStandard/Pci22.h886
-rw-r--r--MdePkg/Include/IndustryStandard/Pci23.h123
-rw-r--r--MdePkg/Include/IndustryStandard/Pci30.h79
-rw-r--r--MdePkg/Include/IndustryStandard/PciCodeId.h100
-rw-r--r--MdePkg/Include/IndustryStandard/PciExpress21.h651
-rw-r--r--MdePkg/Include/IndustryStandard/PciExpress30.h57
-rw-r--r--MdePkg/Include/IndustryStandard/PciExpress31.h78
-rw-r--r--MdePkg/Include/IndustryStandard/PeImage.h756
-rw-r--r--MdePkg/Include/IndustryStandard/Sal.h915
-rw-r--r--MdePkg/Include/IndustryStandard/Scsi.h412
-rw-r--r--MdePkg/Include/IndustryStandard/Sd.h181
-rw-r--r--MdePkg/Include/IndustryStandard/SdramSpd.h74
-rw-r--r--MdePkg/Include/IndustryStandard/SdramSpdDdr3.h769
-rw-r--r--MdePkg/Include/IndustryStandard/SdramSpdDdr4.h958
-rw-r--r--MdePkg/Include/IndustryStandard/SdramSpdLpDdr.h474
-rw-r--r--MdePkg/Include/IndustryStandard/SerialPortConsoleRedirectionTable.h163
-rw-r--r--MdePkg/Include/IndustryStandard/SmBios.h2517
-rw-r--r--MdePkg/Include/IndustryStandard/SmBus.h81
-rw-r--r--MdePkg/Include/IndustryStandard/TcgPhysicalPresence.h129
-rw-r--r--MdePkg/Include/IndustryStandard/TcgStorageCore.h394
-rw-r--r--MdePkg/Include/IndustryStandard/TcgStorageOpal.h181
-rw-r--r--MdePkg/Include/IndustryStandard/TcpaAcpi.h58
-rw-r--r--MdePkg/Include/IndustryStandard/Tls1.h93
-rw-r--r--MdePkg/Include/IndustryStandard/Tpm12.h2173
-rw-r--r--MdePkg/Include/IndustryStandard/Tpm20.h1820
-rw-r--r--MdePkg/Include/IndustryStandard/Tpm2Acpi.h56
-rw-r--r--MdePkg/Include/IndustryStandard/TpmPtp.h522
-rw-r--r--MdePkg/Include/IndustryStandard/TpmTis.h183
-rw-r--r--MdePkg/Include/IndustryStandard/UefiTcgPlatform.h333
-rw-r--r--MdePkg/Include/IndustryStandard/Usb.h386
-rw-r--r--MdePkg/Include/IndustryStandard/WatchdogActionTable.h96
-rw-r--r--MdePkg/Include/IndustryStandard/WatchdogResourceTable.h56
-rw-r--r--MdePkg/Include/IndustryStandard/WindowsSmmSecurityMitigationTable.h39
-rw-r--r--MdePkg/Include/IndustryStandard/WindowsUxCapsule.h47
-rw-r--r--MdePkg/Include/Ipf/IpfMacro.i58
-rw-r--r--MdePkg/Include/Ipf/ProcessorBind.h319
-rw-r--r--MdePkg/Include/Library/BaseLib.h8910
-rw-r--r--MdePkg/Include/Library/BaseMemoryLib.h489
-rw-r--r--MdePkg/Include/Library/CacheMaintenanceLib.h212
-rw-r--r--MdePkg/Include/Library/CpuLib.h51
-rw-r--r--MdePkg/Include/Library/DebugLib.h529
-rw-r--r--MdePkg/Include/Library/DebugPrintErrorLevelLib.h43
-rw-r--r--MdePkg/Include/Library/DevicePathLib.h566
-rw-r--r--MdePkg/Include/Library/DxeCoreEntryPoint.h99
-rw-r--r--MdePkg/Include/Library/DxeServicesLib.h309
-rw-r--r--MdePkg/Include/Library/DxeServicesTableLib.h34
-rw-r--r--MdePkg/Include/Library/ExtendedSalLib.h494
-rw-r--r--MdePkg/Include/Library/ExtractGuidedSectionLib.h284
-rw-r--r--MdePkg/Include/Library/FileHandleLib.h507
-rw-r--r--MdePkg/Include/Library/HobLib.h534
-rw-r--r--MdePkg/Include/Library/HstiLib.h158
-rw-r--r--MdePkg/Include/Library/IoLib.h2815
-rw-r--r--MdePkg/Include/Library/MemoryAllocationLib.h493
-rw-r--r--MdePkg/Include/Library/OrderedCollectionLib.h425
-rw-r--r--MdePkg/Include/Library/PalLib.h63
-rw-r--r--MdePkg/Include/Library/PcdLib.h2260
-rw-r--r--MdePkg/Include/Library/PciCf8Lib.h1094
-rw-r--r--MdePkg/Include/Library/PciExpressLib.h1061
-rw-r--r--MdePkg/Include/Library/PciLib.h1062
-rw-r--r--MdePkg/Include/Library/PciSegmentLib.h1045
-rw-r--r--MdePkg/Include/Library/PeCoffExtraActionLib.h53
-rw-r--r--MdePkg/Include/Library/PeCoffGetEntryPointLib.h104
-rw-r--r--MdePkg/Include/Library/PeCoffLib.h392
-rw-r--r--MdePkg/Include/Library/PeiCoreEntryPoint.h138
-rw-r--r--MdePkg/Include/Library/PeiServicesLib.h524
-rw-r--r--MdePkg/Include/Library/PeiServicesTablePointerLib.h74
-rw-r--r--MdePkg/Include/Library/PeimEntryPoint.h109
-rw-r--r--MdePkg/Include/Library/PerformanceLib.h366
-rw-r--r--MdePkg/Include/Library/PostCodeLib.h150
-rw-r--r--MdePkg/Include/Library/PrintLib.h1052
-rw-r--r--MdePkg/Include/Library/ReportStatusCodeLib.h492
-rw-r--r--MdePkg/Include/Library/ResourcePublicationLib.h42
-rw-r--r--MdePkg/Include/Library/RngLib.h86
-rw-r--r--MdePkg/Include/Library/S3BootScriptLib.h602
-rw-r--r--MdePkg/Include/Library/S3IoLib.h2677
-rw-r--r--MdePkg/Include/Library/S3PciLib.h1052
-rw-r--r--MdePkg/Include/Library/S3SmbusLib.h455
-rw-r--r--MdePkg/Include/Library/S3StallLib.h39
-rw-r--r--MdePkg/Include/Library/SalLib.h59
-rw-r--r--MdePkg/Include/Library/SerialPortLib.h180
-rw-r--r--MdePkg/Include/Library/SmbusLib.h497
-rw-r--r--MdePkg/Include/Library/SmiHandlerProfileLib.h81
-rw-r--r--MdePkg/Include/Library/SmmLib.h89
-rw-r--r--MdePkg/Include/Library/SmmMemLib.h138
-rw-r--r--MdePkg/Include/Library/SmmPeriodicSmiLib.h184
-rw-r--r--MdePkg/Include/Library/SmmServicesTableLib.h43
-rw-r--r--MdePkg/Include/Library/SynchronizationLib.h295
-rw-r--r--MdePkg/Include/Library/TimerLib.h114
-rw-r--r--MdePkg/Include/Library/UefiApplicationEntryPoint.h154
-rw-r--r--MdePkg/Include/Library/UefiBootServicesTableLib.h34
-rw-r--r--MdePkg/Include/Library/UefiDecompressLib.h108
-rw-r--r--MdePkg/Include/Library/UefiDriverEntryPoint.h195
-rw-r--r--MdePkg/Include/Library/UefiLib.h1493
-rw-r--r--MdePkg/Include/Library/UefiRuntimeLib.h588
-rw-r--r--MdePkg/Include/Library/UefiRuntimeServicesTableLib.h32
-rw-r--r--MdePkg/Include/Library/UefiScsiLib.h1181
-rw-r--r--MdePkg/Include/Library/UefiUsbLib.h563
-rw-r--r--MdePkg/Include/Pi/PiBootMode.h42
-rw-r--r--MdePkg/Include/Pi/PiDependency.h47
-rw-r--r--MdePkg/Include/Pi/PiDxeCis.h740
-rw-r--r--MdePkg/Include/Pi/PiFirmwareFile.h494
-rw-r--r--MdePkg/Include/Pi/PiFirmwareVolume.h234
-rw-r--r--MdePkg/Include/Pi/PiHob.h479
-rw-r--r--MdePkg/Include/Pi/PiI2c.h307
-rw-r--r--MdePkg/Include/Pi/PiMultiPhase.h179
-rw-r--r--MdePkg/Include/Pi/PiPeiCis.h1042
-rw-r--r--MdePkg/Include/Pi/PiS3BootScript.h59
-rw-r--r--MdePkg/Include/Pi/PiSmmCis.h351
-rw-r--r--MdePkg/Include/Pi/PiSmmCommunicationAcpiTable.h20
-rw-r--r--MdePkg/Include/Pi/PiStatusCode.h1199
-rw-r--r--MdePkg/Include/PiDxe.h25
-rw-r--r--MdePkg/Include/PiPei.h27
-rw-r--r--MdePkg/Include/PiSmm.h26
-rw-r--r--MdePkg/Include/Ppi/BlockIo.h238
-rw-r--r--MdePkg/Include/Ppi/BlockIo2.h223
-rw-r--r--MdePkg/Include/Ppi/BootInRecoveryMode.h30
-rw-r--r--MdePkg/Include/Ppi/Capsule.h136
-rw-r--r--MdePkg/Include/Ppi/CpuIo.h428
-rw-r--r--MdePkg/Include/Ppi/Decompress.h74
-rw-r--r--MdePkg/Include/Ppi/DeviceRecoveryModule.h144
-rw-r--r--MdePkg/Include/Ppi/DxeIpl.h72
-rw-r--r--MdePkg/Include/Ppi/EndOfPeiPhase.h31
-rw-r--r--MdePkg/Include/Ppi/FirmwareVolume.h294
-rw-r--r--MdePkg/Include/Ppi/FirmwareVolumeInfo.h68
-rw-r--r--MdePkg/Include/Ppi/FirmwareVolumeInfo2.h72
-rw-r--r--MdePkg/Include/Ppi/Graphics.h85
-rw-r--r--MdePkg/Include/Ppi/GuidedSectionExtraction.h104
-rw-r--r--MdePkg/Include/Ppi/I2cMaster.h108
-rw-r--r--MdePkg/Include/Ppi/IsaHc.h119
-rw-r--r--MdePkg/Include/Ppi/LoadFile.h77
-rw-r--r--MdePkg/Include/Ppi/LoadImage.h52
-rw-r--r--MdePkg/Include/Ppi/MasterBootMode.h32
-rw-r--r--MdePkg/Include/Ppi/MemoryDiscovered.h32
-rw-r--r--MdePkg/Include/Ppi/MpServices.h283
-rw-r--r--MdePkg/Include/Ppi/Pcd.h860
-rw-r--r--MdePkg/Include/Ppi/PcdInfo.h105
-rw-r--r--MdePkg/Include/Ppi/PciCfg2.h184
-rw-r--r--MdePkg/Include/Ppi/PiPcd.h432
-rw-r--r--MdePkg/Include/Ppi/PiPcdInfo.h82
-rw-r--r--MdePkg/Include/Ppi/ReadOnlyVariable2.h116
-rw-r--r--MdePkg/Include/Ppi/RecoveryModule.h87
-rw-r--r--MdePkg/Include/Ppi/ReportStatusCodeHandler.h82
-rw-r--r--MdePkg/Include/Ppi/Reset.h44
-rw-r--r--MdePkg/Include/Ppi/Reset2.h38
-rw-r--r--MdePkg/Include/Ppi/S3Resume2.h92
-rw-r--r--MdePkg/Include/Ppi/SecPlatformInformation.h188
-rw-r--r--MdePkg/Include/Ppi/SecPlatformInformation2.h85
-rw-r--r--MdePkg/Include/Ppi/Security2.h101
-rw-r--r--MdePkg/Include/Ppi/Smbus2.h203
-rw-r--r--MdePkg/Include/Ppi/Stall.h62
-rw-r--r--MdePkg/Include/Ppi/StatusCode.h41
-rw-r--r--MdePkg/Include/Ppi/SuperIo.h189
-rw-r--r--MdePkg/Include/Ppi/TemporaryRamDone.h52
-rw-r--r--MdePkg/Include/Ppi/TemporaryRamSupport.h66
-rw-r--r--MdePkg/Include/Ppi/VectorHandoffInfo.h75
-rw-r--r--MdePkg/Include/Protocol/AbsolutePointer.h205
-rw-r--r--MdePkg/Include/Protocol/AcpiSystemDescriptionTable.h266
-rw-r--r--MdePkg/Include/Protocol/AcpiTable.h127
-rw-r--r--MdePkg/Include/Protocol/AdapterInformation.h241
-rw-r--r--MdePkg/Include/Protocol/Arp.h385
-rw-r--r--MdePkg/Include/Protocol/AtaPassThru.h471
-rw-r--r--MdePkg/Include/Protocol/AuthenticationInfo.h237
-rw-r--r--MdePkg/Include/Protocol/Bds.h72
-rw-r--r--MdePkg/Include/Protocol/Bis.h451
-rw-r--r--MdePkg/Include/Protocol/BlockIo.h241
-rw-r--r--MdePkg/Include/Protocol/BlockIo2.h206
-rw-r--r--MdePkg/Include/Protocol/BlockIoCrypto.h527
-rw-r--r--MdePkg/Include/Protocol/BluetoothConfig.h514
-rw-r--r--MdePkg/Include/Protocol/BluetoothHc.h328
-rw-r--r--MdePkg/Include/Protocol/BluetoothIo.h416
-rw-r--r--MdePkg/Include/Protocol/BootManagerPolicy.h138
-rw-r--r--MdePkg/Include/Protocol/BusSpecificDriverOverride.h72
-rw-r--r--MdePkg/Include/Protocol/Capsule.h35
-rw-r--r--MdePkg/Include/Protocol/ComponentName.h129
-rw-r--r--MdePkg/Include/Protocol/ComponentName2.h172
-rw-r--r--MdePkg/Include/Protocol/Cpu.h300
-rw-r--r--MdePkg/Include/Protocol/CpuIo2.h142
-rw-r--r--MdePkg/Include/Protocol/DebugPort.h146
-rw-r--r--MdePkg/Include/Protocol/DebugSupport.h778
-rw-r--r--MdePkg/Include/Protocol/Decompress.h122
-rw-r--r--MdePkg/Include/Protocol/DeferredImageLoad.h80
-rw-r--r--MdePkg/Include/Protocol/DeviceIo.h268
-rw-r--r--MdePkg/Include/Protocol/DevicePath.h1331
-rw-r--r--MdePkg/Include/Protocol/DevicePathFromText.h72
-rw-r--r--MdePkg/Include/Protocol/DevicePathToText.h85
-rw-r--r--MdePkg/Include/Protocol/DevicePathUtilities.h192
-rw-r--r--MdePkg/Include/Protocol/Dhcp4.h780
-rw-r--r--MdePkg/Include/Protocol/Dhcp6.h786
-rw-r--r--MdePkg/Include/Protocol/DiskInfo.h218
-rw-r--r--MdePkg/Include/Protocol/DiskIo.h117
-rw-r--r--MdePkg/Include/Protocol/DiskIo2.h172
-rw-r--r--MdePkg/Include/Protocol/Dns4.h543
-rw-r--r--MdePkg/Include/Protocol/Dns6.h539
-rw-r--r--MdePkg/Include/Protocol/DriverBinding.h201
-rw-r--r--MdePkg/Include/Protocol/DriverConfiguration.h167
-rw-r--r--MdePkg/Include/Protocol/DriverConfiguration2.h190
-rw-r--r--MdePkg/Include/Protocol/DriverDiagnostics.h131
-rw-r--r--MdePkg/Include/Protocol/DriverDiagnostics2.h111
-rw-r--r--MdePkg/Include/Protocol/DriverFamilyOverride.h66
-rw-r--r--MdePkg/Include/Protocol/DriverHealth.h247
-rw-r--r--MdePkg/Include/Protocol/DriverSupportedEfiVersion.h46
-rw-r--r--MdePkg/Include/Protocol/DxeSmmReadyToLock.h41
-rw-r--r--MdePkg/Include/Protocol/Eap.h162
-rw-r--r--MdePkg/Include/Protocol/EapConfiguration.h159
-rw-r--r--MdePkg/Include/Protocol/EapManagement.h403
-rw-r--r--MdePkg/Include/Protocol/EapManagement2.h87
-rw-r--r--MdePkg/Include/Protocol/Ebc.h314
-rw-r--r--MdePkg/Include/Protocol/EdidActive.h52
-rw-r--r--MdePkg/Include/Protocol/EdidDiscovered.h50
-rw-r--r--MdePkg/Include/Protocol/EdidOverride.h67
-rw-r--r--MdePkg/Include/Protocol/EraseBlock.h105
-rw-r--r--MdePkg/Include/Protocol/ExtendedSalBootService.h214
-rw-r--r--MdePkg/Include/Protocol/ExtendedSalServiceClasses.h275
-rw-r--r--MdePkg/Include/Protocol/FirmwareManagement.h538
-rw-r--r--MdePkg/Include/Protocol/FirmwareVolume2.h762
-rw-r--r--MdePkg/Include/Protocol/FirmwareVolumeBlock.h366
-rw-r--r--MdePkg/Include/Protocol/FormBrowser2.h180
-rw-r--r--MdePkg/Include/Protocol/Ftp4.h524
-rw-r--r--MdePkg/Include/Protocol/GraphicsOutput.h276
-rw-r--r--MdePkg/Include/Protocol/GuidedSectionExtraction.h141
-rw-r--r--MdePkg/Include/Protocol/Hash.h175
-rw-r--r--MdePkg/Include/Protocol/Hash2.h202
-rw-r--r--MdePkg/Include/Protocol/HiiConfigAccess.h223
-rw-r--r--MdePkg/Include/Protocol/HiiConfigKeyword.h201
-rw-r--r--MdePkg/Include/Protocol/HiiConfigRouting.h419
-rw-r--r--MdePkg/Include/Protocol/HiiDatabase.h531
-rw-r--r--MdePkg/Include/Protocol/HiiFont.h472
-rw-r--r--MdePkg/Include/Protocol/HiiImage.h356
-rw-r--r--MdePkg/Include/Protocol/HiiImageDecoder.h212
-rw-r--r--MdePkg/Include/Protocol/HiiImageEx.h245
-rw-r--r--MdePkg/Include/Protocol/HiiPackageList.h33
-rw-r--r--MdePkg/Include/Protocol/HiiString.h241
-rw-r--r--MdePkg/Include/Protocol/Http.h519
-rw-r--r--MdePkg/Include/Protocol/HttpUtilities.h124
-rw-r--r--MdePkg/Include/Protocol/I2cBusConfigurationManagement.h171
-rw-r--r--MdePkg/Include/Protocol/I2cEnumerate.h110
-rw-r--r--MdePkg/Include/Protocol/I2cHost.h152
-rw-r--r--MdePkg/Include/Protocol/I2cIo.h172
-rw-r--r--MdePkg/Include/Protocol/I2cMaster.h192
-rw-r--r--MdePkg/Include/Protocol/IScsiInitiatorName.h87
-rw-r--r--MdePkg/Include/Protocol/IdeControllerInit.h565
-rw-r--r--MdePkg/Include/Protocol/IncompatiblePciDeviceSupport.h173
-rw-r--r--MdePkg/Include/Protocol/Ip4.h612
-rw-r--r--MdePkg/Include/Protocol/Ip4Config.h182
-rw-r--r--MdePkg/Include/Protocol/Ip4Config2.h318
-rw-r--r--MdePkg/Include/Protocol/Ip6.h953
-rw-r--r--MdePkg/Include/Protocol/Ip6Config.h369
-rw-r--r--MdePkg/Include/Protocol/IpSec.h224
-rw-r--r--MdePkg/Include/Protocol/IpSecConfig.h807
-rw-r--r--MdePkg/Include/Protocol/IsaHc.h116
-rw-r--r--MdePkg/Include/Protocol/Kms.h1328
-rw-r--r--MdePkg/Include/Protocol/LegacyRegion2.h239
-rw-r--r--MdePkg/Include/Protocol/LoadFile.h88
-rw-r--r--MdePkg/Include/Protocol/LoadFile2.h85
-rw-r--r--MdePkg/Include/Protocol/LoadedImage.h88
-rw-r--r--MdePkg/Include/Protocol/ManagedNetwork.h372
-rw-r--r--MdePkg/Include/Protocol/McaInitPmi.h207
-rw-r--r--MdePkg/Include/Protocol/Metronome.h80
-rw-r--r--MdePkg/Include/Protocol/MonotonicCounter.h28
-rw-r--r--MdePkg/Include/Protocol/MpService.h632
-rw-r--r--MdePkg/Include/Protocol/Mtftp4.h593
-rw-r--r--MdePkg/Include/Protocol/Mtftp6.h826
-rw-r--r--MdePkg/Include/Protocol/NetworkInterfaceIdentifier.h118
-rw-r--r--MdePkg/Include/Protocol/NvmExpressPassthru.h286
-rw-r--r--MdePkg/Include/Protocol/Pcd.h864
-rw-r--r--MdePkg/Include/Protocol/PcdInfo.h105
-rw-r--r--MdePkg/Include/Protocol/PciEnumerationComplete.h30
-rw-r--r--MdePkg/Include/Protocol/PciHostBridgeResourceAllocation.h428
-rw-r--r--MdePkg/Include/Protocol/PciHotPlugInit.h278
-rw-r--r--MdePkg/Include/Protocol/PciHotPlugRequest.h170
-rw-r--r--MdePkg/Include/Protocol/PciIo.h558
-rw-r--r--MdePkg/Include/Protocol/PciOverride.h46
-rw-r--r--MdePkg/Include/Protocol/PciPlatform.h344
-rw-r--r--MdePkg/Include/Protocol/PciRootBridgeIo.h442
-rw-r--r--MdePkg/Include/Protocol/PiPcd.h424
-rw-r--r--MdePkg/Include/Protocol/PiPcdInfo.h83
-rw-r--r--MdePkg/Include/Protocol/Pkcs7Verify.h221
-rw-r--r--MdePkg/Include/Protocol/PlatformDriverOverride.h140
-rw-r--r--MdePkg/Include/Protocol/PlatformToDriverConfiguration.h355
-rw-r--r--MdePkg/Include/Protocol/PxeBaseCode.h934
-rw-r--r--MdePkg/Include/Protocol/PxeBaseCodeCallBack.h130
-rw-r--r--MdePkg/Include/Protocol/RamDisk.h106
-rw-r--r--MdePkg/Include/Protocol/RealTimeClock.h36
-rw-r--r--MdePkg/Include/Protocol/RegularExpressionProtocol.h178
-rw-r--r--MdePkg/Include/Protocol/ReportStatusCodeHandler.h94
-rw-r--r--MdePkg/Include/Protocol/Reset.h31
-rw-r--r--MdePkg/Include/Protocol/Rest.h94
-rw-r--r--MdePkg/Include/Protocol/Rng.h156
-rw-r--r--MdePkg/Include/Protocol/Runtime.h128
-rw-r--r--MdePkg/Include/Protocol/S3SaveState.h176
-rw-r--r--MdePkg/Include/Protocol/S3SmmSaveState.h46
-rw-r--r--MdePkg/Include/Protocol/ScsiIo.h317
-rw-r--r--MdePkg/Include/Protocol/ScsiPassThru.h383
-rw-r--r--MdePkg/Include/Protocol/ScsiPassThruExt.h394
-rw-r--r--MdePkg/Include/Protocol/SdMmcPassThru.h264
-rw-r--r--MdePkg/Include/Protocol/Security.h103
-rw-r--r--MdePkg/Include/Protocol/Security2.h107
-rw-r--r--MdePkg/Include/Protocol/SecurityPolicy.h26
-rw-r--r--MdePkg/Include/Protocol/SerialIo.h299
-rw-r--r--MdePkg/Include/Protocol/ServiceBinding.h94
-rw-r--r--MdePkg/Include/Protocol/Shell.h1268
-rw-r--r--MdePkg/Include/Protocol/ShellDynamicCommand.h85
-rw-r--r--MdePkg/Include/Protocol/ShellParameters.h60
-rw-r--r--MdePkg/Include/Protocol/SimpleFileSystem.h562
-rw-r--r--MdePkg/Include/Protocol/SimpleNetwork.h681
-rw-r--r--MdePkg/Include/Protocol/SimplePointer.h143
-rw-r--r--MdePkg/Include/Protocol/SimpleTextIn.h133
-rw-r--r--MdePkg/Include/Protocol/SimpleTextInEx.h325
-rw-r--r--MdePkg/Include/Protocol/SimpleTextOut.h415
-rw-r--r--MdePkg/Include/Protocol/SmartCardEdge.h739
-rw-r--r--MdePkg/Include/Protocol/SmartCardReader.h325
-rw-r--r--MdePkg/Include/Protocol/Smbios.h213
-rw-r--r--MdePkg/Include/Protocol/SmbusHc.h295
-rw-r--r--MdePkg/Include/Protocol/SmmAccess2.h132
-rw-r--r--MdePkg/Include/Protocol/SmmBase2.h87
-rw-r--r--MdePkg/Include/Protocol/SmmCommunication.h65
-rw-r--r--MdePkg/Include/Protocol/SmmConfiguration.h86
-rw-r--r--MdePkg/Include/Protocol/SmmControl2.h106
-rw-r--r--MdePkg/Include/Protocol/SmmCpu.h247
-rw-r--r--MdePkg/Include/Protocol/SmmCpuIo2.h96
-rw-r--r--MdePkg/Include/Protocol/SmmEndOfDxe.h33
-rw-r--r--MdePkg/Include/Protocol/SmmGpiDispatch2.h125
-rw-r--r--MdePkg/Include/Protocol/SmmIoTrapDispatch2.h136
-rw-r--r--MdePkg/Include/Protocol/SmmPciRootBridgeIo.h37
-rw-r--r--MdePkg/Include/Protocol/SmmPeriodicTimerDispatch2.h170
-rw-r--r--MdePkg/Include/Protocol/SmmPowerButtonDispatch2.h117
-rw-r--r--MdePkg/Include/Protocol/SmmReadyToLock.h35
-rw-r--r--MdePkg/Include/Protocol/SmmReportStatusCodeHandler.h81
-rw-r--r--MdePkg/Include/Protocol/SmmStandbyButtonDispatch2.h119
-rw-r--r--MdePkg/Include/Protocol/SmmStatusCode.h65
-rw-r--r--MdePkg/Include/Protocol/SmmSwDispatch2.h136
-rw-r--r--MdePkg/Include/Protocol/SmmSxDispatch2.h135
-rw-r--r--MdePkg/Include/Protocol/SmmUsbDispatch2.h130
-rw-r--r--MdePkg/Include/Protocol/StatusCode.h59
-rw-r--r--MdePkg/Include/Protocol/StorageSecurityCommand.h212
-rw-r--r--MdePkg/Include/Protocol/SuperIo.h175
-rw-r--r--MdePkg/Include/Protocol/SuperIoControl.h92
-rw-r--r--MdePkg/Include/Protocol/Supplicant.h460
-rw-r--r--MdePkg/Include/Protocol/TapeIo.h237
-rw-r--r--MdePkg/Include/Protocol/Tcg2Protocol.h341
-rw-r--r--MdePkg/Include/Protocol/TcgService.h201
-rw-r--r--MdePkg/Include/Protocol/Tcp4.h577
-rw-r--r--MdePkg/Include/Protocol/Tcp6.h864
-rw-r--r--MdePkg/Include/Protocol/Timer.h180
-rw-r--r--MdePkg/Include/Protocol/Timestamp.h101
-rw-r--r--MdePkg/Include/Protocol/Tls.h460
-rw-r--r--MdePkg/Include/Protocol/TlsConfig.h132
-rw-r--r--MdePkg/Include/Protocol/TrEEProtocol.h249
-rw-r--r--MdePkg/Include/Protocol/Udp4.h445
-rw-r--r--MdePkg/Include/Protocol/Udp6.h580
-rw-r--r--MdePkg/Include/Protocol/UgaDraw.h166
-rw-r--r--MdePkg/Include/Protocol/UgaIo.h197
-rw-r--r--MdePkg/Include/Protocol/UnicodeCollation.h192
-rw-r--r--MdePkg/Include/Protocol/Usb2HostController.h664
-rw-r--r--MdePkg/Include/Protocol/UsbFunctionIo.h683
-rw-r--r--MdePkg/Include/Protocol/UsbHostController.h508
-rw-r--r--MdePkg/Include/Protocol/UsbIo.h512
-rw-r--r--MdePkg/Include/Protocol/UserCredential.h292
-rw-r--r--MdePkg/Include/Protocol/UserCredential2.h314
-rw-r--r--MdePkg/Include/Protocol/UserManager.h624
-rw-r--r--MdePkg/Include/Protocol/Variable.h45
-rw-r--r--MdePkg/Include/Protocol/VariableWrite.h45
-rw-r--r--MdePkg/Include/Protocol/VlanConfig.h143
-rw-r--r--MdePkg/Include/Protocol/WatchdogTimer.h144
-rw-r--r--MdePkg/Include/Protocol/WiFi.h1129
-rw-r--r--MdePkg/Include/Protocol/WiFi2.h413
-rw-r--r--MdePkg/Include/Uefi.h27
-rw-r--r--MdePkg/Include/Uefi/UefiAcpiDataTable.h60
-rw-r--r--MdePkg/Include/Uefi/UefiBaseType.h299
-rw-r--r--MdePkg/Include/Uefi/UefiGpt.h141
-rw-r--r--MdePkg/Include/Uefi/UefiInternalFormRepresentation.h2135
-rw-r--r--MdePkg/Include/Uefi/UefiMultiPhase.h231
-rw-r--r--MdePkg/Include/Uefi/UefiPxe.h1792
-rw-r--r--MdePkg/Include/Uefi/UefiSpec.h2194
-rw-r--r--MdePkg/Include/X64/ProcessorBind.h337
459 files changed, 160577 insertions, 0 deletions
diff --git a/MdePkg/Include/AArch64/ProcessorBind.h b/MdePkg/Include/AArch64/ProcessorBind.h
new file mode 100644
index 000000000000..3fc678c756b3
--- /dev/null
+++ b/MdePkg/Include/AArch64/ProcessorBind.h
@@ -0,0 +1,154 @@
+/** @file
+ Processor or Compiler specific defines and types for AArch64.
+
+ Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+ Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+ Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __PROCESSOR_BIND_H__
+#define __PROCESSOR_BIND_H__
+
+///
+/// Define the processor type so other code can make processor based choices
+///
+#define MDE_CPU_AARCH64
+
+//
+// Make sure we are using the correct packing rules per EFI specification
+//
+#ifndef __GNUC__
+#pragma pack()
+#endif
+
+#if _MSC_EXTENSIONS
+ //
+ // use Microsoft* C compiler dependent integer width types
+ //
+ typedef unsigned __int64 UINT64;
+ typedef __int64 INT64;
+ typedef unsigned __int32 UINT32;
+ typedef __int32 INT32;
+ typedef unsigned short UINT16;
+ typedef unsigned short CHAR16;
+ typedef short INT16;
+ typedef unsigned char BOOLEAN;
+ typedef unsigned char UINT8;
+ typedef char CHAR8;
+ typedef signed char INT8;
+#else
+ //
+ // Assume standard AARCH64 alignment.
+ //
+ typedef unsigned long long UINT64;
+ typedef long long INT64;
+ typedef unsigned int UINT32;
+ typedef int INT32;
+ typedef unsigned short UINT16;
+ typedef unsigned short CHAR16;
+ typedef short INT16;
+ typedef unsigned char BOOLEAN;
+ typedef unsigned char UINT8;
+ typedef char CHAR8;
+ typedef signed char INT8;
+#endif
+
+///
+/// Unsigned value of native width. (4 bytes on supported 32-bit processor instructions,
+/// 8 bytes on supported 64-bit processor instructions)
+///
+typedef UINT64 UINTN;
+
+///
+/// Signed value of native width. (4 bytes on supported 32-bit processor instructions,
+/// 8 bytes on supported 64-bit processor instructions)
+///
+typedef INT64 INTN;
+
+//
+// Processor specific defines
+//
+
+///
+/// A value of native width with the highest bit set.
+///
+#define MAX_BIT 0x8000000000000000ULL
+
+///
+/// A value of native width with the two highest bits set.
+///
+#define MAX_2_BITS 0xC000000000000000ULL
+
+///
+/// Maximum legal AARCH64 address
+///
+#define MAX_ADDRESS 0xFFFFFFFFFFFFFFFFULL
+
+///
+/// Maximum legal AArch64 INTN and UINTN values.
+///
+#define MAX_INTN ((INTN)0x7FFFFFFFFFFFFFFFULL)
+#define MAX_UINTN ((UINTN)0xFFFFFFFFFFFFFFFFULL)
+
+///
+/// The stack alignment required for AARCH64
+///
+#define CPU_STACK_ALIGNMENT 16
+
+///
+/// Page allocation granularity for AARCH64
+///
+#define DEFAULT_PAGE_ALLOCATION_GRANULARITY (0x1000)
+#define RUNTIME_PAGE_ALLOCATION_GRANULARITY (0x10000)
+
+//
+// Modifier to ensure that all protocol member functions and EFI intrinsics
+// use the correct C calling convention. All protocol member functions and
+// EFI intrinsics are required to modify their member functions with EFIAPI.
+//
+#define EFIAPI
+
+// When compiling with Clang, we still use GNU as for the assembler, so we still
+// need to define the GCC_ASM* macros.
+#if defined(__GNUC__) || defined(__clang__)
+ ///
+ /// For GNU assembly code, .global or .globl can declare global symbols.
+ /// Define this macro to unify the usage.
+ ///
+ #define ASM_GLOBAL .globl
+
+ #define GCC_ASM_EXPORT(func__) \
+ .global _CONCATENATE (__USER_LABEL_PREFIX__, func__) ;\
+ .type ASM_PFX(func__), %function
+
+ #define GCC_ASM_IMPORT(func__) \
+ .extern _CONCATENATE (__USER_LABEL_PREFIX__, func__)
+
+#endif
+
+/**
+ Return the pointer to the first instruction of a function given a function pointer.
+ On ARM CPU architectures, these two pointer values are the same,
+ so the implementation of this macro is very simple.
+
+ @param FunctionPointer A pointer to a function.
+
+ @return The pointer to the first instruction of a function given a function pointer.
+
+**/
+#define FUNCTION_ENTRY_POINT(FunctionPointer) (VOID *)(UINTN)(FunctionPointer)
+
+#ifndef __USER_LABEL_PREFIX__
+#define __USER_LABEL_PREFIX__
+#endif
+
+#endif
diff --git a/MdePkg/Include/Arm/ProcessorBind.h b/MdePkg/Include/Arm/ProcessorBind.h
new file mode 100644
index 000000000000..ba024c072d71
--- /dev/null
+++ b/MdePkg/Include/Arm/ProcessorBind.h
@@ -0,0 +1,182 @@
+/** @file
+ Processor or Compiler specific defines and types for ARM.
+
+ Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
+ Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __PROCESSOR_BIND_H__
+#define __PROCESSOR_BIND_H__
+
+///
+/// Define the processor type so other code can make processor based choices
+///
+#define MDE_CPU_ARM
+
+//
+// Make sure we are using the correct packing rules per EFI specification
+//
+#ifndef __GNUC__
+#pragma pack()
+#endif
+
+//
+// RVCT does not support the __builtin_unreachable() macro
+//
+#ifdef __ARMCC_VERSION
+#define UNREACHABLE()
+#endif
+
+#if _MSC_EXTENSIONS
+ //
+ // use Microsoft* C compiler dependent integer width types
+ //
+ typedef unsigned __int64 UINT64;
+ typedef __int64 INT64;
+ typedef unsigned __int32 UINT32;
+ typedef __int32 INT32;
+ typedef unsigned short UINT16;
+ typedef unsigned short CHAR16;
+ typedef short INT16;
+ typedef unsigned char BOOLEAN;
+ typedef unsigned char UINT8;
+ typedef char CHAR8;
+ typedef signed char INT8;
+#else
+ //
+ // Assume standard ARM alignment.
+ // Need to check portability of long long
+ //
+ typedef unsigned long long UINT64;
+ typedef long long INT64;
+ typedef unsigned int UINT32;
+ typedef int INT32;
+ typedef unsigned short UINT16;
+ typedef unsigned short CHAR16;
+ typedef short INT16;
+ typedef unsigned char BOOLEAN;
+ typedef unsigned char UINT8;
+ typedef char CHAR8;
+ typedef signed char INT8;
+#endif
+
+///
+/// Unsigned value of native width. (4 bytes on supported 32-bit processor instructions,
+/// 8 bytes on supported 64-bit processor instructions)
+///
+typedef UINT32 UINTN;
+
+///
+/// Signed value of native width. (4 bytes on supported 32-bit processor instructions,
+/// 8 bytes on supported 64-bit processor instructions)
+///
+typedef INT32 INTN;
+
+//
+// Processor specific defines
+//
+
+///
+/// A value of native width with the highest bit set.
+///
+#define MAX_BIT 0x80000000
+
+///
+/// A value of native width with the two highest bits set.
+///
+#define MAX_2_BITS 0xC0000000
+
+///
+/// Maximum legal ARM address
+///
+#define MAX_ADDRESS 0xFFFFFFFF
+
+///
+/// Maximum legal ARM INTN and UINTN values.
+///
+#define MAX_INTN ((INTN)0x7FFFFFFF)
+#define MAX_UINTN ((UINTN)0xFFFFFFFF)
+
+///
+/// The stack alignment required for ARM
+///
+#define CPU_STACK_ALIGNMENT sizeof(UINT64)
+
+///
+/// Page allocation granularity for ARM
+///
+#define DEFAULT_PAGE_ALLOCATION_GRANULARITY (0x1000)
+#define RUNTIME_PAGE_ALLOCATION_GRANULARITY (0x1000)
+
+//
+// Modifier to ensure that all protocol member functions and EFI intrinsics
+// use the correct C calling convention. All protocol member functions and
+// EFI intrinsics are required to modify their member functions with EFIAPI.
+//
+#define EFIAPI
+
+// When compiling with Clang, we still use GNU as for the assembler, so we still
+// need to define the GCC_ASM* macros.
+#if defined(__GNUC__) || defined(__clang__)
+ ///
+ /// For GNU assembly code, .global or .globl can declare global symbols.
+ /// Define this macro to unify the usage.
+ ///
+ #define ASM_GLOBAL .globl
+
+ #if !defined(__APPLE__)
+ ///
+ /// ARM EABI defines that the linker should not manipulate call relocations
+ /// (do bl/blx conversion) unless the target symbol has function type.
+ /// CodeSourcery 2010.09 started requiring the .type to function properly
+ ///
+ #define INTERWORK_FUNC(func__) .type ASM_PFX(func__), %function
+
+ #define GCC_ASM_EXPORT(func__) \
+ .global _CONCATENATE (__USER_LABEL_PREFIX__, func__) ;\
+ .type ASM_PFX(func__), %function
+
+ #define GCC_ASM_IMPORT(func__) \
+ .extern _CONCATENATE (__USER_LABEL_PREFIX__, func__)
+
+ #else
+ //
+ // .type not supported by Apple Xcode tools
+ //
+ #define INTERWORK_FUNC(func__)
+
+ #define GCC_ASM_EXPORT(func__) \
+ .globl _CONCATENATE (__USER_LABEL_PREFIX__, func__) \
+
+ #define GCC_ASM_IMPORT(name)
+
+ #endif
+#endif
+
+/**
+ Return the pointer to the first instruction of a function given a function pointer.
+ On ARM CPU architectures, these two pointer values are the same,
+ so the implementation of this macro is very simple.
+
+ @param FunctionPointer A pointer to a function.
+
+ @return The pointer to the first instruction of a function given a function pointer.
+
+**/
+#define FUNCTION_ENTRY_POINT(FunctionPointer) (VOID *)(UINTN)(FunctionPointer)
+
+#ifndef __USER_LABEL_PREFIX__
+#define __USER_LABEL_PREFIX__
+#endif
+
+#endif
+
+
diff --git a/MdePkg/Include/Base.h b/MdePkg/Include/Base.h
new file mode 100644
index 000000000000..70cb9992a6fd
--- /dev/null
+++ b/MdePkg/Include/Base.h
@@ -0,0 +1,1270 @@
+/** @file
+ Root include file for Mde Package Base type modules
+
+ This is the include file for any module of type base. Base modules only use
+ types defined via this include file and can be ported easily to any
+ environment. There are a set of base libraries in the Mde Package that can
+ be used to implement base modules.
+
+Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
+Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+#ifndef __BASE_H__
+#define __BASE_H__
+
+//
+// Include processor specific binding
+//
+#include <ProcessorBind.h>
+
+#if defined(_MSC_EXTENSIONS)
+//
+// Disable warning when last field of data structure is a zero sized array.
+//
+#pragma warning ( disable : 4200 )
+#endif
+
+/**
+ Verifies the storage size of a given data type.
+
+ This macro generates a divide by zero error or a zero size array declaration in
+ the preprocessor if the size is incorrect. These are declared as "extern" so
+ the space for these arrays will not be in the modules.
+
+ @param TYPE The date type to determine the size of.
+ @param Size The expected size for the TYPE.
+
+**/
+#define VERIFY_SIZE_OF(TYPE, Size) extern UINT8 _VerifySizeof##TYPE[(sizeof(TYPE) == (Size)) / (sizeof(TYPE) == (Size))]
+
+//
+// Verify that ProcessorBind.h produced UEFI Data Types that are compliant with
+// Section 2.3.1 of the UEFI 2.3 Specification.
+//
+VERIFY_SIZE_OF (BOOLEAN, 1);
+VERIFY_SIZE_OF (INT8, 1);
+VERIFY_SIZE_OF (UINT8, 1);
+VERIFY_SIZE_OF (INT16, 2);
+VERIFY_SIZE_OF (UINT16, 2);
+VERIFY_SIZE_OF (INT32, 4);
+VERIFY_SIZE_OF (UINT32, 4);
+VERIFY_SIZE_OF (INT64, 8);
+VERIFY_SIZE_OF (UINT64, 8);
+VERIFY_SIZE_OF (CHAR8, 1);
+VERIFY_SIZE_OF (CHAR16, 2);
+
+//
+// The following three enum types are used to verify that the compiler
+// configuration for enum types is compliant with Section 2.3.1 of the
+// UEFI 2.3 Specification. These enum types and enum values are not
+// intended to be used. A prefix of '__' is used avoid conflicts with
+// other types.
+//
+typedef enum {
+ __VerifyUint8EnumValue = 0xff
+} __VERIFY_UINT8_ENUM_SIZE;
+
+typedef enum {
+ __VerifyUint16EnumValue = 0xffff
+} __VERIFY_UINT16_ENUM_SIZE;
+
+typedef enum {
+ __VerifyUint32EnumValue = 0xffffffff
+} __VERIFY_UINT32_ENUM_SIZE;
+
+VERIFY_SIZE_OF (__VERIFY_UINT8_ENUM_SIZE, 4);
+VERIFY_SIZE_OF (__VERIFY_UINT16_ENUM_SIZE, 4);
+VERIFY_SIZE_OF (__VERIFY_UINT32_ENUM_SIZE, 4);
+
+//
+// The Microsoft* C compiler can removed references to unreferenced data items
+// if the /OPT:REF linker option is used. We defined a macro as this is a
+// a non standard extension
+//
+#if defined(_MSC_EXTENSIONS) && !defined (MDE_CPU_EBC)
+ ///
+ /// Remove global variable from the linked image if there are no references to
+ /// it after all compiler and linker optimizations have been performed.
+ ///
+ ///
+ #define GLOBAL_REMOVE_IF_UNREFERENCED __declspec(selectany)
+#else
+ ///
+ /// Remove the global variable from the linked image if there are no references
+ /// to it after all compiler and linker optimizations have been performed.
+ ///
+ ///
+ #define GLOBAL_REMOVE_IF_UNREFERENCED
+#endif
+
+//
+// Should be used in combination with NORETURN to avoid 'noreturn' returns
+// warnings.
+//
+#ifndef UNREACHABLE
+ #if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ > 4)
+ ///
+ /// Signal compilers and analyzers that this call is not reachable. It is
+ /// up to the compiler to remove any code past that point.
+ /// Not implemented by GCC 4.4 or earlier.
+ ///
+ #define UNREACHABLE() __builtin_unreachable ()
+ #elif defined (__has_feature)
+ #if __has_builtin (__builtin_unreachable)
+ ///
+ /// Signal compilers and analyzers that this call is not reachable. It is
+ /// up to the compiler to remove any code past that point.
+ ///
+ #define UNREACHABLE() __builtin_unreachable ()
+ #endif
+ #endif
+
+ #ifndef UNREACHABLE
+ ///
+ /// Signal compilers and analyzers that this call is not reachable. It is
+ /// up to the compiler to remove any code past that point.
+ ///
+ #define UNREACHABLE()
+ #endif
+#endif
+
+//
+// Signaling compilers and analyzers that a certain function cannot return may
+// remove all following code and thus lead to better optimization and less
+// false positives.
+//
+#ifndef NORETURN
+ #if defined (__GNUC__) || defined (__clang__)
+ ///
+ /// Signal compilers and analyzers that the function cannot return.
+ /// It is up to the compiler to remove any code past a call to functions
+ /// flagged with this attribute.
+ ///
+ #define NORETURN __attribute__((noreturn))
+ #elif defined(_MSC_EXTENSIONS) && !defined(MDE_CPU_EBC)
+ ///
+ /// Signal compilers and analyzers that the function cannot return.
+ /// It is up to the compiler to remove any code past a call to functions
+ /// flagged with this attribute.
+ ///
+ #define NORETURN __declspec(noreturn)
+ #else
+ ///
+ /// Signal compilers and analyzers that the function cannot return.
+ /// It is up to the compiler to remove any code past a call to functions
+ /// flagged with this attribute.
+ ///
+ #define NORETURN
+ #endif
+#endif
+
+//
+// Should be used in combination with ANALYZER_NORETURN to avoid 'noreturn'
+// returns warnings.
+//
+#ifndef ANALYZER_UNREACHABLE
+ #ifdef __clang_analyzer__
+ #if __has_builtin (__builtin_unreachable)
+ ///
+ /// Signal the analyzer that this call is not reachable.
+ /// This excludes compilers.
+ ///
+ #define ANALYZER_UNREACHABLE() __builtin_unreachable ()
+ #endif
+ #endif
+
+ #ifndef ANALYZER_UNREACHABLE
+ ///
+ /// Signal the analyzer that this call is not reachable.
+ /// This excludes compilers.
+ ///
+ #define ANALYZER_UNREACHABLE()
+ #endif
+#endif
+
+//
+// Static Analyzers may issue errors about potential NULL-dereferences when
+// dereferencing a pointer, that has been checked before, outside of a
+// NULL-check. This may lead to false positives, such as when using ASSERT()
+// for verification.
+//
+#ifndef ANALYZER_NORETURN
+ #ifdef __has_feature
+ #if __has_feature (attribute_analyzer_noreturn)
+ ///
+ /// Signal analyzers that the function cannot return.
+ /// This excludes compilers.
+ ///
+ #define ANALYZER_NORETURN __attribute__((analyzer_noreturn))
+ #endif
+ #endif
+
+ #ifndef ANALYZER_NORETURN
+ ///
+ /// Signal the analyzer that the function cannot return.
+ /// This excludes compilers.
+ ///
+ #define ANALYZER_NORETURN
+ #endif
+#endif
+
+//
+// For symbol name in assembly code, an extra "_" is sometimes necessary
+//
+
+///
+/// Private worker functions for ASM_PFX()
+///
+#define _CONCATENATE(a, b) __CONCATENATE(a, b)
+#define __CONCATENATE(a, b) a ## b
+
+///
+/// The __USER_LABEL_PREFIX__ macro predefined by GNUC represents the prefix
+/// on symbols in assembly language.
+///
+#define ASM_PFX(name) _CONCATENATE (__USER_LABEL_PREFIX__, name)
+
+#if __APPLE__
+ //
+ // Apple extension that is used by the linker to optimize code size
+ // with assembly functions. Put at the end of your .S files
+ //
+ #define ASM_FUNCTION_REMOVE_IF_UNREFERENCED .subsections_via_symbols
+#else
+ #define ASM_FUNCTION_REMOVE_IF_UNREFERENCED
+#endif
+
+#ifdef __CC_ARM
+ //
+ // Older RVCT ARM compilers don't fully support #pragma pack and require __packed
+ // as a prefix for the structure.
+ //
+ #define PACKED __packed
+#else
+ #define PACKED
+#endif
+
+///
+/// 128 bit buffer containing a unique identifier value.
+/// Unless otherwise specified, aligned on a 64 bit boundary.
+///
+typedef struct {
+ UINT32 Data1;
+ UINT16 Data2;
+ UINT16 Data3;
+ UINT8 Data4[8];
+} GUID;
+
+///
+/// 4-byte buffer. An IPv4 internet protocol address.
+///
+typedef struct {
+ UINT8 Addr[4];
+} IPv4_ADDRESS;
+
+///
+/// 16-byte buffer. An IPv6 internet protocol address.
+///
+typedef struct {
+ UINT8 Addr[16];
+} IPv6_ADDRESS;
+
+//
+// 8-bytes unsigned value that represents a physical system address.
+//
+typedef UINT64 PHYSICAL_ADDRESS;
+
+///
+/// LIST_ENTRY structure definition.
+///
+typedef struct _LIST_ENTRY LIST_ENTRY;
+
+///
+/// _LIST_ENTRY structure definition.
+///
+struct _LIST_ENTRY {
+ LIST_ENTRY *ForwardLink;
+ LIST_ENTRY *BackLink;
+};
+
+//
+// Modifiers to abstract standard types to aid in debug of problems
+//
+
+///
+/// Datum is read-only.
+///
+#define CONST const
+
+///
+/// Datum is scoped to the current file or function.
+///
+#define STATIC static
+
+///
+/// Undeclared type.
+///
+#define VOID void
+
+//
+// Modifiers for Data Types used to self document code.
+// This concept is borrowed for UEFI specification.
+//
+
+///
+/// Datum is passed to the function.
+///
+#define IN
+
+///
+/// Datum is returned from the function.
+///
+#define OUT
+
+///
+/// Passing the datum to the function is optional, and a NULL
+/// is passed if the value is not supplied.
+///
+#define OPTIONAL
+
+//
+// UEFI specification claims 1 and 0. We are concerned about the
+// compiler portability so we did it this way.
+//
+
+///
+/// Boolean true value. UEFI Specification defines this value to be 1,
+/// but this form is more portable.
+///
+#define TRUE ((BOOLEAN)(1==1))
+
+///
+/// Boolean false value. UEFI Specification defines this value to be 0,
+/// but this form is more portable.
+///
+#define FALSE ((BOOLEAN)(0==1))
+
+///
+/// NULL pointer (VOID *)
+///
+#define NULL ((VOID *) 0)
+
+//
+// Null character
+//
+#define CHAR_NULL 0x0000
+
+///
+/// Maximum values for common UEFI Data Types
+///
+#define MAX_INT8 ((INT8)0x7F)
+#define MAX_UINT8 ((UINT8)0xFF)
+#define MAX_INT16 ((INT16)0x7FFF)
+#define MAX_UINT16 ((UINT16)0xFFFF)
+#define MAX_INT32 ((INT32)0x7FFFFFFF)
+#define MAX_UINT32 ((UINT32)0xFFFFFFFF)
+#define MAX_INT64 ((INT64)0x7FFFFFFFFFFFFFFFULL)
+#define MAX_UINT64 ((UINT64)0xFFFFFFFFFFFFFFFFULL)
+
+#define BIT0 0x00000001
+#define BIT1 0x00000002
+#define BIT2 0x00000004
+#define BIT3 0x00000008
+#define BIT4 0x00000010
+#define BIT5 0x00000020
+#define BIT6 0x00000040
+#define BIT7 0x00000080
+#define BIT8 0x00000100
+#define BIT9 0x00000200
+#define BIT10 0x00000400
+#define BIT11 0x00000800
+#define BIT12 0x00001000
+#define BIT13 0x00002000
+#define BIT14 0x00004000
+#define BIT15 0x00008000
+#define BIT16 0x00010000
+#define BIT17 0x00020000
+#define BIT18 0x00040000
+#define BIT19 0x00080000
+#define BIT20 0x00100000
+#define BIT21 0x00200000
+#define BIT22 0x00400000
+#define BIT23 0x00800000
+#define BIT24 0x01000000
+#define BIT25 0x02000000
+#define BIT26 0x04000000
+#define BIT27 0x08000000
+#define BIT28 0x10000000
+#define BIT29 0x20000000
+#define BIT30 0x40000000
+#define BIT31 0x80000000
+#define BIT32 0x0000000100000000ULL
+#define BIT33 0x0000000200000000ULL
+#define BIT34 0x0000000400000000ULL
+#define BIT35 0x0000000800000000ULL
+#define BIT36 0x0000001000000000ULL
+#define BIT37 0x0000002000000000ULL
+#define BIT38 0x0000004000000000ULL
+#define BIT39 0x0000008000000000ULL
+#define BIT40 0x0000010000000000ULL
+#define BIT41 0x0000020000000000ULL
+#define BIT42 0x0000040000000000ULL
+#define BIT43 0x0000080000000000ULL
+#define BIT44 0x0000100000000000ULL
+#define BIT45 0x0000200000000000ULL
+#define BIT46 0x0000400000000000ULL
+#define BIT47 0x0000800000000000ULL
+#define BIT48 0x0001000000000000ULL
+#define BIT49 0x0002000000000000ULL
+#define BIT50 0x0004000000000000ULL
+#define BIT51 0x0008000000000000ULL
+#define BIT52 0x0010000000000000ULL
+#define BIT53 0x0020000000000000ULL
+#define BIT54 0x0040000000000000ULL
+#define BIT55 0x0080000000000000ULL
+#define BIT56 0x0100000000000000ULL
+#define BIT57 0x0200000000000000ULL
+#define BIT58 0x0400000000000000ULL
+#define BIT59 0x0800000000000000ULL
+#define BIT60 0x1000000000000000ULL
+#define BIT61 0x2000000000000000ULL
+#define BIT62 0x4000000000000000ULL
+#define BIT63 0x8000000000000000ULL
+
+#define SIZE_1KB 0x00000400
+#define SIZE_2KB 0x00000800
+#define SIZE_4KB 0x00001000
+#define SIZE_8KB 0x00002000
+#define SIZE_16KB 0x00004000
+#define SIZE_32KB 0x00008000
+#define SIZE_64KB 0x00010000
+#define SIZE_128KB 0x00020000
+#define SIZE_256KB 0x00040000
+#define SIZE_512KB 0x00080000
+#define SIZE_1MB 0x00100000
+#define SIZE_2MB 0x00200000
+#define SIZE_4MB 0x00400000
+#define SIZE_8MB 0x00800000
+#define SIZE_16MB 0x01000000
+#define SIZE_32MB 0x02000000
+#define SIZE_64MB 0x04000000
+#define SIZE_128MB 0x08000000
+#define SIZE_256MB 0x10000000
+#define SIZE_512MB 0x20000000
+#define SIZE_1GB 0x40000000
+#define SIZE_2GB 0x80000000
+#define SIZE_4GB 0x0000000100000000ULL
+#define SIZE_8GB 0x0000000200000000ULL
+#define SIZE_16GB 0x0000000400000000ULL
+#define SIZE_32GB 0x0000000800000000ULL
+#define SIZE_64GB 0x0000001000000000ULL
+#define SIZE_128GB 0x0000002000000000ULL
+#define SIZE_256GB 0x0000004000000000ULL
+#define SIZE_512GB 0x0000008000000000ULL
+#define SIZE_1TB 0x0000010000000000ULL
+#define SIZE_2TB 0x0000020000000000ULL
+#define SIZE_4TB 0x0000040000000000ULL
+#define SIZE_8TB 0x0000080000000000ULL
+#define SIZE_16TB 0x0000100000000000ULL
+#define SIZE_32TB 0x0000200000000000ULL
+#define SIZE_64TB 0x0000400000000000ULL
+#define SIZE_128TB 0x0000800000000000ULL
+#define SIZE_256TB 0x0001000000000000ULL
+#define SIZE_512TB 0x0002000000000000ULL
+#define SIZE_1PB 0x0004000000000000ULL
+#define SIZE_2PB 0x0008000000000000ULL
+#define SIZE_4PB 0x0010000000000000ULL
+#define SIZE_8PB 0x0020000000000000ULL
+#define SIZE_16PB 0x0040000000000000ULL
+#define SIZE_32PB 0x0080000000000000ULL
+#define SIZE_64PB 0x0100000000000000ULL
+#define SIZE_128PB 0x0200000000000000ULL
+#define SIZE_256PB 0x0400000000000000ULL
+#define SIZE_512PB 0x0800000000000000ULL
+#define SIZE_1EB 0x1000000000000000ULL
+#define SIZE_2EB 0x2000000000000000ULL
+#define SIZE_4EB 0x4000000000000000ULL
+#define SIZE_8EB 0x8000000000000000ULL
+
+#define BASE_1KB 0x00000400
+#define BASE_2KB 0x00000800
+#define BASE_4KB 0x00001000
+#define BASE_8KB 0x00002000
+#define BASE_16KB 0x00004000
+#define BASE_32KB 0x00008000
+#define BASE_64KB 0x00010000
+#define BASE_128KB 0x00020000
+#define BASE_256KB 0x00040000
+#define BASE_512KB 0x00080000
+#define BASE_1MB 0x00100000
+#define BASE_2MB 0x00200000
+#define BASE_4MB 0x00400000
+#define BASE_8MB 0x00800000
+#define BASE_16MB 0x01000000
+#define BASE_32MB 0x02000000
+#define BASE_64MB 0x04000000
+#define BASE_128MB 0x08000000
+#define BASE_256MB 0x10000000
+#define BASE_512MB 0x20000000
+#define BASE_1GB 0x40000000
+#define BASE_2GB 0x80000000
+#define BASE_4GB 0x0000000100000000ULL
+#define BASE_8GB 0x0000000200000000ULL
+#define BASE_16GB 0x0000000400000000ULL
+#define BASE_32GB 0x0000000800000000ULL
+#define BASE_64GB 0x0000001000000000ULL
+#define BASE_128GB 0x0000002000000000ULL
+#define BASE_256GB 0x0000004000000000ULL
+#define BASE_512GB 0x0000008000000000ULL
+#define BASE_1TB 0x0000010000000000ULL
+#define BASE_2TB 0x0000020000000000ULL
+#define BASE_4TB 0x0000040000000000ULL
+#define BASE_8TB 0x0000080000000000ULL
+#define BASE_16TB 0x0000100000000000ULL
+#define BASE_32TB 0x0000200000000000ULL
+#define BASE_64TB 0x0000400000000000ULL
+#define BASE_128TB 0x0000800000000000ULL
+#define BASE_256TB 0x0001000000000000ULL
+#define BASE_512TB 0x0002000000000000ULL
+#define BASE_1PB 0x0004000000000000ULL
+#define BASE_2PB 0x0008000000000000ULL
+#define BASE_4PB 0x0010000000000000ULL
+#define BASE_8PB 0x0020000000000000ULL
+#define BASE_16PB 0x0040000000000000ULL
+#define BASE_32PB 0x0080000000000000ULL
+#define BASE_64PB 0x0100000000000000ULL
+#define BASE_128PB 0x0200000000000000ULL
+#define BASE_256PB 0x0400000000000000ULL
+#define BASE_512PB 0x0800000000000000ULL
+#define BASE_1EB 0x1000000000000000ULL
+#define BASE_2EB 0x2000000000000000ULL
+#define BASE_4EB 0x4000000000000000ULL
+#define BASE_8EB 0x8000000000000000ULL
+
+//
+// Support for variable length argument lists using the ANSI standard.
+//
+// Since we are using the ANSI standard we used the standard naming and
+// did not follow the coding convention
+//
+// VA_LIST - typedef for argument list.
+// VA_START (VA_LIST Marker, argument before the ...) - Init Marker for use.
+// VA_END (VA_LIST Marker) - Clear Marker
+// VA_ARG (VA_LIST Marker, var arg size) - Use Marker to get an argument from
+// the ... list. You must know the size and pass it in this macro.
+// VA_COPY (VA_LIST Dest, VA_LIST Start) - Initialize Dest as a copy of Start.
+//
+// example:
+//
+// UINTN
+// ExampleVarArg (
+// IN UINTN NumberOfArgs,
+// ...
+// )
+// {
+// VA_LIST Marker;
+// UINTN Index;
+// UINTN Result;
+//
+// //
+// // Initialize the Marker
+// //
+// VA_START (Marker, NumberOfArgs);
+// for (Index = 0, Result = 0; Index < NumberOfArgs; Index++) {
+// //
+// // The ... list is a series of UINTN values, so average them up.
+// //
+// Result += VA_ARG (Marker, UINTN);
+// }
+//
+// VA_END (Marker);
+// return Result
+// }
+//
+
+/**
+ Return the size of argument that has been aligned to sizeof (UINTN).
+
+ @param n The parameter size to be aligned.
+
+ @return The aligned size.
+**/
+#define _INT_SIZE_OF(n) ((sizeof (n) + sizeof (UINTN) - 1) &~(sizeof (UINTN) - 1))
+
+#if defined(__CC_ARM)
+//
+// RVCT ARM variable argument list support.
+//
+
+///
+/// Variable used to traverse the list of arguments. This type can vary by
+/// implementation and could be an array or structure.
+///
+#ifdef __APCS_ADSABI
+ typedef int *va_list[1];
+ #define VA_LIST va_list
+#else
+ typedef struct __va_list { void *__ap; } va_list;
+ #define VA_LIST va_list
+#endif
+
+#define VA_START(Marker, Parameter) __va_start(Marker, Parameter)
+
+#define VA_ARG(Marker, TYPE) __va_arg(Marker, TYPE)
+
+#define VA_END(Marker) ((void)0)
+
+// For some ARM RVCT compilers, __va_copy is not defined
+#ifndef __va_copy
+ #define __va_copy(dest, src) ((void)((dest) = (src)))
+#endif
+
+#define VA_COPY(Dest, Start) __va_copy (Dest, Start)
+
+#elif defined(__GNUC__)
+
+#if defined(MDE_CPU_X64) && !defined(NO_MSABI_VA_FUNCS)
+//
+// X64 only. Use MS ABI version of GCC built-in macros for variable argument lists.
+//
+///
+/// Both GCC and LLVM 3.8 for X64 support new variable argument intrinsics for Microsoft ABI
+///
+
+///
+/// Variable used to traverse the list of arguments. This type can vary by
+/// implementation and could be an array or structure.
+///
+typedef __builtin_ms_va_list VA_LIST;
+
+#define VA_START(Marker, Parameter) __builtin_ms_va_start (Marker, Parameter)
+
+#define VA_ARG(Marker, TYPE) ((sizeof (TYPE) < sizeof (UINTN)) ? (TYPE)(__builtin_va_arg (Marker, UINTN)) : (TYPE)(__builtin_va_arg (Marker, TYPE)))
+
+#define VA_END(Marker) __builtin_ms_va_end (Marker)
+
+#define VA_COPY(Dest, Start) __builtin_ms_va_copy (Dest, Start)
+
+#else
+//
+// Use GCC built-in macros for variable argument lists.
+//
+
+///
+/// Variable used to traverse the list of arguments. This type can vary by
+/// implementation and could be an array or structure.
+///
+typedef __builtin_va_list VA_LIST;
+
+#define VA_START(Marker, Parameter) __builtin_va_start (Marker, Parameter)
+
+#define VA_ARG(Marker, TYPE) ((sizeof (TYPE) < sizeof (UINTN)) ? (TYPE)(__builtin_va_arg (Marker, UINTN)) : (TYPE)(__builtin_va_arg (Marker, TYPE)))
+
+#define VA_END(Marker) __builtin_va_end (Marker)
+
+#define VA_COPY(Dest, Start) __builtin_va_copy (Dest, Start)
+
+#endif
+
+#else
+///
+/// Variable used to traverse the list of arguments. This type can vary by
+/// implementation and could be an array or structure.
+///
+typedef CHAR8 *VA_LIST;
+
+/**
+ Retrieves a pointer to the beginning of a variable argument list, based on
+ the name of the parameter that immediately precedes the variable argument list.
+
+ This function initializes Marker to point to the beginning of the variable
+ argument list that immediately follows Parameter. The method for computing the
+ pointer to the next argument in the argument list is CPU-specific following the
+ EFIAPI ABI.
+
+ @param Marker The VA_LIST used to traverse the list of arguments.
+ @param Parameter The name of the parameter that immediately precedes
+ the variable argument list.
+
+ @return A pointer to the beginning of a variable argument list.
+
+**/
+#define VA_START(Marker, Parameter) (Marker = (VA_LIST) ((UINTN) & (Parameter) + _INT_SIZE_OF (Parameter)))
+
+/**
+ Returns an argument of a specified type from a variable argument list and updates
+ the pointer to the variable argument list to point to the next argument.
+
+ This function returns an argument of the type specified by TYPE from the beginning
+ of the variable argument list specified by Marker. Marker is then updated to point
+ to the next argument in the variable argument list. The method for computing the
+ pointer to the next argument in the argument list is CPU-specific following the EFIAPI ABI.
+
+ @param Marker VA_LIST used to traverse the list of arguments.
+ @param TYPE The type of argument to retrieve from the beginning
+ of the variable argument list.
+
+ @return An argument of the type specified by TYPE.
+
+**/
+#define VA_ARG(Marker, TYPE) (*(TYPE *) ((Marker += _INT_SIZE_OF (TYPE)) - _INT_SIZE_OF (TYPE)))
+
+/**
+ Terminates the use of a variable argument list.
+
+ This function initializes Marker so it can no longer be used with VA_ARG().
+ After this macro is used, the only way to access the variable argument list is
+ by using VA_START() again.
+
+ @param Marker VA_LIST used to traverse the list of arguments.
+
+**/
+#define VA_END(Marker) (Marker = (VA_LIST) 0)
+
+/**
+ Initializes a VA_LIST as a copy of an existing VA_LIST.
+
+ This macro initializes Dest as a copy of Start, as if the VA_START macro had been applied to Dest
+ followed by the same sequence of uses of the VA_ARG macro as had previously been used to reach
+ the present state of Start.
+
+ @param Dest VA_LIST used to traverse the list of arguments.
+ @param Start VA_LIST used to traverse the list of arguments.
+
+**/
+#define VA_COPY(Dest, Start) ((void)((Dest) = (Start)))
+
+#endif
+
+///
+/// Pointer to the start of a variable argument list stored in a memory buffer. Same as UINT8 *.
+///
+typedef UINTN *BASE_LIST;
+
+/**
+ Returns the size of a data type in sizeof(UINTN) units rounded up to the nearest UINTN boundary.
+
+ @param TYPE The date type to determine the size of.
+
+ @return The size of TYPE in sizeof (UINTN) units rounded up to the nearest UINTN boundary.
+**/
+#define _BASE_INT_SIZE_OF(TYPE) ((sizeof (TYPE) + sizeof (UINTN) - 1) / sizeof (UINTN))
+
+/**
+ Returns an argument of a specified type from a variable argument list and updates
+ the pointer to the variable argument list to point to the next argument.
+
+ This function returns an argument of the type specified by TYPE from the beginning
+ of the variable argument list specified by Marker. Marker is then updated to point
+ to the next argument in the variable argument list. The method for computing the
+ pointer to the next argument in the argument list is CPU specific following the EFIAPI ABI.
+
+ @param Marker The pointer to the beginning of a variable argument list.
+ @param TYPE The type of argument to retrieve from the beginning
+ of the variable argument list.
+
+ @return An argument of the type specified by TYPE.
+
+**/
+#define BASE_ARG(Marker, TYPE) (*(TYPE *) ((Marker += _BASE_INT_SIZE_OF (TYPE)) - _BASE_INT_SIZE_OF (TYPE)))
+
+/**
+ The macro that returns the byte offset of a field in a data structure.
+
+ This function returns the offset, in bytes, of field specified by Field from the
+ beginning of the data structure specified by TYPE. If TYPE does not contain Field,
+ the module will not compile.
+
+ @param TYPE The name of the data structure that contains the field specified by Field.
+ @param Field The name of the field in the data structure.
+
+ @return Offset, in bytes, of field.
+
+**/
+#ifdef __GNUC__
+#if __GNUC__ >= 4
+#define OFFSET_OF(TYPE, Field) ((UINTN) __builtin_offsetof(TYPE, Field))
+#endif
+#endif
+
+#ifndef OFFSET_OF
+#define OFFSET_OF(TYPE, Field) ((UINTN) &(((TYPE *)0)->Field))
+#endif
+
+/**
+ Macro that returns a pointer to the data structure that contains a specified field of
+ that data structure. This is a lightweight method to hide information by placing a
+ public data structure inside a larger private data structure and using a pointer to
+ the public data structure to retrieve a pointer to the private data structure.
+
+ This function computes the offset, in bytes, of field specified by Field from the beginning
+ of the data structure specified by TYPE. This offset is subtracted from Record, and is
+ used to return a pointer to a data structure of the type specified by TYPE. If the data type
+ specified by TYPE does not contain the field specified by Field, then the module will not compile.
+
+ @param Record Pointer to the field specified by Field within a data structure of type TYPE.
+ @param TYPE The name of the data structure type to return. This data structure must
+ contain the field specified by Field.
+ @param Field The name of the field in the data structure specified by TYPE to which Record points.
+
+ @return A pointer to the structure from one of it's elements.
+
+**/
+#define BASE_CR(Record, TYPE, Field) ((TYPE *) ((CHAR8 *) (Record) - (CHAR8 *) &(((TYPE *) 0)->Field)))
+
+/**
+ Rounds a value up to the next boundary using a specified alignment.
+
+ This function rounds Value up to the next boundary using the specified Alignment.
+ This aligned value is returned.
+
+ @param Value The value to round up.
+ @param Alignment The alignment boundary used to return the aligned value.
+
+ @return A value up to the next boundary.
+
+**/
+#define ALIGN_VALUE(Value, Alignment) ((Value) + (((Alignment) - (Value)) & ((Alignment) - 1)))
+
+/**
+ Adjust a pointer by adding the minimum offset required for it to be aligned on
+ a specified alignment boundary.
+
+ This function rounds the pointer specified by Pointer to the next alignment boundary
+ specified by Alignment. The pointer to the aligned address is returned.
+
+ @param Pointer The pointer to round up.
+ @param Alignment The alignment boundary to use to return an aligned pointer.
+
+ @return Pointer to the aligned address.
+
+**/
+#define ALIGN_POINTER(Pointer, Alignment) ((VOID *) (ALIGN_VALUE ((UINTN)(Pointer), (Alignment))))
+
+/**
+ Rounds a value up to the next natural boundary for the current CPU.
+ This is 4-bytes for 32-bit CPUs and 8-bytes for 64-bit CPUs.
+
+ This function rounds the value specified by Value up to the next natural boundary for the
+ current CPU. This rounded value is returned.
+
+ @param Value The value to round up.
+
+ @return Rounded value specified by Value.
+
+**/
+#define ALIGN_VARIABLE(Value) ALIGN_VALUE ((Value), sizeof (UINTN))
+
+
+/**
+ Return the maximum of two operands.
+
+ This macro returns the maximum of two operand specified by a and b.
+ Both a and b must be the same numerical types, signed or unsigned.
+
+ @param a The first operand with any numerical type.
+ @param b The second operand. Can be any numerical type as long as is
+ the same type as a.
+
+ @return Maximum of two operands.
+
+**/
+#define MAX(a, b) \
+ (((a) > (b)) ? (a) : (b))
+
+/**
+ Return the minimum of two operands.
+
+ This macro returns the minimal of two operand specified by a and b.
+ Both a and b must be the same numerical types, signed or unsigned.
+
+ @param a The first operand with any numerical type.
+ @param b The second operand. It should be the same any numerical type with a.
+
+ @return Minimum of two operands.
+
+**/
+#define MIN(a, b) \
+ (((a) < (b)) ? (a) : (b))
+
+/**
+ Return the absolute value of a signed operand.
+
+ This macro returns the absolute value of the signed operand specified by a.
+
+ @param a The signed operand.
+
+ @return The absolute value of the signed operand.
+
+**/
+#define ABS(a) \
+ (((a) < 0) ? (-(a)) : (a))
+
+//
+// Status codes common to all execution phases
+//
+typedef UINTN RETURN_STATUS;
+
+/**
+ Produces a RETURN_STATUS code with the highest bit set.
+
+ @param StatusCode The status code value to convert into a warning code.
+ StatusCode must be in the range 0x00000000..0x7FFFFFFF.
+
+ @return The value specified by StatusCode with the highest bit set.
+
+**/
+#define ENCODE_ERROR(StatusCode) ((RETURN_STATUS)(MAX_BIT | (StatusCode)))
+
+/**
+ Produces a RETURN_STATUS code with the highest bit clear.
+
+ @param StatusCode The status code value to convert into a warning code.
+ StatusCode must be in the range 0x00000000..0x7FFFFFFF.
+
+ @return The value specified by StatusCode with the highest bit clear.
+
+**/
+#define ENCODE_WARNING(StatusCode) ((RETURN_STATUS)(StatusCode))
+
+/**
+ Returns TRUE if a specified RETURN_STATUS code is an error code.
+
+ This function returns TRUE if StatusCode has the high bit set. Otherwise, FALSE is returned.
+
+ @param StatusCode The status code value to evaluate.
+
+ @retval TRUE The high bit of StatusCode is set.
+ @retval FALSE The high bit of StatusCode is clear.
+
+**/
+#define RETURN_ERROR(StatusCode) (((INTN)(RETURN_STATUS)(StatusCode)) < 0)
+
+///
+/// The operation completed successfully.
+///
+#define RETURN_SUCCESS 0
+
+///
+/// The image failed to load.
+///
+#define RETURN_LOAD_ERROR ENCODE_ERROR (1)
+
+///
+/// The parameter was incorrect.
+///
+#define RETURN_INVALID_PARAMETER ENCODE_ERROR (2)
+
+///
+/// The operation is not supported.
+///
+#define RETURN_UNSUPPORTED ENCODE_ERROR (3)
+
+///
+/// The buffer was not the proper size for the request.
+///
+#define RETURN_BAD_BUFFER_SIZE ENCODE_ERROR (4)
+
+///
+/// The buffer was not large enough to hold the requested data.
+/// The required buffer size is returned in the appropriate
+/// parameter when this error occurs.
+///
+#define RETURN_BUFFER_TOO_SMALL ENCODE_ERROR (5)
+
+///
+/// There is no data pending upon return.
+///
+#define RETURN_NOT_READY ENCODE_ERROR (6)
+
+///
+/// The physical device reported an error while attempting the
+/// operation.
+///
+#define RETURN_DEVICE_ERROR ENCODE_ERROR (7)
+
+///
+/// The device can not be written to.
+///
+#define RETURN_WRITE_PROTECTED ENCODE_ERROR (8)
+
+///
+/// The resource has run out.
+///
+#define RETURN_OUT_OF_RESOURCES ENCODE_ERROR (9)
+
+///
+/// An inconsistency was detected on the file system causing the
+/// operation to fail.
+///
+#define RETURN_VOLUME_CORRUPTED ENCODE_ERROR (10)
+
+///
+/// There is no more space on the file system.
+///
+#define RETURN_VOLUME_FULL ENCODE_ERROR (11)
+
+///
+/// The device does not contain any medium to perform the
+/// operation.
+///
+#define RETURN_NO_MEDIA ENCODE_ERROR (12)
+
+///
+/// The medium in the device has changed since the last
+/// access.
+///
+#define RETURN_MEDIA_CHANGED ENCODE_ERROR (13)
+
+///
+/// The item was not found.
+///
+#define RETURN_NOT_FOUND ENCODE_ERROR (14)
+
+///
+/// Access was denied.
+///
+#define RETURN_ACCESS_DENIED ENCODE_ERROR (15)
+
+///
+/// The server was not found or did not respond to the request.
+///
+#define RETURN_NO_RESPONSE ENCODE_ERROR (16)
+
+///
+/// A mapping to the device does not exist.
+///
+#define RETURN_NO_MAPPING ENCODE_ERROR (17)
+
+///
+/// A timeout time expired.
+///
+#define RETURN_TIMEOUT ENCODE_ERROR (18)
+
+///
+/// The protocol has not been started.
+///
+#define RETURN_NOT_STARTED ENCODE_ERROR (19)
+
+///
+/// The protocol has already been started.
+///
+#define RETURN_ALREADY_STARTED ENCODE_ERROR (20)
+
+///
+/// The operation was aborted.
+///
+#define RETURN_ABORTED ENCODE_ERROR (21)
+
+///
+/// An ICMP error occurred during the network operation.
+///
+#define RETURN_ICMP_ERROR ENCODE_ERROR (22)
+
+///
+/// A TFTP error occurred during the network operation.
+///
+#define RETURN_TFTP_ERROR ENCODE_ERROR (23)
+
+///
+/// A protocol error occurred during the network operation.
+///
+#define RETURN_PROTOCOL_ERROR ENCODE_ERROR (24)
+
+///
+/// A function encountered an internal version that was
+/// incompatible with a version requested by the caller.
+///
+#define RETURN_INCOMPATIBLE_VERSION ENCODE_ERROR (25)
+
+///
+/// The function was not performed due to a security violation.
+///
+#define RETURN_SECURITY_VIOLATION ENCODE_ERROR (26)
+
+///
+/// A CRC error was detected.
+///
+#define RETURN_CRC_ERROR ENCODE_ERROR (27)
+
+///
+/// The beginning or end of media was reached.
+///
+#define RETURN_END_OF_MEDIA ENCODE_ERROR (28)
+
+///
+/// The end of the file was reached.
+///
+#define RETURN_END_OF_FILE ENCODE_ERROR (31)
+
+///
+/// The language specified was invalid.
+///
+#define RETURN_INVALID_LANGUAGE ENCODE_ERROR (32)
+
+///
+/// The security status of the data is unknown or compromised
+/// and the data must be updated or replaced to restore a valid
+/// security status.
+///
+#define RETURN_COMPROMISED_DATA ENCODE_ERROR (33)
+
+///
+/// A HTTP error occurred during the network operation.
+///
+#define RETURN_HTTP_ERROR ENCODE_ERROR (35)
+
+///
+/// The string contained one or more characters that
+/// the device could not render and were skipped.
+///
+#define RETURN_WARN_UNKNOWN_GLYPH ENCODE_WARNING (1)
+
+///
+/// The handle was closed, but the file was not deleted.
+///
+#define RETURN_WARN_DELETE_FAILURE ENCODE_WARNING (2)
+
+///
+/// The handle was closed, but the data to the file was not
+/// flushed properly.
+///
+#define RETURN_WARN_WRITE_FAILURE ENCODE_WARNING (3)
+
+///
+/// The resulting buffer was too small, and the data was
+/// truncated to the buffer size.
+///
+#define RETURN_WARN_BUFFER_TOO_SMALL ENCODE_WARNING (4)
+
+///
+/// The data has not been updated within the timeframe set by
+/// local policy for this type of data.
+///
+#define RETURN_WARN_STALE_DATA ENCODE_WARNING (5)
+
+///
+/// The resulting buffer contains UEFI-compliant file system.
+///
+#define RETURN_WARN_FILE_SYSTEM ENCODE_WARNING (6)
+
+
+/**
+ Returns a 16-bit signature built from 2 ASCII characters.
+
+ This macro returns a 16-bit value built from the two ASCII characters specified
+ by A and B.
+
+ @param A The first ASCII character.
+ @param B The second ASCII character.
+
+ @return A 16-bit value built from the two ASCII characters specified by A and B.
+
+**/
+#define SIGNATURE_16(A, B) ((A) | (B << 8))
+
+/**
+ Returns a 32-bit signature built from 4 ASCII characters.
+
+ This macro returns a 32-bit value built from the four ASCII characters specified
+ by A, B, C, and D.
+
+ @param A The first ASCII character.
+ @param B The second ASCII character.
+ @param C The third ASCII character.
+ @param D The fourth ASCII character.
+
+ @return A 32-bit value built from the two ASCII characters specified by A, B,
+ C and D.
+
+**/
+#define SIGNATURE_32(A, B, C, D) (SIGNATURE_16 (A, B) | (SIGNATURE_16 (C, D) << 16))
+
+/**
+ Returns a 64-bit signature built from 8 ASCII characters.
+
+ This macro returns a 64-bit value built from the eight ASCII characters specified
+ by A, B, C, D, E, F, G,and H.
+
+ @param A The first ASCII character.
+ @param B The second ASCII character.
+ @param C The third ASCII character.
+ @param D The fourth ASCII character.
+ @param E The fifth ASCII character.
+ @param F The sixth ASCII character.
+ @param G The seventh ASCII character.
+ @param H The eighth ASCII character.
+
+ @return A 64-bit value built from the two ASCII characters specified by A, B,
+ C, D, E, F, G and H.
+
+**/
+#define SIGNATURE_64(A, B, C, D, E, F, G, H) \
+ (SIGNATURE_32 (A, B, C, D) | ((UINT64) (SIGNATURE_32 (E, F, G, H)) << 32))
+
+#if defined(_MSC_EXTENSIONS) && !defined (__INTEL_COMPILER) && !defined (MDE_CPU_EBC)
+ #pragma intrinsic(_ReturnAddress)
+ /**
+ Get the return address of the calling function.
+
+ Based on intrinsic function _ReturnAddress that provides the address of
+ the instruction in the calling function that will be executed after
+ control returns to the caller.
+
+ @param L Return Level.
+
+ @return The return address of the calling function or 0 if L != 0.
+
+ **/
+ #define RETURN_ADDRESS(L) ((L == 0) ? _ReturnAddress() : (VOID *) 0)
+#elif defined(__GNUC__)
+ void * __builtin_return_address (unsigned int level);
+ /**
+ Get the return address of the calling function.
+
+ Based on built-in Function __builtin_return_address that returns
+ the return address of the current function, or of one of its callers.
+
+ @param L Return Level.
+
+ @return The return address of the calling function.
+
+ **/
+ #define RETURN_ADDRESS(L) __builtin_return_address (L)
+#else
+ /**
+ Get the return address of the calling function.
+
+ @param L Return Level.
+
+ @return 0 as compilers don't support this feature.
+
+ **/
+ #define RETURN_ADDRESS(L) ((VOID *) 0)
+#endif
+
+/**
+ Return the number of elements in an array.
+
+ @param Array An object of array type. Array is only used as an argument to
+ the sizeof operator, therefore Array is never evaluated. The
+ caller is responsible for ensuring that Array's type is not
+ incomplete; that is, Array must have known constant size.
+
+ @return The number of elements in Array. The result has type UINTN.
+
+**/
+#define ARRAY_SIZE(Array) (sizeof (Array) / sizeof ((Array)[0]))
+
+#endif
+
diff --git a/MdePkg/Include/Ebc/ProcessorBind.h b/MdePkg/Include/Ebc/ProcessorBind.h
new file mode 100644
index 000000000000..ca46b80561ab
--- /dev/null
+++ b/MdePkg/Include/Ebc/ProcessorBind.h
@@ -0,0 +1,152 @@
+/** @file
+ Processor or compiler specific defines and types for EBC.
+
+ We currently only have one EBC compiler so there may be some Intel compiler
+ specific functions in this file.
+
+Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __PROCESSOR_BIND_H__
+#define __PROCESSOR_BIND_H__
+
+///
+/// Define the processor type so other code can make processor based choices
+///
+#define MDE_CPU_EBC
+
+//
+// Native integer types
+//
+
+///
+/// 1-byte signed value
+///
+typedef signed char INT8;
+///
+/// Logical Boolean. 1-byte value containing 0 for FALSE or a 1 for TRUE. Other
+/// values are undefined.
+///
+typedef unsigned char BOOLEAN;
+///
+/// 1-byte unsigned value.
+///
+typedef unsigned char UINT8;
+///
+/// 1-byte Character.
+///
+typedef char CHAR8;
+///
+/// 2-byte signed value.
+///
+typedef short INT16;
+///
+/// 2-byte unsigned value.
+///
+typedef unsigned short UINT16;
+///
+/// 2-byte Character. Unless otherwise specified all strings are stored in the
+/// UTF-16 encoding format as defined by Unicode 2.1 and ISO/IEC 10646 standards.
+///
+typedef unsigned short CHAR16;
+///
+/// 4-byte signed value.
+///
+typedef int INT32;
+///
+/// 4-byte unsigned value.
+///
+typedef unsigned int UINT32;
+///
+/// 8-byte signed value.
+///
+typedef __int64 INT64;
+///
+/// 8-byte unsigned value.
+///
+typedef unsigned __int64 UINT64;
+
+///
+/// Signed value of native width. (4 bytes on supported 32-bit processor instructions,
+/// 8 bytes on supported 64-bit processor instructions)
+/// "long" type scales to the processor native size with EBC compiler
+///
+typedef long INTN;
+///
+/// The unsigned value of native width. (4 bytes on supported 32-bit processor instructions;
+/// 8 bytes on supported 64-bit processor instructions)
+/// "long" type scales to the processor native size with the EBC compiler.
+///
+typedef unsigned long UINTN;
+
+///
+/// A value of native width with the highest bit set.
+/// Scalable macro to set the most significant bit in a natural number.
+///
+#define MAX_BIT (1ULL << (sizeof (INTN) * 8 - 1))
+///
+/// A value of native width with the two highest bits set.
+/// Scalable macro to set the most 2 significant bits in a natural number.
+///
+#define MAX_2_BITS (3ULL << (sizeof (INTN) * 8 - 2))
+
+///
+/// Maximum legal EBC address
+///
+#define MAX_ADDRESS ((UINTN) ~0)
+
+///
+/// Maximum legal EBC INTN and UINTN values.
+///
+#define MAX_UINTN ((UINTN) ~0)
+#define MAX_INTN ((INTN)~MAX_BIT)
+
+///
+/// The stack alignment required for EBC
+///
+#define CPU_STACK_ALIGNMENT sizeof(UINTN)
+
+///
+/// Page allocation granularity for EBC
+///
+#define DEFAULT_PAGE_ALLOCATION_GRANULARITY (0x1000)
+#define RUNTIME_PAGE_ALLOCATION_GRANULARITY (0x1000)
+
+///
+/// Modifier to ensure that all protocol member functions and EFI intrinsics
+/// use the correct C calling convention. All protocol member functions and
+/// EFI intrinsics are required to modify their member functions with EFIAPI.
+///
+#ifdef EFIAPI
+ ///
+ /// If EFIAPI is already defined, then we use that definition.
+ ///
+#else
+#define EFIAPI
+#endif
+
+/**
+ Return the pointer to the first instruction of a function given a function pointer.
+ On EBC architectures, these two pointer values are the same,
+ so the implementation of this macro is very simple.
+
+ @param FunctionPointer A pointer to a function.
+
+ @return The pointer to the first instruction of a function given a function pointer.
+**/
+#define FUNCTION_ENTRY_POINT(FunctionPointer) (VOID *)(UINTN)(FunctionPointer)
+
+#ifndef __USER_LABEL_PREFIX__
+#define __USER_LABEL_PREFIX__
+#endif
+
+#endif
+
diff --git a/MdePkg/Include/Guid/Acpi.h b/MdePkg/Include/Guid/Acpi.h
new file mode 100644
index 000000000000..3897ae62ff30
--- /dev/null
+++ b/MdePkg/Include/Guid/Acpi.h
@@ -0,0 +1,46 @@
+/** @file
+ GUIDs used for ACPI entries in the EFI system table
+
+ These GUIDs point the ACPI tables as defined in the ACPI specifications.
+ ACPI 2.0 specification defines the ACPI 2.0 GUID. UEFI 2.0 defines the
+ ACPI 2.0 Table GUID and ACPI Table GUID.
+
+ Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ GUIDs defined in UEFI 2.0 spec.
+
+**/
+
+#ifndef __ACPI_GUID_H__
+#define __ACPI_GUID_H__
+
+#define ACPI_TABLE_GUID \
+ { \
+ 0xeb9d2d30, 0x2d88, 0x11d3, {0x9a, 0x16, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
+ }
+
+#define EFI_ACPI_TABLE_GUID \
+ { \
+ 0x8868e871, 0xe4f1, 0x11d3, {0xbc, 0x22, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
+ }
+
+#define ACPI_10_TABLE_GUID ACPI_TABLE_GUID
+
+//
+// ACPI 2.0 or newer tables should use EFI_ACPI_TABLE_GUID.
+//
+#define EFI_ACPI_20_TABLE_GUID EFI_ACPI_TABLE_GUID
+
+extern EFI_GUID gEfiAcpiTableGuid;
+extern EFI_GUID gEfiAcpi10TableGuid;
+extern EFI_GUID gEfiAcpi20TableGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/Apriori.h b/MdePkg/Include/Guid/Apriori.h
new file mode 100644
index 000000000000..6d4fc74d406b
--- /dev/null
+++ b/MdePkg/Include/Guid/Apriori.h
@@ -0,0 +1,30 @@
+/** @file
+ GUID used as an FV filename for A Priori file. The A Priori file contains a
+ list of FV filenames that the DXE dispatcher will schedule reguardless of
+ the dependency grammar.
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ GUID introduced in PI Version 1.0.
+
+**/
+
+#ifndef __APRIORI_GUID_H__
+#define __APRIORI_GUID_H__
+
+#define EFI_APRIORI_GUID \
+ { \
+ 0xfc510ee7, 0xffdc, 0x11d4, {0xbd, 0x41, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
+ }
+
+extern EFI_GUID gAprioriGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/AprioriFileName.h b/MdePkg/Include/Guid/AprioriFileName.h
new file mode 100644
index 000000000000..d99893887d1b
--- /dev/null
+++ b/MdePkg/Include/Guid/AprioriFileName.h
@@ -0,0 +1,44 @@
+/** @file
+ The GUID PEI_APRIORI_FILE_NAME_GUID definition is the file
+ name of the PEI a priori file that is stored in a firmware
+ volume.
+
+ Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ GUID introduced in PI Version 1.0.
+
+**/
+
+#ifndef __PEI_APRIORI_FILE_NAME_H__
+#define __PEI_APRIORI_FILE_NAME_H__
+
+#define PEI_APRIORI_FILE_NAME_GUID \
+ { 0x1b45cc0a, 0x156a, 0x428a, { 0x62, 0XAF, 0x49, 0x86, 0x4d, 0xa0, 0xe6, 0xe6 } }
+
+
+///
+/// This file must be of type EFI_FV_FILETYPE_FREEFORM and must
+/// contain a single section of type EFI_SECTION_RAW. For details on
+/// firmware volumes, firmware file types, and firmware file section
+/// types.
+///
+typedef struct {
+ ///
+ /// An array of zero or more EFI_GUID type entries that match the file names of PEIM
+ /// modules in the same Firmware Volume. The maximum number of entries.
+ ///
+ EFI_GUID FileNamesWithinVolume[1];
+} PEI_APRIORI_FILE_CONTENTS;
+
+extern EFI_GUID gPeiAprioriFileNameGuid;
+
+#endif
+
diff --git a/MdePkg/Include/Guid/CapsuleReport.h b/MdePkg/Include/Guid/CapsuleReport.h
new file mode 100644
index 000000000000..051a41bde9f3
--- /dev/null
+++ b/MdePkg/Include/Guid/CapsuleReport.h
@@ -0,0 +1,105 @@
+/** @file
+ Guid & data structure used for Capsule process result variables
+
+ Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ GUIDs defined in UEFI 2.4 spec.
+
+**/
+
+
+#ifndef _CAPSULE_REPORT_GUID_H__
+#define _CAPSULE_REPORT_GUID_H__
+
+//
+// This is the GUID for capsule result variable.
+//
+#define EFI_CAPSULE_REPORT_GUID \
+ { \
+ 0x39b68c46, 0xf7fb, 0x441b, {0xb6, 0xec, 0x16, 0xb0, 0xf6, 0x98, 0x21, 0xf3 } \
+ }
+
+
+typedef struct {
+
+ ///
+ /// Size in bytes of the variable including any data beyond header as specified by CapsuleGuid
+ ///
+ UINT32 VariableTotalSize;
+
+ ///
+ /// For alignment
+ ///
+ UINT32 Reserved;
+
+ ///
+ /// Guid from EFI_CAPSULE_HEADER
+ ///
+ EFI_GUID CapsuleGuid;
+
+ ///
+ /// Timestamp using system time when processing completed
+ ///
+ EFI_TIME CapsuleProcessed;
+
+ ///
+ /// Result of the capsule processing. Exact interpretation of any error code may depend
+ /// upon type of capsule processed
+ ///
+ EFI_STATUS CapsuleStatus;
+} EFI_CAPSULE_RESULT_VARIABLE_HEADER;
+
+
+typedef struct {
+
+ ///
+ /// Version of this structure, currently 0x00000001
+ ///
+ UINT16 Version;
+
+ ///
+ /// The index of the payload within the FMP capsule which was processed to generate this report
+ /// Starting from zero
+ ///
+ UINT8 PayloadIndex;
+
+ ///
+ /// The UpdateImageIndex from EFI_FIRMWARE_MANAGEMENT_CAPSULE_IMAGE_HEADER
+ /// (after unsigned conversion from UINT8 to UINT16).
+ ///
+ UINT8 UpdateImageIndex;
+
+ ///
+ /// The UpdateImageTypeId Guid from EFI_FIRMWARE_MANAGEMENT_CAPSULE_IMAGE_HEADER.
+ ///
+ EFI_GUID UpdateImageTypeId;
+
+ ///
+ /// In case of capsule loaded from disk, the zero-terminated array containing file name of capsule that was processed.
+ /// In case of capsule submitted directly to UpdateCapsule() there is no file name, and this field is required to contain a single 16-bit zero character
+ /// which is included in VariableTotalSize.
+ ///
+ /// CHAR16 CapsuleFileName[];
+ ///
+
+ ///
+ /// This field will contain a zero-terminated CHAR16 string containing the text representation of the device path of device publishing Firmware Management Protocol
+ /// (if present). In case where device path is not present and the target is not otherwise known to firmware, or when payload was blocked by policy, or skipped,
+ /// this field is required to contain a single 16-bit zero character which is included in VariableTotalSize.
+ ///
+ /// CHAR16 CapsuleTarget[];
+ ///
+} EFI_CAPSULE_RESULT_VARIABLE_FMP;
+
+
+extern EFI_GUID gEfiCapsuleReportGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/Cper.h b/MdePkg/Include/Guid/Cper.h
new file mode 100644
index 000000000000..f6f5bc2df8fb
--- /dev/null
+++ b/MdePkg/Include/Guid/Cper.h
@@ -0,0 +1,1235 @@
+/** @file
+ GUIDs and definitions used for Common Platform Error Record.
+
+ Copyright (c) 2011 - 2016, Intel Corporation. All rights reserved.<BR>
+ (C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ GUIDs defined in UEFI 2.6 Specification.
+
+**/
+
+#ifndef __CPER_GUID_H__
+#define __CPER_GUID_H__
+
+#pragma pack(1)
+
+#define EFI_ERROR_RECORD_SIGNATURE_START SIGNATURE_32('C', 'P', 'E', 'R')
+#define EFI_ERROR_RECORD_SIGNATURE_END 0xFFFFFFFF
+
+#define EFI_ERROR_RECORD_REVISION 0x0101
+
+///
+/// Error Severity in Error Record Header and Error Section Descriptor
+///@{
+#define EFI_GENERIC_ERROR_RECOVERABLE 0x00000000
+#define EFI_GENERIC_ERROR_FATAL 0x00000001
+#define EFI_GENERIC_ERROR_CORRECTED 0x00000002
+#define EFI_GENERIC_ERROR_INFO 0x00000003
+///@}
+
+///
+/// The validation bit mask indicates the validity of the following fields
+/// in Error Record Header.
+///@{
+#define EFI_ERROR_RECORD_HEADER_PLATFORM_ID_VALID BIT0
+#define EFI_ERROR_RECORD_HEADER_TIME_STAMP_VALID BIT1
+#define EFI_ERROR_RECORD_HEADER_PARTITION_ID_VALID BIT2
+///@}
+
+///
+/// Timestamp is precise if this bit is set and correlates to the time of the
+/// error event.
+///
+#define EFI_ERROR_TIME_STAMP_PRECISE BIT0
+
+///
+/// The timestamp correlates to the time when the error information was collected
+/// by the system software and may not necessarily represent the time of the error
+/// event. The timestamp contains the local time in BCD format.
+///
+typedef struct {
+ UINT8 Seconds;
+ UINT8 Minutes;
+ UINT8 Hours;
+ UINT8 Flag;
+ UINT8 Day;
+ UINT8 Month;
+ UINT8 Year;
+ UINT8 Century;
+} EFI_ERROR_TIME_STAMP;
+
+///
+/// GUID value indicating the record association with an error event notification type.
+///@{
+#define EFI_EVENT_NOTIFICATION_TYEP_CMC_GUID \
+ { \
+ 0x2DCE8BB1, 0xBDD7, 0x450e, { 0xB9, 0xAD, 0x9C, 0xF4, 0xEB, 0xD4, 0xF8, 0x90 } \
+ }
+#define EFI_EVENT_NOTIFICATION_TYEP_CPE_GUID \
+ { \
+ 0x4E292F96, 0xD843, 0x4a55, { 0xA8, 0xC2, 0xD4, 0x81, 0xF2, 0x7E, 0xBE, 0xEE } \
+ }
+#define EFI_EVENT_NOTIFICATION_TYEP_MCE_GUID \
+ { \
+ 0xE8F56FFE, 0x919C, 0x4cc5, { 0xBA, 0x88, 0x65, 0xAB, 0xE1, 0x49, 0x13, 0xBB } \
+ }
+#define EFI_EVENT_NOTIFICATION_TYEP_PCIE_GUID \
+ { \
+ 0xCF93C01F, 0x1A16, 0x4dfc, { 0xB8, 0xBC, 0x9C, 0x4D, 0xAF, 0x67, 0xC1, 0x04 } \
+ }
+#define EFI_EVENT_NOTIFICATION_TYEP_INIT_GUID \
+ { \
+ 0xCC5263E8, 0x9308, 0x454a, { 0x89, 0xD0, 0x34, 0x0B, 0xD3, 0x9B, 0xC9, 0x8E } \
+ }
+#define EFI_EVENT_NOTIFICATION_TYEP_NMI_GUID \
+ { \
+ 0x5BAD89FF, 0xB7E6, 0x42c9, { 0x81, 0x4A, 0xCF, 0x24, 0x85, 0xD6, 0xE9, 0x8A } \
+ }
+#define EFI_EVENT_NOTIFICATION_TYEP_BOOT_GUID \
+ { \
+ 0x3D61A466, 0xAB40, 0x409a, { 0xA6, 0x98, 0xF3, 0x62, 0xD4, 0x64, 0xB3, 0x8F } \
+ }
+#define EFI_EVENT_NOTIFICATION_TYEP_DMAR_GUID \
+ { \
+ 0x667DD791, 0xC6B3, 0x4c27, { 0x8A, 0x6B, 0x0F, 0x8E, 0x72, 0x2D, 0xEB, 0x41 } \
+ }
+///@}
+
+///
+/// Error Record Header Flags
+///@{
+#define EFI_HW_ERROR_FLAGS_RECOVERED 0x00000001
+#define EFI_HW_ERROR_FLAGS_PREVERR 0x00000002
+#define EFI_HW_ERROR_FLAGS_SIMULATED 0x00000004
+///@}
+
+///
+/// Common error record header
+///
+typedef struct {
+ UINT32 SignatureStart;
+ UINT16 Revision;
+ UINT32 SignatureEnd;
+ UINT16 SectionCount;
+ UINT32 ErrorSeverity;
+ UINT32 ValidationBits;
+ UINT32 RecordLength;
+ EFI_ERROR_TIME_STAMP TimeStamp;
+ EFI_GUID PlatformID;
+ EFI_GUID PartitionID;
+ EFI_GUID CreatorID;
+ EFI_GUID NotificationType;
+ UINT64 RecordID;
+ UINT32 Flags;
+ UINT64 PersistenceInfo;
+ UINT8 Resv1[12];
+ ///
+ /// An array of SectionCount descriptors for the associated
+ /// sections. The number of valid sections is equivalent to the
+ /// SectionCount. The buffer size of the record may include
+ /// more space to dynamically add additional Section
+ /// Descriptors to the error record.
+ ///
+} EFI_COMMON_ERROR_RECORD_HEADER;
+
+#define EFI_ERROR_SECTION_REVISION 0x0100
+
+///
+/// Validity Fields in Error Section Descriptor.
+///
+#define EFI_ERROR_SECTION_FRU_ID_VALID BIT0
+#define EFI_ERROR_SECTION_FRU_STRING_VALID BIT1
+
+///
+/// Flag field contains information that describes the error section
+/// in Error Section Descriptor.
+///
+#define EFI_ERROR_SECTION_FLAGS_PRIMARY BIT0
+#define EFI_ERROR_SECTION_FLAGS_CONTAINMENT_WARNING BIT1
+#define EFI_ERROR_SECTION_FLAGS_RESET BIT2
+#define EFI_ERROR_SECTION_FLAGS_ERROR_THRESHOLD_EXCEEDED BIT3
+#define EFI_ERROR_SECTION_FLAGS_RESOURCE_NOT_ACCESSIBLE BIT4
+#define EFI_ERROR_SECTION_FLAGS_LATENT_ERROR BIT5
+
+///
+/// Error Sectition Type GUIDs in Error Section Descriptor
+///@{
+#define EFI_ERROR_SECTION_PROCESSOR_GENERIC_GUID \
+ { \
+ 0x9876ccad, 0x47b4, 0x4bdb, { 0xb6, 0x5e, 0x16, 0xf1, 0x93, 0xc4, 0xf3, 0xdb } \
+ }
+#define EFI_ERROR_SECTION_PROCESSOR_SPECIFIC_GUID \
+ { \
+ 0xdc3ea0b0, 0xa144, 0x4797, { 0xb9, 0x5b, 0x53, 0xfa, 0x24, 0x2b, 0x6e, 0x1d } \
+ }
+#define EFI_ERROR_SECTION_PROCESSOR_SPECIFIC_IA32X64_GUID \
+ { \
+ 0xdc3ea0b0, 0xa144, 0x4797, { 0xb9, 0x5b, 0x53, 0xfa, 0x24, 0x2b, 0x6e, 0x1d } \
+ }
+#define EFI_ERROR_SECTION_PROCESSOR_SPECIFIC_ARM_GUID \
+ { \
+ 0xe19e3d16, 0xbc11, 0x11e4, { 0x9c, 0xaa, 0xc2, 0x05, 0x1d, 0x5d, 0x46, 0xb0 } \
+ }
+#define EFI_ERROR_SECTION_PLATFORM_MEMORY_GUID \
+ { \
+ 0xa5bc1114, 0x6f64, 0x4ede, { 0xb8, 0x63, 0x3e, 0x83, 0xed, 0x7c, 0x83, 0xb1 } \
+ }
+#define EFI_ERROR_SECTION_PLATFORM_MEMORY2_GUID \
+ { \
+ 0x61EC04FC, 0x48E6, 0xD813, { 0x25, 0xC9, 0x8D, 0xAA, 0x44, 0x75, 0x0B, 0x12 } \
+ }
+#define EFI_ERROR_SECTION_PCIE_GUID \
+ { \
+ 0xd995e954, 0xbbc1, 0x430f, { 0xad, 0x91, 0xb4, 0x4d, 0xcb, 0x3c, 0x6f, 0x35 } \
+ }
+#define EFI_ERROR_SECTION_FW_ERROR_RECORD_GUID \
+ { \
+ 0x81212a96, 0x09ed, 0x4996, { 0x94, 0x71, 0x8d, 0x72, 0x9c, 0x8e, 0x69, 0xed } \
+ }
+#define EFI_ERROR_SECTION_PCI_PCIX_BUS_GUID \
+ { \
+ 0xc5753963, 0x3b84, 0x4095, { 0xbf, 0x78, 0xed, 0xda, 0xd3, 0xf9, 0xc9, 0xdd } \
+ }
+#define EFI_ERROR_SECTION_PCI_DEVICE_GUID \
+ { \
+ 0xeb5e4685, 0xca66, 0x4769, { 0xb6, 0xa2, 0x26, 0x06, 0x8b, 0x00, 0x13, 0x26 } \
+ }
+#define EFI_ERROR_SECTION_DMAR_GENERIC_GUID \
+ { \
+ 0x5b51fef7, 0xc79d, 0x4434, { 0x8f, 0x1b, 0xaa, 0x62, 0xde, 0x3e, 0x2c, 0x64 } \
+ }
+#define EFI_ERROR_SECTION_DIRECTED_IO_DMAR_GUID \
+ { \
+ 0x71761d37, 0x32b2, 0x45cd, { 0xa7, 0xd0, 0xb0, 0xfe, 0xdd, 0x93, 0xe8, 0xcf } \
+ }
+#define EFI_ERROR_SECTION_IOMMU_DMAR_GUID \
+ { \
+ 0x036f84e1, 0x7f37, 0x428c, { 0xa7, 0x9e, 0x57, 0x5f, 0xdf, 0xaa, 0x84, 0xec } \
+ }
+///@}
+
+///
+/// Error Section Descriptor
+///
+typedef struct {
+ UINT32 SectionOffset;
+ UINT32 SectionLength;
+ UINT16 Revision;
+ UINT8 SecValidMask;
+ UINT8 Resv1;
+ UINT32 SectionFlags;
+ EFI_GUID SectionType;
+ EFI_GUID FruId;
+ UINT32 Severity;
+ CHAR8 FruString[20];
+} EFI_ERROR_SECTION_DESCRIPTOR;
+
+///
+/// The validation bit mask indicates whether or not each of the following fields are
+/// valid in Proessor Generic Error section.
+///@{
+#define EFI_GENERIC_ERROR_PROC_TYPE_VALID BIT0
+#define EFI_GENERIC_ERROR_PROC_ISA_VALID BIT1
+#define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_VALID BIT2
+#define EFI_GENERIC_ERROR_PROC_OPERATION_VALID BIT3
+#define EFI_GENERIC_ERROR_PROC_FLAGS_VALID BIT4
+#define EFI_GENERIC_ERROR_PROC_LEVEL_VALID BIT5
+#define EFI_GENERIC_ERROR_PROC_VERSION_VALID BIT6
+#define EFI_GENERIC_ERROR_PROC_BRAND_VALID BIT7
+#define EFI_GENERIC_ERROR_PROC_ID_VALID BIT8
+#define EFI_GENERIC_ERROR_PROC_TARGET_ADDR_VALID BIT9
+#define EFI_GENERIC_ERROR_PROC_REQUESTER_ID_VALID BIT10
+#define EFI_GENERIC_ERROR_PROC_RESPONDER_ID_VALID BIT11
+#define EFI_GENERIC_ERROR_PROC_INST_IP_VALID BIT12
+///@}
+
+///
+/// The type of the processor architecture in Proessor Generic Error section.
+///@{
+#define EFI_GENERIC_ERROR_PROC_TYPE_IA32_X64 0x00
+#define EFI_GENERIC_ERROR_PROC_TYPE_IA64 0x01
+///@}
+
+///
+/// The type of the instruction set executing when the error occurred in Proessor
+/// Generic Error section.
+///@{
+#define EFI_GENERIC_ERROR_PROC_ISA_IA32 0x00
+#define EFI_GENERIC_ERROR_PROC_ISA_IA64 0x01
+#define EFI_GENERIC_ERROR_PROC_ISA_X64 0x02
+///@}
+
+///
+/// The type of error that occurred in Proessor Generic Error section.
+///@{
+#define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_UNKNOWN 0x00
+#define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_CACHE 0x01
+#define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_TLB 0x02
+#define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_BUS 0x04
+#define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_MICRO_ARCH 0x08
+///@}
+
+///
+/// The type of operation in Proessor Generic Error section.
+///@{
+#define EFI_GENERIC_ERROR_PROC_OPERATION_GENERIC 0x00
+#define EFI_GENERIC_ERROR_PROC_OPERATION_DATA_READ 0x01
+#define EFI_GENERIC_ERROR_PROC_OPERATION_DATA_WRITE 0x02
+#define EFI_GENERIC_ERROR_PROC_OPERATION_INSTRUCTION_EXEC 0x03
+///@}
+
+///
+/// Flags bit mask indicates additional information about the error in Proessor Generic
+/// Error section
+///@{
+#define EFI_GENERIC_ERROR_PROC_FLAGS_RESTARTABLE BIT0
+#define EFI_GENERIC_ERROR_PROC_FLAGS_PRECISE_IP BIT1
+#define EFI_GENERIC_ERROR_PROC_FLAGS_OVERFLOW BIT2
+#define EFI_GENERIC_ERROR_PROC_FLAGS_CORRECTED BIT3
+///@}
+
+///
+/// Processor Generic Error Section
+/// describes processor reported hardware errors for logical processors in the system.
+///
+typedef struct {
+ UINT64 ValidFields;
+ UINT8 Type;
+ UINT8 Isa;
+ UINT8 ErrorType;
+ UINT8 Operation;
+ UINT8 Flags;
+ UINT8 Level;
+ UINT16 Resv1;
+ UINT64 VersionInfo;
+ CHAR8 BrandString[128];
+ UINT64 ApicId;
+ UINT64 TargetAddr;
+ UINT64 RequestorId;
+ UINT64 ResponderId;
+ UINT64 InstructionIP;
+} EFI_PROCESSOR_GENERIC_ERROR_DATA;
+
+
+#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
+///
+/// IA32 and x64 Specific definitions.
+///
+
+///
+/// GUID value indicating the type of Processor Error Information structure
+/// in IA32/X64 Processor Error Information Structure.
+///@{
+#define EFI_IA32_X64_ERROR_TYPE_CACHE_CHECK_GUID \
+ { \
+ 0xA55701F5, 0xE3EF, 0x43de, {0xAC, 0x72, 0x24, 0x9B, 0x57, 0x3F, 0xAD, 0x2C } \
+ }
+#define EFI_IA32_X64_ERROR_TYPE_TLB_CHECK_GUID \
+ { \
+ 0xFC06B535, 0x5E1F, 0x4562, {0x9F, 0x25, 0x0A, 0x3B, 0x9A, 0xDB, 0x63, 0xC3 } \
+ }
+#define EFI_IA32_X64_ERROR_TYPE_BUS_CHECK_GUID \
+ { \
+ 0x1CF3F8B3, 0xC5B1, 0x49a2, {0xAA, 0x59, 0x5E, 0xEF, 0x92, 0xFF, 0xA6, 0x3C } \
+ }
+#define EFI_IA32_X64_ERROR_TYPE_MS_CHECK_GUID \
+ { \
+ 0x48AB7F57, 0xDC34, 0x4f6c, {0xA7, 0xD3, 0xB0, 0xB5, 0xB0, 0xA7, 0x43, 0x14 } \
+ }
+///@}
+
+///
+/// The validation bit mask indicates which fields in the IA32/X64 Processor
+/// Error Record structure are valid.
+///@{
+#define EFI_IA32_X64_PROCESSOR_ERROR_APIC_ID_VALID BIT0
+#define EFI_IA32_X64_PROCESSOR_ERROR_CPU_ID_INFO_VALID BIT1
+///@}
+
+///
+/// IA32/X64 Processor Error Record
+///
+typedef struct {
+ UINT64 ValidFields;
+ UINT64 ApicId;
+ UINT8 CpuIdInfo[48];
+} EFI_IA32_X64_PROCESSOR_ERROR_RECORD;
+
+///
+/// The validation bit mask indicates which fields in the Cache Check structure
+/// are valid.
+///@{
+#define EFI_CACHE_CHECK_TRANSACTION_TYPE_VALID BIT0
+#define EFI_CACHE_CHECK_OPERATION_VALID BIT1
+#define EFI_CACHE_CHECK_LEVEL_VALID BIT2
+#define EFI_CACHE_CHECK_CONTEXT_CORRUPT_VALID BIT3
+#define EFI_CACHE_CHECK_UNCORRECTED_VALID BIT4
+#define EFI_CACHE_CHECK_PRECISE_IP_VALID BIT5
+#define EFI_CACHE_CHECK_RESTARTABLE_VALID BIT6
+#define EFI_CACHE_CHECK_OVERFLOW_VALID BIT7
+///@}
+
+///
+/// Type of cache error in the Cache Check structure
+///@{
+#define EFI_CACHE_CHECK_ERROR_TYPE_INSTRUCTION 0
+#define EFI_CACHE_CHECK_ERROR_TYPE_DATA_ACCESS 1
+#define EFI_CACHE_CHECK_ERROR_TYPE_GENERIC 2
+///@}
+
+///
+/// Type of cache operation that caused the error in the Cache
+/// Check structure
+///@{
+#define EFI_CACHE_CHECK_OPERATION_TYPE_GENERIC 0
+#define EFI_CACHE_CHECK_OPERATION_TYPE_GENERIC_READ 1
+#define EFI_CACHE_CHECK_OPERATION_TYPE_GENERIC_WRITE 2
+#define EFI_CACHE_CHECK_OPERATION_TYPE_DATA_READ 3
+#define EFI_CACHE_CHECK_OPERATION_TYPE_DATA_WRITE 4
+#define EFI_CACHE_CHECK_OPERATION_TYPE_INSTRUCTION_FETCH 5
+#define EFI_CACHE_CHECK_OPERATION_TYPE_PREFETCH 6
+#define EFI_CACHE_CHECK_OPERATION_TYPE_EVICTION 7
+#define EFI_CACHE_CHECK_OPERATION_TYPE_SNOOP 8
+///@}
+
+///
+/// IA32/X64 Cache Check Structure
+///
+typedef struct {
+ UINT64 ValidFields:16;
+ UINT64 TransactionType:2;
+ UINT64 Operation:4;
+ UINT64 Level:3;
+ UINT64 ContextCorrupt:1;
+ UINT64 ErrorUncorrected:1;
+ UINT64 PreciseIp:1;
+ UINT64 RestartableIp:1;
+ UINT64 Overflow:1;
+ UINT64 Resv1:34;
+} EFI_IA32_X64_CACHE_CHECK_INFO;
+
+///
+/// The validation bit mask indicates which fields in the TLB Check structure
+/// are valid.
+///@{
+#define EFI_TLB_CHECK_TRANSACTION_TYPE_VALID BIT0
+#define EFI_TLB_CHECK_OPERATION_VALID BIT1
+#define EFI_TLB_CHECK_LEVEL_VALID BIT2
+#define EFI_TLB_CHECK_CONTEXT_CORRUPT_VALID BIT3
+#define EFI_TLB_CHECK_UNCORRECTED_VALID BIT4
+#define EFI_TLB_CHECK_PRECISE_IP_VALID BIT5
+#define EFI_TLB_CHECK_RESTARTABLE_VALID BIT6
+#define EFI_TLB_CHECK_OVERFLOW_VALID BIT7
+///@}
+
+///
+/// Type of cache error in the TLB Check structure
+///@{
+#define EFI_TLB_CHECK_ERROR_TYPE_INSTRUCTION 0
+#define EFI_TLB_CHECK_ERROR_TYPE_DATA_ACCESS 1
+#define EFI_TLB_CHECK_ERROR_TYPE_GENERIC 2
+///@}
+
+///
+/// Type of cache operation that caused the error in the TLB
+/// Check structure
+///@{
+#define EFI_TLB_CHECK_OPERATION_TYPE_GENERIC 0
+#define EFI_TLB_CHECK_OPERATION_TYPE_GENERIC_READ 1
+#define EFI_TLB_CHECK_OPERATION_TYPE_GENERIC_WRITE 2
+#define EFI_TLB_CHECK_OPERATION_TYPE_DATA_READ 3
+#define EFI_TLB_CHECK_OPERATION_TYPE_DATA_WRITE 4
+#define EFI_TLB_CHECK_OPERATION_TYPE_INST_FETCH 5
+#define EFI_TLB_CHECK_OPERATION_TYPE_PREFETCH 6
+///@}
+
+///
+/// IA32/X64 TLB Check Structure
+///
+typedef struct {
+ UINT64 ValidFields:16;
+ UINT64 TransactionType:2;
+ UINT64 Operation:4;
+ UINT64 Level:3;
+ UINT64 ContextCorrupt:1;
+ UINT64 ErrorUncorrected:1;
+ UINT64 PreciseIp:1;
+ UINT64 RestartableIp:1;
+ UINT64 Overflow:1;
+ UINT64 Resv1:34;
+} EFI_IA32_X64_TLB_CHECK_INFO;
+
+///
+/// The validation bit mask indicates which fields in the MS Check structure
+/// are valid.
+///@{
+#define EFI_BUS_CHECK_TRANSACTION_TYPE_VALID BIT0
+#define EFI_BUS_CHECK_OPERATION_VALID BIT1
+#define EFI_BUS_CHECK_LEVEL_VALID BIT2
+#define EFI_BUS_CHECK_CONTEXT_CORRUPT_VALID BIT3
+#define EFI_BUS_CHECK_UNCORRECTED_VALID BIT4
+#define EFI_BUS_CHECK_PRECISE_IP_VALID BIT5
+#define EFI_BUS_CHECK_RESTARTABLE_VALID BIT6
+#define EFI_BUS_CHECK_OVERFLOW_VALID BIT7
+#define EFI_BUS_CHECK_PARTICIPATION_TYPE_VALID BIT8
+#define EFI_BUS_CHECK_TIME_OUT_VALID BIT9
+#define EFI_BUS_CHECK_ADDRESS_SPACE_VALID BIT10
+///@}
+
+///
+/// Type of cache error in the Bus Check structure
+///@{
+#define EFI_BUS_CHECK_ERROR_TYPE_INSTRUCTION 0
+#define EFI_BUS_CHECK_ERROR_TYPE_DATA_ACCESS 1
+#define EFI_BUS_CHECK_ERROR_TYPE_GENERIC 2
+///@}
+
+///
+/// Type of cache operation that caused the error in the Bus
+/// Check structure
+///@{
+#define EFI_BUS_CHECK_OPERATION_TYPE_GENERIC 0
+#define EFI_BUS_CHECK_OPERATION_TYPE_GENERIC_READ 1
+#define EFI_BUS_CHECK_OPERATION_TYPE_GENERIC_WRITE 2
+#define EFI_BUS_CHECK_OPERATION_TYPE_DATA_READ 3
+#define EFI_BUS_CHECK_OPERATION_TYPE_DATA_WRITE 4
+#define EFI_BUS_CHECK_OPERATION_TYPE_INST_FETCH 5
+#define EFI_BUS_CHECK_OPERATION_TYPE_PREFETCH 6
+///@}
+
+///
+/// Type of Participation
+///@{
+#define EFI_BUS_CHECK_PARTICIPATION_TYPE_REQUEST 0
+#define EFI_BUS_CHECK_PARTICIPATION_TYPE_RESPONDED 1
+#define EFI_BUS_CHECK_PARTICIPATION_TYPE_OBSERVED 2
+#define EFI_BUS_CHECK_PARTICIPATION_TYPE_GENERIC 3
+///@}
+
+///
+/// Type of Address Space
+///@{
+#define EFI_BUS_CHECK_ADDRESS_SPACE_TYPE_MEMORY 0
+#define EFI_BUS_CHECK_ADDRESS_SPACE_TYPE_RESERVED 1
+#define EFI_BUS_CHECK_ADDRESS_SPACE_TYPE_IO 2
+#define EFI_BUS_CHECK_ADDRESS_SPACE_TYPE_OTHER 3
+///@}
+
+///
+/// IA32/X64 Bus Check Structure
+///
+typedef struct {
+ UINT64 ValidFields:16;
+ UINT64 TransactionType:2;
+ UINT64 Operation:4;
+ UINT64 Level:3;
+ UINT64 ContextCorrupt:1;
+ UINT64 ErrorUncorrected:1;
+ UINT64 PreciseIp:1;
+ UINT64 RestartableIp:1;
+ UINT64 Overflow:1;
+ UINT64 ParticipationType:2;
+ UINT64 TimeOut:1;
+ UINT64 AddressSpace:2;
+ UINT64 Resv1:29;
+} EFI_IA32_X64_BUS_CHECK_INFO;
+
+///
+/// The validation bit mask indicates which fields in the MS Check structure
+/// are valid.
+///@{
+#define EFI_MS_CHECK_ERROR_TYPE_VALID BIT0
+#define EFI_MS_CHECK_CONTEXT_CORRUPT_VALID BIT1
+#define EFI_MS_CHECK_UNCORRECTED_VALID BIT2
+#define EFI_MS_CHECK_PRECISE_IP_VALID BIT3
+#define EFI_MS_CHECK_RESTARTABLE_VALID BIT4
+#define EFI_MS_CHECK_OVERFLOW_VALID BIT5
+///@}
+
+///
+/// Error type identifies the operation that caused the error.
+///@{
+#define EFI_MS_CHECK_ERROR_TYPE_NO 0
+#define EFI_MS_CHECK_ERROR_TYPE_UNCLASSIFIED 1
+#define EFI_MS_CHECK_ERROR_TYPE_MICROCODE_PARITY 2
+#define EFI_MS_CHECK_ERROR_TYPE_EXTERNAL 3
+#define EFI_MS_CHECK_ERROR_TYPE_FRC 4
+#define EFI_MS_CHECK_ERROR_TYPE_INTERNAL_UNCLASSIFIED 5
+///@}
+
+///
+/// IA32/X64 MS Check Field Description
+///
+typedef struct {
+ UINT64 ValidFields:16;
+ UINT64 ErrorType:3;
+ UINT64 ContextCorrupt:1;
+ UINT64 ErrorUncorrected:1;
+ UINT64 PreciseIp:1;
+ UINT64 RestartableIp:1;
+ UINT64 Overflow:1;
+ UINT64 Resv1:40;
+} EFI_IA32_X64_MS_CHECK_INFO;
+
+///
+/// IA32/X64 Check Information Item
+///
+typedef union {
+ EFI_IA32_X64_CACHE_CHECK_INFO CacheCheck;
+ EFI_IA32_X64_TLB_CHECK_INFO TlbCheck;
+ EFI_IA32_X64_BUS_CHECK_INFO BusCheck;
+ EFI_IA32_X64_MS_CHECK_INFO MsCheck;
+ UINT64 Data64;
+} EFI_IA32_X64_CHECK_INFO_ITEM;
+
+///
+/// The validation bit mask indicates which fields in the IA32/X64 Processor Error
+/// Information Structure are valid.
+///@{
+#define EFI_IA32_X64_ERROR_PROC_CHECK_INFO_VALID BIT0
+#define EFI_IA32_X64_ERROR_PROC_TARGET_ADDR_VALID BIT1
+#define EFI_IA32_X64_ERROR_PROC_REQUESTER_ID_VALID BIT2
+#define EFI_IA32_X64_ERROR_PROC_RESPONDER_ID_VALID BIT3
+#define EFI_IA32_X64_ERROR_PROC_INST_IP_VALID BIT4
+///@}
+
+///
+/// IA32/X64 Processor Error Information Structure
+///
+typedef struct {
+ EFI_GUID ErrorType;
+ UINT64 ValidFields;
+ EFI_IA32_X64_CHECK_INFO_ITEM CheckInfo;
+ UINT64 TargetId;
+ UINT64 RequestorId;
+ UINT64 ResponderId;
+ UINT64 InstructionIP;
+} EFI_IA32_X64_PROCESS_ERROR_INFO;
+
+///
+/// IA32/X64 Processor Context Information Structure
+///
+typedef struct {
+ UINT16 RegisterType;
+ UINT16 ArraySize;
+ UINT32 MsrAddress;
+ UINT64 MmRegisterAddress;
+ //
+ // This field will provide the contents of the actual registers or raw data.
+ // The number of Registers or size of the raw data reported is determined
+ // by (Array Size / 8) or otherwise specified by the context structure type
+ // definition.
+ //
+} EFI_IA32_X64_PROCESSOR_CONTEXT_INFO;
+
+///
+/// Register Context Type
+///@{
+#define EFI_REG_CONTEXT_TYPE_UNCLASSIFIED 0x0000
+#define EFI_REG_CONTEXT_TYPE_MSR 0x0001
+#define EFI_REG_CONTEXT_TYPE_IA32 0x0002
+#define EFI_REG_CONTEXT_TYPE_X64 0x0003
+#define EFI_REG_CONTEXT_TYPE_FXSAVE 0x0004
+#define EFI_REG_CONTEXT_TYPE_DR_IA32 0x0005
+#define EFI_REG_CONTEXT_TYPE_DR_X64 0x0006
+#define EFI_REG_CONTEXT_TYPE_MEM_MAP 0x0007
+///@}
+
+///
+/// IA32 Register State
+///
+typedef struct {
+ UINT32 Eax;
+ UINT32 Ebx;
+ UINT32 Ecx;
+ UINT32 Edx;
+ UINT32 Esi;
+ UINT32 Edi;
+ UINT32 Ebp;
+ UINT32 Esp;
+ UINT16 Cs;
+ UINT16 Ds;
+ UINT16 Ss;
+ UINT16 Es;
+ UINT16 Fs;
+ UINT16 Gs;
+ UINT32 Eflags;
+ UINT32 Eip;
+ UINT32 Cr0;
+ UINT32 Cr1;
+ UINT32 Cr2;
+ UINT32 Cr3;
+ UINT32 Cr4;
+ UINT32 Gdtr[2];
+ UINT32 Idtr[2];
+ UINT16 Ldtr;
+ UINT16 Tr;
+} EFI_CONTEXT_IA32_REGISTER_STATE;
+
+///
+/// X64 Register State
+///
+typedef struct {
+ UINT64 Rax;
+ UINT64 Rbx;
+ UINT64 Rcx;
+ UINT64 Rdx;
+ UINT64 Rsi;
+ UINT64 Rdi;
+ UINT64 Rbp;
+ UINT64 Rsp;
+ UINT64 R8;
+ UINT64 R9;
+ UINT64 R10;
+ UINT64 R11;
+ UINT64 R12;
+ UINT64 R13;
+ UINT64 R14;
+ UINT64 R15;
+ UINT16 Cs;
+ UINT16 Ds;
+ UINT16 Ss;
+ UINT16 Es;
+ UINT16 Fs;
+ UINT16 Gs;
+ UINT32 Resv1;
+ UINT64 Rflags;
+ UINT64 Rip;
+ UINT64 Cr0;
+ UINT64 Cr1;
+ UINT64 Cr2;
+ UINT64 Cr3;
+ UINT64 Cr4;
+ UINT64 Gdtr[2];
+ UINT64 Idtr[2];
+ UINT16 Ldtr;
+ UINT16 Tr;
+} EFI_CONTEXT_X64_REGISTER_STATE;
+
+///
+/// The validation bit mask indicates each of the following field is in IA32/X64
+/// Processor Error Section.
+///
+typedef struct {
+ UINT64 ApicIdValid:1;
+ UINT64 CpuIdInforValid:1;
+ UINT64 ErrorInfoNum:6;
+ UINT64 ContextNum:6;
+ UINT64 Resv1:50;
+} EFI_IA32_X64_VALID_BITS;
+
+#endif
+
+///
+/// Error Status Fields
+///
+typedef struct {
+ UINT64 Resv1:8;
+ UINT64 Type:8;
+ UINT64 AddressSignal:1; ///< Error in Address signals or in Address portion of transaction
+ UINT64 ControlSignal:1; ///< Error in Control signals or in Control portion of transaction
+ UINT64 DataSignal:1; ///< Error in Data signals or in Data portion of transaction
+ UINT64 DetectedByResponder:1; ///< Error detected by responder
+ UINT64 DetectedByRequester:1; ///< Error detected by requestor
+ UINT64 FirstError:1; ///< First Error in the sequence - option field
+ UINT64 OverflowNotLogged:1; ///< Additional errors were not logged due to lack of resources
+ UINT64 Resv2:41;
+} EFI_GENERIC_ERROR_STATUS;
+
+///
+/// Error Type
+///
+typedef enum {
+ ///
+ /// General Internal errors
+ ///
+ ErrorInternal = 1,
+ ErrorBus = 16,
+ ///
+ /// Component Internal errors
+ ///
+ ErrorMemStorage = 4, // Error in memory device
+ ErrorTlbStorage = 5, // TLB error in cache
+ ErrorCacheStorage = 6,
+ ErrorFunctionalUnit = 7,
+ ErrorSelftest = 8,
+ ErrorOverflow = 9,
+ ///
+ /// Bus internal errors
+ ///
+ ErrorVirtualMap = 17,
+ ErrorAccessInvalid = 18, // Improper access
+ ErrorUnimplAccess = 19, // Unimplemented memory access
+ ErrorLossOfLockstep = 20,
+ ErrorResponseInvalid= 21, // Response not associated with request
+ ErrorParity = 22,
+ ErrorProtocol = 23,
+ ErrorPath = 24, // Detected path error
+ ErrorTimeout = 25, // Bus timeout
+ ErrorPoisoned = 26 // Read data poisoned
+} EFI_GENERIC_ERROR_STATUS_ERROR_TYPE;
+
+///
+/// Validation bit mask indicates which fields in the memory error record are valid
+/// in Memory Error section
+///@{
+#define EFI_PLATFORM_MEMORY_ERROR_STATUS_VALID BIT0
+#define EFI_PLATFORM_MEMORY_PHY_ADDRESS_VALID BIT1
+#define EFI_PLATFORM_MEMORY_PHY_ADDRESS_MASK_VALID BIT2
+#define EFI_PLATFORM_MEMORY_NODE_VALID BIT3
+#define EFI_PLATFORM_MEMORY_CARD_VALID BIT4
+#define EFI_PLATFORM_MEMORY_MODULE_VALID BIT5
+#define EFI_PLATFORM_MEMORY_BANK_VALID BIT6
+#define EFI_PLATFORM_MEMORY_DEVICE_VALID BIT7
+#define EFI_PLATFORM_MEMORY_ROW_VALID BIT8
+#define EFI_PLATFORM_MEMORY_COLUMN_VALID BIT9
+#define EFI_PLATFORM_MEMORY_BIT_POS_VALID BIT10
+#define EFI_PLATFORM_MEMORY_REQUESTOR_ID_VALID BIT11
+#define EFI_PLATFORM_MEMORY_RESPONDER_ID_VALID BIT12
+#define EFI_PLATFORM_MEMORY_TARGET_ID_VALID BIT13
+#define EFI_PLATFORM_MEMORY_ERROR_TYPE_VALID BIT14
+#define EFI_PLATFORM_MEMORY_ERROR_RANK_NUM_VALID BIT15
+#define EFI_PLATFORM_MEMORY_ERROR_CARD_HANDLE_VALID BIT16
+#define EFI_PLATFORM_MEMORY_ERROR_MODULE_HANDLE_VALID BIT17
+#define EFI_PLATFORM_MEMORY_ERROR_EXTENDED_ROW_BIT_16_17_VALID BIT18
+#define EFI_PLATFORM_MEMORY_ERROR_BANK_GROUP_VALID BIT19
+#define EFI_PLATFORM_MEMORY_ERROR_BANK_ADDRESS_VALID BIT20
+#define EFI_PLATFORM_MEMORY_ERROR_CHIP_IDENTIFICATION_VALID BIT21
+///@}
+
+///
+/// Memory Error Type identifies the type of error that occurred in Memory
+/// Error section
+///@{
+#define EFI_PLATFORM_MEMORY_ERROR_UNKNOWN 0x00
+#define EFI_PLATFORM_MEMORY_ERROR_NONE 0x01
+#define EFI_PLATFORM_MEMORY_ERROR_SINGLEBIT_ECC 0x02
+#define EFI_PLATFORM_MEMORY_ERROR_MLTIBIT_ECC 0x03
+#define EFI_PLATFORM_MEMORY_ERROR_SINGLESYMBOLS_CHIPKILL 0x04
+#define EFI_PLATFORM_MEMORY_ERROR_MULTISYMBOL_CHIPKILL 0x05
+#define EFI_PLATFORM_MEMORY_ERROR_MATER_ABORT 0x06
+#define EFI_PLATFORM_MEMORY_ERROR_TARGET_ABORT 0x07
+#define EFI_PLATFORM_MEMORY_ERROR_PARITY 0x08
+#define EFI_PLATFORM_MEMORY_ERROR_WDT 0x09
+#define EFI_PLATFORM_MEMORY_ERROR_INVALID_ADDRESS 0x0A
+#define EFI_PLATFORM_MEMORY_ERROR_MIRROR_FAILED 0x0B
+#define EFI_PLATFORM_MEMORY_ERROR_SPARING 0x0C
+#define EFI_PLATFORM_MEMORY_ERROR_SCRUB_CORRECTED 0x0D
+#define EFI_PLATFORM_MEMORY_ERROR_SCRUB_UNCORRECTED 0x0E
+#define EFI_PLATFORM_MEMORY_ERROR_MEMORY_MAP_EVENT 0x0F
+///@}
+
+///
+/// Memory Error Section
+///
+typedef struct {
+ UINT64 ValidFields;
+ EFI_GENERIC_ERROR_STATUS ErrorStatus;
+ UINT64 PhysicalAddress; // Error physical address
+ UINT64 PhysicalAddressMask; // Grnaularity
+ UINT16 Node; // Node #
+ UINT16 Card;
+ UINT16 ModuleRank; // Module or Rank#
+ UINT16 Bank;
+ UINT16 Device;
+ UINT16 Row;
+ UINT16 Column;
+ UINT16 BitPosition;
+ UINT64 RequestorId;
+ UINT64 ResponderId;
+ UINT64 TargetId;
+ UINT8 ErrorType;
+ UINT8 Extended;
+ UINT16 RankNum;
+ UINT16 CardHandle;
+ UINT16 ModuleHandle;
+} EFI_PLATFORM_MEMORY_ERROR_DATA;
+
+///
+/// Validation bit mask indicates which fields in the memory error record 2 are valid
+/// in Memory Error section 2
+///@{
+#define EFI_PLATFORM_MEMORY2_ERROR_STATUS_VALID BIT0
+#define EFI_PLATFORM_MEMORY2_PHY_ADDRESS_VALID BIT1
+#define EFI_PLATFORM_MEMORY2_PHY_ADDRESS_MASK_VALID BIT2
+#define EFI_PLATFORM_MEMORY2_NODE_VALID BIT3
+#define EFI_PLATFORM_MEMORY2_CARD_VALID BIT4
+#define EFI_PLATFORM_MEMORY2_MODULE_VALID BIT5
+#define EFI_PLATFORM_MEMORY2_BANK_VALID BIT6
+#define EFI_PLATFORM_MEMORY2_DEVICE_VALID BIT7
+#define EFI_PLATFORM_MEMORY2_ROW_VALID BIT8
+#define EFI_PLATFORM_MEMORY2_COLUMN_VALID BIT9
+#define EFI_PLATFORM_MEMORY2_RANK_VALID BIT10
+#define EFI_PLATFORM_MEMORY2_BIT_POS_VALID BIT11
+#define EFI_PLATFORM_MEMORY2_CHIP_ID_VALID BIT12
+#define EFI_PLATFORM_MEMORY2_MEMORY_ERROR_TYPE_VALID BIT13
+#define EFI_PLATFORM_MEMORY2_STATUS_VALID BIT14
+#define EFI_PLATFORM_MEMORY2_REQUESTOR_ID_VALID BIT15
+#define EFI_PLATFORM_MEMORY2_RESPONDER_ID_VALID BIT16
+#define EFI_PLATFORM_MEMORY2_TARGET_ID_VALID BIT17
+#define EFI_PLATFORM_MEMORY2_CARD_HANDLE_VALID BIT18
+#define EFI_PLATFORM_MEMORY2_MODULE_HANDLE_VALID BIT19
+#define EFI_PLATFORM_MEMORY2_BANK_GROUP_VALID BIT20
+#define EFI_PLATFORM_MEMORY2_BANK_ADDRESS_VALID BIT21
+///@}
+
+///
+/// Memory Error Type identifies the type of error that occurred in Memory
+/// Error section 2
+///@{
+#define EFI_PLATFORM_MEMORY2_ERROR_UNKNOWN 0x00
+#define EFI_PLATFORM_MEMORY2_ERROR_NONE 0x01
+#define EFI_PLATFORM_MEMORY2_ERROR_SINGLEBIT_ECC 0x02
+#define EFI_PLATFORM_MEMORY2_ERROR_MLTIBIT_ECC 0x03
+#define EFI_PLATFORM_MEMORY2_ERROR_SINGLESYMBOL_CHIPKILL 0x04
+#define EFI_PLATFORM_MEMORY2_ERROR_MULTISYMBOL_CHIPKILL 0x05
+#define EFI_PLATFORM_MEMORY2_ERROR_MASTER_ABORT 0x06
+#define EFI_PLATFORM_MEMORY2_ERROR_TARGET_ABORT 0x07
+#define EFI_PLATFORM_MEMORY2_ERROR_PARITY 0x08
+#define EFI_PLATFORM_MEMORY2_ERROR_WDT 0x09
+#define EFI_PLATFORM_MEMORY2_ERROR_INVALID_ADDRESS 0x0A
+#define EFI_PLATFORM_MEMORY2_ERROR_MIRROR_BROKEN 0x0B
+#define EFI_PLATFORM_MEMORY2_ERROR_MEMORY_SPARING 0x0C
+#define EFI_PLATFORM_MEMORY2_ERROR_SCRUB_CORRECTED 0x0D
+#define EFI_PLATFORM_MEMORY2_ERROR_SCRUB_UNCORRECTED 0x0E
+#define EFI_PLATFORM_MEMORY2_ERROR_MEMORY_MAP_EVENT 0x0F
+///@}
+
+///
+/// Memory Error Section 2
+///
+typedef struct {
+ UINT64 ValidFields;
+ EFI_GENERIC_ERROR_STATUS ErrorStatus;
+ UINT64 PhysicalAddress; // Error physical address
+ UINT64 PhysicalAddressMask; // Grnaularity
+ UINT16 Node; // Node #
+ UINT16 Card;
+ UINT16 Module; // Module or Rank#
+ UINT16 Bank;
+ UINT32 Device;
+ UINT32 Row;
+ UINT32 Column;
+ UINT32 Rank;
+ UINT32 BitPosition;
+ UINT8 ChipId;
+ UINT8 MemErrorType;
+ UINT8 Status;
+ UINT8 Reserved;
+ UINT64 RequestorId;
+ UINT64 ResponderId;
+ UINT64 TargetId;
+ UINT32 CardHandle;
+ UINT32 ModuleHandle;
+} EFI_PLATFORM_MEMORY2_ERROR_DATA;
+
+///
+/// Validation bits mask indicates which of the following fields is valid
+/// in PCI Express Error Record.
+///@{
+#define EFI_PCIE_ERROR_PORT_TYPE_VALID BIT0
+#define EFI_PCIE_ERROR_VERSION_VALID BIT1
+#define EFI_PCIE_ERROR_COMMAND_STATUS_VALID BIT2
+#define EFI_PCIE_ERROR_DEVICE_ID_VALID BIT3
+#define EFI_PCIE_ERROR_SERIAL_NO_VALID BIT4
+#define EFI_PCIE_ERROR_BRIDGE_CRL_STS_VALID BIT5
+#define EFI_PCIE_ERROR_CAPABILITY_INFO_VALID BIT6
+#define EFI_PCIE_ERROR_AER_INFO_VALID BIT7
+///@}
+
+///
+/// PCIe Device/Port Type as defined in the PCI Express capabilities register
+///@{
+#define EFI_PCIE_ERROR_PORT_PCIE_ENDPOINT 0x00000000
+#define EFI_PCIE_ERROR_PORT_PCI_ENDPOINT 0x00000001
+#define EFI_PCIE_ERROR_PORT_ROOT_PORT 0x00000004
+#define EFI_PCIE_ERROR_PORT_UPSWITCH_PORT 0x00000005
+#define EFI_PCIE_ERROR_PORT_DOWNSWITCH_PORT 0x00000006
+#define EFI_PCIE_ERROR_PORT_PCIE_TO_PCI_BRIDGE 0x00000007
+#define EFI_PCIE_ERROR_PORT_PCI_TO_PCIE_BRIDGE 0x00000008
+#define EFI_PCIE_ERROR_PORT_ROOT_INT_ENDPOINT 0x00000009
+#define EFI_PCIE_ERROR_PORT_ROOT_EVENT_COLLECTOR 0x0000000A
+///@}
+
+///
+/// PCI Slot number
+///
+typedef struct {
+ UINT16 Resv1:3;
+ UINT16 Number:13;
+} EFI_GENERIC_ERROR_PCI_SLOT;
+
+///
+/// PCIe Root Port PCI/bridge PCI compatible device number and
+/// bus number information to uniquely identify the root port or
+/// bridge. Default values for both the bus numbers is zero.
+///
+typedef struct {
+ UINT16 VendorId;
+ UINT16 DeviceId;
+ UINT8 ClassCode[3];
+ UINT8 Function;
+ UINT8 Device;
+ UINT16 Segment;
+ UINT8 PrimaryOrDeviceBus;
+ UINT8 SecondaryBus;
+ EFI_GENERIC_ERROR_PCI_SLOT Slot;
+ UINT8 Resv1;
+} EFI_GENERIC_ERROR_PCIE_DEV_BRIDGE_ID;
+
+///
+/// PCIe Capability Structure
+///
+typedef struct {
+ UINT8 PcieCap[60];
+} EFI_PCIE_ERROR_DATA_CAPABILITY;
+
+///
+/// PCIe Advanced Error Reporting Extended Capability Structure.
+///
+typedef struct {
+ UINT8 PcieAer[96];
+} EFI_PCIE_ERROR_DATA_AER;
+
+///
+/// PCI Express Error Record
+///
+typedef struct {
+ UINT64 ValidFields;
+ UINT32 PortType;
+ UINT32 Version;
+ UINT32 CommandStatus;
+ UINT32 Resv2;
+ EFI_GENERIC_ERROR_PCIE_DEV_BRIDGE_ID DevBridge;
+ UINT64 SerialNo;
+ UINT32 BridgeControlStatus;
+ EFI_PCIE_ERROR_DATA_CAPABILITY Capability;
+ EFI_PCIE_ERROR_DATA_AER AerInfo;
+} EFI_PCIE_ERROR_DATA;
+
+///
+/// Validation bits Indicates which of the following fields is valid
+/// in PCI/PCI-X Bus Error Section.
+///@{
+#define EFI_PCI_PCIX_BUS_ERROR_STATUS_VALID BIT0
+#define EFI_PCI_PCIX_BUS_ERROR_TYPE_VALID BIT1
+#define EFI_PCI_PCIX_BUS_ERROR_BUS_ID_VALID BIT2
+#define EFI_PCI_PCIX_BUS_ERROR_BUS_ADDRESS_VALID BIT3
+#define EFI_PCI_PCIX_BUS_ERROR_BUS_DATA_VALID BIT4
+#define EFI_PCI_PCIX_BUS_ERROR_COMMAND_VALID BIT5
+#define EFI_PCI_PCIX_BUS_ERROR_REQUESTOR_ID_VALID BIT6
+#define EFI_PCI_PCIX_BUS_ERROR_COMPLETER_ID_VALID BIT7
+#define EFI_PCI_PCIX_BUS_ERROR_TARGET_ID_VALID BIT8
+///@}
+
+///
+/// PCI Bus Error Type in PCI/PCI-X Bus Error Section
+///@{
+#define EFI_PCI_PCIX_BUS_ERROR_UNKNOWN 0x0000
+#define EFI_PCI_PCIX_BUS_ERROR_DATA_PARITY 0x0001
+#define EFI_PCI_PCIX_BUS_ERROR_SYSTEM 0x0002
+#define EFI_PCI_PCIX_BUS_ERROR_MASTER_ABORT 0x0003
+#define EFI_PCI_PCIX_BUS_ERROR_BUS_TIMEOUT 0x0004
+#define EFI_PCI_PCIX_BUS_ERROR_MASTER_DATA_PARITY 0x0005
+#define EFI_PCI_PCIX_BUS_ERROR_ADDRESS_PARITY 0x0006
+#define EFI_PCI_PCIX_BUS_ERROR_COMMAND_PARITY 0x0007
+///@}
+
+///
+/// PCI/PCI-X Bus Error Section
+///
+typedef struct {
+ UINT64 ValidFields;
+ EFI_GENERIC_ERROR_STATUS ErrorStatus;
+ UINT16 Type;
+ UINT16 BusId;
+ UINT32 Resv2;
+ UINT64 BusAddress;
+ UINT64 BusData;
+ UINT64 BusCommand;
+ UINT64 RequestorId;
+ UINT64 ResponderId;
+ UINT64 TargetId;
+} EFI_PCI_PCIX_BUS_ERROR_DATA;
+
+///
+/// Validation bits Indicates which of the following fields is valid
+/// in PCI/PCI-X Component Error Section.
+///@{
+#define EFI_PCI_PCIX_DEVICE_ERROR_STATUS_VALID BIT0
+#define EFI_PCI_PCIX_DEVICE_ERROR_ID_INFO_VALID BIT1
+#define EFI_PCI_PCIX_DEVICE_ERROR_MEM_NUM_VALID BIT2
+#define EFI_PCI_PCIX_DEVICE_ERROR_IO_NUM_VALID BIT3
+#define EFI_PCI_PCIX_DEVICE_ERROR_REG_DATA_PAIR_VALID BIT4
+///@}
+
+///
+/// PCI/PCI-X Device Identification Information
+///
+typedef struct {
+ UINT16 VendorId;
+ UINT16 DeviceId;
+ UINT8 ClassCode[3];
+ UINT8 Function;
+ UINT8 Device;
+ UINT8 Bus;
+ UINT8 Segment;
+ UINT8 Resv1;
+ UINT32 Resv2;
+} EFI_GENERIC_ERROR_PCI_DEVICE_ID;
+
+///
+/// Identifies the type of firmware error record
+///
+#define EFI_FIRMWARE_ERROR_TYPE_IPF_SAL 0x00
+
+///
+/// Firmware Error Record Section
+///
+typedef struct {
+ UINT8 ErrorType;
+ UINT8 Resv1[7];
+ UINT64 RecordId;
+} EFI_FIRMWARE_ERROR_DATA;
+
+///
+/// Fault Reason in DMAr Generic Error Section
+///@{
+#define EFI_DMA_FAULT_REASON_TABLE_ENTRY_NOT_PRESENT 0x01
+#define EFI_DMA_FAULT_REASON_TABLE_ENTRY_INVALID 0x02
+#define EFI_DMA_FAULT_REASON_ACCESS_MAPPING_TABLE_ERROR 0x03
+#define EFI_DMA_FAULT_REASON_RESV_BIT_ERROR_IN_MAPPING_TABLE 0x04
+#define EFI_DMA_FAULT_REASON_ACCESS_ADDR_OUT_OF_SPACE 0x05
+#define EFI_DMA_FAULT_REASON_INVALID_ACCESS 0x06
+#define EFI_DMA_FAULT_REASON_INVALID_REQUEST 0x07
+#define EFI_DMA_FAULT_REASON_ACCESS_TRANSLATE_TABLE_ERROR 0x08
+#define EFI_DMA_FAULT_REASON_RESV_BIT_ERROR_IN_TRANSLATE_TABLE 0x09
+#define EFI_DMA_FAULT_REASON_INVALID_COMMAOND 0x0A
+#define EFI_DMA_FAULT_REASON_ACCESS_COMMAND_BUFFER_ERROR 0x0B
+///@}
+
+///
+/// DMA access type in DMAr Generic Error Section
+///@{
+#define EFI_DMA_ACCESS_TYPE_READ 0x00
+#define EFI_DMA_ACCESS_TYPE_WRITE 0x01
+///@}
+
+///
+/// DMA address type in DMAr Generic Error Section
+///@{
+#define EFI_DMA_ADDRESS_UNTRANSLATED 0x00
+#define EFI_DMA_ADDRESS_TRANSLATION 0x01
+///@}
+
+///
+/// Architecture type in DMAr Generic Error Section
+///@{
+#define EFI_DMA_ARCH_TYPE_VT 0x01
+#define EFI_DMA_ARCH_TYPE_IOMMU 0x02
+///@}
+
+///
+/// DMAr Generic Error Section
+///
+typedef struct {
+ UINT16 RequesterId;
+ UINT16 SegmentNumber;
+ UINT8 FaultReason;
+ UINT8 AccessType;
+ UINT8 AddressType;
+ UINT8 ArchType;
+ UINT64 DeviceAddr;
+ UINT8 Resv1[16];
+} EFI_DMAR_GENERIC_ERROR_DATA;
+
+///
+/// Intel VT for Directed I/O specific DMAr Errors
+///
+typedef struct {
+ UINT8 Version;
+ UINT8 Revision;
+ UINT8 OemId[6];
+ UINT64 Capability;
+ UINT64 CapabilityEx;
+ UINT32 GlobalCommand;
+ UINT32 GlobalStatus;
+ UINT32 FaultStatus;
+ UINT8 Resv1[12];
+ UINT64 FaultRecord[2];
+ UINT64 RootEntry[2];
+ UINT64 ContextEntry[2];
+ UINT64 PteL6;
+ UINT64 PteL5;
+ UINT64 PteL4;
+ UINT64 PteL3;
+ UINT64 PteL2;
+ UINT64 PteL1;
+} EFI_DIRECTED_IO_DMAR_ERROR_DATA;
+
+///
+/// IOMMU specific DMAr Errors
+///
+typedef struct {
+ UINT8 Revision;
+ UINT8 Resv1[7];
+ UINT64 Control;
+ UINT64 Status;
+ UINT8 Resv2[8];
+ UINT64 EventLogEntry[2];
+ UINT8 Resv3[16];
+ UINT64 DeviceTableEntry[4];
+ UINT64 PteL6;
+ UINT64 PteL5;
+ UINT64 PteL4;
+ UINT64 PteL3;
+ UINT64 PteL2;
+ UINT64 PteL1;
+} EFI_IOMMU_DMAR_ERROR_DATA;
+
+#pragma pack()
+
+extern EFI_GUID gEfiEventNotificationTypeCmcGuid;
+extern EFI_GUID gEfiEventNotificationTypeCpeGuid;
+extern EFI_GUID gEfiEventNotificationTypeMceGuid;
+extern EFI_GUID gEfiEventNotificationTypePcieGuid;
+extern EFI_GUID gEfiEventNotificationTypeInitGuid;
+extern EFI_GUID gEfiEventNotificationTypeNmiGuid;
+extern EFI_GUID gEfiEventNotificationTypeBootGuid;
+extern EFI_GUID gEfiEventNotificationTypeDmarGuid;
+
+extern EFI_GUID gEfiProcessorGenericErrorSectionGuid;
+extern EFI_GUID gEfiProcessorSpecificErrorSectionGuid;
+extern EFI_GUID gEfiIa32X64ProcessorErrorSectionGuid;
+extern EFI_GUID gEfiArmProcessorErrorSectionGuid ;
+extern EFI_GUID gEfiPlatformMemoryErrorSectionGuid;
+extern EFI_GUID gEfiPlatformMemory2ErrorSectionGuid;
+extern EFI_GUID gEfiPcieErrorSectionGuid;
+extern EFI_GUID gEfiFirmwareErrorSectionGuid;
+extern EFI_GUID gEfiPciBusErrorSectionGuid;
+extern EFI_GUID gEfiPciDevErrorSectionGuid;
+extern EFI_GUID gEfiDMArGenericErrorSectionGuid;
+extern EFI_GUID gEfiDirectedIoDMArErrorSectionGuid;
+extern EFI_GUID gEfiIommuDMArErrorSectionGuid;
+
+#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
+///
+/// IA32 and x64 Specific definitions.
+///
+
+extern EFI_GUID gEfiIa32X64ErrorTypeCacheCheckGuid;
+extern EFI_GUID gEfiIa32X64ErrorTypeTlbCheckGuid;
+extern EFI_GUID gEfiIa32X64ErrorTypeBusCheckGuid;
+extern EFI_GUID gEfiIa32X64ErrorTypeMsCheckGuid;
+
+#endif
+
+#endif
diff --git a/MdePkg/Include/Guid/DebugImageInfoTable.h b/MdePkg/Include/Guid/DebugImageInfoTable.h
new file mode 100644
index 000000000000..553ebd258854
--- /dev/null
+++ b/MdePkg/Include/Guid/DebugImageInfoTable.h
@@ -0,0 +1,80 @@
+/** @file
+ GUID and related data structures used with the Debug Image Info Table.
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ GUID defined in UEFI 2.0 spec.
+
+**/
+
+#ifndef __DEBUG_IMAGE_INFO_GUID_H__
+#define __DEBUG_IMAGE_INFO_GUID_H__
+
+#include <Protocol/LoadedImage.h>
+
+///
+/// EFI_DEBUG_IMAGE_INFO_TABLE configuration table GUID declaration.
+///
+#define EFI_DEBUG_IMAGE_INFO_TABLE_GUID \
+ { \
+ 0x49152e77, 0x1ada, 0x4764, {0xb7, 0xa2, 0x7a, 0xfe, 0xfe, 0xd9, 0x5e, 0x8b } \
+ }
+
+#define EFI_DEBUG_IMAGE_INFO_UPDATE_IN_PROGRESS 0x01
+#define EFI_DEBUG_IMAGE_INFO_TABLE_MODIFIED 0x02
+
+#define EFI_DEBUG_IMAGE_INFO_TYPE_NORMAL 0x01
+
+typedef struct {
+ UINT64 Signature; ///< A constant UINT64 that has the value EFI_SYSTEM_TABLE_SIGNATURE
+ EFI_PHYSICAL_ADDRESS EfiSystemTableBase; ///< The physical address of the EFI system table.
+ UINT32 Crc32; ///< A 32-bit CRC value that is used to verify the EFI_SYSTEM_TABLE_POINTER structure is valid.
+} EFI_SYSTEM_TABLE_POINTER;
+
+typedef struct {
+ ///
+ /// Indicates the type of image info structure. For PE32 EFI images,
+ /// this is set to EFI_DEBUG_IMAGE_INFO_TYPE_NORMAL.
+ ///
+ UINT32 ImageInfoType;
+ ///
+ /// A pointer to an instance of the loaded image protocol for the associated image.
+ ///
+ EFI_LOADED_IMAGE_PROTOCOL *LoadedImageProtocolInstance;
+ ///
+ /// Indicates the image handle of the associated image.
+ ///
+ EFI_HANDLE ImageHandle;
+} EFI_DEBUG_IMAGE_INFO_NORMAL;
+
+typedef union {
+ UINT32 *ImageInfoType;
+ EFI_DEBUG_IMAGE_INFO_NORMAL *NormalImage;
+} EFI_DEBUG_IMAGE_INFO;
+
+typedef struct {
+ ///
+ /// UpdateStatus is used by the system to indicate the state of the debug image info table.
+ ///
+ volatile UINT32 UpdateStatus;
+ ///
+ /// The number of EFI_DEBUG_IMAGE_INFO elements in the array pointed to by EfiDebugImageInfoTable.
+ ///
+ UINT32 TableSize;
+ ///
+ /// A pointer to the first element of an array of EFI_DEBUG_IMAGE_INFO structures.
+ ///
+ EFI_DEBUG_IMAGE_INFO *EfiDebugImageInfoTable;
+} EFI_DEBUG_IMAGE_INFO_TABLE_HEADER;
+
+extern EFI_GUID gEfiDebugImageInfoTableGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/DxeServices.h b/MdePkg/Include/Guid/DxeServices.h
new file mode 100644
index 000000000000..be2b5b3e96d0
--- /dev/null
+++ b/MdePkg/Include/Guid/DxeServices.h
@@ -0,0 +1,28 @@
+/** @file
+ GUID used to identify the DXE Services Table
+
+ Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ GUID introduced in PI Version 1.0.
+
+**/
+
+#ifndef __DXE_SERVICES_GUID_H__
+#define __DXE_SERVICES_GUID_H__
+
+#define DXE_SERVICES_TABLE_GUID \
+ { \
+ 0x5ad34ba, 0x6f02, 0x4214, {0x95, 0x2e, 0x4d, 0xa0, 0x39, 0x8e, 0x2b, 0xb9 } \
+ }
+
+extern EFI_GUID gEfiDxeServicesTableGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/EventGroup.h b/MdePkg/Include/Guid/EventGroup.h
new file mode 100644
index 000000000000..04ee0e0fdaad
--- /dev/null
+++ b/MdePkg/Include/Guid/EventGroup.h
@@ -0,0 +1,52 @@
+/** @file
+ GUIDs for gBS->CreateEventEx Event Groups. Defined in UEFI spec 2.0 and PI 1.2.1.
+
+Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __EVENT_GROUP_GUID__
+#define __EVENT_GROUP_GUID__
+
+
+#define EFI_EVENT_GROUP_EXIT_BOOT_SERVICES \
+ { 0x27abf055, 0xb1b8, 0x4c26, { 0x80, 0x48, 0x74, 0x8f, 0x37, 0xba, 0xa2, 0xdf } }
+
+extern EFI_GUID gEfiEventExitBootServicesGuid;
+
+
+#define EFI_EVENT_GROUP_VIRTUAL_ADDRESS_CHANGE \
+ { 0x13fa7698, 0xc831, 0x49c7, { 0x87, 0xea, 0x8f, 0x43, 0xfc, 0xc2, 0x51, 0x96 } }
+
+extern EFI_GUID gEfiEventVirtualAddressChangeGuid;
+
+
+#define EFI_EVENT_GROUP_MEMORY_MAP_CHANGE \
+ { 0x78bee926, 0x692f, 0x48fd, { 0x9e, 0xdb, 0x1, 0x42, 0x2e, 0xf0, 0xd7, 0xab } }
+
+extern EFI_GUID gEfiEventMemoryMapChangeGuid;
+
+
+#define EFI_EVENT_GROUP_READY_TO_BOOT \
+ { 0x7ce88fb3, 0x4bd7, 0x4679, { 0x87, 0xa8, 0xa8, 0xd8, 0xde, 0xe5, 0x0d, 0x2b } }
+
+extern EFI_GUID gEfiEventReadyToBootGuid;
+
+#define EFI_EVENT_GROUP_DXE_DISPATCH_GUID \
+ { 0x7081e22f, 0xcac6, 0x4053, { 0x94, 0x68, 0x67, 0x57, 0x82, 0xcf, 0x88, 0xe5 }}
+
+extern EFI_GUID gEfiEventDxeDispatchGuid;
+
+#define EFI_END_OF_DXE_EVENT_GROUP_GUID \
+ { 0x2ce967a, 0xdd7e, 0x4ffc, { 0x9e, 0xe7, 0x81, 0xc, 0xf0, 0x47, 0x8, 0x80 } }
+
+extern EFI_GUID gEfiEndOfDxeEventGroupGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/EventLegacyBios.h b/MdePkg/Include/Guid/EventLegacyBios.h
new file mode 100644
index 000000000000..f69aa18f9a21
--- /dev/null
+++ b/MdePkg/Include/Guid/EventLegacyBios.h
@@ -0,0 +1,28 @@
+/** @file
+ GUID is the name of events used with CreateEventEx in order to be notified
+ when the EFI boot manager is about to boot a legacy boot option.
+ Events of this type are notificated just before Int19h is invoked.
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ GUID introduced in PI Version 1.0.
+
+**/
+
+#ifndef __EVENT_LEGACY_BIOS_GUID_H__
+#define __EVENT_LEGACY_BIOS_GUID_H__
+
+#define EFI_EVENT_LEGACY_BOOT_GUID \
+ { 0x2a571201, 0x4966, 0x47f6, {0x8b, 0x86, 0xf3, 0x1e, 0x41, 0xf3, 0x2f, 0x10 } }
+
+extern EFI_GUID gEfiEventLegacyBootGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/FileInfo.h b/MdePkg/Include/Guid/FileInfo.h
new file mode 100644
index 000000000000..5a2e081b4672
--- /dev/null
+++ b/MdePkg/Include/Guid/FileInfo.h
@@ -0,0 +1,71 @@
+/** @file
+ Provides a GUID and a data structure that can be used with EFI_FILE_PROTOCOL.SetInfo()
+ and EFI_FILE_PROTOCOL.GetInfo() to set or get generic file information.
+ This GUID is defined in UEFI specification.
+
+Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __FILE_INFO_H__
+#define __FILE_INFO_H__
+
+#define EFI_FILE_INFO_ID \
+ { \
+ 0x9576e92, 0x6d3f, 0x11d2, {0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \
+ }
+
+typedef struct {
+ ///
+ /// The size of the EFI_FILE_INFO structure, including the Null-terminated FileName string.
+ ///
+ UINT64 Size;
+ ///
+ /// The size of the file in bytes.
+ ///
+ UINT64 FileSize;
+ ///
+ /// PhysicalSize The amount of physical space the file consumes on the file system volume.
+ ///
+ UINT64 PhysicalSize;
+ ///
+ /// The time the file was created.
+ ///
+ EFI_TIME CreateTime;
+ ///
+ /// The time when the file was last accessed.
+ ///
+ EFI_TIME LastAccessTime;
+ ///
+ /// The time when the file's contents were last modified.
+ ///
+ EFI_TIME ModificationTime;
+ ///
+ /// The attribute bits for the file.
+ ///
+ UINT64 Attribute;
+ ///
+ /// The Null-terminated name of the file.
+ ///
+ CHAR16 FileName[1];
+} EFI_FILE_INFO;
+
+///
+/// The FileName field of the EFI_FILE_INFO data structure is variable length.
+/// Whenever code needs to know the size of the EFI_FILE_INFO data structure, it needs to
+/// be the size of the data structure without the FileName field. The following macro
+/// computes this size correctly no matter how big the FileName array is declared.
+/// This is required to make the EFI_FILE_INFO data structure ANSI compilant.
+///
+#define SIZE_OF_EFI_FILE_INFO OFFSET_OF (EFI_FILE_INFO, FileName)
+
+extern EFI_GUID gEfiFileInfoGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/FileSystemInfo.h b/MdePkg/Include/Guid/FileSystemInfo.h
new file mode 100644
index 000000000000..f666ae5571ab
--- /dev/null
+++ b/MdePkg/Include/Guid/FileSystemInfo.h
@@ -0,0 +1,63 @@
+/** @file
+ Provides a GUID and a data structure that can be used with EFI_FILE_PROTOCOL.GetInfo()
+ or EFI_FILE_PROTOCOL.SetInfo() to get or set information about the system's volume.
+ This GUID is defined in UEFI specification.
+
+Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __FILE_SYSTEM_INFO_H__
+#define __FILE_SYSTEM_INFO_H__
+
+#define EFI_FILE_SYSTEM_INFO_ID \
+ { \
+ 0x9576e93, 0x6d3f, 0x11d2, {0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \
+ }
+
+typedef struct {
+ ///
+ /// The size of the EFI_FILE_SYSTEM_INFO structure, including the Null-terminated VolumeLabel string.
+ ///
+ UINT64 Size;
+ ///
+ /// TRUE if the volume only supports read access.
+ ///
+ BOOLEAN ReadOnly;
+ ///
+ /// The number of bytes managed by the file system.
+ ///
+ UINT64 VolumeSize;
+ ///
+ /// The number of available bytes for use by the file system.
+ ///
+ UINT64 FreeSpace;
+ ///
+ /// The nominal block size by which files are typically grown.
+ ///
+ UINT32 BlockSize;
+ ///
+ /// The Null-terminated string that is the volume's label.
+ ///
+ CHAR16 VolumeLabel[1];
+} EFI_FILE_SYSTEM_INFO;
+
+///
+/// The VolumeLabel field of the EFI_FILE_SYSTEM_INFO data structure is variable length.
+/// Whenever code needs to know the size of the EFI_FILE_SYSTEM_INFO data structure, it needs
+/// to be the size of the data structure without the VolumeLable field. The following macro
+/// computes this size correctly no matter how big the VolumeLable array is declared.
+/// This is required to make the EFI_FILE_SYSTEM_INFO data structure ANSI compilant.
+///
+#define SIZE_OF_EFI_FILE_SYSTEM_INFO OFFSET_OF (EFI_FILE_SYSTEM_INFO, VolumeLabel)
+
+extern EFI_GUID gEfiFileSystemInfoGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/FileSystemVolumeLabelInfo.h b/MdePkg/Include/Guid/FileSystemVolumeLabelInfo.h
new file mode 100644
index 000000000000..0f41f9a34e03
--- /dev/null
+++ b/MdePkg/Include/Guid/FileSystemVolumeLabelInfo.h
@@ -0,0 +1,37 @@
+/** @file
+ Provides a GUID and a data structure that can be used with EFI_FILE_PROTOCOL.GetInfo()
+ or EFI_FILE_PROTOCOL.SetInfo() to get or set the system's volume label.
+ This GUID is defined in UEFI specification.
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __FILE_SYSTEM_VOLUME_LABEL_INFO_H__
+#define __FILE_SYSTEM_VOLUME_LABEL_INFO_H__
+
+#define EFI_FILE_SYSTEM_VOLUME_LABEL_ID \
+ { \
+ 0xDB47D7D3, 0xFE81, 0x11d3, {0x9A, 0x35, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D } \
+ }
+
+typedef struct {
+ ///
+ /// The Null-terminated string that is the volume's label.
+ ///
+ CHAR16 VolumeLabel[1];
+} EFI_FILE_SYSTEM_VOLUME_LABEL;
+
+#define SIZE_OF_EFI_FILE_SYSTEM_VOLUME_LABEL \
+ OFFSET_OF (EFI_FILE_SYSTEM_VOLUME_LABEL, VolumeLabel)
+
+extern EFI_GUID gEfiFileSystemVolumeLabelInfoIdGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/FirmwareContentsSigned.h b/MdePkg/Include/Guid/FirmwareContentsSigned.h
new file mode 100644
index 000000000000..c13a21eb1356
--- /dev/null
+++ b/MdePkg/Include/Guid/FirmwareContentsSigned.h
@@ -0,0 +1,26 @@
+/** @file
+ GUID is used to define the signed section.
+
+ Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ GUID introduced in PI Version 1.2.1.
+
+**/
+
+#ifndef __FIRMWARE_CONTENTS_SIGNED_GUID_H__
+#define __FIRMWARE_CONTENTS_SIGNED_GUID_H__
+
+#define EFI_FIRMWARE_CONTENTS_SIGNED_GUID \
+ { 0xf9d89e8, 0x9259, 0x4f76, {0xa5, 0xaf, 0xc, 0x89, 0xe3, 0x40, 0x23, 0xdf } }
+
+extern EFI_GUID gEfiFirmwareContentsSignedGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/FirmwareFileSystem2.h b/MdePkg/Include/Guid/FirmwareFileSystem2.h
new file mode 100644
index 000000000000..9e12fd608444
--- /dev/null
+++ b/MdePkg/Include/Guid/FirmwareFileSystem2.h
@@ -0,0 +1,40 @@
+/** @file
+ Guid used to define the Firmware File System 2.
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ GUIDs introduced in PI Version 1.0.
+
+**/
+
+#ifndef __FIRMWARE_FILE_SYSTEM2_GUID_H__
+#define __FIRMWARE_FILE_SYSTEM2_GUID_H__
+
+///
+/// The firmware volume header contains a data field for
+/// the file system GUID
+///
+#define EFI_FIRMWARE_FILE_SYSTEM2_GUID \
+ { 0x8c8ce578, 0x8a3d, 0x4f1c, { 0x99, 0x35, 0x89, 0x61, 0x85, 0xc3, 0x2d, 0xd3 } }
+
+///
+/// A Volume Top File (VTF) is a file that must be
+/// located such that the last byte of the file is
+/// also the last byte of the firmware volume
+///
+#define EFI_FFS_VOLUME_TOP_FILE_GUID \
+ { 0x1BA0062E, 0xC779, 0x4582, { 0x85, 0x66, 0x33, 0x6A, 0xE8, 0xF7, 0x8F, 0x9 } }
+
+
+extern EFI_GUID gEfiFirmwareFileSystem2Guid;
+extern EFI_GUID gEfiFirmwareVolumeTopFileGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/FirmwareFileSystem3.h b/MdePkg/Include/Guid/FirmwareFileSystem3.h
new file mode 100644
index 000000000000..37ee56a97afd
--- /dev/null
+++ b/MdePkg/Include/Guid/FirmwareFileSystem3.h
@@ -0,0 +1,30 @@
+/** @file
+ Guid used to define the Firmware File System 3.
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ GUIDs introduced in PI Version 1.0.
+
+**/
+
+#ifndef __FIRMWARE_FILE_SYSTEM3_GUID_H__
+#define __FIRMWARE_FILE_SYSTEM3_GUID_H__
+
+///
+/// The firmware volume header contains a data field for the file system GUID
+/// {5473C07A-3DCB-4dca-BD6F-1E9689E7349A}
+///
+#define EFI_FIRMWARE_FILE_SYSTEM3_GUID \
+ { 0x5473c07a, 0x3dcb, 0x4dca, { 0xbd, 0x6f, 0x1e, 0x96, 0x89, 0xe7, 0x34, 0x9a }}
+
+extern EFI_GUID gEfiFirmwareFileSystem3Guid;
+
+#endif // __FIRMWARE_FILE_SYSTEM3_GUID_H__
diff --git a/MdePkg/Include/Guid/FmpCapsule.h b/MdePkg/Include/Guid/FmpCapsule.h
new file mode 100644
index 000000000000..2d97b109d093
--- /dev/null
+++ b/MdePkg/Include/Guid/FmpCapsule.h
@@ -0,0 +1,98 @@
+/** @file
+ Guid & data structure used for Delivering Capsules Containing Updates to Firmware
+ Management Protocol
+
+ Copyright (c) 2013 - 2015, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ GUIDs defined in UEFI 2.4 spec.
+
+**/
+
+
+#ifndef _FMP_CAPSULE_GUID_H__
+#define _FMP_CAPSULE_GUID_H__
+
+//
+// This is the GUID of the capsule for Firmware Management Protocol.
+//
+#define EFI_FIRMWARE_MANAGEMENT_CAPSULE_ID_GUID \
+ { \
+ 0x6dcbd5ed, 0xe82d, 0x4c44, {0xbd, 0xa1, 0x71, 0x94, 0x19, 0x9a, 0xd9, 0x2a } \
+ }
+
+#pragma pack(1)
+
+typedef struct {
+ UINT32 Version;
+
+ ///
+ /// The number of drivers included in the capsule and the number of corresponding
+ /// offsets stored in ItemOffsetList array.
+ ///
+ UINT16 EmbeddedDriverCount;
+
+ ///
+ /// The number of payload items included in the capsule and the number of
+ /// corresponding offsets stored in the ItemOffsetList array.
+ ///
+ UINT16 PayloadItemCount;
+
+ ///
+ /// Variable length array of dimension [EmbeddedDriverCount + PayloadItemCount]
+ /// containing offsets of each of the drivers and payload items contained within the capsule
+ ///
+ // UINT64 ItemOffsetList[];
+} EFI_FIRMWARE_MANAGEMENT_CAPSULE_HEADER;
+
+typedef struct {
+ UINT32 Version;
+
+ ///
+ /// Used to identify device firmware targeted by this update. This guid is matched by
+ /// system firmware against ImageTypeId field within a EFI_FIRMWARE_IMAGE_DESCRIPTOR
+ ///
+ EFI_GUID UpdateImageTypeId;
+
+ ///
+ /// Passed as ImageIndex in call to EFI_FIRMWARE_MANAGEMENT_PROTOCOL.SetImage()
+ ///
+ UINT8 UpdateImageIndex;
+ UINT8 reserved_bytes[3];
+
+ ///
+ /// Size of the binary update image which immediately follows this structure
+ ///
+ UINT32 UpdateImageSize;
+
+ ///
+ /// Size of the VendorCode bytes which optionally immediately follow binary update image in the capsule
+ ///
+ UINT32 UpdateVendorCodeSize;
+
+ ///
+ /// The HardwareInstance to target with this update. If value is zero it means match all
+ /// HardwareInstances. This field allows update software to target only a single device in
+ /// cases where there are more than one device with the same ImageTypeId GUID.
+ /// This header is outside the signed data of the Authentication Info structure and
+ /// therefore can be modified without changing the Auth data.
+ ///
+ UINT64 UpdateHardwareInstance;
+} EFI_FIRMWARE_MANAGEMENT_CAPSULE_IMAGE_HEADER;
+
+#pragma pack()
+
+
+#define EFI_FIRMWARE_MANAGEMENT_CAPSULE_HEADER_INIT_VERSION 0x00000001
+#define EFI_FIRMWARE_MANAGEMENT_CAPSULE_IMAGE_HEADER_INIT_VERSION 0x00000002
+
+extern EFI_GUID gEfiFmpCapsuleGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/GlobalVariable.h b/MdePkg/Include/Guid/GlobalVariable.h
new file mode 100644
index 000000000000..a0be1a94c604
--- /dev/null
+++ b/MdePkg/Include/Guid/GlobalVariable.h
@@ -0,0 +1,192 @@
+/** @file
+ GUID for EFI (NVRAM) Variables.
+
+ Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ GUID defined in UEFI 2.1
+**/
+
+#ifndef __GLOBAL_VARIABLE_GUID_H__
+#define __GLOBAL_VARIABLE_GUID_H__
+
+#define EFI_GLOBAL_VARIABLE \
+ { \
+ 0x8BE4DF61, 0x93CA, 0x11d2, {0xAA, 0x0D, 0x00, 0xE0, 0x98, 0x03, 0x2B, 0x8C } \
+ }
+
+extern EFI_GUID gEfiGlobalVariableGuid;
+
+//
+// Follow UEFI 2.4 spec:
+// To prevent name collisions with possible future globally defined variables,
+// other internal firmware data variables that are not defined here must be
+// saved with a unique VendorGuid other than EFI_GLOBAL_VARIABLE or
+// any other GUID defined by the UEFI Specification. Implementations must
+// only permit the creation of variables with a UEFI Specification-defined
+// VendorGuid when these variables are documented in the UEFI Specification.
+//
+// Note: except the globally defined variables defined below, the spec also defines
+// L"Boot####" - A boot load option.
+// L"Driver####" - A driver load option.
+// L"SysPrep####" - A System Prep application load option.
+// L"Key####" - Describes hot key relationship with a Boot#### load option.
+// The attribute for them is NV+BS+RT, #### is a printed hex value, and no 0x or h
+// is included in the hex value. They can not be expressed as a #define like other globally
+// defined variables, it is because we can not list the Boot0000, Boot0001, etc one by one.
+//
+
+///
+/// The language codes that the firmware supports. This value is deprecated.
+/// Its attribute is BS+RT.
+///
+#define EFI_LANG_CODES_VARIABLE_NAME L"LangCodes"
+///
+/// The language code that the system is configured for. This value is deprecated.
+/// Its attribute is NV+BS+RT.
+///
+#define EFI_LANG_VARIABLE_NAME L"Lang"
+///
+/// The firmware's boot managers timeout, in seconds, before initiating the default boot selection.
+/// Its attribute is NV+BS+RT.
+///
+#define EFI_TIME_OUT_VARIABLE_NAME L"Timeout"
+///
+/// The language codes that the firmware supports.
+/// Its attribute is BS+RT.
+///
+#define EFI_PLATFORM_LANG_CODES_VARIABLE_NAME L"PlatformLangCodes"
+///
+/// The language code that the system is configured for.
+/// Its attribute is NV+BS+RT.
+///
+#define EFI_PLATFORM_LANG_VARIABLE_NAME L"PlatformLang"
+///
+/// The device path of the default input/output/error output console.
+/// Its attribute is NV+BS+RT.
+///
+#define EFI_CON_IN_VARIABLE_NAME L"ConIn"
+#define EFI_CON_OUT_VARIABLE_NAME L"ConOut"
+#define EFI_ERR_OUT_VARIABLE_NAME L"ErrOut"
+///
+/// The device path of all possible input/output/error output devices.
+/// Its attribute is BS+RT.
+///
+#define EFI_CON_IN_DEV_VARIABLE_NAME L"ConInDev"
+#define EFI_CON_OUT_DEV_VARIABLE_NAME L"ConOutDev"
+#define EFI_ERR_OUT_DEV_VARIABLE_NAME L"ErrOutDev"
+///
+/// The ordered boot option load list.
+/// Its attribute is NV+BS+RT.
+///
+#define EFI_BOOT_ORDER_VARIABLE_NAME L"BootOrder"
+///
+/// The boot option for the next boot only.
+/// Its attribute is NV+BS+RT.
+///
+#define EFI_BOOT_NEXT_VARIABLE_NAME L"BootNext"
+///
+/// The boot option that was selected for the current boot.
+/// Its attribute is BS+RT.
+///
+#define EFI_BOOT_CURRENT_VARIABLE_NAME L"BootCurrent"
+///
+/// The types of boot options supported by the boot manager. Should be treated as read-only.
+/// Its attribute is BS+RT.
+///
+#define EFI_BOOT_OPTION_SUPPORT_VARIABLE_NAME L"BootOptionSupport"
+///
+/// The ordered driver load option list.
+/// Its attribute is NV+BS+RT.
+///
+#define EFI_DRIVER_ORDER_VARIABLE_NAME L"DriverOrder"
+///
+/// The ordered System Prep Application load option list.
+/// Its attribute is NV+BS+RT.
+///
+#define EFI_SYS_PREP_ORDER_VARIABLE_NAME L"SysPrepOrder"
+///
+/// Identifies the level of hardware error record persistence
+/// support implemented by the platform. This variable is
+/// only modified by firmware and is read-only to the OS.
+/// Its attribute is NV+BS+RT.
+///
+#define EFI_HW_ERR_REC_SUPPORT_VARIABLE_NAME L"HwErrRecSupport"
+///
+/// Whether the system is operating in setup mode (1) or not (0).
+/// All other values are reserved. Should be treated as read-only.
+/// Its attribute is BS+RT.
+///
+#define EFI_SETUP_MODE_NAME L"SetupMode"
+///
+/// The Key Exchange Key Signature Database.
+/// Its attribute is NV+BS+RT+AT.
+///
+#define EFI_KEY_EXCHANGE_KEY_NAME L"KEK"
+///
+/// The public Platform Key.
+/// Its attribute is NV+BS+RT+AT.
+///
+#define EFI_PLATFORM_KEY_NAME L"PK"
+///
+/// Array of GUIDs representing the type of signatures supported
+/// by the platform firmware. Should be treated as read-only.
+/// Its attribute is BS+RT.
+///
+#define EFI_SIGNATURE_SUPPORT_NAME L"SignatureSupport"
+///
+/// Whether the platform firmware is operating in Secure boot mode (1) or not (0).
+/// All other values are reserved. Should be treated as read-only.
+/// Its attribute is BS+RT.
+///
+#define EFI_SECURE_BOOT_MODE_NAME L"SecureBoot"
+///
+/// The OEM's default Key Exchange Key Signature Database. Should be treated as read-only.
+/// Its attribute is BS+RT.
+///
+#define EFI_KEK_DEFAULT_VARIABLE_NAME L"KEKDefault"
+///
+/// The OEM's default public Platform Key. Should be treated as read-only.
+/// Its attribute is BS+RT.
+///
+#define EFI_PK_DEFAULT_VARIABLE_NAME L"PKDefault"
+///
+/// The OEM's default secure boot signature store. Should be treated as read-only.
+/// Its attribute is BS+RT.
+///
+#define EFI_DB_DEFAULT_VARIABLE_NAME L"dbDefault"
+///
+/// The OEM's default secure boot blacklist signature store. Should be treated as read-only.
+/// Its attribute is BS+RT.
+///
+#define EFI_DBX_DEFAULT_VARIABLE_NAME L"dbxDefault"
+///
+/// The OEM's default secure boot timestamp signature store. Should be treated as read-only.
+/// Its attribute is BS+RT.
+///
+#define EFI_DBT_DEFAULT_VARIABLE_NAME L"dbtDefault"
+///
+/// Allows the firmware to indicate supported features and actions to the OS.
+/// Its attribute is BS+RT.
+///
+#define EFI_OS_INDICATIONS_SUPPORT_VARIABLE_NAME L"OsIndicationsSupported"
+///
+/// Allows the OS to request the firmware to enable certain features and to take certain actions.
+/// Its attribute is NV+BS+RT.
+///
+#define EFI_OS_INDICATIONS_VARIABLE_NAME L"OsIndications"
+///
+/// Whether the system is configured to use only vendor provided
+/// keys or not. Should be treated as read-only.
+/// Its attribute is BS+RT.
+///
+#define EFI_VENDOR_KEYS_VARIABLE_NAME L"VendorKeys"
+
+#endif
diff --git a/MdePkg/Include/Guid/Gpt.h b/MdePkg/Include/Guid/Gpt.h
new file mode 100644
index 000000000000..af2b1a12f82c
--- /dev/null
+++ b/MdePkg/Include/Guid/Gpt.h
@@ -0,0 +1,43 @@
+/** @file
+ Guids used for the GPT (GUID Partition Table)
+
+ GPT defines a new disk partitioning scheme and also describes
+ usage of the legacy Master Boot Record (MBR) partitioning scheme.
+
+ Copyright (c) 2006 - 2007, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ GUIDs defined in UEFI 2.1 spec.
+
+**/
+
+#ifndef __GPT_GUID_H__
+#define __GPT_GUID_H__
+
+#define EFI_PART_TYPE_UNUSED_GUID \
+ { \
+ 0x00000000, 0x0000, 0x0000, {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } \
+ }
+
+#define EFI_PART_TYPE_EFI_SYSTEM_PART_GUID \
+ { \
+ 0xc12a7328, 0xf81f, 0x11d2, {0xba, 0x4b, 0x00, 0xa0, 0xc9, 0x3e, 0xc9, 0x3b } \
+ }
+
+#define EFI_PART_TYPE_LEGACY_MBR_GUID \
+ { \
+ 0x024dee41, 0x33e7, 0x11d3, {0x9d, 0x69, 0x00, 0x08, 0xc7, 0x81, 0xf3, 0x9f } \
+ }
+
+extern EFI_GUID gEfiPartTypeUnusedGuid;
+extern EFI_GUID gEfiPartTypeSystemPartGuid;
+extern EFI_GUID gEfiPartTypeLegacyMbrGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/GraphicsInfoHob.h b/MdePkg/Include/Guid/GraphicsInfoHob.h
new file mode 100644
index 000000000000..46dd29ddb2d2
--- /dev/null
+++ b/MdePkg/Include/Guid/GraphicsInfoHob.h
@@ -0,0 +1,51 @@
+/** @file
+ Hob guid for Information about the graphics mode.
+
+ Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ This HOB is introduced in in PI Version 1.4.
+
+**/
+
+#ifndef _GRAPHICS_INFO_HOB_GUID_H_
+#define _GRAPHICS_INFO_HOB_GUID_H_
+
+#include <Protocol/GraphicsOutput.h>
+
+#define EFI_PEI_GRAPHICS_INFO_HOB_GUID \
+ { \
+ 0x39f62cce, 0x6825, 0x4669, { 0xbb, 0x56, 0x54, 0x1a, 0xba, 0x75, 0x3a, 0x07 } \
+ }
+
+#define EFI_PEI_GRAPHICS_DEVICE_INFO_HOB_GUID \
+ { \
+ 0xe5cb2ac9, 0xd35d, 0x4430, { 0x93, 0x6e, 0x1d, 0xe3, 0x32, 0x47, 0x8d, 0xe7 } \
+ }
+
+typedef struct {
+ EFI_PHYSICAL_ADDRESS FrameBufferBase;
+ UINT32 FrameBufferSize;
+ EFI_GRAPHICS_OUTPUT_MODE_INFORMATION GraphicsMode;
+} EFI_PEI_GRAPHICS_INFO_HOB;
+
+typedef struct {
+ UINT16 VendorId; ///< Ignore if the value is 0xFFFF.
+ UINT16 DeviceId; ///< Ignore if the value is 0xFFFF.
+ UINT16 SubsystemVendorId; ///< Ignore if the value is 0xFFFF.
+ UINT16 SubsystemId; ///< Ignore if the value is 0xFFFF.
+ UINT8 RevisionId; ///< Ignore if the value is 0xFF.
+ UINT8 BarIndex; ///< Ignore if the value is 0xFF.
+} EFI_PEI_GRAPHICS_DEVICE_INFO_HOB;
+
+extern EFI_GUID gEfiGraphicsInfoHobGuid;
+extern EFI_GUID gEfiGraphicsDeviceInfoHobGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/HardwareErrorVariable.h b/MdePkg/Include/Guid/HardwareErrorVariable.h
new file mode 100644
index 000000000000..4f644155a1da
--- /dev/null
+++ b/MdePkg/Include/Guid/HardwareErrorVariable.h
@@ -0,0 +1,28 @@
+/** @file
+ GUID for hardware error record variables.
+
+ Copyright (c) 2007 - 2009, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ GUID defined in UEFI 2.1.
+
+**/
+
+#ifndef _HARDWARE_ERROR_VARIABLE_GUID_H_
+#define _HARDWARE_ERROR_VARIABLE_GUID_H_
+
+#define EFI_HARDWARE_ERROR_VARIABLE \
+ { \
+ 0x414E6BDD, 0xE47B, 0x47cc, {0xB2, 0x44, 0xBB, 0x61, 0x02, 0x0C, 0xF5, 0x16} \
+ }
+
+extern EFI_GUID gEfiHardwareErrorVariableGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/HiiFormMapMethodGuid.h b/MdePkg/Include/Guid/HiiFormMapMethodGuid.h
new file mode 100644
index 000000000000..8b37807f3d24
--- /dev/null
+++ b/MdePkg/Include/Guid/HiiFormMapMethodGuid.h
@@ -0,0 +1,25 @@
+/** @file
+ Guid used to identify HII FormMap configuration method.
+
+ Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ GUID defined in UEFI 2.2 spec.
+**/
+
+#ifndef __EFI_HII_FORMMAP_GUID_H__
+#define __EFI_HII_FORMMAP_GUID_H__
+
+#define EFI_HII_STANDARD_FORM_GUID \
+ { 0x3bd2f4ec, 0xe524, 0x46e4, { 0xa9, 0xd8, 0x51, 0x1, 0x17, 0x42, 0x55, 0x62 } }
+
+extern EFI_GUID gEfiHiiStandardFormGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/HiiKeyBoardLayout.h b/MdePkg/Include/Guid/HiiKeyBoardLayout.h
new file mode 100644
index 000000000000..c2619713ed27
--- /dev/null
+++ b/MdePkg/Include/Guid/HiiKeyBoardLayout.h
@@ -0,0 +1,27 @@
+/** @file
+
+ HII keyboard layout GUID as defined in UEFI2.1 specification
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ GUIDs defined in UEFI 2.1 spec.
+
+**/
+
+#ifndef __HII_KEYBOARD_LAYOUT_GUID_H__
+#define __HII_KEYBOARD_LAYOUT_GUID_H__
+
+#define EFI_HII_SET_KEYBOARD_LAYOUT_EVENT_GUID \
+ { 0x14982a4f, 0xb0ed, 0x45b8, { 0xa8, 0x11, 0x5a, 0x7a, 0x9b, 0xc2, 0x32, 0xdf }}
+
+extern EFI_GUID gEfiHiiKeyBoardLayoutGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/HiiPlatformSetupFormset.h b/MdePkg/Include/Guid/HiiPlatformSetupFormset.h
new file mode 100644
index 000000000000..2503879a4c7a
--- /dev/null
+++ b/MdePkg/Include/Guid/HiiPlatformSetupFormset.h
@@ -0,0 +1,35 @@
+/** @file
+ GUID indicates that the form set contains forms designed to be used
+ for platform configuration and this form set will be displayed.
+
+Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ GUID defined in UEFI 2.1.
+
+**/
+
+#ifndef __HII_PLATFORM_SETUP_FORMSET_GUID_H__
+#define __HII_PLATFORM_SETUP_FORMSET_GUID_H__
+
+#define EFI_HII_PLATFORM_SETUP_FORMSET_GUID \
+ { 0x93039971, 0x8545, 0x4b04, { 0xb4, 0x5e, 0x32, 0xeb, 0x83, 0x26, 0x4, 0xe } }
+
+#define EFI_HII_DRIVER_HEALTH_FORMSET_GUID \
+ { 0xf22fc20c, 0x8cf4, 0x45eb, { 0x8e, 0x6, 0xad, 0x4e, 0x50, 0xb9, 0x5d, 0xd3 } }
+
+#define EFI_HII_USER_CREDENTIAL_FORMSET_GUID \
+ { 0x337f4407, 0x5aee, 0x4b83, { 0xb2, 0xa7, 0x4e, 0xad, 0xca, 0x30, 0x88, 0xcd } }
+
+extern EFI_GUID gEfiHiiPlatformSetupFormsetGuid;
+extern EFI_GUID gEfiHiiDriverHealthFormsetGuid;
+extern EFI_GUID gEfiHiiUserCredentialFormsetGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/HobList.h b/MdePkg/Include/Guid/HobList.h
new file mode 100644
index 000000000000..94c1a58e0f03
--- /dev/null
+++ b/MdePkg/Include/Guid/HobList.h
@@ -0,0 +1,30 @@
+/** @file
+ GUIDs used for HOB List entries
+
+ These GUIDs point the HOB List passed from PEI to DXE.
+
+ Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ GUID introduced in PI Version 1.0.
+
+**/
+
+#ifndef __HOB_LIST_GUID_H__
+#define __HOB_LIST_GUID_H__
+
+#define HOB_LIST_GUID \
+ { \
+ 0x7739f24c, 0x93d7, 0x11d4, {0x9a, 0x3a, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
+ }
+
+extern EFI_GUID gEfiHobListGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/ImageAuthentication.h b/MdePkg/Include/Guid/ImageAuthentication.h
new file mode 100644
index 000000000000..a81b79b83850
--- /dev/null
+++ b/MdePkg/Include/Guid/ImageAuthentication.h
@@ -0,0 +1,352 @@
+/** @file
+ Image signature database are defined for the signed image validation.
+
+ Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ GUIDs defined in UEFI 2.5 spec.
+**/
+
+#ifndef __IMAGE_AUTHTICATION_H__
+#define __IMAGE_AUTHTICATION_H__
+
+#include <Guid/GlobalVariable.h>
+#include <Protocol/Hash.h>
+
+#define EFI_IMAGE_SECURITY_DATABASE_GUID \
+ { \
+ 0xd719b2cb, 0x3d3a, 0x4596, { 0xa3, 0xbc, 0xda, 0xd0, 0xe, 0x67, 0x65, 0x6f } \
+ }
+
+///
+/// Varialbe name with guid EFI_IMAGE_SECURITY_DATABASE_GUID
+/// for the authorized signature database.
+///
+#define EFI_IMAGE_SECURITY_DATABASE L"db"
+///
+/// Varialbe name with guid EFI_IMAGE_SECURITY_DATABASE_GUID
+/// for the forbidden signature database.
+///
+#define EFI_IMAGE_SECURITY_DATABASE1 L"dbx"
+///
+/// Variable name with guid EFI_IMAGE_SECURITY_DATABASE_GUID
+/// for the timestamp signature database.
+///
+#define EFI_IMAGE_SECURITY_DATABASE2 L"dbt"
+
+#define SECURE_BOOT_MODE_ENABLE 1
+#define SECURE_BOOT_MODE_DISABLE 0
+
+#define SETUP_MODE 1
+#define USER_MODE 0
+
+//***********************************************************************
+// Signature Database
+//***********************************************************************
+///
+/// The format of a signature database.
+///
+#pragma pack(1)
+
+typedef struct {
+ ///
+ /// An identifier which identifies the agent which added the signature to the list.
+ ///
+ EFI_GUID SignatureOwner;
+ ///
+ /// The format of the signature is defined by the SignatureType.
+ ///
+ UINT8 SignatureData[1];
+} EFI_SIGNATURE_DATA;
+
+typedef struct {
+ ///
+ /// Type of the signature. GUID signature types are defined in below.
+ ///
+ EFI_GUID SignatureType;
+ ///
+ /// Total size of the signature list, including this header.
+ ///
+ UINT32 SignatureListSize;
+ ///
+ /// Size of the signature header which precedes the array of signatures.
+ ///
+ UINT32 SignatureHeaderSize;
+ ///
+ /// Size of each signature.
+ ///
+ UINT32 SignatureSize;
+ ///
+ /// Header before the array of signatures. The format of this header is specified
+ /// by the SignatureType.
+ /// UINT8 SignatureHeader[SignatureHeaderSize];
+ ///
+ /// An array of signatures. Each signature is SignatureSize bytes in length.
+ /// EFI_SIGNATURE_DATA Signatures[][SignatureSize];
+ ///
+} EFI_SIGNATURE_LIST;
+
+typedef struct {
+ ///
+ /// The SHA256 hash of an X.509 certificate's To-Be-Signed contents.
+ ///
+ EFI_SHA256_HASH ToBeSignedHash;
+ ///
+ /// The time that the certificate shall be considered to be revoked.
+ ///
+ EFI_TIME TimeOfRevocation;
+} EFI_CERT_X509_SHA256;
+
+typedef struct {
+ ///
+ /// The SHA384 hash of an X.509 certificate's To-Be-Signed contents.
+ ///
+ EFI_SHA384_HASH ToBeSignedHash;
+ ///
+ /// The time that the certificate shall be considered to be revoked.
+ ///
+ EFI_TIME TimeOfRevocation;
+} EFI_CERT_X509_SHA384;
+
+typedef struct {
+ ///
+ /// The SHA512 hash of an X.509 certificate's To-Be-Signed contents.
+ ///
+ EFI_SHA512_HASH ToBeSignedHash;
+ ///
+ /// The time that the certificate shall be considered to be revoked.
+ ///
+ EFI_TIME TimeOfRevocation;
+} EFI_CERT_X509_SHA512;
+
+#pragma pack()
+
+///
+/// This identifies a signature containing a SHA-256 hash. The SignatureHeader size shall
+/// always be 0. The SignatureSize shall always be 16 (size of SignatureOwner component) +
+/// 32 bytes.
+///
+#define EFI_CERT_SHA256_GUID \
+ { \
+ 0xc1c41626, 0x504c, 0x4092, {0xac, 0xa9, 0x41, 0xf9, 0x36, 0x93, 0x43, 0x28} \
+ }
+
+///
+/// This identifies a signature containing an RSA-2048 key. The key (only the modulus
+/// since the public key exponent is known to be 0x10001) shall be stored in big-endian
+/// order.
+/// The SignatureHeader size shall always be 0. The SignatureSize shall always be 16 (size
+/// of SignatureOwner component) + 256 bytes.
+///
+#define EFI_CERT_RSA2048_GUID \
+ { \
+ 0x3c5766e8, 0x269c, 0x4e34, {0xaa, 0x14, 0xed, 0x77, 0x6e, 0x85, 0xb3, 0xb6} \
+ }
+
+///
+/// This identifies a signature containing a RSA-2048 signature of a SHA-256 hash. The
+/// SignatureHeader size shall always be 0. The SignatureSize shall always be 16 (size of
+/// SignatureOwner component) + 256 bytes.
+///
+#define EFI_CERT_RSA2048_SHA256_GUID \
+ { \
+ 0xe2b36190, 0x879b, 0x4a3d, {0xad, 0x8d, 0xf2, 0xe7, 0xbb, 0xa3, 0x27, 0x84} \
+ }
+
+///
+/// This identifies a signature containing a SHA-1 hash. The SignatureSize shall always
+/// be 16 (size of SignatureOwner component) + 20 bytes.
+///
+#define EFI_CERT_SHA1_GUID \
+ { \
+ 0x826ca512, 0xcf10, 0x4ac9, {0xb1, 0x87, 0xbe, 0x1, 0x49, 0x66, 0x31, 0xbd} \
+ }
+
+///
+/// TThis identifies a signature containing a RSA-2048 signature of a SHA-1 hash. The
+/// SignatureHeader size shall always be 0. The SignatureSize shall always be 16 (size of
+/// SignatureOwner component) + 256 bytes.
+///
+#define EFI_CERT_RSA2048_SHA1_GUID \
+ { \
+ 0x67f8444f, 0x8743, 0x48f1, {0xa3, 0x28, 0x1e, 0xaa, 0xb8, 0x73, 0x60, 0x80} \
+ }
+
+///
+/// This identifies a signature based on an X.509 certificate. If the signature is an X.509
+/// certificate then verification of the signature of an image should validate the public
+/// key certificate in the image using certificate path verification, up to this X.509
+/// certificate as a trusted root. The SignatureHeader size shall always be 0. The
+/// SignatureSize may vary but shall always be 16 (size of the SignatureOwner component) +
+/// the size of the certificate itself.
+/// Note: This means that each certificate will normally be in a separate EFI_SIGNATURE_LIST.
+///
+#define EFI_CERT_X509_GUID \
+ { \
+ 0xa5c059a1, 0x94e4, 0x4aa7, {0x87, 0xb5, 0xab, 0x15, 0x5c, 0x2b, 0xf0, 0x72} \
+ }
+
+///
+/// This identifies a signature containing a SHA-224 hash. The SignatureHeader size shall
+/// always be 0. The SignatureSize shall always be 16 (size of SignatureOwner component) +
+/// 28 bytes.
+///
+#define EFI_CERT_SHA224_GUID \
+ { \
+ 0xb6e5233, 0xa65c, 0x44c9, {0x94, 0x7, 0xd9, 0xab, 0x83, 0xbf, 0xc8, 0xbd} \
+ }
+
+///
+/// This identifies a signature containing a SHA-384 hash. The SignatureHeader size shall
+/// always be 0. The SignatureSize shall always be 16 (size of SignatureOwner component) +
+/// 48 bytes.
+///
+#define EFI_CERT_SHA384_GUID \
+ { \
+ 0xff3e5307, 0x9fd0, 0x48c9, {0x85, 0xf1, 0x8a, 0xd5, 0x6c, 0x70, 0x1e, 0x1} \
+ }
+
+///
+/// This identifies a signature containing a SHA-512 hash. The SignatureHeader size shall
+/// always be 0. The SignatureSize shall always be 16 (size of SignatureOwner component) +
+/// 64 bytes.
+///
+#define EFI_CERT_SHA512_GUID \
+ { \
+ 0x93e0fae, 0xa6c4, 0x4f50, {0x9f, 0x1b, 0xd4, 0x1e, 0x2b, 0x89, 0xc1, 0x9a} \
+ }
+
+///
+/// This identifies a signature containing the SHA256 hash of an X.509 certificate's
+/// To-Be-Signed contents, and a time of revocation. The SignatureHeader size shall
+/// always be 0. The SignatureSize shall always be 16 (size of the SignatureOwner component)
+/// + 48 bytes for an EFI_CERT_X509_SHA256 structure. If the TimeOfRevocation is non-zero,
+/// the certificate should be considered to be revoked from that time and onwards, and
+/// otherwise the certificate shall be considered to always be revoked.
+///
+#define EFI_CERT_X509_SHA256_GUID \
+ { \
+ 0x3bd2a492, 0x96c0, 0x4079, {0xb4, 0x20, 0xfc, 0xf9, 0x8e, 0xf1, 0x03, 0xed } \
+ }
+
+///
+/// This identifies a signature containing the SHA384 hash of an X.509 certificate's
+/// To-Be-Signed contents, and a time of revocation. The SignatureHeader size shall
+/// always be 0. The SignatureSize shall always be 16 (size of the SignatureOwner component)
+/// + 64 bytes for an EFI_CERT_X509_SHA384 structure. If the TimeOfRevocation is non-zero,
+/// the certificate should be considered to be revoked from that time and onwards, and
+/// otherwise the certificate shall be considered to always be revoked.
+///
+#define EFI_CERT_X509_SHA384_GUID \
+ { \
+ 0x7076876e, 0x80c2, 0x4ee6, {0xaa, 0xd2, 0x28, 0xb3, 0x49, 0xa6, 0x86, 0x5b } \
+ }
+
+///
+/// This identifies a signature containing the SHA512 hash of an X.509 certificate's
+/// To-Be-Signed contents, and a time of revocation. The SignatureHeader size shall
+/// always be 0. The SignatureSize shall always be 16 (size of the SignatureOwner component)
+/// + 80 bytes for an EFI_CERT_X509_SHA512 structure. If the TimeOfRevocation is non-zero,
+/// the certificate should be considered to be revoked from that time and onwards, and
+/// otherwise the certificate shall be considered to always be revoked.
+///
+#define EFI_CERT_X509_SHA512_GUID \
+ { \
+ 0x446dbf63, 0x2502, 0x4cda, {0xbc, 0xfa, 0x24, 0x65, 0xd2, 0xb0, 0xfe, 0x9d } \
+ }
+
+///
+/// This identifies a signature containing a DER-encoded PKCS #7 version 1.5 [RFC2315]
+/// SignedData value.
+///
+#define EFI_CERT_TYPE_PKCS7_GUID \
+ { \
+ 0x4aafd29d, 0x68df, 0x49ee, {0x8a, 0xa9, 0x34, 0x7d, 0x37, 0x56, 0x65, 0xa7} \
+ }
+
+//***********************************************************************
+// Image Execution Information Table Definition
+//***********************************************************************
+typedef UINT32 EFI_IMAGE_EXECUTION_ACTION;
+
+#define EFI_IMAGE_EXECUTION_AUTHENTICATION 0x00000007
+#define EFI_IMAGE_EXECUTION_AUTH_UNTESTED 0x00000000
+#define EFI_IMAGE_EXECUTION_AUTH_SIG_FAILED 0x00000001
+#define EFI_IMAGE_EXECUTION_AUTH_SIG_PASSED 0x00000002
+#define EFI_IMAGE_EXECUTION_AUTH_SIG_NOT_FOUND 0x00000003
+#define EFI_IMAGE_EXECUTION_AUTH_SIG_FOUND 0x00000004
+#define EFI_IMAGE_EXECUTION_POLICY_FAILED 0x00000005
+#define EFI_IMAGE_EXECUTION_INITIALIZED 0x00000008
+
+//
+// EFI_IMAGE_EXECUTION_INFO is added to EFI System Configuration Table
+// and assigned the GUID EFI_IMAGE_SECURITY_DATABASE_GUID.
+//
+typedef struct {
+ ///
+ /// Describes the action taken by the firmware regarding this image.
+ ///
+ EFI_IMAGE_EXECUTION_ACTION Action;
+ ///
+ /// Size of all of the entire structure.
+ ///
+ UINT32 InfoSize;
+ ///
+ /// If this image was a UEFI device driver (for option ROM, for example) this is the
+ /// null-terminated, user-friendly name for the device. If the image was for an application,
+ /// then this is the name of the application. If this cannot be determined, then a simple
+ /// NULL character should be put in this position.
+ /// CHAR16 Name[];
+ ///
+
+ ///
+ /// For device drivers, this is the device path of the device for which this device driver
+ /// was intended. In some cases, the driver itself may be stored as part of the system
+ /// firmware, but this field should record the device's path, not the firmware path. For
+ /// applications, this is the device path of the application. If this cannot be determined,
+ /// a simple end-of-path device node should be put in this position.
+ /// EFI_DEVICE_PATH_PROTOCOL DevicePath;
+ ///
+
+ ///
+ /// Zero or more image signatures. If the image contained no signatures,
+ /// then this field is empty.
+ /// EFI_SIGNATURE_LIST Signature;
+ ///
+} EFI_IMAGE_EXECUTION_INFO;
+
+
+typedef struct {
+ ///
+ /// Number of EFI_IMAGE_EXECUTION_INFO structures.
+ ///
+ UINTN NumberOfImages;
+ ///
+ /// Number of image instances of EFI_IMAGE_EXECUTION_INFO structures.
+ ///
+ // EFI_IMAGE_EXECUTION_INFO InformationInfo[]
+} EFI_IMAGE_EXECUTION_INFO_TABLE;
+
+extern EFI_GUID gEfiImageSecurityDatabaseGuid;
+extern EFI_GUID gEfiCertSha256Guid;
+extern EFI_GUID gEfiCertRsa2048Guid;
+extern EFI_GUID gEfiCertRsa2048Sha256Guid;
+extern EFI_GUID gEfiCertSha1Guid;
+extern EFI_GUID gEfiCertRsa2048Sha1Guid;
+extern EFI_GUID gEfiCertX509Guid;
+extern EFI_GUID gEfiCertSha224Guid;
+extern EFI_GUID gEfiCertSha384Guid;
+extern EFI_GUID gEfiCertSha512Guid;
+extern EFI_GUID gEfiCertX509Sha256Guid;
+extern EFI_GUID gEfiCertX509Sha384Guid;
+extern EFI_GUID gEfiCertX509Sha512Guid;
+extern EFI_GUID gEfiCertPkcs7Guid;
+
+#endif
diff --git a/MdePkg/Include/Guid/MdePkgTokenSpace.h b/MdePkg/Include/Guid/MdePkgTokenSpace.h
new file mode 100644
index 000000000000..70896ef67da1
--- /dev/null
+++ b/MdePkg/Include/Guid/MdePkgTokenSpace.h
@@ -0,0 +1,25 @@
+/** @file
+ GUID for MdePkg PCD Token Space
+
+ Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _MDEPKG_TOKEN_SPACE_GUID_H_
+#define _MDEPKG_TOKEN_SPACE_GUID_H_
+
+#define MDEPKG_TOKEN_SPACE_GUID \
+ { \
+ 0x914AEBE7, 0x4635, 0x459b, { 0xAA, 0x1C, 0x11, 0xE2, 0x19, 0xB0, 0x3A, 0x10 } \
+ }
+
+extern EFI_GUID gEfiMdePkgTokenSpaceGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/MemoryAllocationHob.h b/MdePkg/Include/Guid/MemoryAllocationHob.h
new file mode 100644
index 000000000000..788920c4801c
--- /dev/null
+++ b/MdePkg/Include/Guid/MemoryAllocationHob.h
@@ -0,0 +1,34 @@
+/** @file
+ GUIDs for HOBs used in memory allcation
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ GUIDs introduced in PI Version 1.0.
+
+**/
+
+#ifndef __MEMORY_ALLOCATION_GUID_H__
+#define __MEMORY_ALLOCATION_GUID_H__
+
+#define EFI_HOB_MEMORY_ALLOC_BSP_STORE_GUID \
+ {0x564b33cd, 0xc92a, 0x4593, {0x90, 0xbf, 0x24, 0x73, 0xe4, 0x3c, 0x63, 0x22} };
+
+#define EFI_HOB_MEMORY_ALLOC_STACK_GUID \
+ {0x4ed4bf27, 0x4092, 0x42e9, {0x80, 0x7d, 0x52, 0x7b, 0x1d, 0x0, 0xc9, 0xbd} }
+
+#define EFI_HOB_MEMORY_ALLOC_MODULE_GUID \
+ {0xf8e21975, 0x899, 0x4f58, {0xa4, 0xbe, 0x55, 0x25, 0xa9, 0xc6, 0xd7, 0x7a} }
+
+extern EFI_GUID gEfiHobMemoryAllocBspStoreGuid;
+extern EFI_GUID gEfiHobMemoryAllocStackGuid;
+extern EFI_GUID gEfiHobMemoryAllocModuleGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/MemoryAttributesTable.h b/MdePkg/Include/Guid/MemoryAttributesTable.h
new file mode 100644
index 000000000000..1292771c2201
--- /dev/null
+++ b/MdePkg/Include/Guid/MemoryAttributesTable.h
@@ -0,0 +1,34 @@
+/** @file
+ GUIDs used for UEFI Memory Attributes Table in the UEFI 2.6 specification.
+
+ Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __UEFI_MEMORY_ATTRIBUTES_TABLE_H__
+#define __UEFI_MEMORY_ATTRIBUTES_TABLE_H__
+
+#define EFI_MEMORY_ATTRIBUTES_TABLE_GUID {\
+ 0xdcfa911d, 0x26eb, 0x469f, {0xa2, 0x20, 0x38, 0xb7, 0xdc, 0x46, 0x12, 0x20} \
+}
+
+typedef struct {
+ UINT32 Version;
+ UINT32 NumberOfEntries;
+ UINT32 DescriptorSize;
+ UINT32 Reserved;
+//EFI_MEMORY_DESCRIPTOR Entry[1];
+} EFI_MEMORY_ATTRIBUTES_TABLE;
+
+#define EFI_MEMORY_ATTRIBUTES_TABLE_VERSION 0x00000001
+
+extern EFI_GUID gEfiMemoryAttributesTableGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/MemoryOverwriteControl.h b/MdePkg/Include/Guid/MemoryOverwriteControl.h
new file mode 100644
index 000000000000..d6869a121a6f
--- /dev/null
+++ b/MdePkg/Include/Guid/MemoryOverwriteControl.h
@@ -0,0 +1,76 @@
+/** @file
+ GUID used for MemoryOverwriteRequestControl UEFI variable defined in
+ TCG Platform Reset Attack Mitigation Specification 1.00.
+ See http://trustedcomputinggroup.org for the latest specification
+
+ The purpose of the MemoryOverwriteRequestControl UEFI variable is to give users (e.g., OS, loader) the ability to
+ indicate to the platform that secrets are present in memory and that the platform firmware must clear memory upon
+ a restart. The OS loader should not create the variable. Rather, the firmware is required to create it.
+
+ Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _MEMORY_OVERWRITE_CONTROL_DATA_GUID_H_
+#define _MEMORY_OVERWRITE_CONTROL_DATA_GUID_H_
+
+#define MEMORY_ONLY_RESET_CONTROL_GUID \
+ { \
+ 0xe20939be, 0x32d4, 0x41be, {0xa1, 0x50, 0x89, 0x7f, 0x85, 0xd4, 0x98, 0x29} \
+ }
+
+///
+/// Variable name is "MemoryOverwriteRequestControl" and it is a 1 byte unsigned value.
+/// The attributes should be:
+/// EFI_VARIABLE_NON_VOLATILE |
+/// EFI_VARIABLE_BOOTSERVICE_ACCESS |
+/// EFI_VARIABLE_RUNTIME_ACCESS
+///
+#define MEMORY_OVERWRITE_REQUEST_VARIABLE_NAME L"MemoryOverwriteRequestControl"
+
+///
+/// 0 = Firmware MUST clear the MOR bi
+/// 1 = Firmware MUST set the MOR bit
+///
+#define MOR_CLEAR_MEMORY_BIT_MASK 0x01
+
+///
+/// 0 = Firmware MAY autodetect a clean shutdown of the Static RTM OS.
+/// 1 = Firmware MUST NOT autodetect a clean shutdown of the Static RTM OS.
+///
+#define MOR_DISABLEAUTODETECT_BIT_MASK 0x10
+
+///
+/// MOR field bit offset
+///
+#define MOR_CLEAR_MEMORY_BIT_OFFSET 0
+#define MOR_DISABLEAUTODETECT_BIT_OFFSET 4
+
+/**
+ Return the ClearMemory bit value 0 or 1.
+
+ @param mor 1 byte value that contains ClearMemory and DisableAutoDetect bit.
+
+ @return ClearMemory bit value
+**/
+#define MOR_CLEAR_MEMORY_VALUE(mor) (((UINT8)(mor) & MOR_CLEAR_MEMORY_BIT_MASK) >> MOR_CLEAR_MEMORY_BIT_OFFSET)
+
+/**
+ Return the DisableAutoDetect bit value 0 or 1.
+
+ @param mor 1 byte value that contains ClearMemory and DisableAutoDetect bit.
+
+ @return DisableAutoDetect bit value
+**/
+#define MOR_DISABLE_AUTO_DETECT_VALUE(mor) (((UINT8)(mor) & MOR_DISABLEAUTODETECT_BIT_MASK) >> MOR_DISABLEAUTODETECT_BIT_OFFSET)
+
+extern EFI_GUID gEfiMemoryOverwriteControlDataGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/Mps.h b/MdePkg/Include/Guid/Mps.h
new file mode 100644
index 000000000000..4d4692e3be22
--- /dev/null
+++ b/MdePkg/Include/Guid/Mps.h
@@ -0,0 +1,35 @@
+/** @file
+ GUIDs used for MPS entries in the UEFI 2.0 system table
+ ACPI is the primary means of exporting MPS information to the OS. MPS only was
+ included to support Itanium-based platform power on. So don't use it if you don't have too.
+
+ Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ GUIDs defined in UEFI 2.0 spec.
+
+**/
+
+#ifndef __MPS_GUID_H__
+#define __MPS_GUID_H__
+
+#define EFI_MPS_TABLE_GUID \
+ { \
+ 0xeb9d2d2f, 0x2d88, 0x11d3, {0x9a, 0x16, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
+ }
+
+//
+// GUID name defined in spec.
+//
+#define MPS_TABLE_GUID EFI_MPS_TABLE_GUID
+
+extern EFI_GUID gEfiMpsTableGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/PcAnsi.h b/MdePkg/Include/Guid/PcAnsi.h
new file mode 100644
index 000000000000..7ff878d7f19e
--- /dev/null
+++ b/MdePkg/Include/Guid/PcAnsi.h
@@ -0,0 +1,58 @@
+/** @file
+ Terminal Device Path Vendor Guid.
+
+ Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ GUIDs defined in UEFI 2.0 spec.
+
+**/
+
+#ifndef __PC_ANSI_H__
+#define __PC_ANSI_H__
+
+#define EFI_PC_ANSI_GUID \
+ { \
+ 0xe0c14753, 0xf9be, 0x11d2, {0x9a, 0x0c, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
+ }
+
+#define EFI_VT_100_GUID \
+ { \
+ 0xdfa66065, 0xb419, 0x11d3, {0x9a, 0x2d, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
+ }
+
+#define EFI_VT_100_PLUS_GUID \
+ { \
+ 0x7baec70b, 0x57e0, 0x4c76, {0x8e, 0x87, 0x2f, 0x9e, 0x28, 0x08, 0x83, 0x43 } \
+ }
+
+#define EFI_VT_UTF8_GUID \
+ { \
+ 0xad15a0d6, 0x8bec, 0x4acf, {0xa0, 0x73, 0xd0, 0x1d, 0xe7, 0x7e, 0x2d, 0x88 } \
+ }
+
+#define DEVICE_PATH_MESSAGING_UART_FLOW_CONTROL \
+ { \
+ 0x37499a9d, 0x542f, 0x4c89, {0xa0, 0x26, 0x35, 0xda, 0x14, 0x20, 0x94, 0xe4 } \
+ }
+
+#define EFI_SAS_DEVICE_PATH_GUID \
+ { \
+ 0xd487ddb4, 0x008b, 0x11d9, {0xaf, 0xdc, 0x00, 0x10, 0x83, 0xff, 0xca, 0x4d } \
+ }
+
+extern EFI_GUID gEfiPcAnsiGuid;
+extern EFI_GUID gEfiVT100Guid;
+extern EFI_GUID gEfiVT100PlusGuid;
+extern EFI_GUID gEfiVTUTF8Guid;
+extern EFI_GUID gEfiUartDevicePathGuid;
+extern EFI_GUID gEfiSasDevicePathGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/PropertiesTable.h b/MdePkg/Include/Guid/PropertiesTable.h
new file mode 100644
index 000000000000..7fa382686044
--- /dev/null
+++ b/MdePkg/Include/Guid/PropertiesTable.h
@@ -0,0 +1,37 @@
+/** @file
+ GUIDs used for UEFI Properties Table in the UEFI 2.5 specification.
+
+ Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __EFI_PROPERTIES_TABLE_H__
+#define __EFI_PROPERTIES_TABLE_H__
+
+#define EFI_PROPERTIES_TABLE_GUID {\
+ 0x880aaca3, 0x4adc, 0x4a04, {0x90, 0x79, 0xb7, 0x47, 0x34, 0x8, 0x25, 0xe5} \
+}
+
+typedef struct {
+ UINT32 Version;
+ UINT32 Length;
+ UINT64 MemoryProtectionAttribute;
+} EFI_PROPERTIES_TABLE;
+
+#define EFI_PROPERTIES_TABLE_VERSION 0x00010000
+
+//
+// Memory attribute (Not defined bit is reserved)
+//
+#define EFI_PROPERTIES_RUNTIME_MEMORY_PROTECTION_NON_EXECUTABLE_PE_DATA 0x1
+
+extern EFI_GUID gEfiPropertiesTableGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/SalSystemTable.h b/MdePkg/Include/Guid/SalSystemTable.h
new file mode 100644
index 000000000000..8994ee7bdf3f
--- /dev/null
+++ b/MdePkg/Include/Guid/SalSystemTable.h
@@ -0,0 +1,31 @@
+/** @file
+ GUIDs used for SAL system table entries in the EFI system table.
+
+ SAL System Table contains Itanium-based processor centric information about
+ the system.
+
+ Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ GUIDs defined in UEFI 2.0 spec.
+
+**/
+
+#ifndef __SAL_SYSTEM_TABLE_GUID_H__
+#define __SAL_SYSTEM_TABLE_GUID_H__
+
+#define SAL_SYSTEM_TABLE_GUID \
+ { \
+ 0xeb9d2d32, 0x2d88, 0x11d3, {0x9a, 0x16, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
+ }
+
+extern EFI_GUID gEfiSalSystemTableGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/SmBios.h b/MdePkg/Include/Guid/SmBios.h
new file mode 100644
index 000000000000..05e11b7b63da
--- /dev/null
+++ b/MdePkg/Include/Guid/SmBios.h
@@ -0,0 +1,38 @@
+/** @file
+ GUIDs used to locate the SMBIOS tables in the UEFI 2.5 system table.
+
+ These GUIDs in the system table are the only legal ways to search for and
+ locate the SMBIOS tables. Do not search the 0xF0000 segment to find SMBIOS
+ tables.
+
+ Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ GUIDs defined in UEFI 2.5 spec.
+
+**/
+
+#ifndef __SMBIOS_GUID_H__
+#define __SMBIOS_GUID_H__
+
+#define SMBIOS_TABLE_GUID \
+ { \
+ 0xeb9d2d31, 0x2d88, 0x11d3, {0x9a, 0x16, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
+ }
+
+#define SMBIOS3_TABLE_GUID \
+ { \
+ 0xf2fd1544, 0x9794, 0x4a2c, {0x99, 0x2e, 0xe5, 0xbb, 0xcf, 0x20, 0xe3, 0x94 } \
+ }
+
+extern EFI_GUID gEfiSmbiosTableGuid;
+extern EFI_GUID gEfiSmbios3TableGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/StatusCodeDataTypeId.h b/MdePkg/Include/Guid/StatusCodeDataTypeId.h
new file mode 100644
index 000000000000..8bbc3315bc62
--- /dev/null
+++ b/MdePkg/Include/Guid/StatusCodeDataTypeId.h
@@ -0,0 +1,789 @@
+/** @file
+ GUID used to identify id for the caller who is initiating the Status Code.
+
+ Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ These GUIDs and structures are defined in UEFI Platform Initialization Specification 1.2
+ Volume 3: Shared Architectural Elements
+
+**/
+
+#ifndef __PI_STATUS_CODE_DATA_TYPE_ID_GUID_H__
+#define __PI_STATUS_CODE_DATA_TYPE_ID_GUID_H__
+
+#include <PiDxe.h>
+#include <Protocol/DebugSupport.h>
+
+///
+/// Global ID for the EFI_STATUS_CODE_STRING structure
+///
+#define EFI_STATUS_CODE_DATA_TYPE_STRING_GUID \
+ { 0x92D11080, 0x496F, 0x4D95, { 0xBE, 0x7E, 0x03, 0x74, 0x88, 0x38, 0x2B, 0x0A } }
+
+typedef enum {
+ ///
+ /// A NULL-terminated ASCII string.
+ ///
+ EfiStringAscii,
+ ///
+ /// A double NULL-terminated Unicode string.
+ ///
+ EfiStringUnicode,
+ ///
+ /// An EFI_STATUS_CODE_STRING_TOKEN representing the string. The actual
+ /// string can be obtained by querying the HII Database
+ ///
+ EfiStringToken
+} EFI_STRING_TYPE;
+
+///
+/// Specifies the format of the data in EFI_STATUS_CODE_STRING_DATA.String.
+///
+typedef struct {
+ ///
+ /// The HII package list which contains the string. Handle is a dynamic value that may
+ /// not be the same for different boots. Type EFI_HII_HANDLE is defined in
+ /// EFI_HII_DATABASE_PROTOCOL.NewPackageList() in the UEFI Specification.
+ ///
+ EFI_HII_HANDLE Handle;
+ ///
+ /// When combined with Handle, the string token can be used to retrieve the string.
+ /// Type EFI_STRING_ID is defined in EFI_IFR_OP_HEADER in the UEFI Specification.
+ ///
+ EFI_STRING_ID Token;
+} EFI_STATUS_CODE_STRING_TOKEN;
+
+typedef union {
+ ///
+ /// ASCII formatted string.
+ ///
+ CHAR8 *Ascii;
+ ///
+ /// Unicode formatted string.
+ ///
+ CHAR16 *Unicode;
+ ///
+ /// HII handle/token pair.
+ ///
+ EFI_STATUS_CODE_STRING_TOKEN Hii;
+} EFI_STATUS_CODE_STRING;
+
+///
+/// This data type defines a string type of extended data. A string can accompany
+/// any status code. The string can provide additional information about the
+/// status code. The string can be ASCII, Unicode, or a Human Interface Infrastructure
+/// (HII) token/GUID pair.
+///
+typedef struct {
+ ///
+ /// The data header identifying the data. DataHeader.HeaderSize should be
+ /// sizeof (EFI_STATUS_CODE_DATA), DataHeader.Size should be
+ /// sizeof (EFI_STATUS_CODE_STRING_DATA) - HeaderSize, and
+ /// DataHeader.Type should be
+ /// EFI_STATUS_CODE_DATA_TYPE_STRING_GUID.
+ ///
+ EFI_STATUS_CODE_DATA DataHeader;
+ ///
+ /// Specifies the format of the data in String.
+ ///
+ EFI_STRING_TYPE StringType;
+ ///
+ /// A pointer to the extended data. The data follows the format specified by
+ /// StringType.
+ ///
+ EFI_STATUS_CODE_STRING String;
+} EFI_STATUS_CODE_STRING_DATA;
+
+extern EFI_GUID gEfiStatusCodeDataTypeStringGuid;
+
+///
+/// Global ID for the following structures:
+/// - EFI_DEVICE_PATH_EXTENDED_DATA
+/// - EFI_DEVICE_HANDLE_EXTENDED_DATA
+/// - EFI_RESOURCE_ALLOC_FAILURE_ERROR_DATA
+/// - EFI_COMPUTING_UNIT_VOLTAGE_ERROR_DATA
+/// - EFI_COMPUTING_UNIT_MICROCODE_UPDATE_ERROR_DATA
+/// - EFI_COMPUTING_UNIT_TIMER_EXPIRED_ERROR_DATA
+/// - EFI_HOST_PROCESSOR_MISMATCH_ERROR_DATA
+/// - EFI_MEMORY_RANGE_EXTENDED_DATA
+/// - EFI_DEBUG_ASSERT_DATA
+/// - EFI_STATUS_CODE_EXCEP_EXTENDED_DATA
+/// - EFI_STATUS_CODE_START_EXTENDED_DATA
+/// - EFI_LEGACY_OPROM_EXTENDED_DATA
+///
+#define EFI_STATUS_CODE_SPECIFIC_DATA_GUID \
+ { 0x335984bd, 0xe805, 0x409a, { 0xb8, 0xf8, 0xd2, 0x7e, 0xce, 0x5f, 0xf7, 0xa6 } }
+
+///
+/// Extended data about the device path, which is used for many errors and
+/// progress codes to point to the device.
+///
+/// The device path is used to point to the physical device in case there is more than one device
+/// belonging to the same subclass. For example, the system may contain two USB keyboards and one
+/// PS/2* keyboard. The driver that parses the status code can use the device path extended data to
+/// differentiate between the three. The index field is not useful in this case because there is no standard
+/// numbering convention. Device paths are preferred over using device handles because device handles
+/// for a given device can change from one boot to another and do not mean anything beyond Boot
+/// Services time. In certain cases, the bus driver may not create a device handle for a given device if it
+/// detects a critical error. In these cases, the device path extended data can be used to refer to the
+/// device, but there may not be any device handles with an instance of
+/// EFI_DEVICE_PATH_PROTOCOL that matches DevicePath. The variable device path structure
+/// is included in this structure to make it self sufficient.
+///
+typedef struct {
+ ///
+ /// The data header identifying the data. DataHeader.HeaderSize should be
+ /// sizeof (EFI_STATUS_CODE_DATA). DataHeader.Size should be the size
+ /// of variable-length DevicePath, and DataHeader.Size is zero for a virtual
+ /// device that does not have a device path. DataHeader.Type should be
+ /// EFI_STATUS_CODE_SPECIFIC_DATA_GUID.
+ ///
+ EFI_STATUS_CODE_DATA DataHeader;
+ ///
+ /// The device path to the controller or the hardware device. Note that this parameter is a
+ /// variable-length device path structure and not a pointer to such a structure. This structure is
+ /// populated only if it is a physical device. For virtual devices, the Size field in DataHeader
+ /// is set to zero and this field is not populated.
+ ///
+ // EFI_DEVICE_PATH_PROTOCOL DevicePath;
+} EFI_DEVICE_PATH_EXTENDED_DATA;
+
+///
+/// Device handle Extended Data. Used for many
+/// errors and progress codes to point to the device.
+///
+/// The handle of the device with which the progress or error code is associated. The handle is
+/// guaranteed to be accurate only at the time the status code is reported. Handles are dynamic entities
+/// between boots, so handles cannot be considered to be valid if the system has reset subsequent to the
+/// status code being reported. Handles may be used to determine a wide variety of useful information
+/// about the source of the status code.
+///
+typedef struct {
+ ///
+ /// The data header identifying the data. DataHeader.HeaderSize should be
+ /// sizeof (EFI_STATUS_CODE_DATA), DataHeader.Size should be
+ /// sizeof (EFI_DEVICE_HANDLE_EXTENDED_DATA) - HeaderSize, and
+ /// DataHeader.Type should be EFI_STATUS_CODE_SPECIFIC_DATA_GUID.
+ ///
+ EFI_STATUS_CODE_DATA DataHeader;
+ ///
+ /// The device handle.
+ ///
+ EFI_HANDLE Handle;
+} EFI_DEVICE_HANDLE_EXTENDED_DATA;
+
+///
+/// This structure defines extended data describing a PCI resource allocation error.
+///
+/// @par Note:
+/// The following structure contains variable-length fields and cannot be defined as a C-style
+/// structure.
+///
+/// This extended data conveys details for a PCI resource allocation failure error. See the PCI
+/// specification and the ACPI specification for details on PCI resource allocations and the format for
+/// resource descriptors. This error does not detail why the resource allocation failed. It may be due to a
+/// bad resource request or a lack of available resources to satisfy a valid request. The variable device
+/// path structure and the resource structures are included in this structure to make it self sufficient.
+///
+typedef struct {
+ ///
+ /// The data header identifying the data. DataHeader.HeaderSize should be sizeof
+ /// (EFI_STATUS_CODE_DATA), DataHeader.Size should be
+ /// (DevicePathSize + DevicePathSize + DevicePathSize +
+ /// sizeof(UINT32) + 3 * sizeof (UINT16) ), and DataHeader.Type
+ /// should be EFI_STATUS_CODE_SPECIFIC_DATA_GUID.
+ ///
+ EFI_STATUS_CODE_DATA DataHeader;
+ ///
+ /// The PCI BAR. Applicable only for PCI devices. Ignored for all other devices.
+ ///
+ UINT32 Bar;
+ ///
+ /// DevicePathSize should be zero if it is a virtual device that is not associated with
+ /// a device path. Otherwise, this parameter is the length of the variable-length
+ /// DevicePath.
+ ///
+ UINT16 DevicePathSize;
+ ///
+ /// Represents the size the ReqRes parameter. ReqResSize should be zero if the
+ /// requested resources are not provided as a part of extended data.
+ ///
+ UINT16 ReqResSize;
+ ///
+ /// Represents the size the AllocRes parameter. AllocResSize should be zero if the
+ /// allocated resources are not provided as a part of extended data.
+ ///
+ UINT16 AllocResSize;
+ ///
+ /// The device path to the controller or the hardware device that did not get the requested
+ /// resources. Note that this parameter is the variable-length device path structure and not
+ /// a pointer to this structure.
+ ///
+ // EFI_DEVICE_PATH_PROTOCOL DevicePath;
+ ///
+ /// The requested resources in the format of an ACPI 2.0 resource descriptor. This
+ /// parameter is not a pointer; it is the complete resource descriptor.
+ ///
+ // UINT8 ReqRes[];
+ ///
+ /// The allocated resources in the format of an ACPI 2.0 resource descriptor. This
+ /// parameter is not a pointer; it is the complete resource descriptor.
+ ///
+ // UINT8 AllocRes[];
+} EFI_RESOURCE_ALLOC_FAILURE_ERROR_DATA;
+
+///
+/// This structure provides a calculation for base-10 representations.
+///
+/// Not consistent with PI 1.2 Specification.
+/// This data type is not defined in the PI 1.2 Specification, but is
+/// required by several of the other data structures in this file.
+///
+typedef struct {
+ ///
+ /// The INT16 number by which to multiply the base-2 representation.
+ ///
+ INT16 Value;
+ ///
+ /// The INT16 number by which to raise the base-2 calculation.
+ ///
+ INT16 Exponent;
+} EFI_EXP_BASE10_DATA;
+
+///
+/// This structure provides the voltage at the time of error. It also provides
+/// the threshold value indicating the minimum or maximum voltage that is considered
+/// an error. If the voltage is less then the threshold, the error indicates that the
+/// voltage fell below the minimum acceptable value. If the voltage is greater then the threshold,
+/// the error indicates that the voltage rose above the maximum acceptable value.
+///
+typedef struct {
+ ///
+ /// The data header identifying the data. DataHeader.HeaderSize should be
+ /// sizeof (EFI_STATUS_CODE_DATA), DataHeader.Size should be
+ /// sizeof (EFI_COMPUTING_UNIT_VOLTAGE_ERROR_DATA) -
+ /// HeaderSize, and DataHeader.Type should be
+ /// EFI_STATUS_CODE_SPECIFIC_DATA_GUID.
+ ///
+ EFI_STATUS_CODE_DATA DataHeader;
+ ///
+ /// The voltage value at the time of the error.
+ ///
+ EFI_EXP_BASE10_DATA Voltage;
+ ///
+ /// The voltage threshold.
+ ///
+ EFI_EXP_BASE10_DATA Threshold;
+} EFI_COMPUTING_UNIT_VOLTAGE_ERROR_DATA;
+
+///
+/// Microcode Update Extended Error Data
+///
+typedef struct {
+ ///
+ /// The data header identifying the data. DataHeader.HeaderSize should be
+ /// sizeof (EFI_STATUS_CODE_DATA), DataHeader.Size should be
+ /// sizeof (EFI_COMPUTING_UNIT_MICROCODE_UPDATE_ERROR_DATA) -
+ /// HeaderSize, and DataHeader.Type should be
+ /// EFI_STATUS_CODE_SPECIFIC_DATA_GUID.
+ ///
+ EFI_STATUS_CODE_DATA DataHeader;
+ ///
+ /// The version of the microcode update from the header.
+ ///
+ UINT32 Version;
+} EFI_COMPUTING_UNIT_MICROCODE_UPDATE_ERROR_DATA;
+
+///
+/// This structure provides details about the computing unit timer expiration error.
+/// The timer limit provides the timeout value of the timer prior to expiration.
+///
+typedef struct {
+ ///
+ /// The data header identifying the data. DataHeader.HeaderSize should be
+ /// sizeof (EFI_STATUS_CODE_DATA), DataHeader.Size should be
+ /// sizeof (EFI_COMPUTING_UNIT_TIMER_EXPIRED_ERROR_DATA) -
+ /// HeaderSize, and DataHeader.Type should be
+ /// EFI_STATUS_CODE_SPECIFIC_DATA_GUID.
+ ///
+ EFI_STATUS_CODE_DATA DataHeader;
+ ///
+ /// The number of seconds that the computing unit timer was configured to expire.
+ ///
+ EFI_EXP_BASE10_DATA TimerLimit;
+} EFI_COMPUTING_UNIT_TIMER_EXPIRED_ERROR_DATA;
+
+///
+/// Attribute bits for EFI_HOST_PROCESSOR_MISMATCH_ERROR_DATA.Attributes
+/// All other attributes are reserved for future use and must be initialized to 0.
+///
+///@{
+#define EFI_COMPUTING_UNIT_MISMATCH_SPEED 0x0001
+#define EFI_COMPUTING_UNIT_MISMATCH_FSB_SPEED 0x0002
+#define EFI_COMPUTING_UNIT_MISMATCH_FAMILY 0x0004
+#define EFI_COMPUTING_UNIT_MISMATCH_MODEL 0x0008
+#define EFI_COMPUTING_UNIT_MISMATCH_STEPPING 0x0010
+#define EFI_COMPUTING_UNIT_MISMATCH_CACHE_SIZE 0x0020
+#define EFI_COMPUTING_UNIT_MISMATCH_OEM1 0x1000
+#define EFI_COMPUTING_UNIT_MISMATCH_OEM2 0x2000
+#define EFI_COMPUTING_UNIT_MISMATCH_OEM3 0x4000
+#define EFI_COMPUTING_UNIT_MISMATCH_OEM4 0x8000
+///@}
+
+///
+/// This structure defines extended data for processor mismatch errors.
+///
+/// This provides information to indicate which processors mismatch, and how they mismatch. The
+/// status code contains the instance number of the processor that is in error. This structure's
+/// Instance indicates the second processor that does not match. This differentiation allows the
+/// consumer to determine which two processors do not match. The Attributes indicate what
+/// mismatch is being reported. Because Attributes is a bit field, more than one mismatch can be
+/// reported with one error code.
+///
+typedef struct {
+ ///
+ /// The data header identifying the data. DataHeader.HeaderSize should be
+ /// sizeof (EFI_STATUS_CODE_DATA), DataHeader.Size should be
+ /// sizeof (EFI_ HOST_PROCESSOR_MISMATCH_ERROR_DATA) -
+ /// HeaderSize , and DataHeader.Type should be
+ /// EFI_STATUS_CODE_SPECIFIC_DATA_GUID.
+ ///
+ EFI_STATUS_CODE_DATA DataHeader;
+ ///
+ /// The unit number of the computing unit that does not match.
+ ///
+ UINT32 Instance;
+ ///
+ /// The attributes describing the failure.
+ ///
+ UINT16 Attributes;
+} EFI_HOST_PROCESSOR_MISMATCH_ERROR_DATA;
+
+///
+/// This structure provides details about the computing unit thermal failure.
+///
+/// This structure provides the temperature at the time of error. It also provides the threshold value
+/// indicating the minimum temperature that is considered an error.
+///
+typedef struct {
+ ///
+ /// The data header identifying the data. DataHeader.HeaderSize should be
+ /// sizeof (EFI_STATUS_CODE_DATA), DataHeader.Size should be
+ /// sizeof (EFI_COMPUTING_UNIT_THERMAL_ERROR_DATA) -
+ /// HeaderSize , and DataHeader.Type should be
+ /// EFI_STATUS_CODE_SPECIFIC_DATA_GUID.
+ ///
+ EFI_STATUS_CODE_DATA DataHeader;
+ ///
+ /// The thermal value at the time of the error.
+ ///
+ EFI_EXP_BASE10_DATA Temperature;
+ ///
+ /// The thermal threshold.
+ ///
+ EFI_EXP_BASE10_DATA Threshold;
+} EFI_COMPUTING_UNIT_THERMAL_ERROR_DATA;
+
+///
+/// Enumeration of valid cache types
+///
+typedef enum {
+ EfiInitCacheDataOnly,
+ EfiInitCacheInstrOnly,
+ EfiInitCacheBoth,
+ EfiInitCacheUnspecified
+} EFI_INIT_CACHE_TYPE;
+
+///
+/// Embedded cache init extended data
+///
+typedef struct {
+ ///
+ /// The data header identifying the data. DataHeader.HeaderSize should be
+ /// sizeof (EFI_STATUS_CODE_DATA), DataHeader.Size should be
+ /// sizeof (EFI_CACHE_INIT_DATA) - HeaderSize , and
+ /// DataHeader.Type should be EFI_STATUS_CODE_SPECIFIC_DATA_GUID.
+ ///
+ EFI_STATUS_CODE_DATA DataHeader;
+ ///
+ /// The cache level. Starts with 1 for level 1 cache.
+ ///
+ UINT32 Level;
+ ///
+ /// The type of cache.
+ ///
+ EFI_INIT_CACHE_TYPE Type;
+} EFI_CACHE_INIT_DATA;
+
+///
+///
+///
+typedef UINT32 EFI_CPU_STATE_CHANGE_CAUSE;
+
+///
+/// The reasons that the processor is disabled.
+/// Used to fill in EFI_COMPUTING_UNIT_CPU_DISABLED_ERROR_DATA.Cause.
+///
+///@{
+#define EFI_CPU_CAUSE_INTERNAL_ERROR 0x0001
+#define EFI_CPU_CAUSE_THERMAL_ERROR 0x0002
+#define EFI_CPU_CAUSE_SELFTEST_FAILURE 0x0004
+#define EFI_CPU_CAUSE_PREBOOT_TIMEOUT 0x0008
+#define EFI_CPU_CAUSE_FAILED_TO_START 0x0010
+#define EFI_CPU_CAUSE_CONFIG_ERROR 0x0020
+#define EFI_CPU_CAUSE_USER_SELECTION 0x0080
+#define EFI_CPU_CAUSE_BY_ASSOCIATION 0x0100
+#define EFI_CPU_CAUSE_UNSPECIFIED 0x8000
+///@}
+
+///
+/// This structure provides information about the disabled computing unit.
+///
+/// This structure provides details as to why and how the computing unit was disabled. The causes
+/// should cover the typical reasons a processor would be disabled. How the processor was disabled is
+/// important because there are distinct differences between hardware and software disabling.
+///
+typedef struct {
+ ///
+ /// The data header identifying the data. DataHeader.HeaderSize should be
+ /// sizeof (EFI_STATUS_CODE_DATA), DataHeader.Size should be
+ /// sizeof (EFI_COMPUTING_UNIT_CPU_DISABLED_ERROR_DATA) -
+ /// HeaderSize, and DataHeader.Type should be
+ /// EFI_STATUS_CODE_SPECIFIC_DATA_GUID.
+ ///
+ EFI_STATUS_CODE_DATA DataHeader;
+ ///
+ /// The reason for disabling the processor.
+ ///
+ UINT32 Cause;
+ ///
+ /// TRUE if the processor is disabled via software means such as not listing it in the ACPI tables.
+ /// Such a processor will respond to Interprocessor Interrupts (IPIs). FALSE if the processor is hardware
+ /// disabled, which means it is invisible to software and will not respond to IPIs.
+ ///
+ BOOLEAN SoftwareDisabled;
+} EFI_COMPUTING_UNIT_CPU_DISABLED_ERROR_DATA;
+
+///
+/// Memory Error Granularity Definition
+///
+typedef UINT8 EFI_MEMORY_ERROR_GRANULARITY;
+
+///
+/// Memory Error Granularities. Used to fill in EFI_MEMORY_EXTENDED_ERROR_DATA.Granularity.
+///
+///@{
+#define EFI_MEMORY_ERROR_OTHER 0x01
+#define EFI_MEMORY_ERROR_UNKNOWN 0x02
+#define EFI_MEMORY_ERROR_DEVICE 0x03
+#define EFI_MEMORY_ERROR_PARTITION 0x04
+///@}
+
+///
+/// Memory Error Operation Definition
+///
+typedef UINT8 EFI_MEMORY_ERROR_OPERATION;
+
+///
+/// Memory Error Operations. Used to fill in EFI_MEMORY_EXTENDED_ERROR_DATA.Operation.
+///
+///@{
+#define EFI_MEMORY_OPERATION_OTHER 0x01
+#define EFI_MEMORY_OPERATION_UNKNOWN 0x02
+#define EFI_MEMORY_OPERATION_READ 0x03
+#define EFI_MEMORY_OPERATION_WRITE 0x04
+#define EFI_MEMORY_OPERATION_PARTIAL_WRITE 0x05
+///@}
+
+///
+/// This structure provides specific details about the memory error that was detected. It provides
+/// enough information so that consumers can identify the exact failure and provides enough
+/// information to enable corrective action if necessary.
+///
+typedef struct {
+ ///
+ /// The data header identifying the data. DataHeader.HeaderSize should be
+ /// sizeof (EFI_STATUS_CODE_DATA), DataHeader.Size should be
+ /// sizeof (EFI_MEMORY_EXTENDED_ERROR_DATA) - HeaderSize, and
+ /// DataHeader.Type should be EFI_STATUS_CODE_SPECIFIC_DATA_GUID.
+ ///
+ EFI_STATUS_CODE_DATA DataHeader;
+ ///
+ /// The error granularity type.
+ ///
+ EFI_MEMORY_ERROR_GRANULARITY Granularity;
+ ///
+ /// The operation that resulted in the error being detected.
+ ///
+ EFI_MEMORY_ERROR_OPERATION Operation;
+ ///
+ /// The error syndrome, vendor-specific ECC syndrome, or CRC data associated with
+ /// the error. If unknown, should be initialized to 0.
+ /// Inconsistent with specification here:
+ /// This field in StatusCodes spec0.9 is defined as UINT32, keep code unchanged.
+ ///
+ UINTN Syndrome;
+ ///
+ /// The physical address of the error.
+ ///
+ EFI_PHYSICAL_ADDRESS Address;
+ ///
+ /// The range, in bytes, within which the error address can be determined.
+ ///
+ UINTN Resolution;
+} EFI_MEMORY_EXTENDED_ERROR_DATA;
+
+///
+/// A definition to describe that the operation is performed on multiple devices within the array.
+/// May be used for EFI_STATUS_CODE_DIMM_NUMBER.Array and EFI_STATUS_CODE_DIMM_NUMBER.Device.
+///
+#define EFI_MULTIPLE_MEMORY_DEVICE_OPERATION 0xfffe
+
+///
+/// A definition to describe that the operation is performed on all devices within the array.
+/// May be used for EFI_STATUS_CODE_DIMM_NUMBER.Array and EFI_STATUS_CODE_DIMM_NUMBER.Device.
+///
+#define EFI_ALL_MEMORY_DEVICE_OPERATION 0xffff
+
+///
+/// A definition to describe that the operation is performed on multiple arrays.
+/// May be used for EFI_STATUS_CODE_DIMM_NUMBER.Array and EFI_STATUS_CODE_DIMM_NUMBER.Device.
+///
+#define EFI_MULTIPLE_MEMORY_ARRAY_OPERATION 0xfffe
+
+///
+/// A definition to describe that the operation is performed on all the arrays.
+/// May be used for EFI_STATUS_CODE_DIMM_NUMBER.Array and EFI_STATUS_CODE_DIMM_NUMBER.Device.
+///
+#define EFI_ALL_MEMORY_ARRAY_OPERATION 0xffff
+
+///
+/// This extended data provides some context that consumers can use to locate a DIMM within the
+/// overall memory scheme.
+///
+/// This extended data provides some context that consumers can use to locate a DIMM within the
+/// overall memory scheme. The Array and Device numbers may indicate a specific DIMM, or they
+/// may be populated with the group definitions in "Related Definitions" below.
+///
+typedef struct {
+ ///
+ /// The data header identifying the data. DataHeader.HeaderSize should be
+ /// sizeof (EFI_STATUS_CODE_DATA), DataHeader.Size should be
+ /// sizeof (EFI_STATUS_CODE_DIMM_NUMBER) - HeaderSize, and
+ /// DataHeader.Type should be EFI_STATUS_CODE_SPECIFIC_DATA_GUID.
+ ///
+ EFI_STATUS_CODE_DATA DataHeader;
+ ///
+ /// The memory array number.
+ ///
+ UINT16 Array;
+ ///
+ /// The device number within that Array.
+ ///
+ UINT16 Device;
+} EFI_STATUS_CODE_DIMM_NUMBER;
+
+///
+/// This structure defines extended data describing memory modules that do not match.
+///
+/// This extended data may be used to convey the specifics of memory modules that do not match.
+///
+typedef struct {
+ ///
+ /// The data header identifying the data. DataHeader.HeaderSize should be
+ /// sizeof (EFI_STATUS_CODE_DATA), DataHeader.Size should be
+ /// sizeof (EFI_MEMORY_MODULE_MISMATCH_ERROR_DATA) -
+ /// HeaderSize, and DataHeader.Type should be
+ /// EFI_STATUS_CODE_SPECIFIC_DATA_GUID.
+ ///
+ EFI_STATUS_CODE_DATA DataHeader;
+ ///
+ /// The instance number of the memory module that does not match.
+ ///
+ EFI_STATUS_CODE_DIMM_NUMBER Instance;
+} EFI_MEMORY_MODULE_MISMATCH_ERROR_DATA;
+
+///
+/// This structure defines extended data describing a memory range.
+///
+/// This extended data may be used to convey the specifics of a memory range. Ranges are specified
+/// with a start address and a length.
+///
+typedef struct {
+ ///
+ /// The data header identifying the data. DataHeader.HeaderSize should be
+ /// sizeof (EFI_STATUS_CODE_DATA), DataHeader.Size should be
+ /// sizeof (EFI_MEMORY_RANGE_EXTENDED_DATA) - HeaderSize, and
+ /// DataHeader.Type should be EFI_STATUS_CODE_SPECIFIC_DATA_GUID.
+ ///
+ EFI_STATUS_CODE_DATA DataHeader;
+ ///
+ /// The starting address of the memory range.
+ ///
+ EFI_PHYSICAL_ADDRESS Start;
+ ///
+ /// The length in bytes of the memory range.
+ ///
+ EFI_PHYSICAL_ADDRESS Length;
+} EFI_MEMORY_RANGE_EXTENDED_DATA;
+
+///
+/// This structure provides the assert information that is typically associated with a debug assertion failing.
+///
+/// The data indicates the location of the assertion that failed in the source code. This information
+/// includes the file name and line number that are necessary to find the failing assertion in source code.
+///
+typedef struct {
+ ///
+ /// The data header identifying the data. DataHeader.HeaderSize should be
+ /// sizeof (EFI_STATUS_CODE_DATA), DataHeader.Size should be
+ /// sizeof (EFI_DEBUG_ASSERT_DATA) - HeaderSize , and
+ /// DataHeader.Type should be EFI_STATUS_CODE_SPECIFIC_DATA_GUID.
+ ///
+ EFI_STATUS_CODE_DATA DataHeader;
+ ///
+ /// The line number of the source file where the fault was generated.
+ ///
+ UINT32 LineNumber;
+ ///
+ /// The size in bytes of FileName.
+ ///
+ UINT32 FileNameSize;
+ ///
+ /// A pointer to a NULL-terminated ASCII or Unicode string that represents
+ /// the file name of the source file where the fault was generated.
+ ///
+ EFI_STATUS_CODE_STRING_DATA *FileName;
+} EFI_DEBUG_ASSERT_DATA;
+
+///
+/// System Context Data EBC/IA32/IPF
+///
+typedef union {
+ ///
+ /// The context of the EBC virtual machine when the exception was generated. Type
+ /// EFI_SYSTEM_CONTEXT_EBC is defined in EFI_DEBUG_SUPPORT_PROTOCOL
+ /// in the UEFI Specification.
+ ///
+ EFI_SYSTEM_CONTEXT_EBC SystemContextEbc;
+ ///
+ /// The context of the IA-32 processor when the exception was generated. Type
+ /// EFI_SYSTEM_CONTEXT_IA32 is defined in the
+ /// EFI_DEBUG_SUPPORT_PROTOCOL in the UEFI Specification.
+ ///
+ EFI_SYSTEM_CONTEXT_IA32 SystemContextIa32;
+ ///
+ /// The context of the Itanium(R) processor when the exception was generated. Type
+ /// EFI_SYSTEM_CONTEXT_IPF is defined in the
+ /// EFI_DEBUG_SUPPORT_PROTOCOL in the UEFI Specification.
+ ///
+ EFI_SYSTEM_CONTEXT_IPF SystemContextIpf;
+ ///
+ /// The context of the X64 processor when the exception was generated. Type
+ /// EFI_SYSTEM_CONTEXT_X64 is defined in the
+ /// EFI_DEBUG_SUPPORT_PROTOCOL in the UEFI Specification.
+ ///
+ EFI_SYSTEM_CONTEXT_X64 SystemContextX64;
+ ///
+ /// The context of the ARM processor when the exception was generated. Type
+ /// EFI_SYSTEM_CONTEXT_ARM is defined in the
+ /// EFI_DEBUG_SUPPORT_PROTOCOL in the UEFI Specification.
+ ///
+ EFI_SYSTEM_CONTEXT_ARM SystemContextArm;
+} EFI_STATUS_CODE_EXCEP_SYSTEM_CONTEXT;
+
+///
+/// This structure defines extended data describing a processor exception error.
+///
+/// This extended data allows the processor context that is present at the time of the exception to be
+/// reported with the exception. The format and contents of the context data varies depending on the
+/// processor architecture.
+///
+typedef struct {
+ ///
+ /// The data header identifying the data. DataHeader.HeaderSize should be
+ /// sizeof (EFI_STATUS_CODE_DATA), DataHeader.Size should be
+ /// sizeof (EFI_STATUS_CODE_EXCEP_EXTENDED_DATA) - HeaderSize,
+ /// and DataHeader.Type should be
+ /// EFI_STATUS_CODE_SPECIFIC_DATA_GUID.
+ ///
+ EFI_STATUS_CODE_DATA DataHeader;
+ ///
+ /// The system context.
+ ///
+ EFI_STATUS_CODE_EXCEP_SYSTEM_CONTEXT Context;
+} EFI_STATUS_CODE_EXCEP_EXTENDED_DATA;
+
+///
+/// This structure defines extended data describing a call to a driver binding protocol start function.
+///
+/// This extended data records information about a Start() function call. Start() is a member of
+/// the UEFI Driver Binding Protocol.
+///
+typedef struct {
+ ///
+ /// The data header identifying the data. DataHeader.HeaderSize should be
+ /// sizeof (EFI_STATUS_CODE_DATA), DataHeader.Size should be
+ /// sizeof (EFI_STATUS_CODE_START_EXTENDED_DATA) - HeaderSize,
+ /// and DataHeader.Type should be
+ /// EFI_STATUS_CODE_SPECIFIC_DATA_GUID.
+ ///
+ EFI_STATUS_CODE_DATA DataHeader;
+ ///
+ /// The controller handle.
+ ///
+ EFI_HANDLE ControllerHandle;
+ ///
+ /// The driver binding handle.
+ ///
+ EFI_HANDLE DriverBindingHandle;
+ ///
+ /// The size of the RemainingDevicePath. It is zero if the Start() function is
+ /// called with RemainingDevicePath = NULL. The UEFI Specification allows
+ /// that the Start() function of bus drivers can be called in this way.
+ ///
+ UINT16 DevicePathSize;
+ ///
+ /// Matches the RemainingDevicePath parameter being passed to the Start() function.
+ /// Note that this parameter is the variable-length device path and not a pointer
+ /// to the device path.
+ ///
+ // EFI_DEVICE_PATH_PROTOCOL RemainingDevicePath;
+} EFI_STATUS_CODE_START_EXTENDED_DATA;
+
+///
+/// This structure defines extended data describing a legacy option ROM (OpROM).
+///
+/// The device handle and ROM image base can be used by consumers to determine which option ROM
+/// failed. Due to the black-box nature of legacy option ROMs, the amount of information that can be
+/// obtained may be limited.
+///
+typedef struct {
+ ///
+ /// The data header identifying the data. DataHeader.HeaderSize should be
+ /// sizeof (EFI_STATUS_CODE_DATA), DataHeader.Size should be
+ /// sizeof (EFI_LEGACY_OPROM_EXTENDED_DATA) - HeaderSize, and
+ /// DataHeader.Type should be EFI_STATUS_CODE_SPECIFIC_DATA_GUID.
+ ///
+ EFI_STATUS_CODE_DATA DataHeader;
+ ///
+ /// The handle corresponding to the device that this legacy option ROM is being invoked.
+ ///
+ EFI_HANDLE DeviceHandle;
+ ///
+ /// The base address of the shadowed legacy ROM image. May or may not point to the shadow RAM area.
+ ///
+ EFI_PHYSICAL_ADDRESS RomImageBase;
+} EFI_LEGACY_OPROM_EXTENDED_DATA;
+
+extern EFI_GUID gEfiStatusCodeSpecificDataGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/SystemResourceTable.h b/MdePkg/Include/Guid/SystemResourceTable.h
new file mode 100644
index 000000000000..dc7e16bd241f
--- /dev/null
+++ b/MdePkg/Include/Guid/SystemResourceTable.h
@@ -0,0 +1,125 @@
+/** @file
+ Guid & data structure used for EFI System Resource Table (ESRT)
+
+ Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ GUIDs defined in UEFI 2.5 spec.
+
+**/
+
+
+#ifndef _SYSTEM_RESOURCE_TABLE_H__
+#define _SYSTEM_RESOURCE_TABLE_H__
+
+#define EFI_SYSTEM_RESOURCE_TABLE_GUID \
+ { \
+ 0xb122a263, 0x3661, 0x4f68, {0x99, 0x29, 0x78, 0xf8, 0xb0, 0xd6, 0x21, 0x80 } \
+ }
+
+///
+/// Current Entry Version
+///
+#define EFI_SYSTEM_RESOURCE_TABLE_FIRMWARE_RESOURCE_VERSION 1
+
+///
+/// Firmware Type Definitions
+///
+#define ESRT_FW_TYPE_UNKNOWN 0x00000000
+#define ESRT_FW_TYPE_SYSTEMFIRMWARE 0x00000001
+#define ESRT_FW_TYPE_DEVICEFIRMWARE 0x00000002
+#define ESRT_FW_TYPE_UEFIDRIVER 0x00000003
+
+///
+/// Last Attempt Status Values
+///
+#define LAST_ATTEMPT_STATUS_SUCCESS 0x00000000
+#define LAST_ATTEMPT_STATUS_ERROR_UNSUCCESSFUL 0x00000001
+#define LAST_ATTEMPT_STATUS_ERROR_INSUFFICIENT_RESOURCES 0x00000002
+#define LAST_ATTEMPT_STATUS_ERROR_INCORRECT_VERSION 0x00000003
+#define LAST_ATTEMPT_STATUS_ERROR_INVALID_FORMAT 0x00000004
+#define LAST_ATTEMPT_STATUS_ERROR_AUTH_ERROR 0x00000005
+#define LAST_ATTEMPT_STATUS_ERROR_PWR_EVT_AC 0x00000006
+#define LAST_ATTEMPT_STATUS_ERROR_PWR_EVT_BATT 0x00000007
+
+typedef struct {
+ ///
+ /// The firmware class field contains a GUID that identifies a firmware component
+ /// that can be updated via UpdateCapsule(). This GUID must be unique within all
+ /// entries of the ESRT.
+ ///
+ EFI_GUID FwClass;
+ ///
+ /// Identifies the type of firmware resource.
+ ///
+ UINT32 FwType;
+ ///
+ /// The firmware version field represents the current version of the firmware
+ /// resource, value must always increase as a larger number represents a newer
+ /// version.
+ ///
+ UINT32 FwVersion;
+ ///
+ /// The lowest firmware resource version to which a firmware resource can be
+ /// rolled back for the given system/device. Generally this is used to protect
+ /// against known and fixed security issues.
+ ///
+ UINT32 LowestSupportedFwVersion;
+ ///
+ /// The capsule flags field contains the CapsuleGuid flags (bits 0- 15) as defined
+ /// in the EFI_CAPSULE_HEADER that will be set in the capsule header.
+ ///
+ UINT32 CapsuleFlags;
+ ///
+ /// The last attempt version field describes the last firmware version for which
+ /// an update was attempted (uses the same format as Firmware Version).
+ /// Last Attempt Version is updated each time an UpdateCapsule() is attempted for
+ /// an ESRT entry and is preserved across reboots (non-volatile). However, in
+ /// cases where the attempt version is not recorded due to limitations in the
+ /// update process, the field shall set to zero after a failed update. Similarly,
+ /// in the case of a removable device, this value is set to 0 in cases where the
+ /// device has not been updated since being added to the system.
+ ///
+ UINT32 LastAttemptVersion;
+ ///
+ /// The last attempt status field describes the result of the last firmware update
+ /// attempt for the firmware resource entry.
+ /// LastAttemptStatus is updated each time an UpdateCapsule() is attempted for an
+ /// ESRT entry and is preserved across reboots (non-volatile).
+ /// If a firmware update has never been attempted or is unknown, for example after
+ /// fresh insertion of a removable device, LastAttemptStatus must be set to Success.
+ ///
+ UINT32 LastAttemptStatus;
+} EFI_SYSTEM_RESOURCE_ENTRY;
+
+typedef struct {
+ ///
+ /// The number of firmware resources in the table, must not be zero.
+ ///
+ UINT32 FwResourceCount;
+ ///
+ /// The maximum number of resource array entries that can be within the table
+ /// without reallocating the table, must not be zero.
+ ///
+ UINT32 FwResourceCountMax;
+ ///
+ /// The version of the EFI_SYSTEM_RESOURCE_ENTRY entities used in this table.
+ /// This field should be set to 1.
+ ///
+ UINT64 FwResourceVersion;
+ ///
+ /// Array of EFI_SYSTEM_RESOURCE_ENTRY
+ ///
+ //EFI_SYSTEM_RESOURCE_ENTRY Entries[];
+} EFI_SYSTEM_RESOURCE_TABLE;
+
+extern EFI_GUID gEfiSystemResourceTableGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/VectorHandoffTable.h b/MdePkg/Include/Guid/VectorHandoffTable.h
new file mode 100644
index 000000000000..256b34550f4b
--- /dev/null
+++ b/MdePkg/Include/Guid/VectorHandoffTable.h
@@ -0,0 +1,33 @@
+/** @file
+ GUID for system configuration table entry that points to the table
+ in case an entity in DXE wishes to update/change the vector table contents.
+
+ Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ GUID defined in PI 1.2.1 spec.
+**/
+
+#ifndef __EFI_VECTOR_HANDOFF_TABLE_H__
+#define __EFI_VECTOR_HANDOFF_TABLE_H__
+
+#include <Ppi/VectorHandoffInfo.h>
+
+//
+// System configuration table entry that points to the table
+// in case an entity in DXE wishes to update/change the vector
+// table contents.
+//
+#define EFI_VECTOR_HANDOF_TABLE_GUID \
+ { 0x996ec11c, 0x5397, 0x4e73, { 0xb5, 0x8f, 0x82, 0x7e, 0x52, 0x90, 0x6d, 0xef }}
+
+extern EFI_GUID gEfiVectorHandoffTableGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/WinCertificate.h b/MdePkg/Include/Guid/WinCertificate.h
new file mode 100644
index 000000000000..6dea446ba060
--- /dev/null
+++ b/MdePkg/Include/Guid/WinCertificate.h
@@ -0,0 +1,128 @@
+/** @file
+ GUID for UEFI WIN_CERTIFICATE structure.
+
+ Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ GUID defined in UEFI 2.0 spec.
+**/
+
+#ifndef __EFI_WIN_CERTIFICATE_H__
+#define __EFI_WIN_CERTIFICATE_H__
+
+//
+// _WIN_CERTIFICATE.wCertificateType
+//
+#define WIN_CERT_TYPE_PKCS_SIGNED_DATA 0x0002
+#define WIN_CERT_TYPE_EFI_PKCS115 0x0EF0
+#define WIN_CERT_TYPE_EFI_GUID 0x0EF1
+
+///
+/// The WIN_CERTIFICATE structure is part of the PE/COFF specification.
+///
+typedef struct {
+ ///
+ /// The length of the entire certificate,
+ /// including the length of the header, in bytes.
+ ///
+ UINT32 dwLength;
+ ///
+ /// The revision level of the WIN_CERTIFICATE
+ /// structure. The current revision level is 0x0200.
+ ///
+ UINT16 wRevision;
+ ///
+ /// The certificate type. See WIN_CERT_TYPE_xxx for the UEFI
+ /// certificate types. The UEFI specification reserves the range of
+ /// certificate type values from 0x0EF0 to 0x0EFF.
+ ///
+ UINT16 wCertificateType;
+ ///
+ /// The following is the actual certificate. The format of
+ /// the certificate depends on wCertificateType.
+ ///
+ /// UINT8 bCertificate[ANYSIZE_ARRAY];
+ ///
+} WIN_CERTIFICATE;
+
+///
+/// WIN_CERTIFICATE_UEFI_GUID.CertType
+///
+#define EFI_CERT_TYPE_RSA2048_SHA256_GUID \
+ {0xa7717414, 0xc616, 0x4977, {0x94, 0x20, 0x84, 0x47, 0x12, 0xa7, 0x35, 0xbf } }
+
+///
+/// WIN_CERTIFICATE_UEFI_GUID.CertData
+///
+typedef struct {
+ EFI_GUID HashType;
+ UINT8 PublicKey[256];
+ UINT8 Signature[256];
+} EFI_CERT_BLOCK_RSA_2048_SHA256;
+
+
+///
+/// Certificate which encapsulates a GUID-specific digital signature
+///
+typedef struct {
+ ///
+ /// This is the standard WIN_CERTIFICATE header, where
+ /// wCertificateType is set to WIN_CERT_TYPE_EFI_GUID.
+ ///
+ WIN_CERTIFICATE Hdr;
+ ///
+ /// This is the unique id which determines the
+ /// format of the CertData. .
+ ///
+ EFI_GUID CertType;
+ ///
+ /// The following is the certificate data. The format of
+ /// the data is determined by the CertType.
+ /// If CertType is EFI_CERT_TYPE_RSA2048_SHA256_GUID,
+ /// the CertData will be EFI_CERT_BLOCK_RSA_2048_SHA256 structure.
+ ///
+ UINT8 CertData[1];
+} WIN_CERTIFICATE_UEFI_GUID;
+
+
+///
+/// Certificate which encapsulates the RSASSA_PKCS1-v1_5 digital signature.
+///
+/// The WIN_CERTIFICATE_UEFI_PKCS1_15 structure is derived from
+/// WIN_CERTIFICATE and encapsulate the information needed to
+/// implement the RSASSA-PKCS1-v1_5 digital signature algorithm as
+/// specified in RFC2437.
+///
+typedef struct {
+ ///
+ /// This is the standard WIN_CERTIFICATE header, where
+ /// wCertificateType is set to WIN_CERT_TYPE_UEFI_PKCS1_15.
+ ///
+ WIN_CERTIFICATE Hdr;
+ ///
+ /// This is the hashing algorithm which was performed on the
+ /// UEFI executable when creating the digital signature.
+ ///
+ EFI_GUID HashAlgorithm;
+ ///
+ /// The following is the actual digital signature. The
+ /// size of the signature is the same size as the key
+ /// (1024-bit key is 128 bytes) and can be determined by
+ /// subtracting the length of the other parts of this header
+ /// from the total length of the certificate as found in
+ /// Hdr.dwLength.
+ ///
+ /// UINT8 Signature[];
+ ///
+} WIN_CERTIFICATE_EFI_PKCS1_15;
+
+extern EFI_GUID gEfiCertTypeRsa2048Sha256Guid;
+
+#endif
diff --git a/MdePkg/Include/Ia32/ProcessorBind.h b/MdePkg/Include/Ia32/ProcessorBind.h
new file mode 100644
index 000000000000..9eb6954706d7
--- /dev/null
+++ b/MdePkg/Include/Ia32/ProcessorBind.h
@@ -0,0 +1,318 @@
+/** @file
+ Processor or Compiler specific defines and types for IA-32 architecture.
+
+Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __PROCESSOR_BIND_H__
+#define __PROCESSOR_BIND_H__
+
+///
+/// Define the processor type so other code can make processor based choices.
+///
+#define MDE_CPU_IA32
+
+//
+// Make sure we are using the correct packing rules per EFI specification
+//
+#if !defined(__GNUC__)
+#pragma pack()
+#endif
+
+#if defined(__INTEL_COMPILER)
+//
+// Disable ICC's remark #869: "Parameter" was never referenced warning.
+// This is legal ANSI C code so we disable the remark that is turned on with -Wall
+//
+#pragma warning ( disable : 869 )
+
+//
+// Disable ICC's remark #1418: external function definition with no prior declaration.
+// This is legal ANSI C code so we disable the remark that is turned on with /W4
+//
+#pragma warning ( disable : 1418 )
+
+//
+// Disable ICC's remark #1419: external declaration in primary source file
+// This is legal ANSI C code so we disable the remark that is turned on with /W4
+//
+#pragma warning ( disable : 1419 )
+
+//
+// Disable ICC's remark #593: "Variable" was set but never used.
+// This is legal ANSI C code so we disable the remark that is turned on with /W4
+//
+#pragma warning ( disable : 593 )
+
+#endif
+
+
+#if defined(_MSC_EXTENSIONS)
+
+//
+// Disable warning that make it impossible to compile at /W4
+// This only works for Microsoft* tools
+//
+
+//
+// Disabling bitfield type checking warnings.
+//
+#pragma warning ( disable : 4214 )
+
+//
+// Disabling the unreferenced formal parameter warnings.
+//
+#pragma warning ( disable : 4100 )
+
+//
+// Disable slightly different base types warning as CHAR8 * can not be set
+// to a constant string.
+//
+#pragma warning ( disable : 4057 )
+
+//
+// ASSERT(FALSE) or while (TRUE) are legal constructs so suppress this warning
+//
+#pragma warning ( disable : 4127 )
+
+//
+// This warning is caused by functions defined but not used. For precompiled header only.
+//
+#pragma warning ( disable : 4505 )
+
+//
+// This warning is caused by empty (after preprocessing) source file. For precompiled header only.
+//
+#pragma warning ( disable : 4206 )
+
+#if _MSC_VER == 1800 || _MSC_VER == 1900
+
+//
+// Disable these warnings for VS2013.
+//
+
+//
+// This warning is for potentially uninitialized local variable, and it may cause false
+// positive issues in VS2013 and VS2015 build
+//
+#pragma warning ( disable : 4701 )
+
+//
+// This warning is for potentially uninitialized local pointer variable, and it may cause
+// false positive issues in VS2013 and VS2015 build
+//
+#pragma warning ( disable : 4703 )
+
+#endif
+
+#endif
+
+
+#if defined(_MSC_EXTENSIONS)
+
+ //
+ // use Microsoft C compiler dependent integer width types
+ //
+
+ ///
+ /// 8-byte unsigned value.
+ ///
+ typedef unsigned __int64 UINT64;
+ ///
+ /// 8-byte signed value.
+ ///
+ typedef __int64 INT64;
+ ///
+ /// 4-byte unsigned value.
+ ///
+ typedef unsigned __int32 UINT32;
+ ///
+ /// 4-byte signed value.
+ ///
+ typedef __int32 INT32;
+ ///
+ /// 2-byte unsigned value.
+ ///
+ typedef unsigned short UINT16;
+ ///
+ /// 2-byte Character. Unless otherwise specified all strings are stored in the
+ /// UTF-16 encoding format as defined by Unicode 2.1 and ISO/IEC 10646 standards.
+ ///
+ typedef unsigned short CHAR16;
+ ///
+ /// 2-byte signed value.
+ ///
+ typedef short INT16;
+ ///
+ /// Logical Boolean. 1-byte value containing 0 for FALSE or a 1 for TRUE. Other
+ /// values are undefined.
+ ///
+ typedef unsigned char BOOLEAN;
+ ///
+ /// 1-byte unsigned value.
+ ///
+ typedef unsigned char UINT8;
+ ///
+ /// 1-byte Character.
+ ///
+ typedef char CHAR8;
+ ///
+ /// 1-byte signed value.
+ ///
+ typedef signed char INT8;
+#else
+ ///
+ /// 8-byte unsigned value.
+ ///
+ typedef unsigned long long UINT64;
+ ///
+ /// 8-byte signed value.
+ ///
+ typedef long long INT64;
+ ///
+ /// 4-byte unsigned value.
+ ///
+ typedef unsigned int UINT32;
+ ///
+ /// 4-byte signed value.
+ ///
+ typedef int INT32;
+ ///
+ /// 2-byte unsigned value.
+ ///
+ typedef unsigned short UINT16;
+ ///
+ /// 2-byte Character. Unless otherwise specified all strings are stored in the
+ /// UTF-16 encoding format as defined by Unicode 2.1 and ISO/IEC 10646 standards.
+ ///
+ typedef unsigned short CHAR16;
+ ///
+ /// 2-byte signed value.
+ ///
+ typedef short INT16;
+ ///
+ /// Logical Boolean. 1-byte value containing 0 for FALSE or a 1 for TRUE. Other
+ /// values are undefined.
+ ///
+ typedef unsigned char BOOLEAN;
+ ///
+ /// 1-byte unsigned value.
+ ///
+ typedef unsigned char UINT8;
+ ///
+ /// 1-byte Character
+ ///
+ typedef char CHAR8;
+ ///
+ /// 1-byte signed value
+ ///
+ typedef signed char INT8;
+#endif
+
+///
+/// Unsigned value of native width. (4 bytes on supported 32-bit processor instructions;
+/// 8 bytes on supported 64-bit processor instructions.)
+///
+typedef UINT32 UINTN;
+///
+/// Signed value of native width. (4 bytes on supported 32-bit processor instructions;
+/// 8 bytes on supported 64-bit processor instructions.)
+///
+typedef INT32 INTN;
+
+//
+// Processor specific defines
+//
+
+///
+/// A value of native width with the highest bit set.
+///
+#define MAX_BIT 0x80000000
+///
+/// A value of native width with the two highest bits set.
+///
+#define MAX_2_BITS 0xC0000000
+
+///
+/// Maximum legal IA-32 address.
+///
+#define MAX_ADDRESS 0xFFFFFFFF
+
+///
+/// Maximum legal IA-32 INTN and UINTN values.
+///
+#define MAX_INTN ((INTN)0x7FFFFFFF)
+#define MAX_UINTN ((UINTN)0xFFFFFFFF)
+
+///
+/// The stack alignment required for IA-32.
+///
+#define CPU_STACK_ALIGNMENT sizeof(UINTN)
+
+///
+/// Page allocation granularity for IA-32.
+///
+#define DEFAULT_PAGE_ALLOCATION_GRANULARITY (0x1000)
+#define RUNTIME_PAGE_ALLOCATION_GRANULARITY (0x1000)
+
+//
+// Modifier to ensure that all protocol member functions and EFI intrinsics
+// use the correct C calling convention. All protocol member functions and
+// EFI intrinsics are required to modify their member functions with EFIAPI.
+//
+#ifdef EFIAPI
+ ///
+ /// If EFIAPI is already defined, then we use that definition.
+ ///
+#elif defined(_MSC_EXTENSIONS)
+ ///
+ /// Microsoft* compiler specific method for EFIAPI calling convention.
+ ///
+ #define EFIAPI __cdecl
+#elif defined(__GNUC__)
+ ///
+ /// GCC specific method for EFIAPI calling convention.
+ ///
+ #define EFIAPI __attribute__((cdecl))
+#else
+ ///
+ /// The default for a non Microsoft* or GCC compiler is to assume the EFI ABI
+ /// is the standard.
+ ///
+ #define EFIAPI
+#endif
+
+#if defined(__GNUC__)
+ ///
+ /// For GNU assembly code, .global or .globl can declare global symbols.
+ /// Define this macro to unify the usage.
+ ///
+ #define ASM_GLOBAL .globl
+#endif
+
+/**
+ Return the pointer to the first instruction of a function given a function pointer.
+ On IA-32 CPU architectures, these two pointer values are the same,
+ so the implementation of this macro is very simple.
+
+ @param FunctionPointer A pointer to a function.
+
+ @return The pointer to the first instruction of a function given a function pointer.
+
+**/
+#define FUNCTION_ENTRY_POINT(FunctionPointer) (VOID *)(UINTN)(FunctionPointer)
+
+#ifndef __USER_LABEL_PREFIX__
+#define __USER_LABEL_PREFIX__ _
+#endif
+
+#endif
+
diff --git a/MdePkg/Include/IndustryStandard/Acpi.h b/MdePkg/Include/IndustryStandard/Acpi.h
new file mode 100644
index 000000000000..3d35f599b4e6
--- /dev/null
+++ b/MdePkg/Include/IndustryStandard/Acpi.h
@@ -0,0 +1,21 @@
+/** @file
+ This file contains the latest ACPI definitions that are
+ consumed by drivers that do not care about ACPI versions.
+
+ Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _ACPI_H_
+#define _ACPI_H_
+
+#include <IndustryStandard/Acpi61.h>
+
+#endif
diff --git a/MdePkg/Include/IndustryStandard/Acpi10.h b/MdePkg/Include/IndustryStandard/Acpi10.h
new file mode 100644
index 000000000000..5a17db6ac570
--- /dev/null
+++ b/MdePkg/Include/IndustryStandard/Acpi10.h
@@ -0,0 +1,661 @@
+/** @file
+ ACPI 1.0b definitions from the ACPI Specification, revision 1.0b
+
+Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
+
+#ifndef _ACPI_1_0_H_
+#define _ACPI_1_0_H_
+
+#include <IndustryStandard/AcpiAml.h>
+
+///
+/// Common table header, this prefaces all ACPI tables, including FACS, but
+/// excluding the RSD PTR structure.
+///
+typedef struct {
+ UINT32 Signature;
+ UINT32 Length;
+} EFI_ACPI_COMMON_HEADER;
+
+#pragma pack(1)
+///
+/// The common ACPI description table header. This structure prefaces most ACPI tables.
+///
+typedef struct {
+ UINT32 Signature;
+ UINT32 Length;
+ UINT8 Revision;
+ UINT8 Checksum;
+ UINT8 OemId[6];
+ UINT64 OemTableId;
+ UINT32 OemRevision;
+ UINT32 CreatorId;
+ UINT32 CreatorRevision;
+} EFI_ACPI_DESCRIPTION_HEADER;
+#pragma pack()
+
+//
+// Define for Desriptor
+//
+#define ACPI_SMALL_ITEM_FLAG 0x00
+#define ACPI_LARGE_ITEM_FLAG 0x01
+
+//
+// Small Item Descriptor Name
+//
+#define ACPI_SMALL_IRQ_DESCRIPTOR_NAME 0x04
+#define ACPI_SMALL_DMA_DESCRIPTOR_NAME 0x05
+#define ACPI_SMALL_START_DEPENDENT_DESCRIPTOR_NAME 0x06
+#define ACPI_SMALL_END_DEPENDENT_DESCRIPTOR_NAME 0x07
+#define ACPI_SMALL_IO_PORT_DESCRIPTOR_NAME 0x08
+#define ACPI_SMALL_FIXED_IO_PORT_DESCRIPTOR_NAME 0x09
+#define ACPI_SMALL_VENDOR_DEFINED_DESCRIPTOR_NAME 0x0E
+#define ACPI_SMALL_END_TAG_DESCRIPTOR_NAME 0x0F
+
+//
+// Large Item Descriptor Name
+//
+#define ACPI_LARGE_24_BIT_MEMORY_RANGE_DESCRIPTOR_NAME 0x01
+#define ACPI_LARGE_VENDOR_DEFINED_DESCRIPTOR_NAME 0x04
+#define ACPI_LARGE_32_BIT_MEMORY_RANGE_DESCRIPTOR_NAME 0x05
+#define ACPI_LARGE_32_BIT_FIXED_MEMORY_RANGE_DESCRIPTOR_NAME 0x06
+#define ACPI_LARGE_DWORD_ADDRESS_SPACE_DESCRIPTOR_NAME 0x07
+#define ACPI_LARGE_WORD_ADDRESS_SPACE_DESCRIPTOR_NAME 0x08
+#define ACPI_LARGE_EXTENDED_IRQ_DESCRIPTOR_NAME 0x09
+#define ACPI_LARGE_QWORD_ADDRESS_SPACE_DESCRIPTOR_NAME 0x0A
+
+//
+// Small Item Descriptor Value
+//
+#define ACPI_IRQ_NOFLAG_DESCRIPTOR 0x22
+#define ACPI_IRQ_DESCRIPTOR 0x23
+#define ACPI_DMA_DESCRIPTOR 0x2A
+#define ACPI_START_DEPENDENT_DESCRIPTOR 0x30
+#define ACPI_START_DEPENDENT_EX_DESCRIPTOR 0x31
+#define ACPI_END_DEPENDENT_DESCRIPTOR 0x38
+#define ACPI_IO_PORT_DESCRIPTOR 0x47
+#define ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR 0x4B
+#define ACPI_END_TAG_DESCRIPTOR 0x79
+
+//
+// Large Item Descriptor Value
+//
+#define ACPI_24_BIT_MEMORY_RANGE_DESCRIPTOR 0x81
+#define ACPI_32_BIT_MEMORY_RANGE_DESCRIPTOR 0x85
+#define ACPI_32_BIT_FIXED_MEMORY_RANGE_DESCRIPTOR 0x86
+#define ACPI_DWORD_ADDRESS_SPACE_DESCRIPTOR 0x87
+#define ACPI_WORD_ADDRESS_SPACE_DESCRIPTOR 0x88
+#define ACPI_EXTENDED_INTERRUPT_DESCRIPTOR 0x89
+#define ACPI_QWORD_ADDRESS_SPACE_DESCRIPTOR 0x8A
+#define ACPI_ADDRESS_SPACE_DESCRIPTOR 0x8A
+
+//
+// Resource Type
+//
+#define ACPI_ADDRESS_SPACE_TYPE_MEM 0x00
+#define ACPI_ADDRESS_SPACE_TYPE_IO 0x01
+#define ACPI_ADDRESS_SPACE_TYPE_BUS 0x02
+
+///
+/// Power Management Timer frequency is fixed at 3.579545MHz.
+///
+#define ACPI_TIMER_FREQUENCY 3579545
+
+//
+// Ensure proper structure formats
+//
+#pragma pack(1)
+
+///
+/// The commond definition of QWORD, DWORD, and WORD
+/// Address Space Descriptors.
+///
+typedef PACKED struct {
+ UINT8 Desc;
+ UINT16 Len;
+ UINT8 ResType;
+ UINT8 GenFlag;
+ UINT8 SpecificFlag;
+ UINT64 AddrSpaceGranularity;
+ UINT64 AddrRangeMin;
+ UINT64 AddrRangeMax;
+ UINT64 AddrTranslationOffset;
+ UINT64 AddrLen;
+} EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR;
+
+typedef PACKED union {
+ UINT8 Byte;
+ PACKED struct {
+ UINT8 Length : 3;
+ UINT8 Name : 4;
+ UINT8 Type : 1;
+ } Bits;
+} ACPI_SMALL_RESOURCE_HEADER;
+
+typedef PACKED struct {
+ PACKED union {
+ UINT8 Byte;
+ PACKED struct {
+ UINT8 Name : 7;
+ UINT8 Type : 1;
+ }Bits;
+ } Header;
+ UINT16 Length;
+} ACPI_LARGE_RESOURCE_HEADER;
+
+///
+/// IRQ Descriptor.
+///
+typedef PACKED struct {
+ ACPI_SMALL_RESOURCE_HEADER Header;
+ UINT16 Mask;
+} EFI_ACPI_IRQ_NOFLAG_DESCRIPTOR;
+
+///
+/// IRQ Descriptor.
+///
+typedef PACKED struct {
+ ACPI_SMALL_RESOURCE_HEADER Header;
+ UINT16 Mask;
+ UINT8 Information;
+} EFI_ACPI_IRQ_DESCRIPTOR;
+
+///
+/// DMA Descriptor.
+///
+typedef PACKED struct {
+ ACPI_SMALL_RESOURCE_HEADER Header;
+ UINT8 ChannelMask;
+ UINT8 Information;
+} EFI_ACPI_DMA_DESCRIPTOR;
+
+///
+/// I/O Port Descriptor
+///
+typedef PACKED struct {
+ ACPI_SMALL_RESOURCE_HEADER Header;
+ UINT8 Information;
+ UINT16 BaseAddressMin;
+ UINT16 BaseAddressMax;
+ UINT8 Alignment;
+ UINT8 Length;
+} EFI_ACPI_IO_PORT_DESCRIPTOR;
+
+///
+/// Fixed Location I/O Port Descriptor.
+///
+typedef PACKED struct {
+ ACPI_SMALL_RESOURCE_HEADER Header;
+ UINT16 BaseAddress;
+ UINT8 Length;
+} EFI_ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR;
+
+///
+/// 24-Bit Memory Range Descriptor
+///
+typedef PACKED struct {
+ ACPI_LARGE_RESOURCE_HEADER Header;
+ UINT8 Information;
+ UINT16 BaseAddressMin;
+ UINT16 BaseAddressMax;
+ UINT16 Alignment;
+ UINT16 Length;
+} EFI_ACPI_24_BIT_MEMORY_RANGE_DESCRIPTOR;
+
+///
+/// 32-Bit Memory Range Descriptor
+///
+typedef PACKED struct {
+ ACPI_LARGE_RESOURCE_HEADER Header;
+ UINT8 Information;
+ UINT32 BaseAddressMin;
+ UINT32 BaseAddressMax;
+ UINT32 Alignment;
+ UINT32 Length;
+} EFI_ACPI_32_BIT_MEMORY_RANGE_DESCRIPTOR;
+
+///
+/// Fixed 32-Bit Fixed Memory Range Descriptor
+///
+typedef PACKED struct {
+ ACPI_LARGE_RESOURCE_HEADER Header;
+ UINT8 Information;
+ UINT32 BaseAddress;
+ UINT32 Length;
+} EFI_ACPI_32_BIT_FIXED_MEMORY_RANGE_DESCRIPTOR;
+
+///
+/// QWORD Address Space Descriptor
+///
+typedef PACKED struct {
+ ACPI_LARGE_RESOURCE_HEADER Header;
+ UINT8 ResType;
+ UINT8 GenFlag;
+ UINT8 SpecificFlag;
+ UINT64 AddrSpaceGranularity;
+ UINT64 AddrRangeMin;
+ UINT64 AddrRangeMax;
+ UINT64 AddrTranslationOffset;
+ UINT64 AddrLen;
+} EFI_ACPI_QWORD_ADDRESS_SPACE_DESCRIPTOR;
+
+///
+/// DWORD Address Space Descriptor
+///
+typedef PACKED struct {
+ ACPI_LARGE_RESOURCE_HEADER Header;
+ UINT8 ResType;
+ UINT8 GenFlag;
+ UINT8 SpecificFlag;
+ UINT32 AddrSpaceGranularity;
+ UINT32 AddrRangeMin;
+ UINT32 AddrRangeMax;
+ UINT32 AddrTranslationOffset;
+ UINT32 AddrLen;
+} EFI_ACPI_DWORD_ADDRESS_SPACE_DESCRIPTOR;
+
+///
+/// WORD Address Space Descriptor
+///
+typedef PACKED struct {
+ ACPI_LARGE_RESOURCE_HEADER Header;
+ UINT8 ResType;
+ UINT8 GenFlag;
+ UINT8 SpecificFlag;
+ UINT16 AddrSpaceGranularity;
+ UINT16 AddrRangeMin;
+ UINT16 AddrRangeMax;
+ UINT16 AddrTranslationOffset;
+ UINT16 AddrLen;
+} EFI_ACPI_WORD_ADDRESS_SPACE_DESCRIPTOR;
+
+///
+/// Extended Interrupt Descriptor
+///
+typedef PACKED struct {
+ ACPI_LARGE_RESOURCE_HEADER Header;
+ UINT8 InterruptVectorFlags;
+ UINT8 InterruptTableLength;
+ UINT32 InterruptNumber[1];
+} EFI_ACPI_EXTENDED_INTERRUPT_DESCRIPTOR;
+
+#pragma pack()
+
+///
+/// The End tag identifies an end of resource data.
+///
+typedef struct {
+ UINT8 Desc;
+ UINT8 Checksum;
+} EFI_ACPI_END_TAG_DESCRIPTOR;
+
+//
+// General use definitions
+//
+#define EFI_ACPI_RESERVED_BYTE 0x00
+#define EFI_ACPI_RESERVED_WORD 0x0000
+#define EFI_ACPI_RESERVED_DWORD 0x00000000
+#define EFI_ACPI_RESERVED_QWORD 0x0000000000000000
+
+//
+// Resource Type Specific Flags
+// Ref ACPI specification 6.4.3.5.5
+//
+// Bit [0] : Write Status, _RW
+//
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_READ_WRITE (1 << 0)
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_READ_ONLY (0 << 0)
+//
+// Bit [2:1] : Memory Attributes, _MEM
+//
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_NON_CACHEABLE (0 << 1)
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE (1 << 1)
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_WRITE_COMBINING (2 << 1)
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE (3 << 1)
+//
+// Bit [4:3] : Memory Attributes, _MTP
+//
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_MEMORY (0 << 3)
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_RESERVED (1 << 3)
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_ACPI (2 << 3)
+#define EFI_APCI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_NVS (3 << 3)
+//
+// Bit [5] : Memory to I/O Translation, _TTP
+//
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_TYPE_TRANSLATION (1 << 5)
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_TYPE_STATIC (0 << 5)
+
+//
+// IRQ Information
+// Ref ACPI specification 6.4.2.1
+//
+#define EFI_ACPI_IRQ_SHARABLE_MASK 0x10
+#define EFI_ACPI_IRQ_SHARABLE 0x10
+
+#define EFI_ACPI_IRQ_POLARITY_MASK 0x08
+#define EFI_ACPI_IRQ_HIGH_TRUE 0x00
+#define EFI_ACPI_IRQ_LOW_FALSE 0x08
+
+#define EFI_ACPI_IRQ_MODE 0x01
+#define EFI_ACPI_IRQ_LEVEL_TRIGGERED 0x00
+#define EFI_ACPI_IRQ_EDGE_TRIGGERED 0x01
+
+//
+// DMA Information
+// Ref ACPI specification 6.4.2.2
+//
+#define EFI_ACPI_DMA_SPEED_TYPE_MASK 0x60
+#define EFI_ACPI_DMA_SPEED_TYPE_COMPATIBILITY 0x00
+#define EFI_ACPI_DMA_SPEED_TYPE_A 0x20
+#define EFI_ACPI_DMA_SPEED_TYPE_B 0x40
+#define EFI_ACPI_DMA_SPEED_TYPE_F 0x60
+
+#define EFI_ACPI_DMA_BUS_MASTER_MASK 0x04
+#define EFI_ACPI_DMA_BUS_MASTER 0x04
+
+#define EFI_ACPI_DMA_TRANSFER_TYPE_MASK 0x03
+#define EFI_ACPI_DMA_TRANSFER_TYPE_8_BIT 0x00
+#define EFI_ACPI_DMA_TRANSFER_TYPE_8_BIT_AND_16_BIT 0x01
+#define EFI_ACPI_DMA_TRANSFER_TYPE_16_BIT 0x10
+
+//
+// IO Information
+// Ref ACPI specification 6.4.2.5
+//
+#define EFI_ACPI_IO_DECODE_MASK 0x01
+#define EFI_ACPI_IO_DECODE_16_BIT 0x01
+#define EFI_ACPI_IO_DECODE_10_BIT 0x00
+
+//
+// Memory Information
+// Ref ACPI specification 6.4.3.4
+//
+#define EFI_ACPI_MEMORY_WRITE_STATUS_MASK 0x01
+#define EFI_ACPI_MEMORY_WRITABLE 0x01
+#define EFI_ACPI_MEMORY_NON_WRITABLE 0x00
+
+//
+// Ensure proper structure formats
+//
+#pragma pack(1)
+//
+// ACPI 1.0b table structures
+//
+
+///
+/// Root System Description Pointer Structure.
+///
+typedef struct {
+ UINT64 Signature;
+ UINT8 Checksum;
+ UINT8 OemId[6];
+ UINT8 Reserved;
+ UINT32 RsdtAddress;
+} EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_POINTER;
+
+//
+// Root System Description Table
+// No definition needed as it is a common description table header, the same with
+// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.
+//
+
+///
+/// RSDT Revision (as defined in ACPI 1.0b specification).
+///
+#define EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+
+///
+/// Fixed ACPI Description Table Structure (FADT).
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 FirmwareCtrl;
+ UINT32 Dsdt;
+ UINT8 IntModel;
+ UINT8 Reserved1;
+ UINT16 SciInt;
+ UINT32 SmiCmd;
+ UINT8 AcpiEnable;
+ UINT8 AcpiDisable;
+ UINT8 S4BiosReq;
+ UINT8 Reserved2;
+ UINT32 Pm1aEvtBlk;
+ UINT32 Pm1bEvtBlk;
+ UINT32 Pm1aCntBlk;
+ UINT32 Pm1bCntBlk;
+ UINT32 Pm2CntBlk;
+ UINT32 PmTmrBlk;
+ UINT32 Gpe0Blk;
+ UINT32 Gpe1Blk;
+ UINT8 Pm1EvtLen;
+ UINT8 Pm1CntLen;
+ UINT8 Pm2CntLen;
+ UINT8 PmTmLen;
+ UINT8 Gpe0BlkLen;
+ UINT8 Gpe1BlkLen;
+ UINT8 Gpe1Base;
+ UINT8 Reserved3;
+ UINT16 PLvl2Lat;
+ UINT16 PLvl3Lat;
+ UINT16 FlushSize;
+ UINT16 FlushStride;
+ UINT8 DutyOffset;
+ UINT8 DutyWidth;
+ UINT8 DayAlrm;
+ UINT8 MonAlrm;
+ UINT8 Century;
+ UINT8 Reserved4;
+ UINT8 Reserved5;
+ UINT8 Reserved6;
+ UINT32 Flags;
+} EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE;
+
+///
+/// FADT Version (as defined in ACPI 1.0b specification).
+///
+#define EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x01
+
+#define EFI_ACPI_1_0_INT_MODE_DUAL_PIC 0
+#define EFI_ACPI_1_0_INT_MODE_MULTIPLE_APIC 1
+
+//
+// Fixed ACPI Description Table Fixed Feature Flags
+// All other bits are reserved and must be set to 0.
+//
+#define EFI_ACPI_1_0_WBINVD BIT0
+#define EFI_ACPI_1_0_WBINVD_FLUSH BIT1
+#define EFI_ACPI_1_0_PROC_C1 BIT2
+#define EFI_ACPI_1_0_P_LVL2_UP BIT3
+#define EFI_ACPI_1_0_PWR_BUTTON BIT4
+#define EFI_ACPI_1_0_SLP_BUTTON BIT5
+#define EFI_ACPI_1_0_FIX_RTC BIT6
+#define EFI_ACPI_1_0_RTC_S4 BIT7
+#define EFI_ACPI_1_0_TMR_VAL_EXT BIT8
+#define EFI_ACPI_1_0_DCK_CAP BIT9
+
+///
+/// Firmware ACPI Control Structure.
+///
+typedef struct {
+ UINT32 Signature;
+ UINT32 Length;
+ UINT32 HardwareSignature;
+ UINT32 FirmwareWakingVector;
+ UINT32 GlobalLock;
+ UINT32 Flags;
+ UINT8 Reserved[40];
+} EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;
+
+///
+/// Firmware Control Structure Feature Flags.
+/// All other bits are reserved and must be set to 0.
+///
+#define EFI_ACPI_1_0_S4BIOS_F BIT0
+
+///
+/// Multiple APIC Description Table header definition. The rest of the table
+/// must be defined in a platform-specific manner.
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 LocalApicAddress;
+ UINT32 Flags;
+} EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
+
+///
+/// MADT Revision (as defined in ACPI 1.0b specification).
+///
+#define EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01
+
+///
+/// Multiple APIC Flags
+/// All other bits are reserved and must be set to 0.
+///
+#define EFI_ACPI_1_0_PCAT_COMPAT BIT0
+
+//
+// Multiple APIC Description Table APIC structure types
+// All other values between 0x05 an 0xFF are reserved and
+// will be ignored by OSPM.
+//
+#define EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC 0x00
+#define EFI_ACPI_1_0_IO_APIC 0x01
+#define EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE 0x02
+#define EFI_ACPI_1_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03
+#define EFI_ACPI_1_0_LOCAL_APIC_NMI 0x04
+
+//
+// APIC Structure Definitions
+//
+
+///
+/// Processor Local APIC Structure Definition.
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT8 ApicId;
+ UINT32 Flags;
+} EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE;
+
+///
+/// Local APIC Flags. All other bits are reserved and must be 0.
+///
+#define EFI_ACPI_1_0_LOCAL_APIC_ENABLED BIT0
+
+///
+/// IO APIC Structure.
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 IoApicAddress;
+ UINT32 SystemVectorBase;
+} EFI_ACPI_1_0_IO_APIC_STRUCTURE;
+
+///
+/// Interrupt Source Override Structure.
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Bus;
+ UINT8 Source;
+ UINT32 GlobalSystemInterruptVector;
+ UINT16 Flags;
+} EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
+
+///
+/// Non-Maskable Interrupt Source Structure.
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT32 GlobalSystemInterruptVector;
+} EFI_ACPI_1_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
+
+///
+/// Local APIC NMI Structure.
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT16 Flags;
+ UINT8 LocalApicInti;
+} EFI_ACPI_1_0_LOCAL_APIC_NMI_STRUCTURE;
+
+///
+/// Smart Battery Description Table (SBST)
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 WarningEnergyLevel;
+ UINT32 LowEnergyLevel;
+ UINT32 CriticalEnergyLevel;
+} EFI_ACPI_1_0_SMART_BATTERY_DESCRIPTION_TABLE;
+
+//
+// Known table signatures
+//
+
+///
+/// "RSD PTR " Root System Description Pointer.
+///
+#define EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')
+
+///
+/// "APIC" Multiple APIC Description Table.
+///
+#define EFI_ACPI_1_0_APIC_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')
+
+///
+/// "DSDT" Differentiated System Description Table.
+///
+#define EFI_ACPI_1_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')
+
+///
+/// "FACS" Firmware ACPI Control Structure.
+///
+#define EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')
+
+///
+/// "FACP" Fixed ACPI Description Table.
+///
+#define EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')
+
+///
+/// "PSDT" Persistent System Description Table.
+///
+#define EFI_ACPI_1_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')
+
+///
+/// "RSDT" Root System Description Table.
+///
+#define EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')
+
+///
+/// "SBST" Smart Battery Specification Table.
+///
+#define EFI_ACPI_1_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')
+
+///
+/// "SSDT" Secondary System Description Table.
+///
+#define EFI_ACPI_1_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')
+
+#pragma pack()
+
+#endif
diff --git a/MdePkg/Include/IndustryStandard/Acpi20.h b/MdePkg/Include/IndustryStandard/Acpi20.h
new file mode 100644
index 000000000000..d84b7db7b7da
--- /dev/null
+++ b/MdePkg/Include/IndustryStandard/Acpi20.h
@@ -0,0 +1,545 @@
+/** @file
+ ACPI 2.0 definitions from the ACPI Specification, revision 2.0
+
+ Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
+
+#ifndef _ACPI_2_0_H_
+#define _ACPI_2_0_H_
+
+#include <IndustryStandard/Acpi10.h>
+
+//
+// Define for Desriptor
+//
+#define ACPI_LARGE_GENERIC_REGISTER_DESCRIPTOR_NAME 0x02
+
+#define ACPI_GENERIC_REGISTER_DESCRIPTOR 0x82
+
+//
+// Ensure proper structure formats
+//
+#pragma pack(1)
+
+///
+/// Generic Register Descriptor
+///
+typedef PACKED struct {
+ ACPI_LARGE_RESOURCE_HEADER Header;
+ UINT8 AddressSpaceId;
+ UINT8 RegisterBitWidth;
+ UINT8 RegisterBitOffset;
+ UINT8 AddressSize;
+ UINT64 RegisterAddress;
+} EFI_ACPI_GENERIC_REGISTER_DESCRIPTOR;
+
+#pragma pack()
+
+//
+// Ensure proper structure formats
+//
+#pragma pack(1)
+
+///
+/// ACPI 2.0 Generic Address Space definition
+///
+typedef struct {
+ UINT8 AddressSpaceId;
+ UINT8 RegisterBitWidth;
+ UINT8 RegisterBitOffset;
+ UINT8 Reserved;
+ UINT64 Address;
+} EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE;
+
+//
+// Generic Address Space Address IDs
+//
+#define EFI_ACPI_2_0_SYSTEM_MEMORY 0
+#define EFI_ACPI_2_0_SYSTEM_IO 1
+#define EFI_ACPI_2_0_PCI_CONFIGURATION_SPACE 2
+#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER 3
+#define EFI_ACPI_2_0_SMBUS 4
+#define EFI_ACPI_2_0_FUNCTIONAL_FIXED_HARDWARE 0x7F
+
+//
+// ACPI 2.0 table structures
+//
+
+///
+/// Root System Description Pointer Structure
+///
+typedef struct {
+ UINT64 Signature;
+ UINT8 Checksum;
+ UINT8 OemId[6];
+ UINT8 Revision;
+ UINT32 RsdtAddress;
+ UINT32 Length;
+ UINT64 XsdtAddress;
+ UINT8 ExtendedChecksum;
+ UINT8 Reserved[3];
+} EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER;
+
+///
+/// RSD_PTR Revision (as defined in ACPI 2.0 spec.)
+///
+#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02
+
+///
+/// Common table header, this prefaces all ACPI tables, including FACS, but
+/// excluding the RSD PTR structure
+///
+typedef struct {
+ UINT32 Signature;
+ UINT32 Length;
+} EFI_ACPI_2_0_COMMON_HEADER;
+
+//
+// Root System Description Table
+// No definition needed as it is a common description table header, the same with
+// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.
+//
+
+///
+/// RSDT Revision (as defined in ACPI 2.0 spec.)
+///
+#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+
+//
+// Extended System Description Table
+// No definition needed as it is a common description table header, the same with
+// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.
+//
+
+///
+/// XSDT Revision (as defined in ACPI 2.0 spec.)
+///
+#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+
+///
+/// Fixed ACPI Description Table Structure (FADT)
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 FirmwareCtrl;
+ UINT32 Dsdt;
+ UINT8 Reserved0;
+ UINT8 PreferredPmProfile;
+ UINT16 SciInt;
+ UINT32 SmiCmd;
+ UINT8 AcpiEnable;
+ UINT8 AcpiDisable;
+ UINT8 S4BiosReq;
+ UINT8 PstateCnt;
+ UINT32 Pm1aEvtBlk;
+ UINT32 Pm1bEvtBlk;
+ UINT32 Pm1aCntBlk;
+ UINT32 Pm1bCntBlk;
+ UINT32 Pm2CntBlk;
+ UINT32 PmTmrBlk;
+ UINT32 Gpe0Blk;
+ UINT32 Gpe1Blk;
+ UINT8 Pm1EvtLen;
+ UINT8 Pm1CntLen;
+ UINT8 Pm2CntLen;
+ UINT8 PmTmrLen;
+ UINT8 Gpe0BlkLen;
+ UINT8 Gpe1BlkLen;
+ UINT8 Gpe1Base;
+ UINT8 CstCnt;
+ UINT16 PLvl2Lat;
+ UINT16 PLvl3Lat;
+ UINT16 FlushSize;
+ UINT16 FlushStride;
+ UINT8 DutyOffset;
+ UINT8 DutyWidth;
+ UINT8 DayAlrm;
+ UINT8 MonAlrm;
+ UINT8 Century;
+ UINT16 IaPcBootArch;
+ UINT8 Reserved1;
+ UINT32 Flags;
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE ResetReg;
+ UINT8 ResetValue;
+ UINT8 Reserved2[3];
+ UINT64 XFirmwareCtrl;
+ UINT64 XDsdt;
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
+} EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE;
+
+///
+/// FADT Version (as defined in ACPI 2.0 spec.)
+///
+#define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x03
+
+//
+// Fixed ACPI Description Table Preferred Power Management Profile
+//
+#define EFI_ACPI_2_0_PM_PROFILE_UNSPECIFIED 0
+#define EFI_ACPI_2_0_PM_PROFILE_DESKTOP 1
+#define EFI_ACPI_2_0_PM_PROFILE_MOBILE 2
+#define EFI_ACPI_2_0_PM_PROFILE_WORKSTATION 3
+#define EFI_ACPI_2_0_PM_PROFILE_ENTERPRISE_SERVER 4
+#define EFI_ACPI_2_0_PM_PROFILE_SOHO_SERVER 5
+#define EFI_ACPI_2_0_PM_PROFILE_APPLIANCE_PC 6
+
+//
+// Fixed ACPI Description Table Boot Architecture Flags
+// All other bits are reserved and must be set to 0.
+//
+#define EFI_ACPI_2_0_LEGACY_DEVICES BIT0
+#define EFI_ACPI_2_0_8042 BIT1
+
+//
+// Fixed ACPI Description Table Fixed Feature Flags
+// All other bits are reserved and must be set to 0.
+//
+#define EFI_ACPI_2_0_WBINVD BIT0
+#define EFI_ACPI_2_0_WBINVD_FLUSH BIT1
+#define EFI_ACPI_2_0_PROC_C1 BIT2
+#define EFI_ACPI_2_0_P_LVL2_UP BIT3
+#define EFI_ACPI_2_0_PWR_BUTTON BIT4
+#define EFI_ACPI_2_0_SLP_BUTTON BIT5
+#define EFI_ACPI_2_0_FIX_RTC BIT6
+#define EFI_ACPI_2_0_RTC_S4 BIT7
+#define EFI_ACPI_2_0_TMR_VAL_EXT BIT8
+#define EFI_ACPI_2_0_DCK_CAP BIT9
+#define EFI_ACPI_2_0_RESET_REG_SUP BIT10
+#define EFI_ACPI_2_0_SEALED_CASE BIT11
+#define EFI_ACPI_2_0_HEADLESS BIT12
+#define EFI_ACPI_2_0_CPU_SW_SLP BIT13
+
+///
+/// Firmware ACPI Control Structure
+///
+typedef struct {
+ UINT32 Signature;
+ UINT32 Length;
+ UINT32 HardwareSignature;
+ UINT32 FirmwareWakingVector;
+ UINT32 GlobalLock;
+ UINT32 Flags;
+ UINT64 XFirmwareWakingVector;
+ UINT8 Version;
+ UINT8 Reserved[31];
+} EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;
+
+///
+/// FACS Version (as defined in ACPI 2.0 spec.)
+///
+#define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x01
+
+///
+/// Firmware Control Structure Feature Flags
+/// All other bits are reserved and must be set to 0.
+///
+#define EFI_ACPI_2_0_S4BIOS_F BIT0
+
+///
+/// Multiple APIC Description Table header definition. The rest of the table
+/// must be defined in a platform specific manner.
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 LocalApicAddress;
+ UINT32 Flags;
+} EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
+
+///
+/// MADT Revision (as defined in ACPI 2.0 spec.)
+///
+#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01
+
+///
+/// Multiple APIC Flags
+/// All other bits are reserved and must be set to 0.
+///
+#define EFI_ACPI_2_0_PCAT_COMPAT BIT0
+
+//
+// Multiple APIC Description Table APIC structure types
+// All other values between 0x09 an 0xFF are reserved and
+// will be ignored by OSPM.
+//
+#define EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC 0x00
+#define EFI_ACPI_2_0_IO_APIC 0x01
+#define EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE 0x02
+#define EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03
+#define EFI_ACPI_2_0_LOCAL_APIC_NMI 0x04
+#define EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE 0x05
+#define EFI_ACPI_2_0_IO_SAPIC 0x06
+#define EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC 0x07
+#define EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES 0x08
+
+//
+// APIC Structure Definitions
+//
+
+///
+/// Processor Local APIC Structure Definition
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT8 ApicId;
+ UINT32 Flags;
+} EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE;
+
+///
+/// Local APIC Flags. All other bits are reserved and must be 0.
+///
+#define EFI_ACPI_2_0_LOCAL_APIC_ENABLED BIT0
+
+///
+/// IO APIC Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 IoApicAddress;
+ UINT32 GlobalSystemInterruptBase;
+} EFI_ACPI_2_0_IO_APIC_STRUCTURE;
+
+///
+/// Interrupt Source Override Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Bus;
+ UINT8 Source;
+ UINT32 GlobalSystemInterrupt;
+ UINT16 Flags;
+} EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
+
+///
+/// Non-Maskable Interrupt Source Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT32 GlobalSystemInterrupt;
+} EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
+
+///
+/// Local APIC NMI Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT16 Flags;
+ UINT8 LocalApicLint;
+} EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE;
+
+///
+/// Local APIC Address Override Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved;
+ UINT64 LocalApicAddress;
+} EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
+
+///
+/// IO SAPIC Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 GlobalSystemInterruptBase;
+ UINT64 IoSapicAddress;
+} EFI_ACPI_2_0_IO_SAPIC_STRUCTURE;
+
+///
+/// Local SAPIC Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT8 LocalSapicId;
+ UINT8 LocalSapicEid;
+ UINT8 Reserved[3];
+ UINT32 Flags;
+} EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
+
+///
+/// Platform Interrupt Sources Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT8 InterruptType;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT8 IoSapicVector;
+ UINT32 GlobalSystemInterrupt;
+ UINT32 Reserved;
+} EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
+
+///
+/// Smart Battery Description Table (SBST)
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 WarningEnergyLevel;
+ UINT32 LowEnergyLevel;
+ UINT32 CriticalEnergyLevel;
+} EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE;
+
+///
+/// SBST Version (as defined in ACPI 2.0 spec.)
+///
+#define EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
+
+///
+/// Embedded Controller Boot Resources Table (ECDT)
+/// The table is followed by a null terminated ASCII string that contains
+/// a fully qualified reference to the name space object.
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcControl;
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcData;
+ UINT32 Uid;
+ UINT8 GpeBit;
+} EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
+
+///
+/// ECDT Version (as defined in ACPI 2.0 spec.)
+///
+#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01
+
+//
+// Known table signatures
+//
+
+///
+/// "RSD PTR " Root System Description Pointer
+///
+#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')
+
+///
+/// "SPIC" Multiple SAPIC Description Table
+///
+/// BUGBUG: Don't know where this came from except SR870BN4 uses it.
+/// #define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE 0x43495053
+///
+#define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')
+
+///
+/// "BOOT" MS Simple Boot Spec
+///
+#define EFI_ACPI_2_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')
+
+///
+/// "DBGP" MS Bebug Port Spec
+///
+#define EFI_ACPI_2_0_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')
+
+///
+/// "DSDT" Differentiated System Description Table
+///
+#define EFI_ACPI_2_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')
+
+///
+/// "ECDT" Embedded Controller Boot Resources Table
+///
+#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')
+
+///
+/// "ETDT" Event Timer Description Table
+///
+#define EFI_ACPI_2_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')
+
+///
+/// "FACS" Firmware ACPI Control Structure
+///
+#define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')
+
+///
+/// "FACP" Fixed ACPI Description Table
+///
+#define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')
+
+///
+/// "APIC" Multiple APIC Description Table
+///
+#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')
+
+///
+/// "PSDT" Persistent System Description Table
+///
+#define EFI_ACPI_2_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')
+
+///
+/// "RSDT" Root System Description Table
+///
+#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')
+
+///
+/// "SBST" Smart Battery Specification Table
+///
+#define EFI_ACPI_2_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')
+
+///
+/// "SLIT" System Locality Information Table
+///
+#define EFI_ACPI_2_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')
+
+///
+/// "SPCR" Serial Port Concole Redirection Table
+///
+#define EFI_ACPI_2_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')
+
+///
+/// "SRAT" Static Resource Affinity Table
+///
+#define EFI_ACPI_2_0_STATIC_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')
+
+///
+/// "SSDT" Secondary System Description Table
+///
+#define EFI_ACPI_2_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')
+
+///
+/// "SPMI" Server Platform Management Interface Table
+///
+#define EFI_ACPI_2_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')
+
+///
+/// "XSDT" Extended System Description Table
+///
+#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')
+
+///
+/// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table
+///
+#define EFI_ACPI_2_0_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')
+
+#pragma pack()
+
+#endif
diff --git a/MdePkg/Include/IndustryStandard/Acpi30.h b/MdePkg/Include/IndustryStandard/Acpi30.h
new file mode 100644
index 000000000000..d510d8b93469
--- /dev/null
+++ b/MdePkg/Include/IndustryStandard/Acpi30.h
@@ -0,0 +1,729 @@
+/** @file
+ ACPI 3.0 definitions from the ACPI Specification Revision 3.0b October 10, 2006
+
+ Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
+
+#ifndef _ACPI_3_0_H_
+#define _ACPI_3_0_H_
+
+#include <IndustryStandard/Acpi20.h>
+
+//
+// Define for Desriptor
+//
+#define ACPI_LARGE_EXTENDED_ADDRESS_SPACE_DESCRIPTOR_NAME 0x0B
+
+#define ACPI_EXTENDED_ADDRESS_SPACE_DESCRIPTOR 0x8B
+
+//
+// Ensure proper structure formats
+//
+#pragma pack(1)
+
+///
+/// Extended Address Space Descriptor
+///
+typedef PACKED struct {
+ ACPI_LARGE_RESOURCE_HEADER Header;
+ UINT8 ResType;
+ UINT8 GenFlag;
+ UINT8 SpecificFlag;
+ UINT8 RevisionId;
+ UINT8 Reserved;
+ UINT64 AddrSpaceGranularity;
+ UINT64 AddrRangeMin;
+ UINT64 AddrRangeMax;
+ UINT64 AddrTranslationOffset;
+ UINT64 AddrLen;
+ UINT64 TypeSpecificAttribute;
+} EFI_ACPI_EXTENDED_ADDRESS_SPACE_DESCRIPTOR;
+
+#pragma pack()
+
+//
+// Memory Type Specific Flags
+//
+#define EFI_ACPI_MEMORY_TYPE_SPECIFIC_ATTRIBUTES_UC 0x0000000000000001
+#define EFI_ACPI_MEMORY_TYPE_SPECIFIC_ATTRIBUTES_WC 0x0000000000000002
+#define EFI_ACPI_MEMORY_TYPE_SPECIFIC_ATTRIBUTES_WT 0x0000000000000004
+#define EFI_ACPI_MEMORY_TYPE_SPECIFIC_ATTRIBUTES_WB 0x0000000000000008
+#define EFI_ACPI_MEMORY_TYPE_SPECIFIC_ATTRIBUTES_UCE 0x0000000000000010
+#define EFI_ACPI_MEMORY_TYPE_SPECIFIC_ATTRIBUTES_NV 0x0000000000008000
+
+//
+// Ensure proper structure formats
+//
+#pragma pack(1)
+
+///
+/// ACPI 3.0 Generic Address Space definition
+///
+typedef struct {
+ UINT8 AddressSpaceId;
+ UINT8 RegisterBitWidth;
+ UINT8 RegisterBitOffset;
+ UINT8 AccessSize;
+ UINT64 Address;
+} EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE;
+
+//
+// Generic Address Space Address IDs
+//
+#define EFI_ACPI_3_0_SYSTEM_MEMORY 0
+#define EFI_ACPI_3_0_SYSTEM_IO 1
+#define EFI_ACPI_3_0_PCI_CONFIGURATION_SPACE 2
+#define EFI_ACPI_3_0_EMBEDDED_CONTROLLER 3
+#define EFI_ACPI_3_0_SMBUS 4
+#define EFI_ACPI_3_0_FUNCTIONAL_FIXED_HARDWARE 0x7F
+
+//
+// Generic Address Space Access Sizes
+//
+#define EFI_ACPI_3_0_UNDEFINED 0
+#define EFI_ACPI_3_0_BYTE 1
+#define EFI_ACPI_3_0_WORD 2
+#define EFI_ACPI_3_0_DWORD 3
+#define EFI_ACPI_3_0_QWORD 4
+
+//
+// ACPI 3.0 table structures
+//
+
+///
+/// Root System Description Pointer Structure
+///
+typedef struct {
+ UINT64 Signature;
+ UINT8 Checksum;
+ UINT8 OemId[6];
+ UINT8 Revision;
+ UINT32 RsdtAddress;
+ UINT32 Length;
+ UINT64 XsdtAddress;
+ UINT8 ExtendedChecksum;
+ UINT8 Reserved[3];
+} EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER;
+
+///
+/// RSD_PTR Revision (as defined in ACPI 3.0b spec.)
+///
+#define EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 3.0b) says current value is 2
+
+///
+/// Common table header, this prefaces all ACPI tables, including FACS, but
+/// excluding the RSD PTR structure
+///
+typedef struct {
+ UINT32 Signature;
+ UINT32 Length;
+} EFI_ACPI_3_0_COMMON_HEADER;
+
+//
+// Root System Description Table
+// No definition needed as it is a common description table header, the same with
+// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.
+//
+
+///
+/// RSDT Revision (as defined in ACPI 3.0 spec.)
+///
+#define EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+
+//
+// Extended System Description Table
+// No definition needed as it is a common description table header, the same with
+// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.
+//
+
+///
+/// XSDT Revision (as defined in ACPI 3.0 spec.)
+///
+#define EFI_ACPI_3_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+
+///
+/// Fixed ACPI Description Table Structure (FADT)
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 FirmwareCtrl;
+ UINT32 Dsdt;
+ UINT8 Reserved0;
+ UINT8 PreferredPmProfile;
+ UINT16 SciInt;
+ UINT32 SmiCmd;
+ UINT8 AcpiEnable;
+ UINT8 AcpiDisable;
+ UINT8 S4BiosReq;
+ UINT8 PstateCnt;
+ UINT32 Pm1aEvtBlk;
+ UINT32 Pm1bEvtBlk;
+ UINT32 Pm1aCntBlk;
+ UINT32 Pm1bCntBlk;
+ UINT32 Pm2CntBlk;
+ UINT32 PmTmrBlk;
+ UINT32 Gpe0Blk;
+ UINT32 Gpe1Blk;
+ UINT8 Pm1EvtLen;
+ UINT8 Pm1CntLen;
+ UINT8 Pm2CntLen;
+ UINT8 PmTmrLen;
+ UINT8 Gpe0BlkLen;
+ UINT8 Gpe1BlkLen;
+ UINT8 Gpe1Base;
+ UINT8 CstCnt;
+ UINT16 PLvl2Lat;
+ UINT16 PLvl3Lat;
+ UINT16 FlushSize;
+ UINT16 FlushStride;
+ UINT8 DutyOffset;
+ UINT8 DutyWidth;
+ UINT8 DayAlrm;
+ UINT8 MonAlrm;
+ UINT8 Century;
+ UINT16 IaPcBootArch;
+ UINT8 Reserved1;
+ UINT32 Flags;
+ EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE ResetReg;
+ UINT8 ResetValue;
+ UINT8 Reserved2[3];
+ UINT64 XFirmwareCtrl;
+ UINT64 XDsdt;
+ EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
+ EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
+ EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
+ EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
+ EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
+ EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
+ EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
+ EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
+} EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE;
+
+///
+/// FADT Version (as defined in ACPI 3.0 spec.)
+///
+#define EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x04
+
+//
+// Fixed ACPI Description Table Preferred Power Management Profile
+//
+#define EFI_ACPI_3_0_PM_PROFILE_UNSPECIFIED 0
+#define EFI_ACPI_3_0_PM_PROFILE_DESKTOP 1
+#define EFI_ACPI_3_0_PM_PROFILE_MOBILE 2
+#define EFI_ACPI_3_0_PM_PROFILE_WORKSTATION 3
+#define EFI_ACPI_3_0_PM_PROFILE_ENTERPRISE_SERVER 4
+#define EFI_ACPI_3_0_PM_PROFILE_SOHO_SERVER 5
+#define EFI_ACPI_3_0_PM_PROFILE_APPLIANCE_PC 6
+#define EFI_ACPI_3_0_PM_PROFILE_PERFORMANCE_SERVER 7
+
+//
+// Fixed ACPI Description Table Boot Architecture Flags
+// All other bits are reserved and must be set to 0.
+//
+#define EFI_ACPI_3_0_LEGACY_DEVICES BIT0
+#define EFI_ACPI_3_0_8042 BIT1
+#define EFI_ACPI_3_0_VGA_NOT_PRESENT BIT2
+#define EFI_ACPI_3_0_MSI_NOT_SUPPORTED BIT3
+#define EFI_ACPI_3_0_PCIE_ASPM_CONTROLS BIT4
+
+//
+// Fixed ACPI Description Table Fixed Feature Flags
+// All other bits are reserved and must be set to 0.
+//
+#define EFI_ACPI_3_0_WBINVD BIT0
+#define EFI_ACPI_3_0_WBINVD_FLUSH BIT1
+#define EFI_ACPI_3_0_PROC_C1 BIT2
+#define EFI_ACPI_3_0_P_LVL2_UP BIT3
+#define EFI_ACPI_3_0_PWR_BUTTON BIT4
+#define EFI_ACPI_3_0_SLP_BUTTON BIT5
+#define EFI_ACPI_3_0_FIX_RTC BIT6
+#define EFI_ACPI_3_0_RTC_S4 BIT7
+#define EFI_ACPI_3_0_TMR_VAL_EXT BIT8
+#define EFI_ACPI_3_0_DCK_CAP BIT9
+#define EFI_ACPI_3_0_RESET_REG_SUP BIT10
+#define EFI_ACPI_3_0_SEALED_CASE BIT11
+#define EFI_ACPI_3_0_HEADLESS BIT12
+#define EFI_ACPI_3_0_CPU_SW_SLP BIT13
+#define EFI_ACPI_3_0_PCI_EXP_WAK BIT14
+#define EFI_ACPI_3_0_USE_PLATFORM_CLOCK BIT15
+#define EFI_ACPI_3_0_S4_RTC_STS_VALID BIT16
+#define EFI_ACPI_3_0_REMOTE_POWER_ON_CAPABLE BIT17
+#define EFI_ACPI_3_0_FORCE_APIC_CLUSTER_MODEL BIT18
+#define EFI_ACPI_3_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
+
+///
+/// Firmware ACPI Control Structure
+///
+typedef struct {
+ UINT32 Signature;
+ UINT32 Length;
+ UINT32 HardwareSignature;
+ UINT32 FirmwareWakingVector;
+ UINT32 GlobalLock;
+ UINT32 Flags;
+ UINT64 XFirmwareWakingVector;
+ UINT8 Version;
+ UINT8 Reserved[31];
+} EFI_ACPI_3_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;
+
+///
+/// FACS Version (as defined in ACPI 3.0 spec.)
+///
+#define EFI_ACPI_3_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x01
+
+///
+/// Firmware Control Structure Feature Flags
+/// All other bits are reserved and must be set to 0.
+///
+#define EFI_ACPI_3_0_S4BIOS_F BIT0
+
+//
+// Differentiated System Description Table,
+// Secondary System Description Table
+// and Persistent System Description Table,
+// no definition needed as they are common description table header, the same with
+// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.
+//
+#define EFI_ACPI_3_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
+#define EFI_ACPI_3_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
+
+///
+/// Multiple APIC Description Table header definition. The rest of the table
+/// must be defined in a platform specific manner.
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 LocalApicAddress;
+ UINT32 Flags;
+} EFI_ACPI_3_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
+
+///
+/// MADT Revision (as defined in ACPI 3.0 spec.)
+///
+#define EFI_ACPI_3_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x02
+
+///
+/// Multiple APIC Flags
+/// All other bits are reserved and must be set to 0.
+///
+#define EFI_ACPI_3_0_PCAT_COMPAT BIT0
+
+//
+// Multiple APIC Description Table APIC structure types
+// All other values between 0x09 an 0xFF are reserved and
+// will be ignored by OSPM.
+//
+#define EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC 0x00
+#define EFI_ACPI_3_0_IO_APIC 0x01
+#define EFI_ACPI_3_0_INTERRUPT_SOURCE_OVERRIDE 0x02
+#define EFI_ACPI_3_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03
+#define EFI_ACPI_3_0_LOCAL_APIC_NMI 0x04
+#define EFI_ACPI_3_0_LOCAL_APIC_ADDRESS_OVERRIDE 0x05
+#define EFI_ACPI_3_0_IO_SAPIC 0x06
+#define EFI_ACPI_3_0_LOCAL_SAPIC 0x07
+#define EFI_ACPI_3_0_PLATFORM_INTERRUPT_SOURCES 0x08
+
+//
+// APIC Structure Definitions
+//
+
+///
+/// Processor Local APIC Structure Definition
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT8 ApicId;
+ UINT32 Flags;
+} EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC_STRUCTURE;
+
+///
+/// Local APIC Flags. All other bits are reserved and must be 0.
+///
+#define EFI_ACPI_3_0_LOCAL_APIC_ENABLED BIT0
+
+///
+/// IO APIC Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 IoApicAddress;
+ UINT32 GlobalSystemInterruptBase;
+} EFI_ACPI_3_0_IO_APIC_STRUCTURE;
+
+///
+/// Interrupt Source Override Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Bus;
+ UINT8 Source;
+ UINT32 GlobalSystemInterrupt;
+ UINT16 Flags;
+} EFI_ACPI_3_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
+
+///
+/// Platform Interrupt Sources Structure Definition
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT8 InterruptType;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT8 IoSapicVector;
+ UINT32 GlobalSystemInterrupt;
+ UINT32 PlatformInterruptSourceFlags;
+ UINT8 CpeiProcessorOverride;
+ UINT8 Reserved[31];
+} EFI_ACPI_3_0_PLATFORM_INTERRUPT_APIC_STRUCTURE;
+
+//
+// MPS INTI flags.
+// All other bits are reserved and must be set to 0.
+//
+#define EFI_ACPI_3_0_POLARITY (3 << 0)
+#define EFI_ACPI_3_0_TRIGGER_MODE (3 << 2)
+
+///
+/// Non-Maskable Interrupt Source Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT32 GlobalSystemInterrupt;
+} EFI_ACPI_3_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
+
+///
+/// Local APIC NMI Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT16 Flags;
+ UINT8 LocalApicLint;
+} EFI_ACPI_3_0_LOCAL_APIC_NMI_STRUCTURE;
+
+///
+/// Local APIC Address Override Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved;
+ UINT64 LocalApicAddress;
+} EFI_ACPI_3_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
+
+///
+/// IO SAPIC Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 GlobalSystemInterruptBase;
+ UINT64 IoSapicAddress;
+} EFI_ACPI_3_0_IO_SAPIC_STRUCTURE;
+
+///
+/// Local SAPIC Structure
+/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT8 LocalSapicId;
+ UINT8 LocalSapicEid;
+ UINT8 Reserved[3];
+ UINT32 Flags;
+ UINT32 ACPIProcessorUIDValue;
+} EFI_ACPI_3_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
+
+///
+/// Platform Interrupt Sources Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT8 InterruptType;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT8 IoSapicVector;
+ UINT32 GlobalSystemInterrupt;
+ UINT32 PlatformInterruptSourceFlags;
+} EFI_ACPI_3_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
+
+///
+/// Platform Interrupt Source Flags.
+/// All other bits are reserved and must be set to 0.
+///
+#define EFI_ACPI_3_0_CPEI_PROCESSOR_OVERRIDE BIT0
+
+///
+/// Smart Battery Description Table (SBST)
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 WarningEnergyLevel;
+ UINT32 LowEnergyLevel;
+ UINT32 CriticalEnergyLevel;
+} EFI_ACPI_3_0_SMART_BATTERY_DESCRIPTION_TABLE;
+
+///
+/// SBST Version (as defined in ACPI 3.0 spec.)
+///
+#define EFI_ACPI_3_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
+
+///
+/// Embedded Controller Boot Resources Table (ECDT)
+/// The table is followed by a null terminated ASCII string that contains
+/// a fully qualified reference to the name space object.
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE EcControl;
+ EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE EcData;
+ UINT32 Uid;
+ UINT8 GpeBit;
+} EFI_ACPI_3_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
+
+///
+/// ECDT Version (as defined in ACPI 3.0 spec.)
+///
+#define EFI_ACPI_3_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01
+
+///
+/// System Resource Affinity Table (SRAT. The rest of the table
+/// must be defined in a platform specific manner.
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 Reserved1; ///< Must be set to 1
+ UINT64 Reserved2;
+} EFI_ACPI_3_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;
+
+///
+/// SRAT Version (as defined in ACPI 3.0 spec.)
+///
+#define EFI_ACPI_3_0_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x02
+
+//
+// SRAT structure types.
+// All other values between 0x02 an 0xFF are reserved and
+// will be ignored by OSPM.
+//
+#define EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00
+#define EFI_ACPI_3_0_MEMORY_AFFINITY 0x01
+
+///
+/// Processor Local APIC/SAPIC Affinity Structure Definition
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 ProximityDomain7To0;
+ UINT8 ApicId;
+ UINT32 Flags;
+ UINT8 LocalSapicEid;
+ UINT8 ProximityDomain31To8[3];
+ UINT8 Reserved[4];
+} EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;
+
+///
+/// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.
+///
+#define EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
+
+///
+/// Memory Affinity Structure Definition
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT32 ProximityDomain;
+ UINT16 Reserved1;
+ UINT32 AddressBaseLow;
+ UINT32 AddressBaseHigh;
+ UINT32 LengthLow;
+ UINT32 LengthHigh;
+ UINT32 Reserved2;
+ UINT32 Flags;
+ UINT64 Reserved3;
+} EFI_ACPI_3_0_MEMORY_AFFINITY_STRUCTURE;
+
+//
+// Memory Flags. All other bits are reserved and must be 0.
+//
+#define EFI_ACPI_3_0_MEMORY_ENABLED (1 << 0)
+#define EFI_ACPI_3_0_MEMORY_HOT_PLUGGABLE (1 << 1)
+#define EFI_ACPI_3_0_MEMORY_NONVOLATILE (1 << 2)
+
+///
+/// System Locality Distance Information Table (SLIT).
+/// The rest of the table is a matrix.
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT64 NumberOfSystemLocalities;
+} EFI_ACPI_3_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;
+
+///
+/// SLIT Version (as defined in ACPI 3.0 spec.)
+///
+#define EFI_ACPI_3_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01
+
+//
+// Known table signatures
+//
+
+///
+/// "RSD PTR " Root System Description Pointer
+///
+#define EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')
+
+///
+/// "APIC" Multiple APIC Description Table
+///
+#define EFI_ACPI_3_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')
+
+///
+/// "DSDT" Differentiated System Description Table
+///
+#define EFI_ACPI_3_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')
+
+///
+/// "ECDT" Embedded Controller Boot Resources Table
+///
+#define EFI_ACPI_3_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')
+
+///
+/// "FACP" Fixed ACPI Description Table
+///
+#define EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')
+
+///
+/// "FACS" Firmware ACPI Control Structure
+///
+#define EFI_ACPI_3_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')
+
+///
+/// "PSDT" Persistent System Description Table
+///
+#define EFI_ACPI_3_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')
+
+///
+/// "RSDT" Root System Description Table
+///
+#define EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')
+
+///
+/// "SBST" Smart Battery Specification Table
+///
+#define EFI_ACPI_3_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')
+
+///
+/// "SLIT" System Locality Information Table
+///
+#define EFI_ACPI_3_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')
+
+///
+/// "SRAT" System Resource Affinity Table
+///
+#define EFI_ACPI_3_0_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')
+
+///
+/// "SSDT" Secondary System Description Table
+///
+#define EFI_ACPI_3_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')
+
+///
+/// "XSDT" Extended System Description Table
+///
+#define EFI_ACPI_3_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')
+
+///
+/// "BOOT" MS Simple Boot Spec
+///
+#define EFI_ACPI_3_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')
+
+///
+/// "CPEP" Corrected Platform Error Polling Table
+///
+#define EFI_ACPI_3_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')
+
+///
+/// "DBGP" MS Debug Port Spec
+///
+#define EFI_ACPI_3_0_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')
+
+///
+/// "ETDT" Event Timer Description Table
+///
+#define EFI_ACPI_3_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')
+
+///
+/// "HPET" IA-PC High Precision Event Timer Table
+///
+#define EFI_ACPI_3_0_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T')
+
+///
+/// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table
+///
+#define EFI_ACPI_3_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')
+
+///
+/// "SPCR" Serial Port Concole Redirection Table
+///
+#define EFI_ACPI_3_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')
+
+///
+/// "SPMI" Server Platform Management Interface Table
+///
+#define EFI_ACPI_3_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')
+
+///
+/// "TCPA" Trusted Computing Platform Alliance Capabilities Table
+///
+#define EFI_ACPI_3_0_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')
+
+///
+/// "WDRT" Watchdog Resource Table
+///
+#define EFI_ACPI_3_0_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T')
+
+///
+/// "WDAT" Watchdog Action Table
+///
+#define EFI_ACPI_3_0_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T')
+
+///
+/// "WSPT" Windows Specific Properties Table
+///
+#define EFI_ACPI_3_0_WINDOWS_SPECIFIC_PROPERTIES_TABLE_SIGNATURE SIGNATURE_32('W', 'S', 'P', 'T')
+
+///
+/// "iBFT" iSCSI Boot Firmware Table
+///
+#define EFI_ACPI_3_0_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T')
+
+#pragma pack()
+
+#endif
diff --git a/MdePkg/Include/IndustryStandard/Acpi40.h b/MdePkg/Include/IndustryStandard/Acpi40.h
new file mode 100644
index 000000000000..94ae5fc56727
--- /dev/null
+++ b/MdePkg/Include/IndustryStandard/Acpi40.h
@@ -0,0 +1,1309 @@
+/** @file
+ ACPI 4.0 definitions from the ACPI Specification Revision 4.0a April 5, 2010
+
+ Copyright (c) 2010 - 2011, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
+
+#ifndef _ACPI_4_0_H_
+#define _ACPI_4_0_H_
+
+#include <IndustryStandard/Acpi30.h>
+
+//
+// Ensure proper structure formats
+//
+#pragma pack(1)
+
+///
+/// ACPI 4.0 Generic Address Space definition
+///
+typedef struct {
+ UINT8 AddressSpaceId;
+ UINT8 RegisterBitWidth;
+ UINT8 RegisterBitOffset;
+ UINT8 AccessSize;
+ UINT64 Address;
+} EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE;
+
+//
+// Generic Address Space Address IDs
+//
+#define EFI_ACPI_4_0_SYSTEM_MEMORY 0
+#define EFI_ACPI_4_0_SYSTEM_IO 1
+#define EFI_ACPI_4_0_PCI_CONFIGURATION_SPACE 2
+#define EFI_ACPI_4_0_EMBEDDED_CONTROLLER 3
+#define EFI_ACPI_4_0_SMBUS 4
+#define EFI_ACPI_4_0_FUNCTIONAL_FIXED_HARDWARE 0x7F
+
+//
+// Generic Address Space Access Sizes
+//
+#define EFI_ACPI_4_0_UNDEFINED 0
+#define EFI_ACPI_4_0_BYTE 1
+#define EFI_ACPI_4_0_WORD 2
+#define EFI_ACPI_4_0_DWORD 3
+#define EFI_ACPI_4_0_QWORD 4
+
+//
+// ACPI 4.0 table structures
+//
+
+///
+/// Root System Description Pointer Structure
+///
+typedef struct {
+ UINT64 Signature;
+ UINT8 Checksum;
+ UINT8 OemId[6];
+ UINT8 Revision;
+ UINT32 RsdtAddress;
+ UINT32 Length;
+ UINT64 XsdtAddress;
+ UINT8 ExtendedChecksum;
+ UINT8 Reserved[3];
+} EFI_ACPI_4_0_ROOT_SYSTEM_DESCRIPTION_POINTER;
+
+///
+/// RSD_PTR Revision (as defined in ACPI 4.0b spec.)
+///
+#define EFI_ACPI_4_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 4.0a) says current value is 2
+
+///
+/// Common table header, this prefaces all ACPI tables, including FACS, but
+/// excluding the RSD PTR structure
+///
+typedef struct {
+ UINT32 Signature;
+ UINT32 Length;
+} EFI_ACPI_4_0_COMMON_HEADER;
+
+//
+// Root System Description Table
+// No definition needed as it is a common description table header, the same with
+// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.
+//
+
+///
+/// RSDT Revision (as defined in ACPI 4.0 spec.)
+///
+#define EFI_ACPI_4_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+
+//
+// Extended System Description Table
+// No definition needed as it is a common description table header, the same with
+// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.
+//
+
+///
+/// XSDT Revision (as defined in ACPI 4.0 spec.)
+///
+#define EFI_ACPI_4_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+
+///
+/// Fixed ACPI Description Table Structure (FADT)
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 FirmwareCtrl;
+ UINT32 Dsdt;
+ UINT8 Reserved0;
+ UINT8 PreferredPmProfile;
+ UINT16 SciInt;
+ UINT32 SmiCmd;
+ UINT8 AcpiEnable;
+ UINT8 AcpiDisable;
+ UINT8 S4BiosReq;
+ UINT8 PstateCnt;
+ UINT32 Pm1aEvtBlk;
+ UINT32 Pm1bEvtBlk;
+ UINT32 Pm1aCntBlk;
+ UINT32 Pm1bCntBlk;
+ UINT32 Pm2CntBlk;
+ UINT32 PmTmrBlk;
+ UINT32 Gpe0Blk;
+ UINT32 Gpe1Blk;
+ UINT8 Pm1EvtLen;
+ UINT8 Pm1CntLen;
+ UINT8 Pm2CntLen;
+ UINT8 PmTmrLen;
+ UINT8 Gpe0BlkLen;
+ UINT8 Gpe1BlkLen;
+ UINT8 Gpe1Base;
+ UINT8 CstCnt;
+ UINT16 PLvl2Lat;
+ UINT16 PLvl3Lat;
+ UINT16 FlushSize;
+ UINT16 FlushStride;
+ UINT8 DutyOffset;
+ UINT8 DutyWidth;
+ UINT8 DayAlrm;
+ UINT8 MonAlrm;
+ UINT8 Century;
+ UINT16 IaPcBootArch;
+ UINT8 Reserved1;
+ UINT32 Flags;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE ResetReg;
+ UINT8 ResetValue;
+ UINT8 Reserved2[3];
+ UINT64 XFirmwareCtrl;
+ UINT64 XDsdt;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
+} EFI_ACPI_4_0_FIXED_ACPI_DESCRIPTION_TABLE;
+
+///
+/// FADT Version (as defined in ACPI 4.0 spec.)
+///
+#define EFI_ACPI_4_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x04
+
+//
+// Fixed ACPI Description Table Preferred Power Management Profile
+//
+#define EFI_ACPI_4_0_PM_PROFILE_UNSPECIFIED 0
+#define EFI_ACPI_4_0_PM_PROFILE_DESKTOP 1
+#define EFI_ACPI_4_0_PM_PROFILE_MOBILE 2
+#define EFI_ACPI_4_0_PM_PROFILE_WORKSTATION 3
+#define EFI_ACPI_4_0_PM_PROFILE_ENTERPRISE_SERVER 4
+#define EFI_ACPI_4_0_PM_PROFILE_SOHO_SERVER 5
+#define EFI_ACPI_4_0_PM_PROFILE_APPLIANCE_PC 6
+#define EFI_ACPI_4_0_PM_PROFILE_PERFORMANCE_SERVER 7
+
+//
+// Fixed ACPI Description Table Boot Architecture Flags
+// All other bits are reserved and must be set to 0.
+//
+#define EFI_ACPI_4_0_LEGACY_DEVICES BIT0
+#define EFI_ACPI_4_0_8042 BIT1
+#define EFI_ACPI_4_0_VGA_NOT_PRESENT BIT2
+#define EFI_ACPI_4_0_MSI_NOT_SUPPORTED BIT3
+#define EFI_ACPI_4_0_PCIE_ASPM_CONTROLS BIT4
+
+//
+// Fixed ACPI Description Table Fixed Feature Flags
+// All other bits are reserved and must be set to 0.
+//
+#define EFI_ACPI_4_0_WBINVD BIT0
+#define EFI_ACPI_4_0_WBINVD_FLUSH BIT1
+#define EFI_ACPI_4_0_PROC_C1 BIT2
+#define EFI_ACPI_4_0_P_LVL2_UP BIT3
+#define EFI_ACPI_4_0_PWR_BUTTON BIT4
+#define EFI_ACPI_4_0_SLP_BUTTON BIT5
+#define EFI_ACPI_4_0_FIX_RTC BIT6
+#define EFI_ACPI_4_0_RTC_S4 BIT7
+#define EFI_ACPI_4_0_TMR_VAL_EXT BIT8
+#define EFI_ACPI_4_0_DCK_CAP BIT9
+#define EFI_ACPI_4_0_RESET_REG_SUP BIT10
+#define EFI_ACPI_4_0_SEALED_CASE BIT11
+#define EFI_ACPI_4_0_HEADLESS BIT12
+#define EFI_ACPI_4_0_CPU_SW_SLP BIT13
+#define EFI_ACPI_4_0_PCI_EXP_WAK BIT14
+#define EFI_ACPI_4_0_USE_PLATFORM_CLOCK BIT15
+#define EFI_ACPI_4_0_S4_RTC_STS_VALID BIT16
+#define EFI_ACPI_4_0_REMOTE_POWER_ON_CAPABLE BIT17
+#define EFI_ACPI_4_0_FORCE_APIC_CLUSTER_MODEL BIT18
+#define EFI_ACPI_4_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
+
+///
+/// Firmware ACPI Control Structure
+///
+typedef struct {
+ UINT32 Signature;
+ UINT32 Length;
+ UINT32 HardwareSignature;
+ UINT32 FirmwareWakingVector;
+ UINT32 GlobalLock;
+ UINT32 Flags;
+ UINT64 XFirmwareWakingVector;
+ UINT8 Version;
+ UINT8 Reserved0[3];
+ UINT32 OspmFlags;
+ UINT8 Reserved1[24];
+} EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;
+
+///
+/// FACS Version (as defined in ACPI 4.0 spec.)
+///
+#define EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02
+
+///
+/// Firmware Control Structure Feature Flags
+/// All other bits are reserved and must be set to 0.
+///
+#define EFI_ACPI_4_0_S4BIOS_F BIT0
+#define EFI_ACPI_4_0_64BIT_WAKE_SUPPORTED_F BIT1
+
+///
+/// OSPM Enabled Firmware Control Structure Flags
+/// All other bits are reserved and must be set to 0.
+///
+#define EFI_ACPI_4_0_OSPM_64BIT_WAKE__F BIT0
+
+//
+// Differentiated System Description Table,
+// Secondary System Description Table
+// and Persistent System Description Table,
+// no definition needed as they are common description table header, the same with
+// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.
+//
+#define EFI_ACPI_4_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
+#define EFI_ACPI_4_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
+
+///
+/// Multiple APIC Description Table header definition. The rest of the table
+/// must be defined in a platform specific manner.
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 LocalApicAddress;
+ UINT32 Flags;
+} EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
+
+///
+/// MADT Revision (as defined in ACPI 4.0 spec.)
+///
+#define EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03
+
+///
+/// Multiple APIC Flags
+/// All other bits are reserved and must be set to 0.
+///
+#define EFI_ACPI_4_0_PCAT_COMPAT BIT0
+
+//
+// Multiple APIC Description Table APIC structure types
+// All other values between 0x0B an 0xFF are reserved and
+// will be ignored by OSPM.
+//
+#define EFI_ACPI_4_0_PROCESSOR_LOCAL_APIC 0x00
+#define EFI_ACPI_4_0_IO_APIC 0x01
+#define EFI_ACPI_4_0_INTERRUPT_SOURCE_OVERRIDE 0x02
+#define EFI_ACPI_4_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03
+#define EFI_ACPI_4_0_LOCAL_APIC_NMI 0x04
+#define EFI_ACPI_4_0_LOCAL_APIC_ADDRESS_OVERRIDE 0x05
+#define EFI_ACPI_4_0_IO_SAPIC 0x06
+#define EFI_ACPI_4_0_LOCAL_SAPIC 0x07
+#define EFI_ACPI_4_0_PLATFORM_INTERRUPT_SOURCES 0x08
+#define EFI_ACPI_4_0_PROCESSOR_LOCAL_X2APIC 0x09
+#define EFI_ACPI_4_0_LOCAL_X2APIC_NMI 0x0A
+
+//
+// APIC Structure Definitions
+//
+
+///
+/// Processor Local APIC Structure Definition
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT8 ApicId;
+ UINT32 Flags;
+} EFI_ACPI_4_0_PROCESSOR_LOCAL_APIC_STRUCTURE;
+
+///
+/// Local APIC Flags. All other bits are reserved and must be 0.
+///
+#define EFI_ACPI_4_0_LOCAL_APIC_ENABLED BIT0
+
+///
+/// IO APIC Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 IoApicAddress;
+ UINT32 GlobalSystemInterruptBase;
+} EFI_ACPI_4_0_IO_APIC_STRUCTURE;
+
+///
+/// Interrupt Source Override Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Bus;
+ UINT8 Source;
+ UINT32 GlobalSystemInterrupt;
+ UINT16 Flags;
+} EFI_ACPI_4_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
+
+///
+/// Platform Interrupt Sources Structure Definition
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT8 InterruptType;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT8 IoSapicVector;
+ UINT32 GlobalSystemInterrupt;
+ UINT32 PlatformInterruptSourceFlags;
+ UINT8 CpeiProcessorOverride;
+ UINT8 Reserved[31];
+} EFI_ACPI_4_0_PLATFORM_INTERRUPT_APIC_STRUCTURE;
+
+//
+// MPS INTI flags.
+// All other bits are reserved and must be set to 0.
+//
+#define EFI_ACPI_4_0_POLARITY (3 << 0)
+#define EFI_ACPI_4_0_TRIGGER_MODE (3 << 2)
+
+///
+/// Non-Maskable Interrupt Source Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT32 GlobalSystemInterrupt;
+} EFI_ACPI_4_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
+
+///
+/// Local APIC NMI Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT16 Flags;
+ UINT8 LocalApicLint;
+} EFI_ACPI_4_0_LOCAL_APIC_NMI_STRUCTURE;
+
+///
+/// Local APIC Address Override Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved;
+ UINT64 LocalApicAddress;
+} EFI_ACPI_4_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
+
+///
+/// IO SAPIC Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 GlobalSystemInterruptBase;
+ UINT64 IoSapicAddress;
+} EFI_ACPI_4_0_IO_SAPIC_STRUCTURE;
+
+///
+/// Local SAPIC Structure
+/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT8 LocalSapicId;
+ UINT8 LocalSapicEid;
+ UINT8 Reserved[3];
+ UINT32 Flags;
+ UINT32 ACPIProcessorUIDValue;
+} EFI_ACPI_4_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
+
+///
+/// Platform Interrupt Sources Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT8 InterruptType;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT8 IoSapicVector;
+ UINT32 GlobalSystemInterrupt;
+ UINT32 PlatformInterruptSourceFlags;
+} EFI_ACPI_4_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
+
+///
+/// Platform Interrupt Source Flags.
+/// All other bits are reserved and must be set to 0.
+///
+#define EFI_ACPI_4_0_CPEI_PROCESSOR_OVERRIDE BIT0
+
+///
+/// Processor Local x2APIC Structure Definition
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Reserved[2];
+ UINT32 X2ApicId;
+ UINT32 Flags;
+ UINT32 AcpiProcessorUid;
+} EFI_ACPI_4_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE;
+
+///
+/// Local x2APIC NMI Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT32 AcpiProcessorUid;
+ UINT8 LocalX2ApicLint;
+ UINT8 Reserved[3];
+} EFI_ACPI_4_0_LOCAL_X2APIC_NMI_STRUCTURE;
+
+///
+/// Smart Battery Description Table (SBST)
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 WarningEnergyLevel;
+ UINT32 LowEnergyLevel;
+ UINT32 CriticalEnergyLevel;
+} EFI_ACPI_4_0_SMART_BATTERY_DESCRIPTION_TABLE;
+
+///
+/// SBST Version (as defined in ACPI 4.0 spec.)
+///
+#define EFI_ACPI_4_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
+
+///
+/// Embedded Controller Boot Resources Table (ECDT)
+/// The table is followed by a null terminated ASCII string that contains
+/// a fully qualified reference to the name space object.
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE EcControl;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE EcData;
+ UINT32 Uid;
+ UINT8 GpeBit;
+} EFI_ACPI_4_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
+
+///
+/// ECDT Version (as defined in ACPI 4.0 spec.)
+///
+#define EFI_ACPI_4_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01
+
+///
+/// System Resource Affinity Table (SRAT. The rest of the table
+/// must be defined in a platform specific manner.
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 Reserved1; ///< Must be set to 1
+ UINT64 Reserved2;
+} EFI_ACPI_4_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;
+
+///
+/// SRAT Version (as defined in ACPI 4.0 spec.)
+///
+#define EFI_ACPI_4_0_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03
+
+//
+// SRAT structure types.
+// All other values between 0x03 an 0xFF are reserved and
+// will be ignored by OSPM.
+//
+#define EFI_ACPI_4_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00
+#define EFI_ACPI_4_0_MEMORY_AFFINITY 0x01
+#define EFI_ACPI_4_0_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02
+
+///
+/// Processor Local APIC/SAPIC Affinity Structure Definition
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 ProximityDomain7To0;
+ UINT8 ApicId;
+ UINT32 Flags;
+ UINT8 LocalSapicEid;
+ UINT8 ProximityDomain31To8[3];
+ UINT32 ClockDomain;
+} EFI_ACPI_4_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;
+
+///
+/// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.
+///
+#define EFI_ACPI_4_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
+
+///
+/// Memory Affinity Structure Definition
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT32 ProximityDomain;
+ UINT16 Reserved1;
+ UINT32 AddressBaseLow;
+ UINT32 AddressBaseHigh;
+ UINT32 LengthLow;
+ UINT32 LengthHigh;
+ UINT32 Reserved2;
+ UINT32 Flags;
+ UINT64 Reserved3;
+} EFI_ACPI_4_0_MEMORY_AFFINITY_STRUCTURE;
+
+//
+// Memory Flags. All other bits are reserved and must be 0.
+//
+#define EFI_ACPI_4_0_MEMORY_ENABLED (1 << 0)
+#define EFI_ACPI_4_0_MEMORY_HOT_PLUGGABLE (1 << 1)
+#define EFI_ACPI_4_0_MEMORY_NONVOLATILE (1 << 2)
+
+///
+/// Processor Local x2APIC Affinity Structure Definition
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Reserved1[2];
+ UINT32 ProximityDomain;
+ UINT32 X2ApicId;
+ UINT32 Flags;
+ UINT32 ClockDomain;
+ UINT8 Reserved2[4];
+} EFI_ACPI_4_0_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;
+
+///
+/// System Locality Distance Information Table (SLIT).
+/// The rest of the table is a matrix.
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT64 NumberOfSystemLocalities;
+} EFI_ACPI_4_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;
+
+///
+/// SLIT Version (as defined in ACPI 4.0 spec.)
+///
+#define EFI_ACPI_4_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01
+
+///
+/// Corrected Platform Error Polling Table (CPEP)
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT8 Reserved[8];
+} EFI_ACPI_4_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;
+
+///
+/// CPEP Version (as defined in ACPI 4.0 spec.)
+///
+#define EFI_ACPI_4_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01
+
+//
+// CPEP processor structure types.
+//
+#define EFI_ACPI_4_0_CPEP_PROCESSOR_APIC_SAPIC 0x00
+
+///
+/// Corrected Platform Error Polling Processor Structure Definition
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT32 PollingInterval;
+} EFI_ACPI_4_0_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;
+
+///
+/// Maximum System Characteristics Table (MSCT)
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 OffsetProxDomInfo;
+ UINT32 MaximumNumberOfProximityDomains;
+ UINT32 MaximumNumberOfClockDomains;
+ UINT64 MaximumPhysicalAddress;
+} EFI_ACPI_4_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;
+
+///
+/// MSCT Version (as defined in ACPI 4.0 spec.)
+///
+#define EFI_ACPI_4_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01
+
+///
+/// Maximum Proximity Domain Information Structure Definition
+///
+typedef struct {
+ UINT8 Revision;
+ UINT8 Length;
+ UINT32 ProximityDomainRangeLow;
+ UINT32 ProximityDomainRangeHigh;
+ UINT32 MaximumProcessorCapacity;
+ UINT64 MaximumMemoryCapacity;
+} EFI_ACPI_4_0_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;
+
+///
+/// Boot Error Record Table (BERT)
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 BootErrorRegionLength;
+ UINT64 BootErrorRegion;
+} EFI_ACPI_4_0_BOOT_ERROR_RECORD_TABLE_HEADER;
+
+///
+/// BERT Version (as defined in ACPI 4.0 spec.)
+///
+#define EFI_ACPI_4_0_BOOT_ERROR_RECORD_TABLE_REVISION 0x01
+
+///
+/// Boot Error Region Block Status Definition
+///
+typedef struct {
+ UINT32 UncorrectableErrorValid:1;
+ UINT32 CorrectableErrorValid:1;
+ UINT32 MultipleUncorrectableErrors:1;
+ UINT32 MultipleCorrectableErrors:1;
+ UINT32 ErrorDataEntryCount:10;
+ UINT32 Reserved:18;
+} EFI_ACPI_4_0_ERROR_BLOCK_STATUS;
+
+///
+/// Boot Error Region Definition
+///
+typedef struct {
+ EFI_ACPI_4_0_ERROR_BLOCK_STATUS BlockStatus;
+ UINT32 RawDataOffset;
+ UINT32 RawDataLength;
+ UINT32 DataLength;
+ UINT32 ErrorSeverity;
+} EFI_ACPI_4_0_BOOT_ERROR_REGION_STRUCTURE;
+
+//
+// Boot Error Severity types
+//
+#define EFI_ACPI_4_0_ERROR_SEVERITY_CORRECTABLE 0x00
+#define EFI_ACPI_4_0_ERROR_SEVERITY_FATAL 0x01
+#define EFI_ACPI_4_0_ERROR_SEVERITY_CORRECTED 0x02
+#define EFI_ACPI_4_0_ERROR_SEVERITY_NONE 0x03
+
+///
+/// Generic Error Data Entry Definition
+///
+typedef struct {
+ UINT8 SectionType[16];
+ UINT32 ErrorSeverity;
+ UINT16 Revision;
+ UINT8 ValidationBits;
+ UINT8 Flags;
+ UINT32 ErrorDataLength;
+ UINT8 FruId[16];
+ UINT8 FruText[20];
+} EFI_ACPI_4_0_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;
+
+///
+/// Generic Error Data Entry Version (as defined in ACPI 4.0 spec.)
+///
+#define EFI_ACPI_4_0_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0201
+
+///
+/// HEST - Hardware Error Source Table
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 ErrorSourceCount;
+} EFI_ACPI_4_0_HARDWARE_ERROR_SOURCE_TABLE_HEADER;
+
+///
+/// HEST Version (as defined in ACPI 4.0 spec.)
+///
+#define EFI_ACPI_4_0_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01
+
+//
+// Error Source structure types.
+//
+#define EFI_ACPI_4_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00
+#define EFI_ACPI_4_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01
+#define EFI_ACPI_4_0_IA32_ARCHITECTURE_NMI_ERROR 0x02
+#define EFI_ACPI_4_0_PCI_EXPRESS_ROOT_PORT_AER 0x06
+#define EFI_ACPI_4_0_PCI_EXPRESS_DEVICE_AER 0x07
+#define EFI_ACPI_4_0_PCI_EXPRESS_BRIDGE_AER 0x08
+#define EFI_ACPI_4_0_GENERIC_HARDWARE_ERROR 0x09
+
+//
+// Error Source structure flags.
+//
+#define EFI_ACPI_4_0_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)
+#define EFI_ACPI_4_0_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)
+
+///
+/// IA-32 Architecture Machine Check Exception Structure Definition
+///
+typedef struct {
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT64 GlobalCapabilityInitData;
+ UINT64 GlobalControlInitData;
+ UINT8 NumberOfHardwareBanks;
+ UINT8 Reserved1[7];
+} EFI_ACPI_4_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;
+
+///
+/// IA-32 Architecture Machine Check Bank Structure Definition
+///
+typedef struct {
+ UINT8 BankNumber;
+ UINT8 ClearStatusOnInitialization;
+ UINT8 StatusDataFormat;
+ UINT8 Reserved0;
+ UINT32 ControlRegisterMsrAddress;
+ UINT64 ControlInitData;
+ UINT32 StatusRegisterMsrAddress;
+ UINT32 AddressRegisterMsrAddress;
+ UINT32 MiscRegisterMsrAddress;
+} EFI_ACPI_4_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;
+
+///
+/// IA-32 Architecture Machine Check Bank Structure MCA data format
+///
+#define EFI_ACPI_4_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00
+#define EFI_ACPI_4_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01
+#define EFI_ACPI_4_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02
+
+//
+// Hardware Error Notification types. All other values are reserved
+//
+#define EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00
+#define EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01
+#define EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02
+#define EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_SCI 0x03
+#define EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_NMI 0x04
+
+///
+/// Hardware Error Notification Configuration Write Enable Structure Definition
+///
+typedef struct {
+ UINT16 Type:1;
+ UINT16 PollInterval:1;
+ UINT16 SwitchToPollingThresholdValue:1;
+ UINT16 SwitchToPollingThresholdWindow:1;
+ UINT16 ErrorThresholdValue:1;
+ UINT16 ErrorThresholdWindow:1;
+ UINT16 Reserved:10;
+} EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;
+
+///
+/// Hardware Error Notification Structure Definition
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;
+ UINT32 PollInterval;
+ UINT32 Vector;
+ UINT32 SwitchToPollingThresholdValue;
+ UINT32 SwitchToPollingThresholdWindow;
+ UINT32 ErrorThresholdValue;
+ UINT32 ErrorThresholdWindow;
+} EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;
+
+///
+/// IA-32 Architecture Corrected Machine Check Structure Definition
+///
+typedef struct {
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
+ UINT8 NumberOfHardwareBanks;
+ UINT8 Reserved1[3];
+} EFI_ACPI_4_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;
+
+///
+/// IA-32 Architecture NMI Error Structure Definition
+///
+typedef struct {
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 MaxRawDataLength;
+} EFI_ACPI_4_0_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;
+
+///
+/// PCI Express Root Port AER Structure Definition
+///
+typedef struct {
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 Bus;
+ UINT16 Device;
+ UINT16 Function;
+ UINT16 DeviceControl;
+ UINT8 Reserved1[2];
+ UINT32 UncorrectableErrorMask;
+ UINT32 UncorrectableErrorSeverity;
+ UINT32 CorrectableErrorMask;
+ UINT32 AdvancedErrorCapabilitiesAndControl;
+ UINT32 RootErrorCommand;
+} EFI_ACPI_4_0_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;
+
+///
+/// PCI Express Device AER Structure Definition
+///
+typedef struct {
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 Bus;
+ UINT16 Device;
+ UINT16 Function;
+ UINT16 DeviceControl;
+ UINT8 Reserved1[2];
+ UINT32 UncorrectableErrorMask;
+ UINT32 UncorrectableErrorSeverity;
+ UINT32 CorrectableErrorMask;
+ UINT32 AdvancedErrorCapabilitiesAndControl;
+} EFI_ACPI_4_0_PCI_EXPRESS_DEVICE_AER_STRUCTURE;
+
+///
+/// PCI Express Bridge AER Structure Definition
+///
+typedef struct {
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 Bus;
+ UINT16 Device;
+ UINT16 Function;
+ UINT16 DeviceControl;
+ UINT8 Reserved1[2];
+ UINT32 UncorrectableErrorMask;
+ UINT32 UncorrectableErrorSeverity;
+ UINT32 CorrectableErrorMask;
+ UINT32 AdvancedErrorCapabilitiesAndControl;
+ UINT32 SecondaryUncorrectableErrorMask;
+ UINT32 SecondaryUncorrectableErrorSeverity;
+ UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;
+} EFI_ACPI_4_0_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;
+
+///
+/// Generic Hardware Error Source Structure Definition
+///
+typedef struct {
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT16 RelatedSourceId;
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 MaxRawDataLength;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;
+ EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
+ UINT32 ErrorStatusBlockLength;
+} EFI_ACPI_4_0_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;
+
+///
+/// Generic Error Status Definition
+///
+typedef struct {
+ EFI_ACPI_4_0_ERROR_BLOCK_STATUS BlockStatus;
+ UINT32 RawDataOffset;
+ UINT32 RawDataLength;
+ UINT32 DataLength;
+ UINT32 ErrorSeverity;
+} EFI_ACPI_4_0_GENERIC_ERROR_STATUS_STRUCTURE;
+
+///
+/// ERST - Error Record Serialization Table
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 SerializationHeaderSize;
+ UINT8 Reserved0[4];
+ UINT32 InstructionEntryCount;
+} EFI_ACPI_4_0_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;
+
+///
+/// ERST Version (as defined in ACPI 4.0 spec.)
+///
+#define EFI_ACPI_4_0_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01
+
+///
+/// ERST Serialization Actions
+///
+#define EFI_ACPI_4_0_ERST_BEGIN_WRITE_OPERATION 0x00
+#define EFI_ACPI_4_0_ERST_BEGIN_READ_OPERATION 0x01
+#define EFI_ACPI_4_0_ERST_BEGIN_CLEAR_OPERATION 0x02
+#define EFI_ACPI_4_0_ERST_END_OPERATION 0x03
+#define EFI_ACPI_4_0_ERST_SET_RECORD_OFFSET 0x04
+#define EFI_ACPI_4_0_ERST_EXECUTE_OPERATION 0x05
+#define EFI_ACPI_4_0_ERST_CHECK_BUSY_STATUS 0x06
+#define EFI_ACPI_4_0_ERST_GET_COMMAND_STATUS 0x07
+#define EFI_ACPI_4_0_ERST_GET_RECORD_IDENTIFIER 0x08
+#define EFI_ACPI_4_0_ERST_SET_RECORD_IDENTIFIER 0x09
+#define EFI_ACPI_4_0_ERST_GET_RECORD_COUNT 0x0A
+#define EFI_ACPI_4_0_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B
+#define EFI_ACPI_4_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D
+#define EFI_ACPI_4_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E
+#define EFI_ACPI_4_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F
+
+///
+/// ERST Action Command Status
+///
+#define EFI_ACPI_4_0_EINJ_STATUS_SUCCESS 0x00
+#define EFI_ACPI_4_0_EINJ_STATUS_NOT_ENOUGH_SPACE 0x01
+#define EFI_ACPI_4_0_EINJ_STATUS_HARDWARE_NOT_AVAILABLE 0x02
+#define EFI_ACPI_4_0_EINJ_STATUS_FAILED 0x03
+#define EFI_ACPI_4_0_EINJ_STATUS_RECORD_STORE_EMPTY 0x04
+#define EFI_ACPI_4_0_EINJ_STATUS_RECORD_NOT_FOUND 0x05
+
+///
+/// ERST Serialization Instructions
+///
+#define EFI_ACPI_4_0_ERST_READ_REGISTER 0x00
+#define EFI_ACPI_4_0_ERST_READ_REGISTER_VALUE 0x01
+#define EFI_ACPI_4_0_ERST_WRITE_REGISTER 0x02
+#define EFI_ACPI_4_0_ERST_WRITE_REGISTER_VALUE 0x03
+#define EFI_ACPI_4_0_ERST_NOOP 0x04
+#define EFI_ACPI_4_0_ERST_LOAD_VAR1 0x05
+#define EFI_ACPI_4_0_ERST_LOAD_VAR2 0x06
+#define EFI_ACPI_4_0_ERST_STORE_VAR1 0x07
+#define EFI_ACPI_4_0_ERST_ADD 0x08
+#define EFI_ACPI_4_0_ERST_SUBTRACT 0x09
+#define EFI_ACPI_4_0_ERST_ADD_VALUE 0x0A
+#define EFI_ACPI_4_0_ERST_SUBTRACT_VALUE 0x0B
+#define EFI_ACPI_4_0_ERST_STALL 0x0C
+#define EFI_ACPI_4_0_ERST_STALL_WHILE_TRUE 0x0D
+#define EFI_ACPI_4_0_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E
+#define EFI_ACPI_4_0_ERST_GOTO 0x0F
+#define EFI_ACPI_4_0_ERST_SET_SRC_ADDRESS_BASE 0x10
+#define EFI_ACPI_4_0_ERST_SET_DST_ADDRESS_BASE 0x11
+#define EFI_ACPI_4_0_ERST_MOVE_DATA 0x12
+
+///
+/// ERST Instruction Flags
+///
+#define EFI_ACPI_4_0_ERST_PRESERVE_REGISTER 0x01
+
+///
+/// ERST Serialization Instruction Entry
+///
+typedef struct {
+ UINT8 SerializationAction;
+ UINT8 Instruction;
+ UINT8 Flags;
+ UINT8 Reserved0;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
+ UINT64 Value;
+ UINT64 Mask;
+} EFI_ACPI_4_0_ERST_SERIALIZATION_INSTRUCTION_ENTRY;
+
+///
+/// EINJ - Error Injection Table
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 InjectionHeaderSize;
+ UINT8 InjectionFlags;
+ UINT8 Reserved0[3];
+ UINT32 InjectionEntryCount;
+} EFI_ACPI_4_0_ERROR_INJECTION_TABLE_HEADER;
+
+///
+/// EINJ Version (as defined in ACPI 4.0 spec.)
+///
+#define EFI_ACPI_4_0_ERROR_INJECTION_TABLE_REVISION 0x01
+
+///
+/// EINJ Error Injection Actions
+///
+#define EFI_ACPI_4_0_EINJ_BEGIN_INJECTION_OPERATION 0x00
+#define EFI_ACPI_4_0_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01
+#define EFI_ACPI_4_0_EINJ_SET_ERROR_TYPE 0x02
+#define EFI_ACPI_4_0_EINJ_GET_ERROR_TYPE 0x03
+#define EFI_ACPI_4_0_EINJ_END_OPERATION 0x04
+#define EFI_ACPI_4_0_EINJ_EXECUTE_OPERATION 0x05
+#define EFI_ACPI_4_0_EINJ_CHECK_BUSY_STATUS 0x06
+#define EFI_ACPI_4_0_EINJ_GET_COMMAND_STATUS 0x07
+#define EFI_ACPI_4_0_EINJ_TRIGGER_ERROR 0xFF
+
+///
+/// EINJ Action Command Status
+///
+#define EFI_ACPI_4_0_EINJ_STATUS_SUCCESS 0x00
+#define EFI_ACPI_4_0_EINJ_STATUS_UNKNOWN_FAILURE 0x01
+#define EFI_ACPI_4_0_EINJ_STATUS_INVALID_ACCESS 0x02
+
+///
+/// EINJ Error Type Definition
+///
+#define EFI_ACPI_4_0_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)
+#define EFI_ACPI_4_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)
+#define EFI_ACPI_4_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)
+#define EFI_ACPI_4_0_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)
+#define EFI_ACPI_4_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)
+#define EFI_ACPI_4_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)
+#define EFI_ACPI_4_0_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)
+#define EFI_ACPI_4_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)
+#define EFI_ACPI_4_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)
+#define EFI_ACPI_4_0_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)
+#define EFI_ACPI_4_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)
+#define EFI_ACPI_4_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)
+
+///
+/// EINJ Injection Instructions
+///
+#define EFI_ACPI_4_0_EINJ_READ_REGISTER 0x00
+#define EFI_ACPI_4_0_EINJ_READ_REGISTER_VALUE 0x01
+#define EFI_ACPI_4_0_EINJ_WRITE_REGISTER 0x02
+#define EFI_ACPI_4_0_EINJ_WRITE_REGISTER_VALUE 0x03
+#define EFI_ACPI_4_0_EINJ_NOOP 0x04
+
+///
+/// EINJ Instruction Flags
+///
+#define EFI_ACPI_4_0_EINJ_PRESERVE_REGISTER 0x01
+
+///
+/// EINJ Injection Instruction Entry
+///
+typedef struct {
+ UINT8 InjectionAction;
+ UINT8 Instruction;
+ UINT8 Flags;
+ UINT8 Reserved0;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
+ UINT64 Value;
+ UINT64 Mask;
+} EFI_ACPI_4_0_EINJ_INJECTION_INSTRUCTION_ENTRY;
+
+///
+/// EINJ Trigger Action Table
+///
+typedef struct {
+ UINT32 HeaderSize;
+ UINT32 Revision;
+ UINT32 TableSize;
+ UINT32 EntryCount;
+} EFI_ACPI_4_0_EINJ_TRIGGER_ACTION_TABLE;
+
+//
+// Known table signatures
+//
+
+///
+/// "RSD PTR " Root System Description Pointer
+///
+#define EFI_ACPI_4_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')
+
+///
+/// "APIC" Multiple APIC Description Table
+///
+#define EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')
+
+///
+/// "BERT" Boot Error Record Table
+///
+#define EFI_ACPI_4_0_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T')
+
+///
+/// "CPEP" Corrected Platform Error Polling Table
+///
+#define EFI_ACPI_4_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')
+
+///
+/// "DSDT" Differentiated System Description Table
+///
+#define EFI_ACPI_4_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')
+
+///
+/// "ECDT" Embedded Controller Boot Resources Table
+///
+#define EFI_ACPI_4_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')
+
+///
+/// "EINJ" Error Injection Table
+///
+#define EFI_ACPI_4_0_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J')
+
+///
+/// "ERST" Error Record Serialization Table
+///
+#define EFI_ACPI_4_0_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T')
+
+///
+/// "FACP" Fixed ACPI Description Table
+///
+#define EFI_ACPI_4_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')
+
+///
+/// "FACS" Firmware ACPI Control Structure
+///
+#define EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')
+
+///
+/// "HEST" Hardware Error Source Table
+///
+#define EFI_ACPI_4_0_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T')
+
+///
+/// "MSCT" Maximum System Characteristics Table
+///
+#define EFI_ACPI_4_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T')
+
+///
+/// "PSDT" Persistent System Description Table
+///
+#define EFI_ACPI_4_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')
+
+///
+/// "RSDT" Root System Description Table
+///
+#define EFI_ACPI_4_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')
+
+///
+/// "SBST" Smart Battery Specification Table
+///
+#define EFI_ACPI_4_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')
+
+///
+/// "SLIT" System Locality Information Table
+///
+#define EFI_ACPI_4_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')
+
+///
+/// "SRAT" System Resource Affinity Table
+///
+#define EFI_ACPI_4_0_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')
+
+///
+/// "SSDT" Secondary System Description Table
+///
+#define EFI_ACPI_4_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')
+
+///
+/// "XSDT" Extended System Description Table
+///
+#define EFI_ACPI_4_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')
+
+///
+/// "BOOT" MS Simple Boot Spec
+///
+#define EFI_ACPI_4_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')
+
+///
+/// "DBGP" MS Debug Port Spec
+///
+#define EFI_ACPI_4_0_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')
+
+///
+/// "DMAR" DMA Remapping Table
+///
+#define EFI_ACPI_4_0_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R')
+
+///
+/// "ETDT" Event Timer Description Table
+///
+#define EFI_ACPI_4_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')
+
+///
+/// "HPET" IA-PC High Precision Event Timer Table
+///
+#define EFI_ACPI_4_0_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T')
+
+///
+/// "iBFT" iSCSI Boot Firmware Table
+///
+#define EFI_ACPI_4_0_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T')
+
+///
+/// "IVRS" I/O Virtualization Reporting Structure
+///
+#define EFI_ACPI_4_0_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S')
+
+///
+/// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table
+///
+#define EFI_ACPI_4_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')
+
+///
+/// "MCHI" Management Controller Host Interface Table
+///
+#define EFI_ACPI_4_0_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')
+
+///
+/// "SPCR" Serial Port Concole Redirection Table
+///
+#define EFI_ACPI_4_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')
+
+///
+/// "SPMI" Server Platform Management Interface Table
+///
+#define EFI_ACPI_4_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')
+
+///
+/// "TCPA" Trusted Computing Platform Alliance Capabilities Table
+///
+#define EFI_ACPI_4_0_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')
+
+///
+/// "UEFI" UEFI ACPI Data Table
+///
+#define EFI_ACPI_4_0_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I')
+
+///
+/// "WAET" Windows ACPI Enlightenment Table
+///
+#define EFI_ACPI_4_0_WINDOWS_ACPI_ENLIGHTENMENT_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')
+
+///
+/// "WDAT" Watchdog Action Table
+///
+#define EFI_ACPI_4_0_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T')
+
+///
+/// "WDRT" Watchdog Resource Table
+///
+#define EFI_ACPI_4_0_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T')
+
+#pragma pack()
+
+#endif
diff --git a/MdePkg/Include/IndustryStandard/Acpi50.h b/MdePkg/Include/IndustryStandard/Acpi50.h
new file mode 100644
index 000000000000..a371c9ade1b1
--- /dev/null
+++ b/MdePkg/Include/IndustryStandard/Acpi50.h
@@ -0,0 +1,2119 @@
+/** @file
+ ACPI 5.0 definitions from the ACPI Specification Revision 5.0a November 13, 2013.
+
+ Copyright (c) 2014 Hewlett-Packard Development Company, L.P.<BR>
+ Copyright (c) 2011 - 2014, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
+
+#ifndef _ACPI_5_0_H_
+#define _ACPI_5_0_H_
+
+#include <IndustryStandard/Acpi40.h>
+
+//
+// Define for Desriptor
+//
+#define ACPI_SMALL_FIXED_DMA_DESCRIPTOR_NAME 0x0A
+#define ACPI_LARGE_GPIO_CONNECTION_DESCRIPTOR_NAME 0x0C
+#define ACPI_LARGE_GENERIC_SERIAL_BUS_CONNECTION_DESCRIPTOR_NAME 0x0E
+
+#define ACPI_FIXED_DMA_DESCRIPTOR 0x55
+#define ACPI_GPIO_CONNECTION_DESCRIPTOR 0x8C
+#define ACPI_GENERIC_SERIAL_BUS_CONNECTION_DESCRIPTOR 0x8E
+
+#pragma pack(1)
+
+///
+/// Generic DMA Descriptor.
+///
+typedef PACKED struct {
+ ACPI_SMALL_RESOURCE_HEADER Header;
+ UINT16 DmaRequestLine;
+ UINT16 DmaChannel;
+ UINT8 DmaTransferWidth;
+} EFI_ACPI_FIXED_DMA_DESCRIPTOR;
+
+///
+/// GPIO Connection Descriptor
+///
+typedef PACKED struct {
+ ACPI_LARGE_RESOURCE_HEADER Header;
+ UINT8 RevisionId;
+ UINT8 ConnectionType;
+ UINT16 GeneralFlags;
+ UINT16 InterruptFlags;
+ UINT8 PinConfiguration;
+ UINT16 OutputDriveStrength;
+ UINT16 DebounceTimeout;
+ UINT16 PinTableOffset;
+ UINT8 ResourceSourceIndex;
+ UINT16 ResourceSourceNameOffset;
+ UINT16 VendorDataOffset;
+ UINT16 VendorDataLength;
+} EFI_ACPI_GPIO_CONNECTION_DESCRIPTOR;
+
+#define EFI_ACPI_GPIO_CONNECTION_TYPE_INTERRUPT 0x0
+#define EFI_ACPI_GPIO_CONNECTION_TYPE_IO 0x1
+
+///
+/// Serial Bus Resource Descriptor (Generic)
+///
+typedef PACKED struct {
+ ACPI_LARGE_RESOURCE_HEADER Header;
+ UINT8 RevisionId;
+ UINT8 ResourceSourceIndex;
+ UINT8 SerialBusType;
+ UINT8 GeneralFlags;
+ UINT16 TypeSpecificFlags;
+ UINT8 TypeSpecificRevisionId;
+ UINT16 TypeDataLength;
+// Type specific data
+} EFI_ACPI_SERIAL_BUS_RESOURCE_DESCRIPTOR;
+
+#define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_I2C 0x1
+#define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_SPI 0x2
+#define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_UART 0x3
+
+///
+/// Serial Bus Resource Descriptor (I2C)
+///
+typedef PACKED struct {
+ ACPI_LARGE_RESOURCE_HEADER Header;
+ UINT8 RevisionId;
+ UINT8 ResourceSourceIndex;
+ UINT8 SerialBusType;
+ UINT8 GeneralFlags;
+ UINT16 TypeSpecificFlags;
+ UINT8 TypeSpecificRevisionId;
+ UINT16 TypeDataLength;
+ UINT32 ConnectionSpeed;
+ UINT16 SlaveAddress;
+} EFI_ACPI_SERIAL_BUS_RESOURCE_I2C_DESCRIPTOR;
+
+///
+/// Serial Bus Resource Descriptor (SPI)
+///
+typedef PACKED struct {
+ ACPI_LARGE_RESOURCE_HEADER Header;
+ UINT8 RevisionId;
+ UINT8 ResourceSourceIndex;
+ UINT8 SerialBusType;
+ UINT8 GeneralFlags;
+ UINT16 TypeSpecificFlags;
+ UINT8 TypeSpecificRevisionId;
+ UINT16 TypeDataLength;
+ UINT32 ConnectionSpeed;
+ UINT8 DataBitLength;
+ UINT8 Phase;
+ UINT8 Polarity;
+ UINT16 DeviceSelection;
+} EFI_ACPI_SERIAL_BUS_RESOURCE_SPI_DESCRIPTOR;
+
+///
+/// Serial Bus Resource Descriptor (UART)
+///
+typedef PACKED struct {
+ ACPI_LARGE_RESOURCE_HEADER Header;
+ UINT8 RevisionId;
+ UINT8 ResourceSourceIndex;
+ UINT8 SerialBusType;
+ UINT8 GeneralFlags;
+ UINT16 TypeSpecificFlags;
+ UINT8 TypeSpecificRevisionId;
+ UINT16 TypeDataLength;
+ UINT32 DefaultBaudRate;
+ UINT16 RxFIFO;
+ UINT16 TxFIFO;
+ UINT8 Parity;
+ UINT8 SerialLinesEnabled;
+} EFI_ACPI_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR;
+
+#pragma pack()
+
+//
+// Ensure proper structure formats
+//
+#pragma pack(1)
+
+///
+/// ACPI 5.0 Generic Address Space definition
+///
+typedef struct {
+ UINT8 AddressSpaceId;
+ UINT8 RegisterBitWidth;
+ UINT8 RegisterBitOffset;
+ UINT8 AccessSize;
+ UINT64 Address;
+} EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE;
+
+//
+// Generic Address Space Address IDs
+//
+#define EFI_ACPI_5_0_SYSTEM_MEMORY 0
+#define EFI_ACPI_5_0_SYSTEM_IO 1
+#define EFI_ACPI_5_0_PCI_CONFIGURATION_SPACE 2
+#define EFI_ACPI_5_0_EMBEDDED_CONTROLLER 3
+#define EFI_ACPI_5_0_SMBUS 4
+#define EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL 0x0A
+#define EFI_ACPI_5_0_FUNCTIONAL_FIXED_HARDWARE 0x7F
+
+//
+// Generic Address Space Access Sizes
+//
+#define EFI_ACPI_5_0_UNDEFINED 0
+#define EFI_ACPI_5_0_BYTE 1
+#define EFI_ACPI_5_0_WORD 2
+#define EFI_ACPI_5_0_DWORD 3
+#define EFI_ACPI_5_0_QWORD 4
+
+//
+// ACPI 5.0 table structures
+//
+
+///
+/// Root System Description Pointer Structure
+///
+typedef struct {
+ UINT64 Signature;
+ UINT8 Checksum;
+ UINT8 OemId[6];
+ UINT8 Revision;
+ UINT32 RsdtAddress;
+ UINT32 Length;
+ UINT64 XsdtAddress;
+ UINT8 ExtendedChecksum;
+ UINT8 Reserved[3];
+} EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER;
+
+///
+/// RSD_PTR Revision (as defined in ACPI 5.0 spec.)
+///
+#define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 5.0) says current value is 2
+
+///
+/// Common table header, this prefaces all ACPI tables, including FACS, but
+/// excluding the RSD PTR structure
+///
+typedef struct {
+ UINT32 Signature;
+ UINT32 Length;
+} EFI_ACPI_5_0_COMMON_HEADER;
+
+//
+// Root System Description Table
+// No definition needed as it is a common description table header, the same with
+// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.
+//
+
+///
+/// RSDT Revision (as defined in ACPI 5.0 spec.)
+///
+#define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+
+//
+// Extended System Description Table
+// No definition needed as it is a common description table header, the same with
+// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.
+//
+
+///
+/// XSDT Revision (as defined in ACPI 5.0 spec.)
+///
+#define EFI_ACPI_5_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+
+///
+/// Fixed ACPI Description Table Structure (FADT)
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 FirmwareCtrl;
+ UINT32 Dsdt;
+ UINT8 Reserved0;
+ UINT8 PreferredPmProfile;
+ UINT16 SciInt;
+ UINT32 SmiCmd;
+ UINT8 AcpiEnable;
+ UINT8 AcpiDisable;
+ UINT8 S4BiosReq;
+ UINT8 PstateCnt;
+ UINT32 Pm1aEvtBlk;
+ UINT32 Pm1bEvtBlk;
+ UINT32 Pm1aCntBlk;
+ UINT32 Pm1bCntBlk;
+ UINT32 Pm2CntBlk;
+ UINT32 PmTmrBlk;
+ UINT32 Gpe0Blk;
+ UINT32 Gpe1Blk;
+ UINT8 Pm1EvtLen;
+ UINT8 Pm1CntLen;
+ UINT8 Pm2CntLen;
+ UINT8 PmTmrLen;
+ UINT8 Gpe0BlkLen;
+ UINT8 Gpe1BlkLen;
+ UINT8 Gpe1Base;
+ UINT8 CstCnt;
+ UINT16 PLvl2Lat;
+ UINT16 PLvl3Lat;
+ UINT16 FlushSize;
+ UINT16 FlushStride;
+ UINT8 DutyOffset;
+ UINT8 DutyWidth;
+ UINT8 DayAlrm;
+ UINT8 MonAlrm;
+ UINT8 Century;
+ UINT16 IaPcBootArch;
+ UINT8 Reserved1;
+ UINT32 Flags;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE ResetReg;
+ UINT8 ResetValue;
+ UINT8 Reserved2[3];
+ UINT64 XFirmwareCtrl;
+ UINT64 XDsdt;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepControlReg;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;
+} EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE;
+
+///
+/// FADT Version (as defined in ACPI 5.0 spec.)
+///
+#define EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x05
+
+//
+// Fixed ACPI Description Table Preferred Power Management Profile
+//
+#define EFI_ACPI_5_0_PM_PROFILE_UNSPECIFIED 0
+#define EFI_ACPI_5_0_PM_PROFILE_DESKTOP 1
+#define EFI_ACPI_5_0_PM_PROFILE_MOBILE 2
+#define EFI_ACPI_5_0_PM_PROFILE_WORKSTATION 3
+#define EFI_ACPI_5_0_PM_PROFILE_ENTERPRISE_SERVER 4
+#define EFI_ACPI_5_0_PM_PROFILE_SOHO_SERVER 5
+#define EFI_ACPI_5_0_PM_PROFILE_APPLIANCE_PC 6
+#define EFI_ACPI_5_0_PM_PROFILE_PERFORMANCE_SERVER 7
+#define EFI_ACPI_5_0_PM_PROFILE_TABLET 8
+
+//
+// Fixed ACPI Description Table Boot Architecture Flags
+// All other bits are reserved and must be set to 0.
+//
+#define EFI_ACPI_5_0_LEGACY_DEVICES BIT0
+#define EFI_ACPI_5_0_8042 BIT1
+#define EFI_ACPI_5_0_VGA_NOT_PRESENT BIT2
+#define EFI_ACPI_5_0_MSI_NOT_SUPPORTED BIT3
+#define EFI_ACPI_5_0_PCIE_ASPM_CONTROLS BIT4
+#define EFI_ACPI_5_0_CMOS_RTC_NOT_PRESENT BIT5
+
+//
+// Fixed ACPI Description Table Fixed Feature Flags
+// All other bits are reserved and must be set to 0.
+//
+#define EFI_ACPI_5_0_WBINVD BIT0
+#define EFI_ACPI_5_0_WBINVD_FLUSH BIT1
+#define EFI_ACPI_5_0_PROC_C1 BIT2
+#define EFI_ACPI_5_0_P_LVL2_UP BIT3
+#define EFI_ACPI_5_0_PWR_BUTTON BIT4
+#define EFI_ACPI_5_0_SLP_BUTTON BIT5
+#define EFI_ACPI_5_0_FIX_RTC BIT6
+#define EFI_ACPI_5_0_RTC_S4 BIT7
+#define EFI_ACPI_5_0_TMR_VAL_EXT BIT8
+#define EFI_ACPI_5_0_DCK_CAP BIT9
+#define EFI_ACPI_5_0_RESET_REG_SUP BIT10
+#define EFI_ACPI_5_0_SEALED_CASE BIT11
+#define EFI_ACPI_5_0_HEADLESS BIT12
+#define EFI_ACPI_5_0_CPU_SW_SLP BIT13
+#define EFI_ACPI_5_0_PCI_EXP_WAK BIT14
+#define EFI_ACPI_5_0_USE_PLATFORM_CLOCK BIT15
+#define EFI_ACPI_5_0_S4_RTC_STS_VALID BIT16
+#define EFI_ACPI_5_0_REMOTE_POWER_ON_CAPABLE BIT17
+#define EFI_ACPI_5_0_FORCE_APIC_CLUSTER_MODEL BIT18
+#define EFI_ACPI_5_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
+#define EFI_ACPI_5_0_HW_REDUCED_ACPI BIT20
+#define EFI_ACPI_5_0_LOW_POWER_S0_IDLE_CAPABLE BIT21
+
+///
+/// Firmware ACPI Control Structure
+///
+typedef struct {
+ UINT32 Signature;
+ UINT32 Length;
+ UINT32 HardwareSignature;
+ UINT32 FirmwareWakingVector;
+ UINT32 GlobalLock;
+ UINT32 Flags;
+ UINT64 XFirmwareWakingVector;
+ UINT8 Version;
+ UINT8 Reserved0[3];
+ UINT32 OspmFlags;
+ UINT8 Reserved1[24];
+} EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;
+
+///
+/// FACS Version (as defined in ACPI 5.0 spec.)
+///
+#define EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02
+
+///
+/// Firmware Control Structure Feature Flags
+/// All other bits are reserved and must be set to 0.
+///
+#define EFI_ACPI_5_0_S4BIOS_F BIT0
+#define EFI_ACPI_5_0_64BIT_WAKE_SUPPORTED_F BIT1
+
+///
+/// OSPM Enabled Firmware Control Structure Flags
+/// All other bits are reserved and must be set to 0.
+///
+#define EFI_ACPI_5_0_OSPM_64BIT_WAKE_F BIT0
+
+//
+// Differentiated System Description Table,
+// Secondary System Description Table
+// and Persistent System Description Table,
+// no definition needed as they are common description table header, the same with
+// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.
+//
+#define EFI_ACPI_5_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
+#define EFI_ACPI_5_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
+
+///
+/// Multiple APIC Description Table header definition. The rest of the table
+/// must be defined in a platform specific manner.
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 LocalApicAddress;
+ UINT32 Flags;
+} EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
+
+///
+/// MADT Revision (as defined in ACPI 5.0 spec.)
+///
+#define EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03
+
+///
+/// Multiple APIC Flags
+/// All other bits are reserved and must be set to 0.
+///
+#define EFI_ACPI_5_0_PCAT_COMPAT BIT0
+
+//
+// Multiple APIC Description Table APIC structure types
+// All other values between 0x0D and 0x7F are reserved and
+// will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.
+//
+#define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC 0x00
+#define EFI_ACPI_5_0_IO_APIC 0x01
+#define EFI_ACPI_5_0_INTERRUPT_SOURCE_OVERRIDE 0x02
+#define EFI_ACPI_5_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03
+#define EFI_ACPI_5_0_LOCAL_APIC_NMI 0x04
+#define EFI_ACPI_5_0_LOCAL_APIC_ADDRESS_OVERRIDE 0x05
+#define EFI_ACPI_5_0_IO_SAPIC 0x06
+#define EFI_ACPI_5_0_LOCAL_SAPIC 0x07
+#define EFI_ACPI_5_0_PLATFORM_INTERRUPT_SOURCES 0x08
+#define EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC 0x09
+#define EFI_ACPI_5_0_LOCAL_X2APIC_NMI 0x0A
+#define EFI_ACPI_5_0_GIC 0x0B
+#define EFI_ACPI_5_0_GICD 0x0C
+
+//
+// APIC Structure Definitions
+//
+
+///
+/// Processor Local APIC Structure Definition
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT8 ApicId;
+ UINT32 Flags;
+} EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_STRUCTURE;
+
+///
+/// Local APIC Flags. All other bits are reserved and must be 0.
+///
+#define EFI_ACPI_5_0_LOCAL_APIC_ENABLED BIT0
+
+///
+/// IO APIC Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 IoApicAddress;
+ UINT32 GlobalSystemInterruptBase;
+} EFI_ACPI_5_0_IO_APIC_STRUCTURE;
+
+///
+/// Interrupt Source Override Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Bus;
+ UINT8 Source;
+ UINT32 GlobalSystemInterrupt;
+ UINT16 Flags;
+} EFI_ACPI_5_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
+
+///
+/// Platform Interrupt Sources Structure Definition
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT8 InterruptType;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT8 IoSapicVector;
+ UINT32 GlobalSystemInterrupt;
+ UINT32 PlatformInterruptSourceFlags;
+ UINT8 CpeiProcessorOverride;
+ UINT8 Reserved[31];
+} EFI_ACPI_5_0_PLATFORM_INTERRUPT_APIC_STRUCTURE;
+
+//
+// MPS INTI flags.
+// All other bits are reserved and must be set to 0.
+//
+#define EFI_ACPI_5_0_POLARITY (3 << 0)
+#define EFI_ACPI_5_0_TRIGGER_MODE (3 << 2)
+
+///
+/// Non-Maskable Interrupt Source Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT32 GlobalSystemInterrupt;
+} EFI_ACPI_5_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
+
+///
+/// Local APIC NMI Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT16 Flags;
+ UINT8 LocalApicLint;
+} EFI_ACPI_5_0_LOCAL_APIC_NMI_STRUCTURE;
+
+///
+/// Local APIC Address Override Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved;
+ UINT64 LocalApicAddress;
+} EFI_ACPI_5_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
+
+///
+/// IO SAPIC Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 GlobalSystemInterruptBase;
+ UINT64 IoSapicAddress;
+} EFI_ACPI_5_0_IO_SAPIC_STRUCTURE;
+
+///
+/// Local SAPIC Structure
+/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT8 LocalSapicId;
+ UINT8 LocalSapicEid;
+ UINT8 Reserved[3];
+ UINT32 Flags;
+ UINT32 ACPIProcessorUIDValue;
+} EFI_ACPI_5_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
+
+///
+/// Platform Interrupt Sources Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT8 InterruptType;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT8 IoSapicVector;
+ UINT32 GlobalSystemInterrupt;
+ UINT32 PlatformInterruptSourceFlags;
+} EFI_ACPI_5_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
+
+///
+/// Platform Interrupt Source Flags.
+/// All other bits are reserved and must be set to 0.
+///
+#define EFI_ACPI_5_0_CPEI_PROCESSOR_OVERRIDE BIT0
+
+///
+/// Processor Local x2APIC Structure Definition
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Reserved[2];
+ UINT32 X2ApicId;
+ UINT32 Flags;
+ UINT32 AcpiProcessorUid;
+} EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE;
+
+///
+/// Local x2APIC NMI Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT32 AcpiProcessorUid;
+ UINT8 LocalX2ApicLint;
+ UINT8 Reserved[3];
+} EFI_ACPI_5_0_LOCAL_X2APIC_NMI_STRUCTURE;
+
+///
+/// GIC Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved;
+ UINT32 GicId;
+ UINT32 AcpiProcessorUid;
+ UINT32 Flags;
+ UINT32 ParkingProtocolVersion;
+ UINT32 PerformanceInterruptGsiv;
+ UINT64 ParkedAddress;
+ UINT64 PhysicalBaseAddress;
+} EFI_ACPI_5_0_GIC_STRUCTURE;
+
+///
+/// GIC Flags. All other bits are reserved and must be 0.
+///
+#define EFI_ACPI_5_0_GIC_ENABLED BIT0
+#define EFI_ACPI_5_0_PERFORMANCE_INTERRUPT_MODEL BIT1
+
+///
+/// GIC Distributor Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved1;
+ UINT32 GicId;
+ UINT64 PhysicalBaseAddress;
+ UINT32 SystemVectorBase;
+ UINT32 Reserved2;
+} EFI_ACPI_5_0_GIC_DISTRIBUTOR_STRUCTURE;
+
+///
+/// Smart Battery Description Table (SBST)
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 WarningEnergyLevel;
+ UINT32 LowEnergyLevel;
+ UINT32 CriticalEnergyLevel;
+} EFI_ACPI_5_0_SMART_BATTERY_DESCRIPTION_TABLE;
+
+///
+/// SBST Version (as defined in ACPI 5.0 spec.)
+///
+#define EFI_ACPI_5_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
+
+///
+/// Embedded Controller Boot Resources Table (ECDT)
+/// The table is followed by a null terminated ASCII string that contains
+/// a fully qualified reference to the name space object.
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE EcControl;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE EcData;
+ UINT32 Uid;
+ UINT8 GpeBit;
+} EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
+
+///
+/// ECDT Version (as defined in ACPI 5.0 spec.)
+///
+#define EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01
+
+///
+/// System Resource Affinity Table (SRAT). The rest of the table
+/// must be defined in a platform specific manner.
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 Reserved1; ///< Must be set to 1
+ UINT64 Reserved2;
+} EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;
+
+///
+/// SRAT Version (as defined in ACPI 5.0 spec.)
+///
+#define EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03
+
+//
+// SRAT structure types.
+// All other values between 0x03 an 0xFF are reserved and
+// will be ignored by OSPM.
+//
+#define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00
+#define EFI_ACPI_5_0_MEMORY_AFFINITY 0x01
+#define EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02
+
+///
+/// Processor Local APIC/SAPIC Affinity Structure Definition
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 ProximityDomain7To0;
+ UINT8 ApicId;
+ UINT32 Flags;
+ UINT8 LocalSapicEid;
+ UINT8 ProximityDomain31To8[3];
+ UINT32 ClockDomain;
+} EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;
+
+///
+/// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.
+///
+#define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
+
+///
+/// Memory Affinity Structure Definition
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT32 ProximityDomain;
+ UINT16 Reserved1;
+ UINT32 AddressBaseLow;
+ UINT32 AddressBaseHigh;
+ UINT32 LengthLow;
+ UINT32 LengthHigh;
+ UINT32 Reserved2;
+ UINT32 Flags;
+ UINT64 Reserved3;
+} EFI_ACPI_5_0_MEMORY_AFFINITY_STRUCTURE;
+
+//
+// Memory Flags. All other bits are reserved and must be 0.
+//
+#define EFI_ACPI_5_0_MEMORY_ENABLED (1 << 0)
+#define EFI_ACPI_5_0_MEMORY_HOT_PLUGGABLE (1 << 1)
+#define EFI_ACPI_5_0_MEMORY_NONVOLATILE (1 << 2)
+
+///
+/// Processor Local x2APIC Affinity Structure Definition
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Reserved1[2];
+ UINT32 ProximityDomain;
+ UINT32 X2ApicId;
+ UINT32 Flags;
+ UINT32 ClockDomain;
+ UINT8 Reserved2[4];
+} EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;
+
+///
+/// System Locality Distance Information Table (SLIT).
+/// The rest of the table is a matrix.
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT64 NumberOfSystemLocalities;
+} EFI_ACPI_5_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;
+
+///
+/// SLIT Version (as defined in ACPI 5.0 spec.)
+///
+#define EFI_ACPI_5_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01
+
+///
+/// Corrected Platform Error Polling Table (CPEP)
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT8 Reserved[8];
+} EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;
+
+///
+/// CPEP Version (as defined in ACPI 5.0 spec.)
+///
+#define EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01
+
+//
+// CPEP processor structure types.
+//
+#define EFI_ACPI_5_0_CPEP_PROCESSOR_APIC_SAPIC 0x00
+
+///
+/// Corrected Platform Error Polling Processor Structure Definition
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT32 PollingInterval;
+} EFI_ACPI_5_0_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;
+
+///
+/// Maximum System Characteristics Table (MSCT)
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 OffsetProxDomInfo;
+ UINT32 MaximumNumberOfProximityDomains;
+ UINT32 MaximumNumberOfClockDomains;
+ UINT64 MaximumPhysicalAddress;
+} EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;
+
+///
+/// MSCT Version (as defined in ACPI 5.0 spec.)
+///
+#define EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01
+
+///
+/// Maximum Proximity Domain Information Structure Definition
+///
+typedef struct {
+ UINT8 Revision;
+ UINT8 Length;
+ UINT32 ProximityDomainRangeLow;
+ UINT32 ProximityDomainRangeHigh;
+ UINT32 MaximumProcessorCapacity;
+ UINT64 MaximumMemoryCapacity;
+} EFI_ACPI_5_0_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;
+
+///
+/// ACPI RAS Feature Table definition.
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT8 PlatformCommunicationChannelIdentifier[12];
+} EFI_ACPI_5_0_RAS_FEATURE_TABLE;
+
+///
+/// RASF Version (as defined in ACPI 5.0 spec.)
+///
+#define EFI_ACPI_5_0_RAS_FEATURE_TABLE_REVISION 0x01
+
+///
+/// ACPI RASF Platform Communication Channel Shared Memory Region definition.
+///
+typedef struct {
+ UINT32 Signature;
+ UINT16 Command;
+ UINT16 Status;
+ UINT16 Version;
+ UINT8 RASCapabilities[16];
+ UINT8 SetRASCapabilities[16];
+ UINT16 NumberOfRASFParameterBlocks;
+ UINT32 SetRASCapabilitiesStatus;
+} EFI_ACPI_5_0_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
+
+///
+/// ACPI RASF PCC command code
+///
+#define EFI_ACPI_5_0_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01
+
+///
+/// ACPI RASF Platform RAS Capabilities
+///
+#define EFI_ACPI_5_0_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED 0x01
+#define EFI_ACPI_5_0_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED_AND_EXPOSED_TO_SOFTWARE 0x02
+
+///
+/// ACPI RASF Parameter Block structure for PATROL_SCRUB
+///
+typedef struct {
+ UINT16 Type;
+ UINT16 Version;
+ UINT16 Length;
+ UINT16 PatrolScrubCommand;
+ UINT64 RequestedAddressRange[2];
+ UINT64 ActualAddressRange[2];
+ UINT16 Flags;
+ UINT8 RequestedSpeed;
+} EFI_ACPI_5_0_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;
+
+///
+/// ACPI RASF Patrol Scrub command
+///
+#define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01
+#define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02
+#define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03
+
+///
+/// Memory Power State Table definition.
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT8 PlatformCommunicationChannelIdentifier;
+ UINT8 Reserved[3];
+// Memory Power Node Structure
+// Memory Power State Characteristics
+} EFI_ACPI_5_0_MEMORY_POWER_STATUS_TABLE;
+
+///
+/// MPST Version (as defined in ACPI 5.0 spec.)
+///
+#define EFI_ACPI_5_0_MEMORY_POWER_STATE_TABLE_REVISION 0x01
+
+///
+/// MPST Platform Communication Channel Shared Memory Region definition.
+///
+typedef struct {
+ UINT32 Signature;
+ UINT16 Command;
+ UINT16 Status;
+ UINT32 MemoryPowerCommandRegister;
+ UINT32 MemoryPowerStatusRegister;
+ UINT32 PowerStateId;
+ UINT32 MemoryPowerNodeId;
+ UINT64 MemoryEnergyConsumed;
+ UINT64 ExpectedAveragePowerComsuned;
+} EFI_ACPI_5_0_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
+
+///
+/// ACPI MPST PCC command code
+///
+#define EFI_ACPI_5_0_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03
+
+///
+/// ACPI MPST Memory Power command
+///
+#define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01
+#define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02
+#define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03
+#define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04
+
+///
+/// MPST Memory Power Node Table
+///
+typedef struct {
+ UINT8 PowerStateValue;
+ UINT8 PowerStateInformationIndex;
+} EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE;
+
+typedef struct {
+ UINT8 Flag;
+ UINT8 Reserved;
+ UINT16 MemoryPowerNodeId;
+ UINT32 Length;
+ UINT64 AddressBase;
+ UINT64 AddressLength;
+ UINT32 NumberOfPowerStates;
+ UINT32 NumberOfPhysicalComponents;
+//EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];
+//UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];
+} EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE;
+
+#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01
+#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02
+#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04
+
+typedef struct {
+ UINT16 MemoryPowerNodeCount;
+ UINT8 Reserved[2];
+} EFI_ACPI_5_0_MPST_MEMORY_POWER_NODE_TABLE;
+
+///
+/// MPST Memory Power State Characteristics Table
+///
+typedef struct {
+ UINT8 PowerStateStructureID;
+ UINT8 Flag;
+ UINT16 Reserved;
+ UINT32 AveragePowerConsumedInMPS0;
+ UINT32 RelativePowerSavingToMPS0;
+ UINT64 ExitLatencyToMPS0;
+} EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;
+
+#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01
+#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02
+#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04
+
+typedef struct {
+ UINT16 MemoryPowerStateCharacteristicsCount;
+ UINT8 Reserved[2];
+} EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;
+
+///
+/// Memory Topology Table definition.
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 Reserved;
+} EFI_ACPI_5_0_MEMORY_TOPOLOGY_TABLE;
+
+///
+/// PMTT Version (as defined in ACPI 5.0 spec.)
+///
+#define EFI_ACPI_5_0_MEMORY_TOPOLOGY_TABLE_REVISION 0x01
+
+///
+/// Common Memory Aggregator Device Structure.
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Reserved;
+ UINT16 Length;
+ UINT16 Flags;
+ UINT16 Reserved1;
+} EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
+
+///
+/// Memory Aggregator Device Type
+///
+#define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x1
+#define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x2
+#define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x3
+
+///
+/// Socket Memory Aggregator Device Structure.
+///
+typedef struct {
+ EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
+ UINT16 SocketIdentifier;
+ UINT16 Reserved;
+//EFI_ACPI_5_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];
+} EFI_ACPI_5_0_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
+
+///
+/// MemoryController Memory Aggregator Device Structure.
+///
+typedef struct {
+ EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
+ UINT32 ReadLatency;
+ UINT32 WriteLatency;
+ UINT32 ReadBandwidth;
+ UINT32 WriteBandwidth;
+ UINT16 OptimalAccessUnit;
+ UINT16 OptimalAccessAlignment;
+ UINT16 Reserved;
+ UINT16 NumberOfProximityDomains;
+//UINT32 ProximityDomain[NumberOfProximityDomains];
+//EFI_ACPI_5_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];
+} EFI_ACPI_5_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
+
+///
+/// DIMM Memory Aggregator Device Structure.
+///
+typedef struct {
+ EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
+ UINT16 PhysicalComponentIdentifier;
+ UINT16 Reserved;
+ UINT32 SizeOfDimm;
+ UINT32 SmbiosHandle;
+} EFI_ACPI_5_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
+
+///
+/// Boot Graphics Resource Table definition.
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ ///
+ /// 2-bytes (16 bit) version ID. This value must be 1.
+ ///
+ UINT16 Version;
+ ///
+ /// 1-byte status field indicating current status about the table.
+ /// Bits[7:1] = Reserved (must be zero)
+ /// Bit [0] = Valid. A one indicates the boot image graphic is valid.
+ ///
+ UINT8 Status;
+ ///
+ /// 1-byte enumerated type field indicating format of the image.
+ /// 0 = Bitmap
+ /// 1 - 255 Reserved (for future use)
+ ///
+ UINT8 ImageType;
+ ///
+ /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy
+ /// of the image bitmap.
+ ///
+ UINT64 ImageAddress;
+ ///
+ /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.
+ /// (X, Y) display offset of the top left corner of the boot image.
+ /// The top left corner of the display is at offset (0, 0).
+ ///
+ UINT32 ImageOffsetX;
+ ///
+ /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.
+ /// (X, Y) display offset of the top left corner of the boot image.
+ /// The top left corner of the display is at offset (0, 0).
+ ///
+ UINT32 ImageOffsetY;
+} EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE;
+
+///
+/// BGRT Revision
+///
+#define EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1
+
+///
+/// BGRT Version
+///
+#define EFI_ACPI_5_0_BGRT_VERSION 0x01
+
+///
+/// BGRT Status
+///
+#define EFI_ACPI_5_0_BGRT_STATUS_NOT_DISPLAYED 0x00
+#define EFI_ACPI_5_0_BGRT_STATUS_DISPLAYED 0x01
+#define EFI_ACPI_5_0_BGRT_STATUS_INVALID EFI_ACPI_5_0_BGRT_STATUS_NOT_DISPLAYED
+#define EFI_ACPI_5_0_BGRT_STATUS_VALID EFI_ACPI_5_0_BGRT_STATUS_DISPLAYED
+
+///
+/// BGRT Image Type
+///
+#define EFI_ACPI_5_0_BGRT_IMAGE_TYPE_BMP 0x00
+
+///
+/// FPDT Version (as defined in ACPI 5.0 spec.)
+///
+#define EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01
+
+///
+/// FPDT Performance Record Types
+///
+#define EFI_ACPI_5_0_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000
+#define EFI_ACPI_5_0_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001
+
+///
+/// FPDT Performance Record Revision
+///
+#define EFI_ACPI_5_0_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01
+#define EFI_ACPI_5_0_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01
+
+///
+/// FPDT Runtime Performance Record Types
+///
+#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000
+#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001
+#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002
+
+///
+/// FPDT Runtime Performance Record Revision
+///
+#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01
+#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01
+#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02
+
+///
+/// FPDT Performance Record header
+///
+typedef struct {
+ UINT16 Type;
+ UINT8 Length;
+ UINT8 Revision;
+} EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER;
+
+///
+/// FPDT Performance Table header
+///
+typedef struct {
+ UINT32 Signature;
+ UINT32 Length;
+} EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER;
+
+///
+/// FPDT Firmware Basic Boot Performance Pointer Record Structure
+///
+typedef struct {
+ EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ UINT32 Reserved;
+ ///
+ /// 64-bit processor-relative physical address of the Basic Boot Performance Table.
+ ///
+ UINT64 BootPerformanceTablePointer;
+} EFI_ACPI_5_0_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;
+
+///
+/// FPDT S3 Performance Table Pointer Record Structure
+///
+typedef struct {
+ EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ UINT32 Reserved;
+ ///
+ /// 64-bit processor-relative physical address of the S3 Performance Table.
+ ///
+ UINT64 S3PerformanceTablePointer;
+} EFI_ACPI_5_0_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;
+
+///
+/// FPDT Firmware Basic Boot Performance Record Structure
+///
+typedef struct {
+ EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ UINT32 Reserved;
+ ///
+ /// Timer value logged at the beginning of firmware image execution.
+ /// This may not always be zero or near zero.
+ ///
+ UINT64 ResetEnd;
+ ///
+ /// Timer value logged just prior to loading the OS boot loader into memory.
+ /// For non-UEFI compatible boots, this field must be zero.
+ ///
+ UINT64 OsLoaderLoadImageStart;
+ ///
+ /// Timer value logged just prior to launching the previously loaded OS boot loader image.
+ /// For non-UEFI compatible boots, the timer value logged will be just prior
+ /// to the INT 19h handler invocation.
+ ///
+ UINT64 OsLoaderStartImageStart;
+ ///
+ /// Timer value logged at the point when the OS loader calls the
+ /// ExitBootServices function for UEFI compatible firmware.
+ /// For non-UEFI compatible boots, this field must be zero.
+ ///
+ UINT64 ExitBootServicesEntry;
+ ///
+ /// Timer value logged at the point just prior towhen the OS loader gaining
+ /// control back from calls the ExitBootServices function for UEFI compatible firmware.
+ /// For non-UEFI compatible boots, this field must be zero.
+ ///
+ UINT64 ExitBootServicesExit;
+} EFI_ACPI_5_0_FPDT_FIRMWARE_BASIC_BOOT_RECORD;
+
+///
+/// FPDT Firmware Basic Boot Performance Table signature
+///
+#define EFI_ACPI_5_0_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T')
+
+//
+// FPDT Firmware Basic Boot Performance Table
+//
+typedef struct {
+ EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER Header;
+ //
+ // one or more Performance Records.
+ //
+} EFI_ACPI_5_0_FPDT_FIRMWARE_BASIC_BOOT_TABLE;
+
+///
+/// FPDT "S3PT" S3 Performance Table
+///
+#define EFI_ACPI_5_0_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T')
+
+//
+// FPDT Firmware S3 Boot Performance Table
+//
+typedef struct {
+ EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER Header;
+ //
+ // one or more Performance Records.
+ //
+} EFI_ACPI_5_0_FPDT_FIRMWARE_S3_BOOT_TABLE;
+
+///
+/// FPDT Basic S3 Resume Performance Record
+///
+typedef struct {
+ EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ ///
+ /// A count of the number of S3 resume cycles since the last full boot sequence.
+ ///
+ UINT32 ResumeCount;
+ ///
+ /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the
+ /// OS waking vector. Only the most recent resume cycle's time is retained.
+ ///
+ UINT64 FullResume;
+ ///
+ /// Average timer value of all resume cycles logged since the last full boot
+ /// sequence, including the most recent resume. Note that the entire log of
+ /// timer values does not need to be retained in order to calculate this average.
+ ///
+ UINT64 AverageResume;
+} EFI_ACPI_5_0_FPDT_S3_RESUME_RECORD;
+
+///
+/// FPDT Basic S3 Suspend Performance Record
+///
+typedef struct {
+ EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ ///
+ /// Timer value recorded at the OS write to SLP_TYP upon entry to S3.
+ /// Only the most recent suspend cycle's timer value is retained.
+ ///
+ UINT64 SuspendStart;
+ ///
+ /// Timer value recorded at the final firmware write to SLP_TYP (or other
+ /// mechanism) used to trigger hardware entry to S3.
+ /// Only the most recent suspend cycle's timer value is retained.
+ ///
+ UINT64 SuspendEnd;
+} EFI_ACPI_5_0_FPDT_S3_SUSPEND_RECORD;
+
+///
+/// Firmware Performance Record Table definition.
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+} EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_RECORD_TABLE;
+
+///
+/// Generic Timer Description Table definition.
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT64 PhysicalAddress;
+ UINT32 GlobalFlags;
+ UINT32 SecurePL1TimerGSIV;
+ UINT32 SecurePL1TimerFlags;
+ UINT32 NonSecurePL1TimerGSIV;
+ UINT32 NonSecurePL1TimerFlags;
+ UINT32 VirtualTimerGSIV;
+ UINT32 VirtualTimerFlags;
+ UINT32 NonSecurePL2TimerGSIV;
+ UINT32 NonSecurePL2TimerFlags;
+} EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE;
+
+///
+/// GTDT Version (as defined in ACPI 5.0 spec.)
+///
+#define EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x01
+
+///
+/// Global Flags. All other bits are reserved and must be 0.
+///
+#define EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_MEMORY_MAPPED_BLOCK_PRESENT BIT0
+#define EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_INTERRUPT_MODE BIT1
+
+///
+/// Timer Flags. All other bits are reserved and must be 0.
+///
+#define EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
+#define EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
+
+///
+/// Boot Error Record Table (BERT)
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 BootErrorRegionLength;
+ UINT64 BootErrorRegion;
+} EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_HEADER;
+
+///
+/// BERT Version (as defined in ACPI 5.0 spec.)
+///
+#define EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_REVISION 0x01
+
+///
+/// Boot Error Region Block Status Definition
+///
+typedef struct {
+ UINT32 UncorrectableErrorValid:1;
+ UINT32 CorrectableErrorValid:1;
+ UINT32 MultipleUncorrectableErrors:1;
+ UINT32 MultipleCorrectableErrors:1;
+ UINT32 ErrorDataEntryCount:10;
+ UINT32 Reserved:18;
+} EFI_ACPI_5_0_ERROR_BLOCK_STATUS;
+
+///
+/// Boot Error Region Definition
+///
+typedef struct {
+ EFI_ACPI_5_0_ERROR_BLOCK_STATUS BlockStatus;
+ UINT32 RawDataOffset;
+ UINT32 RawDataLength;
+ UINT32 DataLength;
+ UINT32 ErrorSeverity;
+} EFI_ACPI_5_0_BOOT_ERROR_REGION_STRUCTURE;
+
+//
+// Boot Error Severity types
+//
+#define EFI_ACPI_5_0_ERROR_SEVERITY_CORRECTABLE 0x00
+#define EFI_ACPI_5_0_ERROR_SEVERITY_FATAL 0x01
+#define EFI_ACPI_5_0_ERROR_SEVERITY_CORRECTED 0x02
+#define EFI_ACPI_5_0_ERROR_SEVERITY_NONE 0x03
+
+///
+/// Generic Error Data Entry Definition
+///
+typedef struct {
+ UINT8 SectionType[16];
+ UINT32 ErrorSeverity;
+ UINT16 Revision;
+ UINT8 ValidationBits;
+ UINT8 Flags;
+ UINT32 ErrorDataLength;
+ UINT8 FruId[16];
+ UINT8 FruText[20];
+} EFI_ACPI_5_0_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;
+
+///
+/// Generic Error Data Entry Version (as defined in ACPI 5.0 spec.)
+///
+#define EFI_ACPI_5_0_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0201
+
+///
+/// HEST - Hardware Error Source Table
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 ErrorSourceCount;
+} EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_HEADER;
+
+///
+/// HEST Version (as defined in ACPI 5.0 spec.)
+///
+#define EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01
+
+//
+// Error Source structure types.
+//
+#define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00
+#define EFI_ACPI_5_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01
+#define EFI_ACPI_5_0_IA32_ARCHITECTURE_NMI_ERROR 0x02
+#define EFI_ACPI_5_0_PCI_EXPRESS_ROOT_PORT_AER 0x06
+#define EFI_ACPI_5_0_PCI_EXPRESS_DEVICE_AER 0x07
+#define EFI_ACPI_5_0_PCI_EXPRESS_BRIDGE_AER 0x08
+#define EFI_ACPI_5_0_GENERIC_HARDWARE_ERROR 0x09
+
+//
+// Error Source structure flags.
+//
+#define EFI_ACPI_5_0_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)
+#define EFI_ACPI_5_0_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)
+
+///
+/// IA-32 Architecture Machine Check Exception Structure Definition
+///
+typedef struct {
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT64 GlobalCapabilityInitData;
+ UINT64 GlobalControlInitData;
+ UINT8 NumberOfHardwareBanks;
+ UINT8 Reserved1[7];
+} EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;
+
+///
+/// IA-32 Architecture Machine Check Bank Structure Definition
+///
+typedef struct {
+ UINT8 BankNumber;
+ UINT8 ClearStatusOnInitialization;
+ UINT8 StatusDataFormat;
+ UINT8 Reserved0;
+ UINT32 ControlRegisterMsrAddress;
+ UINT64 ControlInitData;
+ UINT32 StatusRegisterMsrAddress;
+ UINT32 AddressRegisterMsrAddress;
+ UINT32 MiscRegisterMsrAddress;
+} EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;
+
+///
+/// IA-32 Architecture Machine Check Bank Structure MCA data format
+///
+#define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00
+#define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01
+#define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02
+
+//
+// Hardware Error Notification types. All other values are reserved
+//
+#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00
+#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01
+#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02
+#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_SCI 0x03
+#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_NMI 0x04
+
+///
+/// Hardware Error Notification Configuration Write Enable Structure Definition
+///
+typedef struct {
+ UINT16 Type:1;
+ UINT16 PollInterval:1;
+ UINT16 SwitchToPollingThresholdValue:1;
+ UINT16 SwitchToPollingThresholdWindow:1;
+ UINT16 ErrorThresholdValue:1;
+ UINT16 ErrorThresholdWindow:1;
+ UINT16 Reserved:10;
+} EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;
+
+///
+/// Hardware Error Notification Structure Definition
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;
+ UINT32 PollInterval;
+ UINT32 Vector;
+ UINT32 SwitchToPollingThresholdValue;
+ UINT32 SwitchToPollingThresholdWindow;
+ UINT32 ErrorThresholdValue;
+ UINT32 ErrorThresholdWindow;
+} EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;
+
+///
+/// IA-32 Architecture Corrected Machine Check Structure Definition
+///
+typedef struct {
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
+ UINT8 NumberOfHardwareBanks;
+ UINT8 Reserved1[3];
+} EFI_ACPI_5_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;
+
+///
+/// IA-32 Architecture NMI Error Structure Definition
+///
+typedef struct {
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 MaxRawDataLength;
+} EFI_ACPI_5_0_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;
+
+///
+/// PCI Express Root Port AER Structure Definition
+///
+typedef struct {
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 Bus;
+ UINT16 Device;
+ UINT16 Function;
+ UINT16 DeviceControl;
+ UINT8 Reserved1[2];
+ UINT32 UncorrectableErrorMask;
+ UINT32 UncorrectableErrorSeverity;
+ UINT32 CorrectableErrorMask;
+ UINT32 AdvancedErrorCapabilitiesAndControl;
+ UINT32 RootErrorCommand;
+} EFI_ACPI_5_0_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;
+
+///
+/// PCI Express Device AER Structure Definition
+///
+typedef struct {
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 Bus;
+ UINT16 Device;
+ UINT16 Function;
+ UINT16 DeviceControl;
+ UINT8 Reserved1[2];
+ UINT32 UncorrectableErrorMask;
+ UINT32 UncorrectableErrorSeverity;
+ UINT32 CorrectableErrorMask;
+ UINT32 AdvancedErrorCapabilitiesAndControl;
+} EFI_ACPI_5_0_PCI_EXPRESS_DEVICE_AER_STRUCTURE;
+
+///
+/// PCI Express Bridge AER Structure Definition
+///
+typedef struct {
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 Bus;
+ UINT16 Device;
+ UINT16 Function;
+ UINT16 DeviceControl;
+ UINT8 Reserved1[2];
+ UINT32 UncorrectableErrorMask;
+ UINT32 UncorrectableErrorSeverity;
+ UINT32 CorrectableErrorMask;
+ UINT32 AdvancedErrorCapabilitiesAndControl;
+ UINT32 SecondaryUncorrectableErrorMask;
+ UINT32 SecondaryUncorrectableErrorSeverity;
+ UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;
+} EFI_ACPI_5_0_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;
+
+///
+/// Generic Hardware Error Source Structure Definition
+///
+typedef struct {
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT16 RelatedSourceId;
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 MaxRawDataLength;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;
+ EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
+ UINT32 ErrorStatusBlockLength;
+} EFI_ACPI_5_0_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;
+
+///
+/// Generic Error Status Definition
+///
+typedef struct {
+ EFI_ACPI_5_0_ERROR_BLOCK_STATUS BlockStatus;
+ UINT32 RawDataOffset;
+ UINT32 RawDataLength;
+ UINT32 DataLength;
+ UINT32 ErrorSeverity;
+} EFI_ACPI_5_0_GENERIC_ERROR_STATUS_STRUCTURE;
+
+///
+/// ERST - Error Record Serialization Table
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 SerializationHeaderSize;
+ UINT8 Reserved0[4];
+ UINT32 InstructionEntryCount;
+} EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;
+
+///
+/// ERST Version (as defined in ACPI 5.0 spec.)
+///
+#define EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01
+
+///
+/// ERST Serialization Actions
+///
+#define EFI_ACPI_5_0_ERST_BEGIN_WRITE_OPERATION 0x00
+#define EFI_ACPI_5_0_ERST_BEGIN_READ_OPERATION 0x01
+#define EFI_ACPI_5_0_ERST_BEGIN_CLEAR_OPERATION 0x02
+#define EFI_ACPI_5_0_ERST_END_OPERATION 0x03
+#define EFI_ACPI_5_0_ERST_SET_RECORD_OFFSET 0x04
+#define EFI_ACPI_5_0_ERST_EXECUTE_OPERATION 0x05
+#define EFI_ACPI_5_0_ERST_CHECK_BUSY_STATUS 0x06
+#define EFI_ACPI_5_0_ERST_GET_COMMAND_STATUS 0x07
+#define EFI_ACPI_5_0_ERST_GET_RECORD_IDENTIFIER 0x08
+#define EFI_ACPI_5_0_ERST_SET_RECORD_IDENTIFIER 0x09
+#define EFI_ACPI_5_0_ERST_GET_RECORD_COUNT 0x0A
+#define EFI_ACPI_5_0_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B
+#define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D
+#define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E
+#define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F
+
+///
+/// ERST Action Command Status
+///
+#define EFI_ACPI_5_0_ERST_STATUS_SUCCESS 0x00
+#define EFI_ACPI_5_0_ERST_STATUS_NOT_ENOUGH_SPACE 0x01
+#define EFI_ACPI_5_0_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02
+#define EFI_ACPI_5_0_ERST_STATUS_FAILED 0x03
+#define EFI_ACPI_5_0_ERST_STATUS_RECORD_STORE_EMPTY 0x04
+#define EFI_ACPI_5_0_ERST_STATUS_RECORD_NOT_FOUND 0x05
+
+///
+/// ERST Serialization Instructions
+///
+#define EFI_ACPI_5_0_ERST_READ_REGISTER 0x00
+#define EFI_ACPI_5_0_ERST_READ_REGISTER_VALUE 0x01
+#define EFI_ACPI_5_0_ERST_WRITE_REGISTER 0x02
+#define EFI_ACPI_5_0_ERST_WRITE_REGISTER_VALUE 0x03
+#define EFI_ACPI_5_0_ERST_NOOP 0x04
+#define EFI_ACPI_5_0_ERST_LOAD_VAR1 0x05
+#define EFI_ACPI_5_0_ERST_LOAD_VAR2 0x06
+#define EFI_ACPI_5_0_ERST_STORE_VAR1 0x07
+#define EFI_ACPI_5_0_ERST_ADD 0x08
+#define EFI_ACPI_5_0_ERST_SUBTRACT 0x09
+#define EFI_ACPI_5_0_ERST_ADD_VALUE 0x0A
+#define EFI_ACPI_5_0_ERST_SUBTRACT_VALUE 0x0B
+#define EFI_ACPI_5_0_ERST_STALL 0x0C
+#define EFI_ACPI_5_0_ERST_STALL_WHILE_TRUE 0x0D
+#define EFI_ACPI_5_0_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E
+#define EFI_ACPI_5_0_ERST_GOTO 0x0F
+#define EFI_ACPI_5_0_ERST_SET_SRC_ADDRESS_BASE 0x10
+#define EFI_ACPI_5_0_ERST_SET_DST_ADDRESS_BASE 0x11
+#define EFI_ACPI_5_0_ERST_MOVE_DATA 0x12
+
+///
+/// ERST Instruction Flags
+///
+#define EFI_ACPI_5_0_ERST_PRESERVE_REGISTER 0x01
+
+///
+/// ERST Serialization Instruction Entry
+///
+typedef struct {
+ UINT8 SerializationAction;
+ UINT8 Instruction;
+ UINT8 Flags;
+ UINT8 Reserved0;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
+ UINT64 Value;
+ UINT64 Mask;
+} EFI_ACPI_5_0_ERST_SERIALIZATION_INSTRUCTION_ENTRY;
+
+///
+/// EINJ - Error Injection Table
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 InjectionHeaderSize;
+ UINT8 InjectionFlags;
+ UINT8 Reserved0[3];
+ UINT32 InjectionEntryCount;
+} EFI_ACPI_5_0_ERROR_INJECTION_TABLE_HEADER;
+
+///
+/// EINJ Version (as defined in ACPI 5.0 spec.)
+///
+#define EFI_ACPI_5_0_ERROR_INJECTION_TABLE_REVISION 0x01
+
+///
+/// EINJ Error Injection Actions
+///
+#define EFI_ACPI_5_0_EINJ_BEGIN_INJECTION_OPERATION 0x00
+#define EFI_ACPI_5_0_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01
+#define EFI_ACPI_5_0_EINJ_SET_ERROR_TYPE 0x02
+#define EFI_ACPI_5_0_EINJ_GET_ERROR_TYPE 0x03
+#define EFI_ACPI_5_0_EINJ_END_OPERATION 0x04
+#define EFI_ACPI_5_0_EINJ_EXECUTE_OPERATION 0x05
+#define EFI_ACPI_5_0_EINJ_CHECK_BUSY_STATUS 0x06
+#define EFI_ACPI_5_0_EINJ_GET_COMMAND_STATUS 0x07
+#define EFI_ACPI_5_0_EINJ_TRIGGER_ERROR 0xFF
+
+///
+/// EINJ Action Command Status
+///
+#define EFI_ACPI_5_0_EINJ_STATUS_SUCCESS 0x00
+#define EFI_ACPI_5_0_EINJ_STATUS_UNKNOWN_FAILURE 0x01
+#define EFI_ACPI_5_0_EINJ_STATUS_INVALID_ACCESS 0x02
+
+///
+/// EINJ Error Type Definition
+///
+#define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)
+#define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)
+#define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)
+#define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)
+#define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)
+#define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)
+#define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)
+#define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)
+#define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)
+#define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)
+#define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)
+#define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)
+
+///
+/// EINJ Injection Instructions
+///
+#define EFI_ACPI_5_0_EINJ_READ_REGISTER 0x00
+#define EFI_ACPI_5_0_EINJ_READ_REGISTER_VALUE 0x01
+#define EFI_ACPI_5_0_EINJ_WRITE_REGISTER 0x02
+#define EFI_ACPI_5_0_EINJ_WRITE_REGISTER_VALUE 0x03
+#define EFI_ACPI_5_0_EINJ_NOOP 0x04
+
+///
+/// EINJ Instruction Flags
+///
+#define EFI_ACPI_5_0_EINJ_PRESERVE_REGISTER 0x01
+
+///
+/// EINJ Injection Instruction Entry
+///
+typedef struct {
+ UINT8 InjectionAction;
+ UINT8 Instruction;
+ UINT8 Flags;
+ UINT8 Reserved0;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
+ UINT64 Value;
+ UINT64 Mask;
+} EFI_ACPI_5_0_EINJ_INJECTION_INSTRUCTION_ENTRY;
+
+///
+/// EINJ Trigger Action Table
+///
+typedef struct {
+ UINT32 HeaderSize;
+ UINT32 Revision;
+ UINT32 TableSize;
+ UINT32 EntryCount;
+} EFI_ACPI_5_0_EINJ_TRIGGER_ACTION_TABLE;
+
+///
+/// Platform Communications Channel Table (PCCT)
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 Flags;
+ UINT64 Reserved;
+} EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;
+
+///
+/// PCCT Version (as defined in ACPI 5.0 spec.)
+///
+#define EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01
+
+///
+/// PCCT Global Flags
+///
+#define EFI_ACPI_5_0_PCCT_FLAGS_SCI_DOORBELL BIT0
+
+//
+// PCCT Subspace type
+//
+#define EFI_ACPI_5_0_PCCT_SUBSPACE_TYPE_GENERIC 0x00
+
+///
+/// PCC Subspace Structure Header
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+} EFI_ACPI_5_0_PCCT_SUBSPACE_HEADER;
+
+///
+/// Generic Communications Subspace Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Reserved[6];
+ UINT64 BaseAddress;
+ UINT64 AddressLength;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
+ UINT64 DoorbellPreserve;
+ UINT64 DoorbellWrite;
+ UINT32 NominalLatency;
+ UINT32 MaximumPeriodicAccessRate;
+ UINT16 MinimumRequestTurnaroundTime;
+} EFI_ACPI_5_0_PCCT_SUBSPACE_GENERIC;
+
+///
+/// Generic Communications Channel Shared Memory Region
+///
+
+typedef struct {
+ UINT8 Command;
+ UINT8 Reserved:7;
+ UINT8 GenerateSci:1;
+} EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;
+
+typedef struct {
+ UINT8 CommandComplete:1;
+ UINT8 SciDoorbell:1;
+ UINT8 Error:1;
+ UINT8 PlatformNotification:1;
+ UINT8 Reserved:4;
+ UINT8 Reserved1;
+} EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;
+
+typedef struct {
+ UINT32 Signature;
+ EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command;
+ EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status;
+} EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;
+
+//
+// Known table signatures
+//
+
+///
+/// "RSD PTR " Root System Description Pointer
+///
+#define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')
+
+///
+/// "APIC" Multiple APIC Description Table
+///
+#define EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')
+
+///
+/// "BERT" Boot Error Record Table
+///
+#define EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T')
+
+///
+/// "BGRT" Boot Graphics Resource Table
+///
+#define EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T')
+
+///
+/// "CPEP" Corrected Platform Error Polling Table
+///
+#define EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')
+
+///
+/// "DSDT" Differentiated System Description Table
+///
+#define EFI_ACPI_5_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')
+
+///
+/// "ECDT" Embedded Controller Boot Resources Table
+///
+#define EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')
+
+///
+/// "EINJ" Error Injection Table
+///
+#define EFI_ACPI_5_0_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J')
+
+///
+/// "ERST" Error Record Serialization Table
+///
+#define EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T')
+
+///
+/// "FACP" Fixed ACPI Description Table
+///
+#define EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')
+
+///
+/// "FACS" Firmware ACPI Control Structure
+///
+#define EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')
+
+///
+/// "FPDT" Firmware Performance Data Table
+///
+#define EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T')
+
+///
+/// "GTDT" Generic Timer Description Table
+///
+#define EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T')
+
+///
+/// "HEST" Hardware Error Source Table
+///
+#define EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T')
+
+///
+/// "MPST" Memory Power State Table
+///
+#define EFI_ACPI_5_0_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T')
+
+///
+/// "MSCT" Maximum System Characteristics Table
+///
+#define EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T')
+
+///
+/// "PMTT" Platform Memory Topology Table
+///
+#define EFI_ACPI_5_0_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T')
+
+///
+/// "PSDT" Persistent System Description Table
+///
+#define EFI_ACPI_5_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')
+
+///
+/// "RASF" ACPI RAS Feature Table
+///
+#define EFI_ACPI_5_0_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F')
+
+///
+/// "RSDT" Root System Description Table
+///
+#define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')
+
+///
+/// "SBST" Smart Battery Specification Table
+///
+#define EFI_ACPI_5_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')
+
+///
+/// "SLIT" System Locality Information Table
+///
+#define EFI_ACPI_5_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')
+
+///
+/// "SRAT" System Resource Affinity Table
+///
+#define EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')
+
+///
+/// "SSDT" Secondary System Description Table
+///
+#define EFI_ACPI_5_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')
+
+///
+/// "XSDT" Extended System Description Table
+///
+#define EFI_ACPI_5_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')
+
+///
+/// "BOOT" MS Simple Boot Spec
+///
+#define EFI_ACPI_5_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')
+
+///
+/// "CSRT" MS Core System Resource Table
+///
+#define EFI_ACPI_5_0_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T')
+
+///
+/// "DBG2" MS Debug Port 2 Spec
+///
+#define EFI_ACPI_5_0_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2')
+
+///
+/// "DBGP" MS Debug Port Spec
+///
+#define EFI_ACPI_5_0_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')
+
+///
+/// "DMAR" DMA Remapping Table
+///
+#define EFI_ACPI_5_0_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R')
+
+///
+/// "DRTM" Dynamic Root of Trust for Measurement Table
+///
+#define EFI_ACPI_5_0_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M')
+
+///
+/// "ETDT" Event Timer Description Table
+///
+#define EFI_ACPI_5_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')
+
+///
+/// "HPET" IA-PC High Precision Event Timer Table
+///
+#define EFI_ACPI_5_0_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T')
+
+///
+/// "iBFT" iSCSI Boot Firmware Table
+///
+#define EFI_ACPI_5_0_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T')
+
+///
+/// "IVRS" I/O Virtualization Reporting Structure
+///
+#define EFI_ACPI_5_0_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S')
+
+///
+/// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table
+///
+#define EFI_ACPI_5_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')
+
+///
+/// "MCHI" Management Controller Host Interface Table
+///
+#define EFI_ACPI_5_0_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')
+
+///
+/// "MSDM" MS Data Management Table
+///
+#define EFI_ACPI_5_0_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')
+
+///
+/// "SLIC" MS Software Licensing Table Specification
+///
+#define EFI_ACPI_5_0_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')
+
+///
+/// "SPCR" Serial Port Concole Redirection Table
+///
+#define EFI_ACPI_5_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')
+
+///
+/// "SPMI" Server Platform Management Interface Table
+///
+#define EFI_ACPI_5_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')
+
+///
+/// "TCPA" Trusted Computing Platform Alliance Capabilities Table
+///
+#define EFI_ACPI_5_0_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')
+
+///
+/// "TPM2" Trusted Computing Platform 1 Table
+///
+#define EFI_ACPI_5_0_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2')
+
+///
+/// "UEFI" UEFI ACPI Data Table
+///
+#define EFI_ACPI_5_0_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I')
+
+///
+/// "WAET" Windows ACPI Emulated Devices Table
+///
+#define EFI_ACPI_5_0_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')
+#define EFI_ACPI_5_0_WINDOWS_ACPI_ENLIGHTENMENT_TABLE_SIGNATURE EFI_ACPI_5_0_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE
+
+///
+/// "WDAT" Watchdog Action Table
+///
+#define EFI_ACPI_5_0_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T')
+
+///
+/// "WDRT" Watchdog Resource Table
+///
+#define EFI_ACPI_5_0_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T')
+
+///
+/// "WPBT" MS Platform Binary Table
+///
+#define EFI_ACPI_5_0_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T')
+
+#pragma pack()
+
+#endif
diff --git a/MdePkg/Include/IndustryStandard/Acpi51.h b/MdePkg/Include/IndustryStandard/Acpi51.h
new file mode 100644
index 000000000000..457706befd82
--- /dev/null
+++ b/MdePkg/Include/IndustryStandard/Acpi51.h
@@ -0,0 +1,2139 @@
+/** @file
+ ACPI 5.1 definitions from the ACPI Specification Revision 5.1 Errata B January, 2016.
+
+ Copyright (c) 2014 Hewlett-Packard Development Company, L.P.<BR>
+ Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
+ (C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
+
+#ifndef _ACPI_5_1_H_
+#define _ACPI_5_1_H_
+
+#include <IndustryStandard/Acpi50.h>
+
+//
+// Ensure proper structure formats
+//
+#pragma pack(1)
+
+///
+/// ACPI 5.1 Generic Address Space definition
+///
+typedef struct {
+ UINT8 AddressSpaceId;
+ UINT8 RegisterBitWidth;
+ UINT8 RegisterBitOffset;
+ UINT8 AccessSize;
+ UINT64 Address;
+} EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE;
+
+//
+// Generic Address Space Address IDs
+//
+#define EFI_ACPI_5_1_SYSTEM_MEMORY 0
+#define EFI_ACPI_5_1_SYSTEM_IO 1
+#define EFI_ACPI_5_1_PCI_CONFIGURATION_SPACE 2
+#define EFI_ACPI_5_1_EMBEDDED_CONTROLLER 3
+#define EFI_ACPI_5_1_SMBUS 4
+#define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL 0x0A
+#define EFI_ACPI_5_1_FUNCTIONAL_FIXED_HARDWARE 0x7F
+
+//
+// Generic Address Space Access Sizes
+//
+#define EFI_ACPI_5_1_UNDEFINED 0
+#define EFI_ACPI_5_1_BYTE 1
+#define EFI_ACPI_5_1_WORD 2
+#define EFI_ACPI_5_1_DWORD 3
+#define EFI_ACPI_5_1_QWORD 4
+
+//
+// ACPI 5.1 table structures
+//
+
+///
+/// Root System Description Pointer Structure
+///
+typedef struct {
+ UINT64 Signature;
+ UINT8 Checksum;
+ UINT8 OemId[6];
+ UINT8 Revision;
+ UINT32 RsdtAddress;
+ UINT32 Length;
+ UINT64 XsdtAddress;
+ UINT8 ExtendedChecksum;
+ UINT8 Reserved[3];
+} EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER;
+
+///
+/// RSD_PTR Revision (as defined in ACPI 5.1 spec.)
+///
+#define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 5.1) says current value is 2
+
+///
+/// Common table header, this prefaces all ACPI tables, including FACS, but
+/// excluding the RSD PTR structure
+///
+typedef struct {
+ UINT32 Signature;
+ UINT32 Length;
+} EFI_ACPI_5_1_COMMON_HEADER;
+
+//
+// Root System Description Table
+// No definition needed as it is a common description table header, the same with
+// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.
+//
+
+///
+/// RSDT Revision (as defined in ACPI 5.1 spec.)
+///
+#define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+
+//
+// Extended System Description Table
+// No definition needed as it is a common description table header, the same with
+// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.
+//
+
+///
+/// XSDT Revision (as defined in ACPI 5.1 spec.)
+///
+#define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+
+///
+/// Fixed ACPI Description Table Structure (FADT)
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 FirmwareCtrl;
+ UINT32 Dsdt;
+ UINT8 Reserved0;
+ UINT8 PreferredPmProfile;
+ UINT16 SciInt;
+ UINT32 SmiCmd;
+ UINT8 AcpiEnable;
+ UINT8 AcpiDisable;
+ UINT8 S4BiosReq;
+ UINT8 PstateCnt;
+ UINT32 Pm1aEvtBlk;
+ UINT32 Pm1bEvtBlk;
+ UINT32 Pm1aCntBlk;
+ UINT32 Pm1bCntBlk;
+ UINT32 Pm2CntBlk;
+ UINT32 PmTmrBlk;
+ UINT32 Gpe0Blk;
+ UINT32 Gpe1Blk;
+ UINT8 Pm1EvtLen;
+ UINT8 Pm1CntLen;
+ UINT8 Pm2CntLen;
+ UINT8 PmTmrLen;
+ UINT8 Gpe0BlkLen;
+ UINT8 Gpe1BlkLen;
+ UINT8 Gpe1Base;
+ UINT8 CstCnt;
+ UINT16 PLvl2Lat;
+ UINT16 PLvl3Lat;
+ UINT16 FlushSize;
+ UINT16 FlushStride;
+ UINT8 DutyOffset;
+ UINT8 DutyWidth;
+ UINT8 DayAlrm;
+ UINT8 MonAlrm;
+ UINT8 Century;
+ UINT16 IaPcBootArch;
+ UINT8 Reserved1;
+ UINT32 Flags;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ResetReg;
+ UINT8 ResetValue;
+ UINT16 ArmBootArch;
+ UINT8 MinorVersion;
+ UINT64 XFirmwareCtrl;
+ UINT64 XDsdt;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepControlReg;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;
+} EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE;
+
+///
+/// FADT Version (as defined in ACPI 5.1 spec.)
+///
+#define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x05
+#define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x01
+
+//
+// Fixed ACPI Description Table Preferred Power Management Profile
+//
+#define EFI_ACPI_5_1_PM_PROFILE_UNSPECIFIED 0
+#define EFI_ACPI_5_1_PM_PROFILE_DESKTOP 1
+#define EFI_ACPI_5_1_PM_PROFILE_MOBILE 2
+#define EFI_ACPI_5_1_PM_PROFILE_WORKSTATION 3
+#define EFI_ACPI_5_1_PM_PROFILE_ENTERPRISE_SERVER 4
+#define EFI_ACPI_5_1_PM_PROFILE_SOHO_SERVER 5
+#define EFI_ACPI_5_1_PM_PROFILE_APPLIANCE_PC 6
+#define EFI_ACPI_5_1_PM_PROFILE_PERFORMANCE_SERVER 7
+#define EFI_ACPI_5_1_PM_PROFILE_TABLET 8
+
+//
+// Fixed ACPI Description Table Boot Architecture Flags
+// All other bits are reserved and must be set to 0.
+//
+#define EFI_ACPI_5_1_LEGACY_DEVICES BIT0
+#define EFI_ACPI_5_1_8042 BIT1
+#define EFI_ACPI_5_1_VGA_NOT_PRESENT BIT2
+#define EFI_ACPI_5_1_MSI_NOT_SUPPORTED BIT3
+#define EFI_ACPI_5_1_PCIE_ASPM_CONTROLS BIT4
+#define EFI_ACPI_5_1_CMOS_RTC_NOT_PRESENT BIT5
+
+//
+// Fixed ACPI Description Table Arm Boot Architecture Flags
+// All other bits are reserved and must be set to 0.
+//
+#define EFI_ACPI_5_1_ARM_PSCI_COMPLIANT BIT0
+#define EFI_ACPI_5_1_ARM_PSCI_USE_HVC BIT1
+
+//
+// Fixed ACPI Description Table Fixed Feature Flags
+// All other bits are reserved and must be set to 0.
+//
+#define EFI_ACPI_5_1_WBINVD BIT0
+#define EFI_ACPI_5_1_WBINVD_FLUSH BIT1
+#define EFI_ACPI_5_1_PROC_C1 BIT2
+#define EFI_ACPI_5_1_P_LVL2_UP BIT3
+#define EFI_ACPI_5_1_PWR_BUTTON BIT4
+#define EFI_ACPI_5_1_SLP_BUTTON BIT5
+#define EFI_ACPI_5_1_FIX_RTC BIT6
+#define EFI_ACPI_5_1_RTC_S4 BIT7
+#define EFI_ACPI_5_1_TMR_VAL_EXT BIT8
+#define EFI_ACPI_5_1_DCK_CAP BIT9
+#define EFI_ACPI_5_1_RESET_REG_SUP BIT10
+#define EFI_ACPI_5_1_SEALED_CASE BIT11
+#define EFI_ACPI_5_1_HEADLESS BIT12
+#define EFI_ACPI_5_1_CPU_SW_SLP BIT13
+#define EFI_ACPI_5_1_PCI_EXP_WAK BIT14
+#define EFI_ACPI_5_1_USE_PLATFORM_CLOCK BIT15
+#define EFI_ACPI_5_1_S4_RTC_STS_VALID BIT16
+#define EFI_ACPI_5_1_REMOTE_POWER_ON_CAPABLE BIT17
+#define EFI_ACPI_5_1_FORCE_APIC_CLUSTER_MODEL BIT18
+#define EFI_ACPI_5_1_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
+#define EFI_ACPI_5_1_HW_REDUCED_ACPI BIT20
+#define EFI_ACPI_5_1_LOW_POWER_S0_IDLE_CAPABLE BIT21
+
+///
+/// Firmware ACPI Control Structure
+///
+typedef struct {
+ UINT32 Signature;
+ UINT32 Length;
+ UINT32 HardwareSignature;
+ UINT32 FirmwareWakingVector;
+ UINT32 GlobalLock;
+ UINT32 Flags;
+ UINT64 XFirmwareWakingVector;
+ UINT8 Version;
+ UINT8 Reserved0[3];
+ UINT32 OspmFlags;
+ UINT8 Reserved1[24];
+} EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE;
+
+///
+/// FACS Version (as defined in ACPI 5.1 spec.)
+///
+#define EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02
+
+///
+/// Firmware Control Structure Feature Flags
+/// All other bits are reserved and must be set to 0.
+///
+#define EFI_ACPI_5_1_S4BIOS_F BIT0
+#define EFI_ACPI_5_1_64BIT_WAKE_SUPPORTED_F BIT1
+
+///
+/// OSPM Enabled Firmware Control Structure Flags
+/// All other bits are reserved and must be set to 0.
+///
+#define EFI_ACPI_5_1_OSPM_64BIT_WAKE_F BIT0
+
+//
+// Differentiated System Description Table,
+// Secondary System Description Table
+// and Persistent System Description Table,
+// no definition needed as they are common description table header, the same with
+// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.
+//
+#define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
+#define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
+
+///
+/// Multiple APIC Description Table header definition. The rest of the table
+/// must be defined in a platform specific manner.
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 LocalApicAddress;
+ UINT32 Flags;
+} EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
+
+///
+/// MADT Revision (as defined in ACPI 5.1 spec.)
+///
+#define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03
+
+///
+/// Multiple APIC Flags
+/// All other bits are reserved and must be set to 0.
+///
+#define EFI_ACPI_5_1_PCAT_COMPAT BIT0
+
+//
+// Multiple APIC Description Table APIC structure types
+// All other values between 0x0D and 0x7F are reserved and
+// will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.
+//
+#define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC 0x00
+#define EFI_ACPI_5_1_IO_APIC 0x01
+#define EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE 0x02
+#define EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE 0x03
+#define EFI_ACPI_5_1_LOCAL_APIC_NMI 0x04
+#define EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE 0x05
+#define EFI_ACPI_5_1_IO_SAPIC 0x06
+#define EFI_ACPI_5_1_LOCAL_SAPIC 0x07
+#define EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES 0x08
+#define EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC 0x09
+#define EFI_ACPI_5_1_LOCAL_X2APIC_NMI 0x0A
+#define EFI_ACPI_5_1_GIC 0x0B
+#define EFI_ACPI_5_1_GICD 0x0C
+#define EFI_ACPI_5_1_GIC_MSI_FRAME 0x0D
+#define EFI_ACPI_5_1_GICR 0x0E
+
+//
+// APIC Structure Definitions
+//
+
+///
+/// Processor Local APIC Structure Definition
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT8 ApicId;
+ UINT32 Flags;
+} EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_STRUCTURE;
+
+///
+/// Local APIC Flags. All other bits are reserved and must be 0.
+///
+#define EFI_ACPI_5_1_LOCAL_APIC_ENABLED BIT0
+
+///
+/// IO APIC Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 IoApicAddress;
+ UINT32 GlobalSystemInterruptBase;
+} EFI_ACPI_5_1_IO_APIC_STRUCTURE;
+
+///
+/// Interrupt Source Override Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Bus;
+ UINT8 Source;
+ UINT32 GlobalSystemInterrupt;
+ UINT16 Flags;
+} EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
+
+///
+/// Platform Interrupt Sources Structure Definition
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT8 InterruptType;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT8 IoSapicVector;
+ UINT32 GlobalSystemInterrupt;
+ UINT32 PlatformInterruptSourceFlags;
+ UINT8 CpeiProcessorOverride;
+ UINT8 Reserved[31];
+} EFI_ACPI_5_1_PLATFORM_INTERRUPT_APIC_STRUCTURE;
+
+//
+// MPS INTI flags.
+// All other bits are reserved and must be set to 0.
+//
+#define EFI_ACPI_5_1_POLARITY (3 << 0)
+#define EFI_ACPI_5_1_TRIGGER_MODE (3 << 2)
+
+///
+/// Non-Maskable Interrupt Source Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT32 GlobalSystemInterrupt;
+} EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
+
+///
+/// Local APIC NMI Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT16 Flags;
+ UINT8 LocalApicLint;
+} EFI_ACPI_5_1_LOCAL_APIC_NMI_STRUCTURE;
+
+///
+/// Local APIC Address Override Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved;
+ UINT64 LocalApicAddress;
+} EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
+
+///
+/// IO SAPIC Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 GlobalSystemInterruptBase;
+ UINT64 IoSapicAddress;
+} EFI_ACPI_5_1_IO_SAPIC_STRUCTURE;
+
+///
+/// Local SAPIC Structure
+/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT8 LocalSapicId;
+ UINT8 LocalSapicEid;
+ UINT8 Reserved[3];
+ UINT32 Flags;
+ UINT32 ACPIProcessorUIDValue;
+} EFI_ACPI_5_1_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
+
+///
+/// Platform Interrupt Sources Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT8 InterruptType;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT8 IoSapicVector;
+ UINT32 GlobalSystemInterrupt;
+ UINT32 PlatformInterruptSourceFlags;
+} EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
+
+///
+/// Platform Interrupt Source Flags.
+/// All other bits are reserved and must be set to 0.
+///
+#define EFI_ACPI_5_1_CPEI_PROCESSOR_OVERRIDE BIT0
+
+///
+/// Processor Local x2APIC Structure Definition
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Reserved[2];
+ UINT32 X2ApicId;
+ UINT32 Flags;
+ UINT32 AcpiProcessorUid;
+} EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_STRUCTURE;
+
+///
+/// Local x2APIC NMI Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT32 AcpiProcessorUid;
+ UINT8 LocalX2ApicLint;
+ UINT8 Reserved[3];
+} EFI_ACPI_5_1_LOCAL_X2APIC_NMI_STRUCTURE;
+
+///
+/// GIC Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved;
+ UINT32 CPUInterfaceNumber;
+ UINT32 AcpiProcessorUid;
+ UINT32 Flags;
+ UINT32 ParkingProtocolVersion;
+ UINT32 PerformanceInterruptGsiv;
+ UINT64 ParkedAddress;
+ UINT64 PhysicalBaseAddress;
+ UINT64 GICV;
+ UINT64 GICH;
+ UINT32 VGICMaintenanceInterrupt;
+ UINT64 GICRBaseAddress;
+ UINT64 MPIDR;
+} EFI_ACPI_5_1_GIC_STRUCTURE;
+
+///
+/// GIC Flags. All other bits are reserved and must be 0.
+///
+#define EFI_ACPI_5_1_GIC_ENABLED BIT0
+#define EFI_ACPI_5_1_PERFORMANCE_INTERRUPT_MODEL BIT1
+#define EFI_ACPI_5_1_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2
+
+///
+/// GIC Distributor Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved1;
+ UINT32 GicId;
+ UINT64 PhysicalBaseAddress;
+ UINT32 SystemVectorBase;
+ UINT8 GicVersion;
+ UINT8 Reserved2[3];
+} EFI_ACPI_5_1_GIC_DISTRIBUTOR_STRUCTURE;
+
+///
+/// GIC Version
+///
+#define EFI_ACPI_5_1_GIC_V1 0x01
+#define EFI_ACPI_5_1_GIC_V2 0x02
+#define EFI_ACPI_5_1_GIC_V3 0x03
+#define EFI_ACPI_5_1_GIC_V4 0x04
+
+///
+/// GIC MSI Frame Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved1;
+ UINT32 GicMsiFrameId;
+ UINT64 PhysicalBaseAddress;
+ UINT32 Flags;
+ UINT16 SPICount;
+ UINT16 SPIBase;
+} EFI_ACPI_5_1_GIC_MSI_FRAME_STRUCTURE;
+
+///
+/// GIC MSI Frame Flags. All other bits are reserved and must be 0.
+///
+#define EFI_ACPI_5_1_SPI_COUNT_BASE_SELECT BIT0
+
+///
+/// GICR Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved;
+ UINT64 DiscoveryRangeBaseAddress;
+ UINT32 DiscoveryRangeLength;
+} EFI_ACPI_5_1_GICR_STRUCTURE;
+
+///
+/// Smart Battery Description Table (SBST)
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 WarningEnergyLevel;
+ UINT32 LowEnergyLevel;
+ UINT32 CriticalEnergyLevel;
+} EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE;
+
+///
+/// SBST Version (as defined in ACPI 5.1 spec.)
+///
+#define EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
+
+///
+/// Embedded Controller Boot Resources Table (ECDT)
+/// The table is followed by a null terminated ASCII string that contains
+/// a fully qualified reference to the name space object.
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcControl;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcData;
+ UINT32 Uid;
+ UINT8 GpeBit;
+} EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
+
+///
+/// ECDT Version (as defined in ACPI 5.1 spec.)
+///
+#define EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01
+
+///
+/// System Resource Affinity Table (SRAT). The rest of the table
+/// must be defined in a platform specific manner.
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 Reserved1; ///< Must be set to 1
+ UINT64 Reserved2;
+} EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;
+
+///
+/// SRAT Version (as defined in ACPI 5.1 spec.)
+///
+#define EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03
+
+//
+// SRAT structure types.
+// All other values between 0x04 an 0xFF are reserved and
+// will be ignored by OSPM.
+//
+#define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00
+#define EFI_ACPI_5_1_MEMORY_AFFINITY 0x01
+#define EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02
+#define EFI_ACPI_5_1_GICC_AFFINITY 0x03
+
+///
+/// Processor Local APIC/SAPIC Affinity Structure Definition
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 ProximityDomain7To0;
+ UINT8 ApicId;
+ UINT32 Flags;
+ UINT8 LocalSapicEid;
+ UINT8 ProximityDomain31To8[3];
+ UINT32 ClockDomain;
+} EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;
+
+///
+/// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.
+///
+#define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
+
+///
+/// Memory Affinity Structure Definition
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT32 ProximityDomain;
+ UINT16 Reserved1;
+ UINT32 AddressBaseLow;
+ UINT32 AddressBaseHigh;
+ UINT32 LengthLow;
+ UINT32 LengthHigh;
+ UINT32 Reserved2;
+ UINT32 Flags;
+ UINT64 Reserved3;
+} EFI_ACPI_5_1_MEMORY_AFFINITY_STRUCTURE;
+
+//
+// Memory Flags. All other bits are reserved and must be 0.
+//
+#define EFI_ACPI_5_1_MEMORY_ENABLED (1 << 0)
+#define EFI_ACPI_5_1_MEMORY_HOT_PLUGGABLE (1 << 1)
+#define EFI_ACPI_5_1_MEMORY_NONVOLATILE (1 << 2)
+
+///
+/// Processor Local x2APIC Affinity Structure Definition
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Reserved1[2];
+ UINT32 ProximityDomain;
+ UINT32 X2ApicId;
+ UINT32 Flags;
+ UINT32 ClockDomain;
+ UINT8 Reserved2[4];
+} EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;
+
+///
+/// GICC Affinity Structure Definition
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT32 ProximityDomain;
+ UINT32 AcpiProcessorUid;
+ UINT32 Flags;
+ UINT32 ClockDomain;
+} EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE;
+
+///
+/// GICC Flags. All other bits are reserved and must be 0.
+///
+#define EFI_ACPI_5_1_GICC_ENABLED (1 << 0)
+
+///
+/// System Locality Distance Information Table (SLIT).
+/// The rest of the table is a matrix.
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT64 NumberOfSystemLocalities;
+} EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;
+
+///
+/// SLIT Version (as defined in ACPI 5.1 spec.)
+///
+#define EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01
+
+///
+/// Corrected Platform Error Polling Table (CPEP)
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT8 Reserved[8];
+} EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;
+
+///
+/// CPEP Version (as defined in ACPI 5.1 spec.)
+///
+#define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01
+
+//
+// CPEP processor structure types.
+//
+#define EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC 0x00
+
+///
+/// Corrected Platform Error Polling Processor Structure Definition
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT32 PollingInterval;
+} EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;
+
+///
+/// Maximum System Characteristics Table (MSCT)
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 OffsetProxDomInfo;
+ UINT32 MaximumNumberOfProximityDomains;
+ UINT32 MaximumNumberOfClockDomains;
+ UINT64 MaximumPhysicalAddress;
+} EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;
+
+///
+/// MSCT Version (as defined in ACPI 5.1 spec.)
+///
+#define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01
+
+///
+/// Maximum Proximity Domain Information Structure Definition
+///
+typedef struct {
+ UINT8 Revision;
+ UINT8 Length;
+ UINT32 ProximityDomainRangeLow;
+ UINT32 ProximityDomainRangeHigh;
+ UINT32 MaximumProcessorCapacity;
+ UINT64 MaximumMemoryCapacity;
+} EFI_ACPI_5_1_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;
+
+///
+/// ACPI RAS Feature Table definition.
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT8 PlatformCommunicationChannelIdentifier[12];
+} EFI_ACPI_5_1_RAS_FEATURE_TABLE;
+
+///
+/// RASF Version (as defined in ACPI 5.1 spec.)
+///
+#define EFI_ACPI_5_1_RAS_FEATURE_TABLE_REVISION 0x01
+
+///
+/// ACPI RASF Platform Communication Channel Shared Memory Region definition.
+///
+typedef struct {
+ UINT32 Signature;
+ UINT16 Command;
+ UINT16 Status;
+ UINT16 Version;
+ UINT8 RASCapabilities[16];
+ UINT8 SetRASCapabilities[16];
+ UINT16 NumberOfRASFParameterBlocks;
+ UINT32 SetRASCapabilitiesStatus;
+} EFI_ACPI_5_1_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
+
+///
+/// ACPI RASF PCC command code
+///
+#define EFI_ACPI_5_1_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01
+
+///
+/// ACPI RASF Platform RAS Capabilities
+///
+#define EFI_ACPI_5_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED 0x01
+#define EFI_ACPI_5_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED_AND_EXPOSED_TO_SOFTWARE 0x02
+
+///
+/// ACPI RASF Parameter Block structure for PATROL_SCRUB
+///
+typedef struct {
+ UINT16 Type;
+ UINT16 Version;
+ UINT16 Length;
+ UINT16 PatrolScrubCommand;
+ UINT64 RequestedAddressRange[2];
+ UINT64 ActualAddressRange[2];
+ UINT16 Flags;
+ UINT8 RequestedSpeed;
+} EFI_ACPI_5_1_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;
+
+///
+/// ACPI RASF Patrol Scrub command
+///
+#define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01
+#define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02
+#define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03
+
+///
+/// Memory Power State Table definition.
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT8 PlatformCommunicationChannelIdentifier;
+ UINT8 Reserved[3];
+// Memory Power Node Structure
+// Memory Power State Characteristics
+} EFI_ACPI_5_1_MEMORY_POWER_STATUS_TABLE;
+
+///
+/// MPST Version (as defined in ACPI 5.1 spec.)
+///
+#define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_REVISION 0x01
+
+///
+/// MPST Platform Communication Channel Shared Memory Region definition.
+///
+typedef struct {
+ UINT32 Signature;
+ UINT16 Command;
+ UINT16 Status;
+ UINT32 MemoryPowerCommandRegister;
+ UINT32 MemoryPowerStatusRegister;
+ UINT32 PowerStateId;
+ UINT32 MemoryPowerNodeId;
+ UINT64 MemoryEnergyConsumed;
+ UINT64 ExpectedAveragePowerComsuned;
+} EFI_ACPI_5_1_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
+
+///
+/// ACPI MPST PCC command code
+///
+#define EFI_ACPI_5_1_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03
+
+///
+/// ACPI MPST Memory Power command
+///
+#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01
+#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02
+#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03
+#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04
+
+///
+/// MPST Memory Power Node Table
+///
+typedef struct {
+ UINT8 PowerStateValue;
+ UINT8 PowerStateInformationIndex;
+} EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE;
+
+typedef struct {
+ UINT8 Flag;
+ UINT8 Reserved;
+ UINT16 MemoryPowerNodeId;
+ UINT32 Length;
+ UINT64 AddressBase;
+ UINT64 AddressLength;
+ UINT32 NumberOfPowerStates;
+ UINT32 NumberOfPhysicalComponents;
+//EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];
+//UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];
+} EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE;
+
+#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01
+#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02
+#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04
+
+typedef struct {
+ UINT16 MemoryPowerNodeCount;
+ UINT8 Reserved[2];
+} EFI_ACPI_5_1_MPST_MEMORY_POWER_NODE_TABLE;
+
+///
+/// MPST Memory Power State Characteristics Table
+///
+typedef struct {
+ UINT8 PowerStateStructureID;
+ UINT8 Flag;
+ UINT16 Reserved;
+ UINT32 AveragePowerConsumedInMPS0;
+ UINT32 RelativePowerSavingToMPS0;
+ UINT64 ExitLatencyToMPS0;
+} EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;
+
+#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01
+#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02
+#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04
+
+typedef struct {
+ UINT16 MemoryPowerStateCharacteristicsCount;
+ UINT8 Reserved[2];
+} EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;
+
+///
+/// Memory Topology Table definition.
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 Reserved;
+} EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE;
+
+///
+/// PMTT Version (as defined in ACPI 5.1 spec.)
+///
+#define EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE_REVISION 0x01
+
+///
+/// Common Memory Aggregator Device Structure.
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Reserved;
+ UINT16 Length;
+ UINT16 Flags;
+ UINT16 Reserved1;
+} EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
+
+///
+/// Memory Aggregator Device Type
+///
+#define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x1
+#define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x2
+#define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x3
+
+///
+/// Socket Memory Aggregator Device Structure.
+///
+typedef struct {
+ EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
+ UINT16 SocketIdentifier;
+ UINT16 Reserved;
+//EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];
+} EFI_ACPI_5_1_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
+
+///
+/// MemoryController Memory Aggregator Device Structure.
+///
+typedef struct {
+ EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
+ UINT32 ReadLatency;
+ UINT32 WriteLatency;
+ UINT32 ReadBandwidth;
+ UINT32 WriteBandwidth;
+ UINT16 OptimalAccessUnit;
+ UINT16 OptimalAccessAlignment;
+ UINT16 Reserved;
+ UINT16 NumberOfProximityDomains;
+//UINT32 ProximityDomain[NumberOfProximityDomains];
+//EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];
+} EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
+
+///
+/// DIMM Memory Aggregator Device Structure.
+///
+typedef struct {
+ EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
+ UINT16 PhysicalComponentIdentifier;
+ UINT16 Reserved;
+ UINT32 SizeOfDimm;
+ UINT32 SmbiosHandle;
+} EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
+
+///
+/// Boot Graphics Resource Table definition.
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ ///
+ /// 2-bytes (16 bit) version ID. This value must be 1.
+ ///
+ UINT16 Version;
+ ///
+ /// 1-byte status field indicating current status about the table.
+ /// Bits[7:1] = Reserved (must be zero)
+ /// Bit [0] = Valid. A one indicates the boot image graphic is valid.
+ ///
+ UINT8 Status;
+ ///
+ /// 1-byte enumerated type field indicating format of the image.
+ /// 0 = Bitmap
+ /// 1 - 255 Reserved (for future use)
+ ///
+ UINT8 ImageType;
+ ///
+ /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy
+ /// of the image bitmap.
+ ///
+ UINT64 ImageAddress;
+ ///
+ /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.
+ /// (X, Y) display offset of the top left corner of the boot image.
+ /// The top left corner of the display is at offset (0, 0).
+ ///
+ UINT32 ImageOffsetX;
+ ///
+ /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.
+ /// (X, Y) display offset of the top left corner of the boot image.
+ /// The top left corner of the display is at offset (0, 0).
+ ///
+ UINT32 ImageOffsetY;
+} EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE;
+
+///
+/// BGRT Revision
+///
+#define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1
+
+///
+/// BGRT Version
+///
+#define EFI_ACPI_5_1_BGRT_VERSION 0x01
+
+///
+/// BGRT Status
+///
+#define EFI_ACPI_5_1_BGRT_STATUS_NOT_DISPLAYED 0x00
+#define EFI_ACPI_5_1_BGRT_STATUS_DISPLAYED 0x01
+
+///
+/// BGRT Image Type
+///
+#define EFI_ACPI_5_1_BGRT_IMAGE_TYPE_BMP 0x00
+
+///
+/// FPDT Version (as defined in ACPI 5.1 spec.)
+///
+#define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01
+
+///
+/// FPDT Performance Record Types
+///
+#define EFI_ACPI_5_1_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000
+#define EFI_ACPI_5_1_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001
+
+///
+/// FPDT Performance Record Revision
+///
+#define EFI_ACPI_5_1_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01
+#define EFI_ACPI_5_1_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01
+
+///
+/// FPDT Runtime Performance Record Types
+///
+#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000
+#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001
+#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002
+
+///
+/// FPDT Runtime Performance Record Revision
+///
+#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01
+#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01
+#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02
+
+///
+/// FPDT Performance Record header
+///
+typedef struct {
+ UINT16 Type;
+ UINT8 Length;
+ UINT8 Revision;
+} EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER;
+
+///
+/// FPDT Performance Table header
+///
+typedef struct {
+ UINT32 Signature;
+ UINT32 Length;
+} EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER;
+
+///
+/// FPDT Firmware Basic Boot Performance Pointer Record Structure
+///
+typedef struct {
+ EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ UINT32 Reserved;
+ ///
+ /// 64-bit processor-relative physical address of the Basic Boot Performance Table.
+ ///
+ UINT64 BootPerformanceTablePointer;
+} EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;
+
+///
+/// FPDT S3 Performance Table Pointer Record Structure
+///
+typedef struct {
+ EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ UINT32 Reserved;
+ ///
+ /// 64-bit processor-relative physical address of the S3 Performance Table.
+ ///
+ UINT64 S3PerformanceTablePointer;
+} EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;
+
+///
+/// FPDT Firmware Basic Boot Performance Record Structure
+///
+typedef struct {
+ EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ UINT32 Reserved;
+ ///
+ /// Timer value logged at the beginning of firmware image execution.
+ /// This may not always be zero or near zero.
+ ///
+ UINT64 ResetEnd;
+ ///
+ /// Timer value logged just prior to loading the OS boot loader into memory.
+ /// For non-UEFI compatible boots, this field must be zero.
+ ///
+ UINT64 OsLoaderLoadImageStart;
+ ///
+ /// Timer value logged just prior to launching the previously loaded OS boot loader image.
+ /// For non-UEFI compatible boots, the timer value logged will be just prior
+ /// to the INT 19h handler invocation.
+ ///
+ UINT64 OsLoaderStartImageStart;
+ ///
+ /// Timer value logged at the point when the OS loader calls the
+ /// ExitBootServices function for UEFI compatible firmware.
+ /// For non-UEFI compatible boots, this field must be zero.
+ ///
+ UINT64 ExitBootServicesEntry;
+ ///
+ /// Timer value logged at the point just prior towhen the OS loader gaining
+ /// control back from calls the ExitBootServices function for UEFI compatible firmware.
+ /// For non-UEFI compatible boots, this field must be zero.
+ ///
+ UINT64 ExitBootServicesExit;
+} EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_RECORD;
+
+///
+/// FPDT Firmware Basic Boot Performance Table signature
+///
+#define EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T')
+
+//
+// FPDT Firmware Basic Boot Performance Table
+//
+typedef struct {
+ EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header;
+ //
+ // one or more Performance Records.
+ //
+} EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_TABLE;
+
+///
+/// FPDT "S3PT" S3 Performance Table
+///
+#define EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T')
+
+//
+// FPDT Firmware S3 Boot Performance Table
+//
+typedef struct {
+ EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header;
+ //
+ // one or more Performance Records.
+ //
+} EFI_ACPI_5_1_FPDT_FIRMWARE_S3_BOOT_TABLE;
+
+///
+/// FPDT Basic S3 Resume Performance Record
+///
+typedef struct {
+ EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ ///
+ /// A count of the number of S3 resume cycles since the last full boot sequence.
+ ///
+ UINT32 ResumeCount;
+ ///
+ /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the
+ /// OS waking vector. Only the most recent resume cycle's time is retained.
+ ///
+ UINT64 FullResume;
+ ///
+ /// Average timer value of all resume cycles logged since the last full boot
+ /// sequence, including the most recent resume. Note that the entire log of
+ /// timer values does not need to be retained in order to calculate this average.
+ ///
+ UINT64 AverageResume;
+} EFI_ACPI_5_1_FPDT_S3_RESUME_RECORD;
+
+///
+/// FPDT Basic S3 Suspend Performance Record
+///
+typedef struct {
+ EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ ///
+ /// Timer value recorded at the OS write to SLP_TYP upon entry to S3.
+ /// Only the most recent suspend cycle's timer value is retained.
+ ///
+ UINT64 SuspendStart;
+ ///
+ /// Timer value recorded at the final firmware write to SLP_TYP (or other
+ /// mechanism) used to trigger hardware entry to S3.
+ /// Only the most recent suspend cycle's timer value is retained.
+ ///
+ UINT64 SuspendEnd;
+} EFI_ACPI_5_1_FPDT_S3_SUSPEND_RECORD;
+
+///
+/// Firmware Performance Record Table definition.
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+} EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_RECORD_TABLE;
+
+///
+/// Generic Timer Description Table definition.
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT64 CntControlBasePhysicalAddress;
+ UINT32 Reserved;
+ UINT32 SecurePL1TimerGSIV;
+ UINT32 SecurePL1TimerFlags;
+ UINT32 NonSecurePL1TimerGSIV;
+ UINT32 NonSecurePL1TimerFlags;
+ UINT32 VirtualTimerGSIV;
+ UINT32 VirtualTimerFlags;
+ UINT32 NonSecurePL2TimerGSIV;
+ UINT32 NonSecurePL2TimerFlags;
+ UINT64 CntReadBasePhysicalAddress;
+ UINT32 PlatformTimerCount;
+ UINT32 PlatformTimerOffset;
+} EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE;
+
+///
+/// GTDT Version (as defined in ACPI 5.1 spec.)
+///
+#define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x02
+
+///
+/// Timer Flags. All other bits are reserved and must be 0.
+///
+#define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
+#define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
+#define EFI_ACPI_5_1_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2
+
+///
+/// Platform Timer Type
+///
+#define EFI_ACPI_5_1_GTDT_GT_BLOCK 0
+#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG 1
+
+///
+/// GT Block Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT16 Length;
+ UINT8 Reserved;
+ UINT64 CntCtlBase;
+ UINT32 GTBlockTimerCount;
+ UINT32 GTBlockTimerOffset;
+} EFI_ACPI_5_1_GTDT_GT_BLOCK_STRUCTURE;
+
+///
+/// GT Block Timer Structure
+///
+typedef struct {
+ UINT8 GTFrameNumber;
+ UINT8 Reserved[3];
+ UINT64 CntBaseX;
+ UINT64 CntEL0BaseX;
+ UINT32 GTxPhysicalTimerGSIV;
+ UINT32 GTxPhysicalTimerFlags;
+ UINT32 GTxVirtualTimerGSIV;
+ UINT32 GTxVirtualTimerFlags;
+ UINT32 GTxCommonFlags;
+} EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_STRUCTURE;
+
+///
+/// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0.
+///
+#define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
+#define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
+
+///
+/// Common Flags Flags. All other bits are reserved and must be 0.
+///
+#define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0
+#define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1
+
+///
+/// SBSA Generic Watchdog Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT16 Length;
+ UINT8 Reserved;
+ UINT64 RefreshFramePhysicalAddress;
+ UINT64 WatchdogControlFramePhysicalAddress;
+ UINT32 WatchdogTimerGSIV;
+ UINT32 WatchdogTimerFlags;
+} EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE;
+
+///
+/// SBSA Generic Watchdog Timer Flags. All other bits are reserved and must be 0.
+///
+#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0
+#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1
+#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2
+
+///
+/// Boot Error Record Table (BERT)
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 BootErrorRegionLength;
+ UINT64 BootErrorRegion;
+} EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_HEADER;
+
+///
+/// BERT Version (as defined in ACPI 5.1 spec.)
+///
+#define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_REVISION 0x01
+
+///
+/// Boot Error Region Block Status Definition
+///
+typedef struct {
+ UINT32 UncorrectableErrorValid:1;
+ UINT32 CorrectableErrorValid:1;
+ UINT32 MultipleUncorrectableErrors:1;
+ UINT32 MultipleCorrectableErrors:1;
+ UINT32 ErrorDataEntryCount:10;
+ UINT32 Reserved:18;
+} EFI_ACPI_5_1_ERROR_BLOCK_STATUS;
+
+///
+/// Boot Error Region Definition
+///
+typedef struct {
+ EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus;
+ UINT32 RawDataOffset;
+ UINT32 RawDataLength;
+ UINT32 DataLength;
+ UINT32 ErrorSeverity;
+} EFI_ACPI_5_1_BOOT_ERROR_REGION_STRUCTURE;
+
+//
+// Boot Error Severity types
+//
+#define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTABLE 0x00
+#define EFI_ACPI_5_1_ERROR_SEVERITY_FATAL 0x01
+#define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTED 0x02
+#define EFI_ACPI_5_1_ERROR_SEVERITY_NONE 0x03
+
+///
+/// Generic Error Data Entry Definition
+///
+typedef struct {
+ UINT8 SectionType[16];
+ UINT32 ErrorSeverity;
+ UINT16 Revision;
+ UINT8 ValidationBits;
+ UINT8 Flags;
+ UINT32 ErrorDataLength;
+ UINT8 FruId[16];
+ UINT8 FruText[20];
+} EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;
+
+///
+/// Generic Error Data Entry Version (as defined in ACPI 5.1 spec.)
+///
+#define EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0201
+
+///
+/// HEST - Hardware Error Source Table
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 ErrorSourceCount;
+} EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_HEADER;
+
+///
+/// HEST Version (as defined in ACPI 5.1 spec.)
+///
+#define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01
+
+//
+// Error Source structure types.
+//
+#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00
+#define EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01
+#define EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR 0x02
+#define EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER 0x06
+#define EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER 0x07
+#define EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER 0x08
+#define EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR 0x09
+
+//
+// Error Source structure flags.
+//
+#define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)
+#define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)
+
+///
+/// IA-32 Architecture Machine Check Exception Structure Definition
+///
+typedef struct {
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT64 GlobalCapabilityInitData;
+ UINT64 GlobalControlInitData;
+ UINT8 NumberOfHardwareBanks;
+ UINT8 Reserved1[7];
+} EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;
+
+///
+/// IA-32 Architecture Machine Check Bank Structure Definition
+///
+typedef struct {
+ UINT8 BankNumber;
+ UINT8 ClearStatusOnInitialization;
+ UINT8 StatusDataFormat;
+ UINT8 Reserved0;
+ UINT32 ControlRegisterMsrAddress;
+ UINT64 ControlInitData;
+ UINT32 StatusRegisterMsrAddress;
+ UINT32 AddressRegisterMsrAddress;
+ UINT32 MiscRegisterMsrAddress;
+} EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;
+
+///
+/// IA-32 Architecture Machine Check Bank Structure MCA data format
+///
+#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00
+#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01
+#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02
+
+//
+// Hardware Error Notification types. All other values are reserved
+//
+#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00
+#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01
+#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02
+#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_SCI 0x03
+#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_NMI 0x04
+
+///
+/// Hardware Error Notification Configuration Write Enable Structure Definition
+///
+typedef struct {
+ UINT16 Type:1;
+ UINT16 PollInterval:1;
+ UINT16 SwitchToPollingThresholdValue:1;
+ UINT16 SwitchToPollingThresholdWindow:1;
+ UINT16 ErrorThresholdValue:1;
+ UINT16 ErrorThresholdWindow:1;
+ UINT16 Reserved:10;
+} EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;
+
+///
+/// Hardware Error Notification Structure Definition
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;
+ UINT32 PollInterval;
+ UINT32 Vector;
+ UINT32 SwitchToPollingThresholdValue;
+ UINT32 SwitchToPollingThresholdWindow;
+ UINT32 ErrorThresholdValue;
+ UINT32 ErrorThresholdWindow;
+} EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;
+
+///
+/// IA-32 Architecture Corrected Machine Check Structure Definition
+///
+typedef struct {
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
+ UINT8 NumberOfHardwareBanks;
+ UINT8 Reserved1[3];
+} EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;
+
+///
+/// IA-32 Architecture NMI Error Structure Definition
+///
+typedef struct {
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 MaxRawDataLength;
+} EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;
+
+///
+/// PCI Express Root Port AER Structure Definition
+///
+typedef struct {
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 Bus;
+ UINT16 Device;
+ UINT16 Function;
+ UINT16 DeviceControl;
+ UINT8 Reserved1[2];
+ UINT32 UncorrectableErrorMask;
+ UINT32 UncorrectableErrorSeverity;
+ UINT32 CorrectableErrorMask;
+ UINT32 AdvancedErrorCapabilitiesAndControl;
+ UINT32 RootErrorCommand;
+} EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;
+
+///
+/// PCI Express Device AER Structure Definition
+///
+typedef struct {
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 Bus;
+ UINT16 Device;
+ UINT16 Function;
+ UINT16 DeviceControl;
+ UINT8 Reserved1[2];
+ UINT32 UncorrectableErrorMask;
+ UINT32 UncorrectableErrorSeverity;
+ UINT32 CorrectableErrorMask;
+ UINT32 AdvancedErrorCapabilitiesAndControl;
+} EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER_STRUCTURE;
+
+///
+/// PCI Express Bridge AER Structure Definition
+///
+typedef struct {
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 Bus;
+ UINT16 Device;
+ UINT16 Function;
+ UINT16 DeviceControl;
+ UINT8 Reserved1[2];
+ UINT32 UncorrectableErrorMask;
+ UINT32 UncorrectableErrorSeverity;
+ UINT32 CorrectableErrorMask;
+ UINT32 AdvancedErrorCapabilitiesAndControl;
+ UINT32 SecondaryUncorrectableErrorMask;
+ UINT32 SecondaryUncorrectableErrorSeverity;
+ UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;
+} EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;
+
+///
+/// Generic Hardware Error Source Structure Definition
+///
+typedef struct {
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT16 RelatedSourceId;
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 MaxRawDataLength;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;
+ EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
+ UINT32 ErrorStatusBlockLength;
+} EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;
+
+///
+/// Generic Error Status Definition
+///
+typedef struct {
+ EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus;
+ UINT32 RawDataOffset;
+ UINT32 RawDataLength;
+ UINT32 DataLength;
+ UINT32 ErrorSeverity;
+} EFI_ACPI_5_1_GENERIC_ERROR_STATUS_STRUCTURE;
+
+///
+/// ERST - Error Record Serialization Table
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 SerializationHeaderSize;
+ UINT8 Reserved0[4];
+ UINT32 InstructionEntryCount;
+} EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;
+
+///
+/// ERST Version (as defined in ACPI 5.1 spec.)
+///
+#define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01
+
+///
+/// ERST Serialization Actions
+///
+#define EFI_ACPI_5_1_ERST_BEGIN_WRITE_OPERATION 0x00
+#define EFI_ACPI_5_1_ERST_BEGIN_READ_OPERATION 0x01
+#define EFI_ACPI_5_1_ERST_BEGIN_CLEAR_OPERATION 0x02
+#define EFI_ACPI_5_1_ERST_END_OPERATION 0x03
+#define EFI_ACPI_5_1_ERST_SET_RECORD_OFFSET 0x04
+#define EFI_ACPI_5_1_ERST_EXECUTE_OPERATION 0x05
+#define EFI_ACPI_5_1_ERST_CHECK_BUSY_STATUS 0x06
+#define EFI_ACPI_5_1_ERST_GET_COMMAND_STATUS 0x07
+#define EFI_ACPI_5_1_ERST_GET_RECORD_IDENTIFIER 0x08
+#define EFI_ACPI_5_1_ERST_SET_RECORD_IDENTIFIER 0x09
+#define EFI_ACPI_5_1_ERST_GET_RECORD_COUNT 0x0A
+#define EFI_ACPI_5_1_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B
+#define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D
+#define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E
+#define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F
+
+///
+/// ERST Action Command Status
+///
+#define EFI_ACPI_5_1_ERST_STATUS_SUCCESS 0x00
+#define EFI_ACPI_5_1_ERST_STATUS_NOT_ENOUGH_SPACE 0x01
+#define EFI_ACPI_5_1_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02
+#define EFI_ACPI_5_1_ERST_STATUS_FAILED 0x03
+#define EFI_ACPI_5_1_ERST_STATUS_RECORD_STORE_EMPTY 0x04
+#define EFI_ACPI_5_1_ERST_STATUS_RECORD_NOT_FOUND 0x05
+
+///
+/// ERST Serialization Instructions
+///
+#define EFI_ACPI_5_1_ERST_READ_REGISTER 0x00
+#define EFI_ACPI_5_1_ERST_READ_REGISTER_VALUE 0x01
+#define EFI_ACPI_5_1_ERST_WRITE_REGISTER 0x02
+#define EFI_ACPI_5_1_ERST_WRITE_REGISTER_VALUE 0x03
+#define EFI_ACPI_5_1_ERST_NOOP 0x04
+#define EFI_ACPI_5_1_ERST_LOAD_VAR1 0x05
+#define EFI_ACPI_5_1_ERST_LOAD_VAR2 0x06
+#define EFI_ACPI_5_1_ERST_STORE_VAR1 0x07
+#define EFI_ACPI_5_1_ERST_ADD 0x08
+#define EFI_ACPI_5_1_ERST_SUBTRACT 0x09
+#define EFI_ACPI_5_1_ERST_ADD_VALUE 0x0A
+#define EFI_ACPI_5_1_ERST_SUBTRACT_VALUE 0x0B
+#define EFI_ACPI_5_1_ERST_STALL 0x0C
+#define EFI_ACPI_5_1_ERST_STALL_WHILE_TRUE 0x0D
+#define EFI_ACPI_5_1_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E
+#define EFI_ACPI_5_1_ERST_GOTO 0x0F
+#define EFI_ACPI_5_1_ERST_SET_SRC_ADDRESS_BASE 0x10
+#define EFI_ACPI_5_1_ERST_SET_DST_ADDRESS_BASE 0x11
+#define EFI_ACPI_5_1_ERST_MOVE_DATA 0x12
+
+///
+/// ERST Instruction Flags
+///
+#define EFI_ACPI_5_1_ERST_PRESERVE_REGISTER 0x01
+
+///
+/// ERST Serialization Instruction Entry
+///
+typedef struct {
+ UINT8 SerializationAction;
+ UINT8 Instruction;
+ UINT8 Flags;
+ UINT8 Reserved0;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
+ UINT64 Value;
+ UINT64 Mask;
+} EFI_ACPI_5_1_ERST_SERIALIZATION_INSTRUCTION_ENTRY;
+
+///
+/// EINJ - Error Injection Table
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 InjectionHeaderSize;
+ UINT8 InjectionFlags;
+ UINT8 Reserved0[3];
+ UINT32 InjectionEntryCount;
+} EFI_ACPI_5_1_ERROR_INJECTION_TABLE_HEADER;
+
+///
+/// EINJ Version (as defined in ACPI 5.1 spec.)
+///
+#define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_REVISION 0x01
+
+///
+/// EINJ Error Injection Actions
+///
+#define EFI_ACPI_5_1_EINJ_BEGIN_INJECTION_OPERATION 0x00
+#define EFI_ACPI_5_1_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01
+#define EFI_ACPI_5_1_EINJ_SET_ERROR_TYPE 0x02
+#define EFI_ACPI_5_1_EINJ_GET_ERROR_TYPE 0x03
+#define EFI_ACPI_5_1_EINJ_END_OPERATION 0x04
+#define EFI_ACPI_5_1_EINJ_EXECUTE_OPERATION 0x05
+#define EFI_ACPI_5_1_EINJ_CHECK_BUSY_STATUS 0x06
+#define EFI_ACPI_5_1_EINJ_GET_COMMAND_STATUS 0x07
+#define EFI_ACPI_5_1_EINJ_TRIGGER_ERROR 0xFF
+
+///
+/// EINJ Action Command Status
+///
+#define EFI_ACPI_5_1_EINJ_STATUS_SUCCESS 0x00
+#define EFI_ACPI_5_1_EINJ_STATUS_UNKNOWN_FAILURE 0x01
+#define EFI_ACPI_5_1_EINJ_STATUS_INVALID_ACCESS 0x02
+
+///
+/// EINJ Error Type Definition
+///
+#define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)
+#define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)
+#define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)
+#define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)
+#define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)
+#define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)
+#define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)
+#define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)
+#define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)
+#define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)
+#define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)
+#define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)
+
+///
+/// EINJ Injection Instructions
+///
+#define EFI_ACPI_5_1_EINJ_READ_REGISTER 0x00
+#define EFI_ACPI_5_1_EINJ_READ_REGISTER_VALUE 0x01
+#define EFI_ACPI_5_1_EINJ_WRITE_REGISTER 0x02
+#define EFI_ACPI_5_1_EINJ_WRITE_REGISTER_VALUE 0x03
+#define EFI_ACPI_5_1_EINJ_NOOP 0x04
+
+///
+/// EINJ Instruction Flags
+///
+#define EFI_ACPI_5_1_EINJ_PRESERVE_REGISTER 0x01
+
+///
+/// EINJ Injection Instruction Entry
+///
+typedef struct {
+ UINT8 InjectionAction;
+ UINT8 Instruction;
+ UINT8 Flags;
+ UINT8 Reserved0;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
+ UINT64 Value;
+ UINT64 Mask;
+} EFI_ACPI_5_1_EINJ_INJECTION_INSTRUCTION_ENTRY;
+
+///
+/// EINJ Trigger Action Table
+///
+typedef struct {
+ UINT32 HeaderSize;
+ UINT32 Revision;
+ UINT32 TableSize;
+ UINT32 EntryCount;
+} EFI_ACPI_5_1_EINJ_TRIGGER_ACTION_TABLE;
+
+///
+/// Platform Communications Channel Table (PCCT)
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 Flags;
+ UINT64 Reserved;
+} EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;
+
+///
+/// PCCT Version (as defined in ACPI 5.1 spec.)
+///
+#define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01
+
+///
+/// PCCT Global Flags
+///
+#define EFI_ACPI_5_1_PCCT_FLAGS_SCI_DOORBELL BIT0
+
+//
+// PCCT Subspace type
+//
+#define EFI_ACPI_5_1_PCCT_SUBSPACE_TYPE_GENERIC 0x00
+
+///
+/// PCC Subspace Structure Header
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+} EFI_ACPI_5_1_PCCT_SUBSPACE_HEADER;
+
+///
+/// Generic Communications Subspace Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Reserved[6];
+ UINT64 BaseAddress;
+ UINT64 AddressLength;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
+ UINT64 DoorbellPreserve;
+ UINT64 DoorbellWrite;
+ UINT32 NominalLatency;
+ UINT32 MaximumPeriodicAccessRate;
+ UINT16 MinimumRequestTurnaroundTime;
+} EFI_ACPI_5_1_PCCT_SUBSPACE_GENERIC;
+
+///
+/// Generic Communications Channel Shared Memory Region
+///
+
+typedef struct {
+ UINT8 Command;
+ UINT8 Reserved:7;
+ UINT8 GenerateSci:1;
+} EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;
+
+typedef struct {
+ UINT8 CommandComplete:1;
+ UINT8 SciDoorbell:1;
+ UINT8 Error:1;
+ UINT8 PlatformNotification:1;
+ UINT8 Reserved:4;
+ UINT8 Reserved1;
+} EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;
+
+typedef struct {
+ UINT32 Signature;
+ EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command;
+ EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status;
+} EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;
+
+//
+// Known table signatures
+//
+
+///
+/// "RSD PTR " Root System Description Pointer
+///
+#define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')
+
+///
+/// "APIC" Multiple APIC Description Table
+///
+#define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')
+
+///
+/// "BERT" Boot Error Record Table
+///
+#define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T')
+
+///
+/// "BGRT" Boot Graphics Resource Table
+///
+#define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T')
+
+///
+/// "CPEP" Corrected Platform Error Polling Table
+///
+#define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')
+
+///
+/// "DSDT" Differentiated System Description Table
+///
+#define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')
+
+///
+/// "ECDT" Embedded Controller Boot Resources Table
+///
+#define EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')
+
+///
+/// "EINJ" Error Injection Table
+///
+#define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J')
+
+///
+/// "ERST" Error Record Serialization Table
+///
+#define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T')
+
+///
+/// "FACP" Fixed ACPI Description Table
+///
+#define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')
+
+///
+/// "FACS" Firmware ACPI Control Structure
+///
+#define EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')
+
+///
+/// "FPDT" Firmware Performance Data Table
+///
+#define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T')
+
+///
+/// "GTDT" Generic Timer Description Table
+///
+#define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T')
+
+///
+/// "HEST" Hardware Error Source Table
+///
+#define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T')
+
+///
+/// "MPST" Memory Power State Table
+///
+#define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T')
+
+///
+/// "MSCT" Maximum System Characteristics Table
+///
+#define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T')
+
+///
+/// "PMTT" Platform Memory Topology Table
+///
+#define EFI_ACPI_5_1_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T')
+
+///
+/// "PSDT" Persistent System Description Table
+///
+#define EFI_ACPI_5_1_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')
+
+///
+/// "RASF" ACPI RAS Feature Table
+///
+#define EFI_ACPI_5_1_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F')
+
+///
+/// "RSDT" Root System Description Table
+///
+#define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')
+
+///
+/// "SBST" Smart Battery Specification Table
+///
+#define EFI_ACPI_5_1_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')
+
+///
+/// "SLIT" System Locality Information Table
+///
+#define EFI_ACPI_5_1_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')
+
+///
+/// "SRAT" System Resource Affinity Table
+///
+#define EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')
+
+///
+/// "SSDT" Secondary System Description Table
+///
+#define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')
+
+///
+/// "XSDT" Extended System Description Table
+///
+#define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')
+
+///
+/// "BOOT" MS Simple Boot Spec
+///
+#define EFI_ACPI_5_1_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')
+
+///
+/// "CSRT" MS Core System Resource Table
+///
+#define EFI_ACPI_5_1_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T')
+
+///
+/// "DBG2" MS Debug Port 2 Spec
+///
+#define EFI_ACPI_5_1_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2')
+
+///
+/// "DBGP" MS Debug Port Spec
+///
+#define EFI_ACPI_5_1_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')
+
+///
+/// "DMAR" DMA Remapping Table
+///
+#define EFI_ACPI_5_1_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R')
+
+///
+/// "DRTM" Dynamic Root of Trust for Measurement Table
+///
+#define EFI_ACPI_5_1_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M')
+
+///
+/// "ETDT" Event Timer Description Table
+///
+#define EFI_ACPI_5_1_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')
+
+///
+/// "HPET" IA-PC High Precision Event Timer Table
+///
+#define EFI_ACPI_5_1_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T')
+
+///
+/// "iBFT" iSCSI Boot Firmware Table
+///
+#define EFI_ACPI_5_1_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T')
+
+///
+/// "IVRS" I/O Virtualization Reporting Structure
+///
+#define EFI_ACPI_5_1_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S')
+
+///
+/// "LPIT" Low Power Idle Table
+///
+#define EFI_ACPI_5_1_IO_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('L', 'P', 'I', 'T')
+
+///
+/// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table
+///
+#define EFI_ACPI_5_1_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')
+
+///
+/// "MCHI" Management Controller Host Interface Table
+///
+#define EFI_ACPI_5_1_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')
+
+///
+/// "MSDM" MS Data Management Table
+///
+#define EFI_ACPI_5_1_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')
+
+///
+/// "SLIC" MS Software Licensing Table Specification
+///
+#define EFI_ACPI_5_1_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')
+
+///
+/// "SPCR" Serial Port Concole Redirection Table
+///
+#define EFI_ACPI_5_1_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')
+
+///
+/// "SPMI" Server Platform Management Interface Table
+///
+#define EFI_ACPI_5_1_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')
+
+///
+/// "TCPA" Trusted Computing Platform Alliance Capabilities Table
+///
+#define EFI_ACPI_5_1_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')
+
+///
+/// "TPM2" Trusted Computing Platform 1 Table
+///
+#define EFI_ACPI_5_1_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2')
+
+///
+/// "UEFI" UEFI ACPI Data Table
+///
+#define EFI_ACPI_5_1_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I')
+
+///
+/// "WAET" Windows ACPI Emulated Devices Table
+///
+#define EFI_ACPI_5_1_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')
+
+///
+/// "WDAT" Watchdog Action Table
+///
+#define EFI_ACPI_5_1_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T')
+
+///
+/// "WDRT" Watchdog Resource Table
+///
+#define EFI_ACPI_5_1_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T')
+
+///
+/// "WPBT" MS Platform Binary Table
+///
+#define EFI_ACPI_5_1_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T')
+
+#pragma pack()
+
+#endif
diff --git a/MdePkg/Include/IndustryStandard/Acpi60.h b/MdePkg/Include/IndustryStandard/Acpi60.h
new file mode 100644
index 000000000000..478697cceb48
--- /dev/null
+++ b/MdePkg/Include/IndustryStandard/Acpi60.h
@@ -0,0 +1,2346 @@
+/** @file
+ ACPI 6.0 definitions from the ACPI Specification Revision 6.0 Errata A January, 2016.
+
+ Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>
+ (C) Copyright 2015-2016 Hewlett Packard Enterprise Development LP<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
+
+#ifndef _ACPI_6_0_H_
+#define _ACPI_6_0_H_
+
+#include <IndustryStandard/Acpi51.h>
+
+//
+// Ensure proper structure formats
+//
+#pragma pack(1)
+
+///
+/// ACPI 6.0 Generic Address Space definition
+///
+typedef struct {
+ UINT8 AddressSpaceId;
+ UINT8 RegisterBitWidth;
+ UINT8 RegisterBitOffset;
+ UINT8 AccessSize;
+ UINT64 Address;
+} EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE;
+
+//
+// Generic Address Space Address IDs
+//
+#define EFI_ACPI_6_0_SYSTEM_MEMORY 0
+#define EFI_ACPI_6_0_SYSTEM_IO 1
+#define EFI_ACPI_6_0_PCI_CONFIGURATION_SPACE 2
+#define EFI_ACPI_6_0_EMBEDDED_CONTROLLER 3
+#define EFI_ACPI_6_0_SMBUS 4
+#define EFI_ACPI_6_0_PLATFORM_COMMUNICATION_CHANNEL 0x0A
+#define EFI_ACPI_6_0_FUNCTIONAL_FIXED_HARDWARE 0x7F
+
+//
+// Generic Address Space Access Sizes
+//
+#define EFI_ACPI_6_0_UNDEFINED 0
+#define EFI_ACPI_6_0_BYTE 1
+#define EFI_ACPI_6_0_WORD 2
+#define EFI_ACPI_6_0_DWORD 3
+#define EFI_ACPI_6_0_QWORD 4
+
+//
+// ACPI 6.0 table structures
+//
+
+///
+/// Root System Description Pointer Structure
+///
+typedef struct {
+ UINT64 Signature;
+ UINT8 Checksum;
+ UINT8 OemId[6];
+ UINT8 Revision;
+ UINT32 RsdtAddress;
+ UINT32 Length;
+ UINT64 XsdtAddress;
+ UINT8 ExtendedChecksum;
+ UINT8 Reserved[3];
+} EFI_ACPI_6_0_ROOT_SYSTEM_DESCRIPTION_POINTER;
+
+///
+/// RSD_PTR Revision (as defined in ACPI 6.0 spec.)
+///
+#define EFI_ACPI_6_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 6.0) says current value is 2
+
+///
+/// Common table header, this prefaces all ACPI tables, including FACS, but
+/// excluding the RSD PTR structure
+///
+typedef struct {
+ UINT32 Signature;
+ UINT32 Length;
+} EFI_ACPI_6_0_COMMON_HEADER;
+
+//
+// Root System Description Table
+// No definition needed as it is a common description table header, the same with
+// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.
+//
+
+///
+/// RSDT Revision (as defined in ACPI 6.0 spec.)
+///
+#define EFI_ACPI_6_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+
+//
+// Extended System Description Table
+// No definition needed as it is a common description table header, the same with
+// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.
+//
+
+///
+/// XSDT Revision (as defined in ACPI 6.0 spec.)
+///
+#define EFI_ACPI_6_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+
+///
+/// Fixed ACPI Description Table Structure (FADT)
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 FirmwareCtrl;
+ UINT32 Dsdt;
+ UINT8 Reserved0;
+ UINT8 PreferredPmProfile;
+ UINT16 SciInt;
+ UINT32 SmiCmd;
+ UINT8 AcpiEnable;
+ UINT8 AcpiDisable;
+ UINT8 S4BiosReq;
+ UINT8 PstateCnt;
+ UINT32 Pm1aEvtBlk;
+ UINT32 Pm1bEvtBlk;
+ UINT32 Pm1aCntBlk;
+ UINT32 Pm1bCntBlk;
+ UINT32 Pm2CntBlk;
+ UINT32 PmTmrBlk;
+ UINT32 Gpe0Blk;
+ UINT32 Gpe1Blk;
+ UINT8 Pm1EvtLen;
+ UINT8 Pm1CntLen;
+ UINT8 Pm2CntLen;
+ UINT8 PmTmrLen;
+ UINT8 Gpe0BlkLen;
+ UINT8 Gpe1BlkLen;
+ UINT8 Gpe1Base;
+ UINT8 CstCnt;
+ UINT16 PLvl2Lat;
+ UINT16 PLvl3Lat;
+ UINT16 FlushSize;
+ UINT16 FlushStride;
+ UINT8 DutyOffset;
+ UINT8 DutyWidth;
+ UINT8 DayAlrm;
+ UINT8 MonAlrm;
+ UINT8 Century;
+ UINT16 IaPcBootArch;
+ UINT8 Reserved1;
+ UINT32 Flags;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE ResetReg;
+ UINT8 ResetValue;
+ UINT16 ArmBootArch;
+ UINT8 MinorVersion;
+ UINT64 XFirmwareCtrl;
+ UINT64 XDsdt;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE SleepControlReg;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;
+ UINT64 HypervisorVendorIdentity;
+} EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE;
+
+///
+/// FADT Version (as defined in ACPI 6.0 spec.)
+///
+#define EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x06
+#define EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x00
+
+//
+// Fixed ACPI Description Table Preferred Power Management Profile
+//
+#define EFI_ACPI_6_0_PM_PROFILE_UNSPECIFIED 0
+#define EFI_ACPI_6_0_PM_PROFILE_DESKTOP 1
+#define EFI_ACPI_6_0_PM_PROFILE_MOBILE 2
+#define EFI_ACPI_6_0_PM_PROFILE_WORKSTATION 3
+#define EFI_ACPI_6_0_PM_PROFILE_ENTERPRISE_SERVER 4
+#define EFI_ACPI_6_0_PM_PROFILE_SOHO_SERVER 5
+#define EFI_ACPI_6_0_PM_PROFILE_APPLIANCE_PC 6
+#define EFI_ACPI_6_0_PM_PROFILE_PERFORMANCE_SERVER 7
+#define EFI_ACPI_6_0_PM_PROFILE_TABLET 8
+
+//
+// Fixed ACPI Description Table Boot Architecture Flags
+// All other bits are reserved and must be set to 0.
+//
+#define EFI_ACPI_6_0_LEGACY_DEVICES BIT0
+#define EFI_ACPI_6_0_8042 BIT1
+#define EFI_ACPI_6_0_VGA_NOT_PRESENT BIT2
+#define EFI_ACPI_6_0_MSI_NOT_SUPPORTED BIT3
+#define EFI_ACPI_6_0_PCIE_ASPM_CONTROLS BIT4
+#define EFI_ACPI_6_0_CMOS_RTC_NOT_PRESENT BIT5
+
+//
+// Fixed ACPI Description Table Arm Boot Architecture Flags
+// All other bits are reserved and must be set to 0.
+//
+#define EFI_ACPI_6_0_ARM_PSCI_COMPLIANT BIT0
+#define EFI_ACPI_6_0_ARM_PSCI_USE_HVC BIT1
+
+//
+// Fixed ACPI Description Table Fixed Feature Flags
+// All other bits are reserved and must be set to 0.
+//
+#define EFI_ACPI_6_0_WBINVD BIT0
+#define EFI_ACPI_6_0_WBINVD_FLUSH BIT1
+#define EFI_ACPI_6_0_PROC_C1 BIT2
+#define EFI_ACPI_6_0_P_LVL2_UP BIT3
+#define EFI_ACPI_6_0_PWR_BUTTON BIT4
+#define EFI_ACPI_6_0_SLP_BUTTON BIT5
+#define EFI_ACPI_6_0_FIX_RTC BIT6
+#define EFI_ACPI_6_0_RTC_S4 BIT7
+#define EFI_ACPI_6_0_TMR_VAL_EXT BIT8
+#define EFI_ACPI_6_0_DCK_CAP BIT9
+#define EFI_ACPI_6_0_RESET_REG_SUP BIT10
+#define EFI_ACPI_6_0_SEALED_CASE BIT11
+#define EFI_ACPI_6_0_HEADLESS BIT12
+#define EFI_ACPI_6_0_CPU_SW_SLP BIT13
+#define EFI_ACPI_6_0_PCI_EXP_WAK BIT14
+#define EFI_ACPI_6_0_USE_PLATFORM_CLOCK BIT15
+#define EFI_ACPI_6_0_S4_RTC_STS_VALID BIT16
+#define EFI_ACPI_6_0_REMOTE_POWER_ON_CAPABLE BIT17
+#define EFI_ACPI_6_0_FORCE_APIC_CLUSTER_MODEL BIT18
+#define EFI_ACPI_6_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
+#define EFI_ACPI_6_0_HW_REDUCED_ACPI BIT20
+#define EFI_ACPI_6_0_LOW_POWER_S0_IDLE_CAPABLE BIT21
+
+///
+/// Firmware ACPI Control Structure
+///
+typedef struct {
+ UINT32 Signature;
+ UINT32 Length;
+ UINT32 HardwareSignature;
+ UINT32 FirmwareWakingVector;
+ UINT32 GlobalLock;
+ UINT32 Flags;
+ UINT64 XFirmwareWakingVector;
+ UINT8 Version;
+ UINT8 Reserved0[3];
+ UINT32 OspmFlags;
+ UINT8 Reserved1[24];
+} EFI_ACPI_6_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;
+
+///
+/// FACS Version (as defined in ACPI 6.0 spec.)
+///
+#define EFI_ACPI_6_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02
+
+///
+/// Firmware Control Structure Feature Flags
+/// All other bits are reserved and must be set to 0.
+///
+#define EFI_ACPI_6_0_S4BIOS_F BIT0
+#define EFI_ACPI_6_0_64BIT_WAKE_SUPPORTED_F BIT1
+
+///
+/// OSPM Enabled Firmware Control Structure Flags
+/// All other bits are reserved and must be set to 0.
+///
+#define EFI_ACPI_6_0_OSPM_64BIT_WAKE_F BIT0
+
+//
+// Differentiated System Description Table,
+// Secondary System Description Table
+// and Persistent System Description Table,
+// no definition needed as they are common description table header, the same with
+// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.
+//
+#define EFI_ACPI_6_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
+#define EFI_ACPI_6_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
+
+///
+/// Multiple APIC Description Table header definition. The rest of the table
+/// must be defined in a platform specific manner.
+///
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 LocalApicAddress;
+ UINT32 Flags;
+} EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
+
+///
+/// MADT Revision (as defined in ACPI 6.0 Errata A spec.)
+///
+#define EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x04
+
+///
+/// Multiple APIC Flags
+/// All other bits are reserved and must be set to 0.
+///
+#define EFI_ACPI_6_0_PCAT_COMPAT BIT0
+
+//
+// Multiple APIC Description Table APIC structure types
+// All other values between 0x0D and 0x7F are reserved and
+// will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.
+//
+#define EFI_ACPI_6_0_PROCESSOR_LOCAL_APIC 0x00
+#define EFI_ACPI_6_0_IO_APIC 0x01
+#define EFI_ACPI_6_0_INTERRUPT_SOURCE_OVERRIDE 0x02
+#define EFI_ACPI_6_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03
+#define EFI_ACPI_6_0_LOCAL_APIC_NMI 0x04
+#define EFI_ACPI_6_0_LOCAL_APIC_ADDRESS_OVERRIDE 0x05
+#define EFI_ACPI_6_0_IO_SAPIC 0x06
+#define EFI_ACPI_6_0_LOCAL_SAPIC 0x07
+#define EFI_ACPI_6_0_PLATFORM_INTERRUPT_SOURCES 0x08
+#define EFI_ACPI_6_0_PROCESSOR_LOCAL_X2APIC 0x09
+#define EFI_ACPI_6_0_LOCAL_X2APIC_NMI 0x0A
+#define EFI_ACPI_6_0_GIC 0x0B
+#define EFI_ACPI_6_0_GICD 0x0C
+#define EFI_ACPI_6_0_GIC_MSI_FRAME 0x0D
+#define EFI_ACPI_6_0_GICR 0x0E
+#define EFI_ACPI_6_0_GIC_ITS 0x0F
+
+//
+// APIC Structure Definitions
+//
+
+///
+/// Processor Local APIC Structure Definition
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorUid;
+ UINT8 ApicId;
+ UINT32 Flags;
+} EFI_ACPI_6_0_PROCESSOR_LOCAL_APIC_STRUCTURE;
+
+///
+/// Local APIC Flags. All other bits are reserved and must be 0.
+///
+#define EFI_ACPI_6_0_LOCAL_APIC_ENABLED BIT0
+
+///
+/// IO APIC Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 IoApicAddress;
+ UINT32 GlobalSystemInterruptBase;
+} EFI_ACPI_6_0_IO_APIC_STRUCTURE;
+
+///
+/// Interrupt Source Override Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Bus;
+ UINT8 Source;
+ UINT32 GlobalSystemInterrupt;
+ UINT16 Flags;
+} EFI_ACPI_6_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
+
+///
+/// Platform Interrupt Sources Structure Definition
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT8 InterruptType;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT8 IoSapicVector;
+ UINT32 GlobalSystemInterrupt;
+ UINT32 PlatformInterruptSourceFlags;
+ UINT8 CpeiProcessorOverride;
+ UINT8 Reserved[31];
+} EFI_ACPI_6_0_PLATFORM_INTERRUPT_APIC_STRUCTURE;
+
+//
+// MPS INTI flags.
+// All other bits are reserved and must be set to 0.
+//
+#define EFI_ACPI_6_0_POLARITY (3 << 0)
+#define EFI_ACPI_6_0_TRIGGER_MODE (3 << 2)
+
+///
+/// Non-Maskable Interrupt Source Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT32 GlobalSystemInterrupt;
+} EFI_ACPI_6_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
+
+///
+/// Local APIC NMI Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorUid;
+ UINT16 Flags;
+ UINT8 LocalApicLint;
+} EFI_ACPI_6_0_LOCAL_APIC_NMI_STRUCTURE;
+
+///
+/// Local APIC Address Override Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved;
+ UINT64 LocalApicAddress;
+} EFI_ACPI_6_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
+
+///
+/// IO SAPIC Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 GlobalSystemInterruptBase;
+ UINT64 IoSapicAddress;
+} EFI_ACPI_6_0_IO_SAPIC_STRUCTURE;
+
+///
+/// Local SAPIC Structure
+/// This struct followed by a null-t