aboutsummaryrefslogtreecommitdiffstats
path: root/source/Plugins/Process/Utility
diff options
context:
space:
mode:
authorDimitry Andric <dim@FreeBSD.org>2017-01-02 19:26:05 +0000
committerDimitry Andric <dim@FreeBSD.org>2017-01-02 19:26:05 +0000
commit14f1b3e8826ce43b978db93a62d1166055db5394 (patch)
tree0a00ad8d3498783fe0193f3b656bca17c4c8697d /source/Plugins/Process/Utility
parent4ee8c119c71a06dcad1e0fecc8c675e480e59337 (diff)
downloadsrc-14f1b3e8826ce43b978db93a62d1166055db5394.tar.gz
src-14f1b3e8826ce43b978db93a62d1166055db5394.zip
Vendor import of lldb trunk r290819:vendor/lldb/lldb-trunk-r290819
Notes
Notes: svn path=/vendor/lldb/dist/; revision=311128 svn path=/vendor/lldb/lldb-trunk-r290819/; revision=311129; tag=vendor/lldb/lldb-trunk-r290819
Diffstat (limited to 'source/Plugins/Process/Utility')
-rw-r--r--source/Plugins/Process/Utility/ARMDefines.h255
-rw-r--r--source/Plugins/Process/Utility/ARMUtils.h567
-rw-r--r--source/Plugins/Process/Utility/CMakeLists.txt3
-rw-r--r--source/Plugins/Process/Utility/DynamicRegisterInfo.cpp1379
-rw-r--r--source/Plugins/Process/Utility/DynamicRegisterInfo.h115
-rw-r--r--source/Plugins/Process/Utility/FreeBSDSignals.cpp146
-rw-r--r--source/Plugins/Process/Utility/FreeBSDSignals.h8
-rw-r--r--source/Plugins/Process/Utility/GDBRemoteSignals.cpp16
-rw-r--r--source/Plugins/Process/Utility/GDBRemoteSignals.h10
-rw-r--r--source/Plugins/Process/Utility/HistoryThread.cpp106
-rw-r--r--source/Plugins/Process/Utility/HistoryThread.h158
-rw-r--r--source/Plugins/Process/Utility/HistoryUnwind.cpp86
-rw-r--r--source/Plugins/Process/Utility/HistoryUnwind.h31
-rw-r--r--source/Plugins/Process/Utility/InferiorCallPOSIX.cpp386
-rw-r--r--source/Plugins/Process/Utility/InferiorCallPOSIX.h8
-rw-r--r--source/Plugins/Process/Utility/InstructionUtils.h138
-rw-r--r--source/Plugins/Process/Utility/LinuxSignals.cpp153
-rw-r--r--source/Plugins/Process/Utility/LinuxSignals.h8
-rw-r--r--source/Plugins/Process/Utility/MipsLinuxSignals.cpp156
-rw-r--r--source/Plugins/Process/Utility/MipsLinuxSignals.h11
-rw-r--r--source/Plugins/Process/Utility/NetBSDSignals.cpp22
-rw-r--r--source/Plugins/Process/Utility/NetBSDSignals.h8
-rw-r--r--source/Plugins/Process/Utility/RegisterContextDarwin_arm.cpp2654
-rw-r--r--source/Plugins/Process/Utility/RegisterContextDarwin_arm.h447
-rw-r--r--source/Plugins/Process/Utility/RegisterContextDarwin_arm64.cpp1673
-rw-r--r--source/Plugins/Process/Utility/RegisterContextDarwin_arm64.h428
-rw-r--r--source/Plugins/Process/Utility/RegisterContextDarwin_i386.cpp1582
-rw-r--r--source/Plugins/Process/Utility/RegisterContextDarwin_i386.h393
-rw-r--r--source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.cpp1756
-rw-r--r--source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.h434
-rw-r--r--source/Plugins/Process/Utility/RegisterContextDummy.cpp148
-rw-r--r--source/Plugins/Process/Utility/RegisterContextDummy.h76
-rw-r--r--source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.cpp100
-rw-r--r--source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.h98
-rw-r--r--source/Plugins/Process/Utility/RegisterContextFreeBSD_arm64.cpp86
-rw-r--r--source/Plugins/Process/Utility/RegisterContextFreeBSD_arm64.h78
-rw-r--r--source/Plugins/Process/Utility/RegisterContextFreeBSD_i386.cpp102
-rw-r--r--source/Plugins/Process/Utility/RegisterContextFreeBSD_i386.h15
-rw-r--r--source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.cpp120
-rw-r--r--source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.h16
-rw-r--r--source/Plugins/Process/Utility/RegisterContextFreeBSD_powerpc.cpp406
-rw-r--r--source/Plugins/Process/Utility/RegisterContextFreeBSD_powerpc.h55
-rw-r--r--source/Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.cpp222
-rw-r--r--source/Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.h20
-rw-r--r--source/Plugins/Process/Utility/RegisterContextHistory.cpp151
-rw-r--r--source/Plugins/Process/Utility/RegisterContextHistory.h80
-rw-r--r--source/Plugins/Process/Utility/RegisterContextLLDB.cpp3704
-rw-r--r--source/Plugins/Process/Utility/RegisterContextLLDB.h437
-rw-r--r--source/Plugins/Process/Utility/RegisterContextLinux_arm.cpp100
-rw-r--r--source/Plugins/Process/Utility/RegisterContextLinux_arm.h99
-rw-r--r--source/Plugins/Process/Utility/RegisterContextLinux_arm64.cpp89
-rw-r--r--source/Plugins/Process/Utility/RegisterContextLinux_arm64.h80
-rw-r--r--source/Plugins/Process/Utility/RegisterContextLinux_i386.cpp200
-rw-r--r--source/Plugins/Process/Utility/RegisterContextLinux_i386.h24
-rw-r--r--source/Plugins/Process/Utility/RegisterContextLinux_mips.cpp62
-rw-r--r--source/Plugins/Process/Utility/RegisterContextLinux_mips.h23
-rw-r--r--source/Plugins/Process/Utility/RegisterContextLinux_mips64.cpp139
-rw-r--r--source/Plugins/Process/Utility/RegisterContextLinux_mips64.h29
-rw-r--r--source/Plugins/Process/Utility/RegisterContextLinux_s390x.cpp95
-rw-r--r--source/Plugins/Process/Utility/RegisterContextLinux_s390x.h29
-rw-r--r--source/Plugins/Process/Utility/RegisterContextLinux_x86_64.cpp304
-rw-r--r--source/Plugins/Process/Utility/RegisterContextLinux_x86_64.h31
-rw-r--r--source/Plugins/Process/Utility/RegisterContextMacOSXFrameBackchain.cpp252
-rw-r--r--source/Plugins/Process/Utility/RegisterContextMacOSXFrameBackchain.h59
-rw-r--r--source/Plugins/Process/Utility/RegisterContextMach_arm.cpp72
-rw-r--r--source/Plugins/Process/Utility/RegisterContextMach_arm.h49
-rw-r--r--source/Plugins/Process/Utility/RegisterContextMach_i386.cpp57
-rw-r--r--source/Plugins/Process/Utility/RegisterContextMach_i386.h45
-rw-r--r--source/Plugins/Process/Utility/RegisterContextMach_x86_64.cpp60
-rw-r--r--source/Plugins/Process/Utility/RegisterContextMach_x86_64.h48
-rw-r--r--source/Plugins/Process/Utility/RegisterContextMemory.cpp204
-rw-r--r--source/Plugins/Process/Utility/RegisterContextMemory.h107
-rw-r--r--source/Plugins/Process/Utility/RegisterContextNetBSD_x86_64.cpp570
-rw-r--r--source/Plugins/Process/Utility/RegisterContextNetBSD_x86_64.h20
-rw-r--r--source/Plugins/Process/Utility/RegisterContextPOSIX_arm.cpp385
-rw-r--r--source/Plugins/Process/Utility/RegisterContextPOSIX_arm.h158
-rw-r--r--source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.cpp376
-rw-r--r--source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.h157
-rw-r--r--source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.cpp265
-rw-r--r--source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.h83
-rw-r--r--source/Plugins/Process/Utility/RegisterContextPOSIX_powerpc.cpp368
-rw-r--r--source/Plugins/Process/Utility/RegisterContextPOSIX_powerpc.h330
-rw-r--r--source/Plugins/Process/Utility/RegisterContextPOSIX_s390x.cpp291
-rw-r--r--source/Plugins/Process/Utility/RegisterContextPOSIX_s390x.h111
-rw-r--r--source/Plugins/Process/Utility/RegisterContextPOSIX_x86.cpp1032
-rw-r--r--source/Plugins/Process/Utility/RegisterContextPOSIX_x86.h323
-rw-r--r--source/Plugins/Process/Utility/RegisterContextThreadMemory.cpp390
-rw-r--r--source/Plugins/Process/Utility/RegisterContextThreadMemory.h163
-rw-r--r--source/Plugins/Process/Utility/RegisterContext_mips.h702
-rw-r--r--source/Plugins/Process/Utility/RegisterContext_powerpc.h219
-rw-r--r--source/Plugins/Process/Utility/RegisterContext_s390x.h148
-rw-r--r--source/Plugins/Process/Utility/RegisterContext_x86.h553
-rw-r--r--source/Plugins/Process/Utility/RegisterInfoInterface.h99
-rw-r--r--source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp99
-rw-r--r--source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h70
-rw-r--r--source/Plugins/Process/Utility/RegisterInfos_arm.h2027
-rw-r--r--source/Plugins/Process/Utility/RegisterInfos_arm64.h956
-rw-r--r--source/Plugins/Process/Utility/RegisterInfos_i386.h385
-rw-r--r--source/Plugins/Process/Utility/RegisterInfos_mips.h59
-rw-r--r--source/Plugins/Process/Utility/RegisterInfos_mips64.h198
-rw-r--r--source/Plugins/Process/Utility/RegisterInfos_powerpc.h329
-rw-r--r--source/Plugins/Process/Utility/RegisterInfos_s390x.h93
-rw-r--r--source/Plugins/Process/Utility/RegisterInfos_x86_64.h728
-rw-r--r--source/Plugins/Process/Utility/StopInfoMachException.cpp1019
-rw-r--r--source/Plugins/Process/Utility/StopInfoMachException.h71
-rw-r--r--source/Plugins/Process/Utility/ThreadMemory.cpp171
-rw-r--r--source/Plugins/Process/Utility/ThreadMemory.h201
-rw-r--r--source/Plugins/Process/Utility/UnwindLLDB.cpp879
-rw-r--r--source/Plugins/Process/Utility/UnwindLLDB.h248
-rw-r--r--source/Plugins/Process/Utility/UnwindMacOSXFrameBackchain.cpp443
-rw-r--r--source/Plugins/Process/Utility/UnwindMacOSXFrameBackchain.h68
-rw-r--r--source/Plugins/Process/Utility/lldb-arm-register-enums.h363
-rw-r--r--source/Plugins/Process/Utility/lldb-arm64-register-enums.h397
-rw-r--r--source/Plugins/Process/Utility/lldb-mips-freebsd-register-enums.h106
-rw-r--r--source/Plugins/Process/Utility/lldb-mips-linux-register-enums.h522
-rw-r--r--source/Plugins/Process/Utility/lldb-s390x-register-enums.h139
-rw-r--r--source/Plugins/Process/Utility/lldb-x86-register-enums.h558
117 files changed, 19585 insertions, 18595 deletions
diff --git a/source/Plugins/Process/Utility/ARMDefines.h b/source/Plugins/Process/Utility/ARMDefines.h
index cfb33beb447a..84c2cf19be7b 100644
--- a/source/Plugins/Process/Utility/ARMDefines.h
+++ b/source/Plugins/Process/Utility/ARMDefines.h
@@ -10,101 +10,150 @@
#ifndef lldb_ARMDefines_h_
#define lldb_ARMDefines_h_
+#include <cassert>
+#include <cstdint>
+
// Common definitions for the ARM/Thumb Instruction Set Architecture.
namespace lldb_private {
// ARM shifter types
-typedef enum
-{
- SRType_LSL,
- SRType_LSR,
- SRType_ASR,
- SRType_ROR,
- SRType_RRX,
- SRType_Invalid
+typedef enum {
+ SRType_LSL,
+ SRType_LSR,
+ SRType_ASR,
+ SRType_ROR,
+ SRType_RRX,
+ SRType_Invalid
} ARM_ShifterType;
-// ARM conditions // Meaning (integer) Meaning (floating-point) Condition flags
-#define COND_EQ 0x0 // Equal Equal Z == 1
-#define COND_NE 0x1 // Not equal Not equal, or unordered Z == 0
-#define COND_CS 0x2 // Carry set >, ==, or unordered C == 1
-#define COND_HS 0x2
-#define COND_CC 0x3 // Carry clear Less than C == 0
-#define COND_LO 0x3
-#define COND_MI 0x4 // Minus, negative Less than N == 1
-#define COND_PL 0x5 // Plus, positive or zero >, ==, or unordered N == 0
-#define COND_VS 0x6 // Overflow Unordered V == 1
-#define COND_VC 0x7 // No overflow Not unordered V == 0
-#define COND_HI 0x8 // Unsigned higher Greater than, or unordered C == 1 and Z == 0
-#define COND_LS 0x9 // Unsigned lower or same Less than or equal C == 0 or Z == 1
-#define COND_GE 0xA // Greater than or equal Greater than or equal N == V
-#define COND_LT 0xB // Less than Less than, or unordered N != V
-#define COND_GT 0xC // Greater than Greater than Z == 0 and N == V
-#define COND_LE 0xD // Less than or equal <, ==, or unordered Z == 1 or N != V
-#define COND_AL 0xE // Always (unconditional) Always (unconditional) Any
+// ARM conditions // Meaning (integer) Meaning (floating-point)
+// Condition flags
+#define COND_EQ \
+ 0x0 // Equal Equal Z == 1
+#define COND_NE \
+ 0x1 // Not equal Not equal, or unordered Z == 0
+#define COND_CS \
+ 0x2 // Carry set >, ==, or unordered C == 1
+#define COND_HS 0x2
+#define COND_CC \
+ 0x3 // Carry clear Less than C == 0
+#define COND_LO 0x3
+#define COND_MI \
+ 0x4 // Minus, negative Less than N == 1
+#define COND_PL \
+ 0x5 // Plus, positive or zero >, ==, or unordered N == 0
+#define COND_VS \
+ 0x6 // Overflow Unordered V == 1
+#define COND_VC \
+ 0x7 // No overflow Not unordered V == 0
+#define COND_HI \
+ 0x8 // Unsigned higher Greater than, or unordered C == 1 and Z ==
+ // 0
+#define COND_LS \
+ 0x9 // Unsigned lower or same Less than or equal C == 0 or Z ==
+ // 1
+#define COND_GE \
+ 0xA // Greater than or equal Greater than or equal N == V
+#define COND_LT \
+ 0xB // Less than Less than, or unordered N != V
+#define COND_GT \
+ 0xC // Greater than Greater than Z == 0 and N ==
+ // V
+#define COND_LE \
+ 0xD // Less than or equal <, ==, or unordered Z == 1 or N !=
+ // V
+#define COND_AL \
+ 0xE // Always (unconditional) Always (unconditional) Any
#define COND_UNCOND 0xF
-static inline const char *
-ARMCondCodeToString(uint32_t CC)
-{
- switch (CC) {
- default: assert(0 && "Unknown condition code");
- case COND_EQ: return "eq";
- case COND_NE: return "ne";
- case COND_HS: return "hs";
- case COND_LO: return "lo";
- case COND_MI: return "mi";
- case COND_PL: return "pl";
- case COND_VS: return "vs";
- case COND_VC: return "vc";
- case COND_HI: return "hi";
- case COND_LS: return "ls";
- case COND_GE: return "ge";
- case COND_LT: return "lt";
- case COND_GT: return "gt";
- case COND_LE: return "le";
- case COND_AL: return "al";
- }
+static inline const char *ARMCondCodeToString(uint32_t CC) {
+ switch (CC) {
+ default:
+ assert(0 && "Unknown condition code");
+ case COND_EQ:
+ return "eq";
+ case COND_NE:
+ return "ne";
+ case COND_HS:
+ return "hs";
+ case COND_LO:
+ return "lo";
+ case COND_MI:
+ return "mi";
+ case COND_PL:
+ return "pl";
+ case COND_VS:
+ return "vs";
+ case COND_VC:
+ return "vc";
+ case COND_HI:
+ return "hi";
+ case COND_LS:
+ return "ls";
+ case COND_GE:
+ return "ge";
+ case COND_LT:
+ return "lt";
+ case COND_GT:
+ return "gt";
+ case COND_LE:
+ return "le";
+ case COND_AL:
+ return "al";
+ }
}
-static inline bool
-ARMConditionPassed(const uint32_t condition, const uint32_t cpsr)
-{
- const uint32_t cpsr_n = (cpsr >> 31) & 1u; // Negative condition code flag
- const uint32_t cpsr_z = (cpsr >> 30) & 1u; // Zero condition code flag
- const uint32_t cpsr_c = (cpsr >> 29) & 1u; // Carry condition code flag
- const uint32_t cpsr_v = (cpsr >> 28) & 1u; // Overflow condition code flag
+static inline bool ARMConditionPassed(const uint32_t condition,
+ const uint32_t cpsr) {
+ const uint32_t cpsr_n = (cpsr >> 31) & 1u; // Negative condition code flag
+ const uint32_t cpsr_z = (cpsr >> 30) & 1u; // Zero condition code flag
+ const uint32_t cpsr_c = (cpsr >> 29) & 1u; // Carry condition code flag
+ const uint32_t cpsr_v = (cpsr >> 28) & 1u; // Overflow condition code flag
- switch (condition) {
- case COND_EQ: return (cpsr_z == 1);
- case COND_NE: return (cpsr_z == 0);
- case COND_CS: return (cpsr_c == 1);
- case COND_CC: return (cpsr_c == 0);
- case COND_MI: return (cpsr_n == 1);
- case COND_PL: return (cpsr_n == 0);
- case COND_VS: return (cpsr_v == 1);
- case COND_VC: return (cpsr_v == 0);
- case COND_HI: return ((cpsr_c == 1) && (cpsr_z == 0));
- case COND_LS: return ((cpsr_c == 0) || (cpsr_z == 1));
- case COND_GE: return (cpsr_n == cpsr_v);
- case COND_LT: return (cpsr_n != cpsr_v);
- case COND_GT: return ((cpsr_z == 0) && (cpsr_n == cpsr_v));
- case COND_LE: return ((cpsr_z == 1) || (cpsr_n != cpsr_v));
- case COND_AL:
- case COND_UNCOND:
- default:
- return true;
- }
- return false;
+ switch (condition) {
+ case COND_EQ:
+ return (cpsr_z == 1);
+ case COND_NE:
+ return (cpsr_z == 0);
+ case COND_CS:
+ return (cpsr_c == 1);
+ case COND_CC:
+ return (cpsr_c == 0);
+ case COND_MI:
+ return (cpsr_n == 1);
+ case COND_PL:
+ return (cpsr_n == 0);
+ case COND_VS:
+ return (cpsr_v == 1);
+ case COND_VC:
+ return (cpsr_v == 0);
+ case COND_HI:
+ return ((cpsr_c == 1) && (cpsr_z == 0));
+ case COND_LS:
+ return ((cpsr_c == 0) || (cpsr_z == 1));
+ case COND_GE:
+ return (cpsr_n == cpsr_v);
+ case COND_LT:
+ return (cpsr_n != cpsr_v);
+ case COND_GT:
+ return ((cpsr_z == 0) && (cpsr_n == cpsr_v));
+ case COND_LE:
+ return ((cpsr_z == 1) || (cpsr_n != cpsr_v));
+ case COND_AL:
+ case COND_UNCOND:
+ default:
+ return true;
+ }
+ return false;
}
// Bit positions for CPSR
-#define CPSR_T_POS 5
-#define CPSR_F_POS 6
-#define CPSR_I_POS 7
-#define CPSR_A_POS 8
-#define CPSR_E_POS 9
+#define CPSR_T_POS 5
+#define CPSR_F_POS 6
+#define CPSR_I_POS 7
+#define CPSR_A_POS 8
+#define CPSR_E_POS 9
#define CPSR_J_POS 24
#define CPSR_Q_POS 27
#define CPSR_V_POS 28
@@ -113,30 +162,30 @@ ARMConditionPassed(const uint32_t condition, const uint32_t cpsr)
#define CPSR_N_POS 31
// CPSR mode definitions
-#define CPSR_MODE_USR 0x10u
-#define CPSR_MODE_FIQ 0x11u
-#define CPSR_MODE_IRQ 0x12u
-#define CPSR_MODE_SVC 0x13u
-#define CPSR_MODE_ABT 0x17u
-#define CPSR_MODE_UND 0x1bu
-#define CPSR_MODE_SYS 0x1fu
-
+#define CPSR_MODE_USR 0x10u
+#define CPSR_MODE_FIQ 0x11u
+#define CPSR_MODE_IRQ 0x12u
+#define CPSR_MODE_SVC 0x13u
+#define CPSR_MODE_ABT 0x17u
+#define CPSR_MODE_UND 0x1bu
+#define CPSR_MODE_SYS 0x1fu
+
// Masks for CPSR
#define MASK_CPSR_MODE_MASK (0x0000001fu)
-#define MASK_CPSR_IT_MASK (0x0600fc00u)
-#define MASK_CPSR_T (1u << CPSR_T_POS)
-#define MASK_CPSR_F (1u << CPSR_F_POS)
-#define MASK_CPSR_I (1u << CPSR_I_POS)
-#define MASK_CPSR_A (1u << CPSR_A_POS)
-#define MASK_CPSR_E (1u << CPSR_E_POS)
-#define MASK_CPSR_GE_MASK (0x000f0000u)
-#define MASK_CPSR_J (1u << CPSR_J_POS)
-#define MASK_CPSR_Q (1u << CPSR_Q_POS)
-#define MASK_CPSR_V (1u << CPSR_V_POS)
-#define MASK_CPSR_C (1u << CPSR_C_POS)
-#define MASK_CPSR_Z (1u << CPSR_Z_POS)
-#define MASK_CPSR_N (1u << CPSR_N_POS)
+#define MASK_CPSR_IT_MASK (0x0600fc00u)
+#define MASK_CPSR_T (1u << CPSR_T_POS)
+#define MASK_CPSR_F (1u << CPSR_F_POS)
+#define MASK_CPSR_I (1u << CPSR_I_POS)
+#define MASK_CPSR_A (1u << CPSR_A_POS)
+#define MASK_CPSR_E (1u << CPSR_E_POS)
+#define MASK_CPSR_GE_MASK (0x000f0000u)
+#define MASK_CPSR_J (1u << CPSR_J_POS)
+#define MASK_CPSR_Q (1u << CPSR_Q_POS)
+#define MASK_CPSR_V (1u << CPSR_V_POS)
+#define MASK_CPSR_C (1u << CPSR_C_POS)
+#define MASK_CPSR_Z (1u << CPSR_Z_POS)
+#define MASK_CPSR_N (1u << CPSR_N_POS)
-} // namespace lldb_private
+} // namespace lldb_private
-#endif // lldb_ARMDefines_h_
+#endif // lldb_ARMDefines_h_
diff --git a/source/Plugins/Process/Utility/ARMUtils.h b/source/Plugins/Process/Utility/ARMUtils.h
index b6ba3fea6928..2bbd519b246a 100644
--- a/source/Plugins/Process/Utility/ARMUtils.h
+++ b/source/Plugins/Process/Utility/ARMUtils.h
@@ -18,352 +18,335 @@
namespace lldb_private {
-static inline uint32_t Align(uint32_t val, uint32_t alignment)
-{
- return alignment * (val / alignment);
+static inline uint32_t Align(uint32_t val, uint32_t alignment) {
+ return alignment * (val / alignment);
}
-static inline uint32_t DecodeImmShift(const uint32_t type, const uint32_t imm5, ARM_ShifterType &shift_t)
-{
- switch (type)
- {
- default:
- //assert(0 && "Invalid shift type");
- case 0:
- shift_t = SRType_LSL;
- return imm5;
- case 1:
- shift_t = SRType_LSR;
- return (imm5 == 0 ? 32 : imm5);
- case 2:
- shift_t = SRType_ASR;
- return (imm5 == 0 ? 32 : imm5);
- case 3:
- if (imm5 == 0)
- {
- shift_t = SRType_RRX;
- return 1;
- }
- else
- {
- shift_t = SRType_ROR;
- return imm5;
- }
+static inline uint32_t DecodeImmShift(const uint32_t type, const uint32_t imm5,
+ ARM_ShifterType &shift_t) {
+ switch (type) {
+ default:
+ // assert(0 && "Invalid shift type");
+ case 0:
+ shift_t = SRType_LSL;
+ return imm5;
+ case 1:
+ shift_t = SRType_LSR;
+ return (imm5 == 0 ? 32 : imm5);
+ case 2:
+ shift_t = SRType_ASR;
+ return (imm5 == 0 ? 32 : imm5);
+ case 3:
+ if (imm5 == 0) {
+ shift_t = SRType_RRX;
+ return 1;
+ } else {
+ shift_t = SRType_ROR;
+ return imm5;
}
- shift_t = SRType_Invalid;
- return UINT32_MAX;
-
+ }
+ shift_t = SRType_Invalid;
+ return UINT32_MAX;
}
// A8.6.35 CMP (register) -- Encoding T3
// Convenience function.
-static inline uint32_t DecodeImmShiftThumb(const uint32_t opcode, ARM_ShifterType &shift_t)
-{
- return DecodeImmShift(Bits32(opcode, 5, 4), Bits32(opcode, 14, 12)<<2 | Bits32(opcode, 7, 6), shift_t);
+static inline uint32_t DecodeImmShiftThumb(const uint32_t opcode,
+ ARM_ShifterType &shift_t) {
+ return DecodeImmShift(Bits32(opcode, 5, 4),
+ Bits32(opcode, 14, 12) << 2 | Bits32(opcode, 7, 6),
+ shift_t);
}
// A8.6.35 CMP (register) -- Encoding A1
// Convenience function.
-static inline uint32_t DecodeImmShiftARM(const uint32_t opcode, ARM_ShifterType &shift_t)
-{
- return DecodeImmShift(Bits32(opcode, 6, 5), Bits32(opcode, 11, 7), shift_t);
+static inline uint32_t DecodeImmShiftARM(const uint32_t opcode,
+ ARM_ShifterType &shift_t) {
+ return DecodeImmShift(Bits32(opcode, 6, 5), Bits32(opcode, 11, 7), shift_t);
}
-static inline uint32_t DecodeImmShift(const ARM_ShifterType shift_t, const uint32_t imm5)
-{
- ARM_ShifterType dont_care;
- return DecodeImmShift(shift_t, imm5, dont_care);
+static inline uint32_t DecodeImmShift(const ARM_ShifterType shift_t,
+ const uint32_t imm5) {
+ ARM_ShifterType dont_care;
+ return DecodeImmShift(shift_t, imm5, dont_care);
}
-static inline ARM_ShifterType DecodeRegShift(const uint32_t type)
-{
- switch (type) {
- default:
- //assert(0 && "Invalid shift type");
- return SRType_Invalid;
- case 0:
- return SRType_LSL;
- case 1:
- return SRType_LSR;
- case 2:
- return SRType_ASR;
- case 3:
- return SRType_ROR;
- }
+static inline ARM_ShifterType DecodeRegShift(const uint32_t type) {
+ switch (type) {
+ default:
+ // assert(0 && "Invalid shift type");
+ return SRType_Invalid;
+ case 0:
+ return SRType_LSL;
+ case 1:
+ return SRType_LSR;
+ case 2:
+ return SRType_ASR;
+ case 3:
+ return SRType_ROR;
+ }
}
-static inline uint32_t LSL_C(const uint32_t value, const uint32_t amount, uint32_t &carry_out, bool *success)
-{
- if (amount == 0) {
- *success = false;
- return 0;
- }
- *success = true;
- carry_out = amount <= 32 ? Bit32(value, 32 - amount) : 0;
- return value << amount;
+static inline uint32_t LSL_C(const uint32_t value, const uint32_t amount,
+ uint32_t &carry_out, bool *success) {
+ if (amount == 0) {
+ *success = false;
+ return 0;
+ }
+ *success = true;
+ carry_out = amount <= 32 ? Bit32(value, 32 - amount) : 0;
+ return value << amount;
}
-static inline uint32_t LSL(const uint32_t value, const uint32_t amount, bool *success)
-{
- *success = true;
- if (amount == 0)
- return value;
- uint32_t dont_care;
- uint32_t result = LSL_C(value, amount, dont_care, success);
- if (*success)
- return result;
- else
- return 0;
-}
-
-static inline uint32_t LSR_C(const uint32_t value, const uint32_t amount, uint32_t &carry_out, bool *success)
-{
- if (amount == 0) {
- *success = false;
- return 0;
- }
- *success = true;
- carry_out = amount <= 32 ? Bit32(value, amount - 1) : 0;
- return value >> amount;
+static inline uint32_t LSL(const uint32_t value, const uint32_t amount,
+ bool *success) {
+ *success = true;
+ if (amount == 0)
+ return value;
+ uint32_t dont_care;
+ uint32_t result = LSL_C(value, amount, dont_care, success);
+ if (*success)
+ return result;
+ else
+ return 0;
}
-static inline uint32_t LSR(const uint32_t value, const uint32_t amount, bool *success)
-{
- *success = true;
- if (amount == 0)
- return value;
- uint32_t dont_care;
- uint32_t result = LSR_C(value, amount, dont_care, success);
- if (*success)
- return result;
- else
- return 0;
+static inline uint32_t LSR_C(const uint32_t value, const uint32_t amount,
+ uint32_t &carry_out, bool *success) {
+ if (amount == 0) {
+ *success = false;
+ return 0;
+ }
+ *success = true;
+ carry_out = amount <= 32 ? Bit32(value, amount - 1) : 0;
+ return value >> amount;
}
-static inline uint32_t ASR_C(const uint32_t value, const uint32_t amount, uint32_t &carry_out, bool *success)
-{
- if (amount == 0 || amount > 32) {
- *success = false;
- return 0;
- }
- *success = true;
- bool negative = BitIsSet(value, 31);
- if (amount <= 32)
- {
- carry_out = Bit32(value, amount - 1);
- int64_t extended = llvm::SignExtend64<32>(value);
- return UnsignedBits(extended, amount + 31, amount);
- }
- else
- {
- carry_out = (negative ? 1 : 0);
- return (negative ? 0xffffffff : 0);
- }
+static inline uint32_t LSR(const uint32_t value, const uint32_t amount,
+ bool *success) {
+ *success = true;
+ if (amount == 0)
+ return value;
+ uint32_t dont_care;
+ uint32_t result = LSR_C(value, amount, dont_care, success);
+ if (*success)
+ return result;
+ else
+ return 0;
}
-static inline uint32_t ASR(const uint32_t value, const uint32_t amount, bool *success)
-{
- *success = true;
- if (amount == 0)
- return value;
- uint32_t dont_care;
- uint32_t result = ASR_C(value, amount, dont_care, success);
- if (*success)
- return result;
- else
- return 0;
+static inline uint32_t ASR_C(const uint32_t value, const uint32_t amount,
+ uint32_t &carry_out, bool *success) {
+ if (amount == 0 || amount > 32) {
+ *success = false;
+ return 0;
+ }
+ *success = true;
+ bool negative = BitIsSet(value, 31);
+ if (amount <= 32) {
+ carry_out = Bit32(value, amount - 1);
+ int64_t extended = llvm::SignExtend64<32>(value);
+ return UnsignedBits(extended, amount + 31, amount);
+ } else {
+ carry_out = (negative ? 1 : 0);
+ return (negative ? 0xffffffff : 0);
+ }
}
-static inline uint32_t ROR_C(const uint32_t value, const uint32_t amount, uint32_t &carry_out, bool *success)
-{
- if (amount == 0) {
- *success = false;
- return 0;
- }
- *success = true;
- uint32_t amt = amount % 32;
- uint32_t result = Rotr32(value, amt);
- carry_out = Bit32(value, 31);
+static inline uint32_t ASR(const uint32_t value, const uint32_t amount,
+ bool *success) {
+ *success = true;
+ if (amount == 0)
+ return value;
+ uint32_t dont_care;
+ uint32_t result = ASR_C(value, amount, dont_care, success);
+ if (*success)
return result;
+ else
+ return 0;
}
-static inline uint32_t ROR(const uint32_t value, const uint32_t amount, bool *success)
-{
- *success = true;
- if (amount == 0)
- return value;
- uint32_t dont_care;
- uint32_t result = ROR_C(value, amount, dont_care, success);
- if (*success)
- return result;
- else
- return 0;
+static inline uint32_t ROR_C(const uint32_t value, const uint32_t amount,
+ uint32_t &carry_out, bool *success) {
+ if (amount == 0) {
+ *success = false;
+ return 0;
+ }
+ *success = true;
+ uint32_t amt = amount % 32;
+ uint32_t result = Rotr32(value, amt);
+ carry_out = Bit32(value, 31);
+ return result;
}
-static inline uint32_t RRX_C(const uint32_t value, const uint32_t carry_in, uint32_t &carry_out, bool *success)
-{
- *success = true;
- carry_out = Bit32(value, 0);
- return Bit32(carry_in, 0) << 31 | Bits32(value, 31, 1);
+static inline uint32_t ROR(const uint32_t value, const uint32_t amount,
+ bool *success) {
+ *success = true;
+ if (amount == 0)
+ return value;
+ uint32_t dont_care;
+ uint32_t result = ROR_C(value, amount, dont_care, success);
+ if (*success)
+ return result;
+ else
+ return 0;
}
-static inline uint32_t RRX(const uint32_t value, const uint32_t carry_in, bool *success)
-{
- *success = true;
- uint32_t dont_care;
- uint32_t result = RRX_C(value, carry_in, dont_care, success);
- if (*success)
- return result;
- else
- return 0;
+static inline uint32_t RRX_C(const uint32_t value, const uint32_t carry_in,
+ uint32_t &carry_out, bool *success) {
+ *success = true;
+ carry_out = Bit32(value, 0);
+ return Bit32(carry_in, 0) << 31 | Bits32(value, 31, 1);
}
-static inline uint32_t Shift_C(const uint32_t value, ARM_ShifterType type, const uint32_t amount,
- const uint32_t carry_in, uint32_t &carry_out, bool *success)
-{
- if (type == SRType_RRX && amount != 1) {
- *success = false;
- return 0;
- }
- *success = true;
+static inline uint32_t RRX(const uint32_t value, const uint32_t carry_in,
+ bool *success) {
+ *success = true;
+ uint32_t dont_care;
+ uint32_t result = RRX_C(value, carry_in, dont_care, success);
+ if (*success)
+ return result;
+ else
+ return 0;
+}
- if (amount == 0) {
- carry_out = carry_in;
- return value;
- }
- uint32_t result;
- switch (type) {
- case SRType_LSL:
- result = LSL_C(value, amount, carry_out, success);
- break;
- case SRType_LSR:
- result = LSR_C(value, amount, carry_out, success);
- break;
- case SRType_ASR:
- result = ASR_C(value, amount, carry_out, success);
- break;
- case SRType_ROR:
- result = ROR_C(value, amount, carry_out, success);
- break;
- case SRType_RRX:
- result = RRX_C(value, carry_in, carry_out, success);
- break;
- default:
- *success = false;
- break;
- }
- if (*success)
- return result;
- else
- return 0;
+static inline uint32_t Shift_C(const uint32_t value, ARM_ShifterType type,
+ const uint32_t amount, const uint32_t carry_in,
+ uint32_t &carry_out, bool *success) {
+ if (type == SRType_RRX && amount != 1) {
+ *success = false;
+ return 0;
+ }
+ *success = true;
+
+ if (amount == 0) {
+ carry_out = carry_in;
+ return value;
+ }
+ uint32_t result;
+ switch (type) {
+ case SRType_LSL:
+ result = LSL_C(value, amount, carry_out, success);
+ break;
+ case SRType_LSR:
+ result = LSR_C(value, amount, carry_out, success);
+ break;
+ case SRType_ASR:
+ result = ASR_C(value, amount, carry_out, success);
+ break;
+ case SRType_ROR:
+ result = ROR_C(value, amount, carry_out, success);
+ break;
+ case SRType_RRX:
+ result = RRX_C(value, carry_in, carry_out, success);
+ break;
+ default:
+ *success = false;
+ break;
+ }
+ if (*success)
+ return result;
+ else
+ return 0;
}
-static inline uint32_t Shift(const uint32_t value, ARM_ShifterType type, const uint32_t amount,
- const uint32_t carry_in, bool *success)
-{
- // Don't care about carry out in this case.
- uint32_t dont_care;
- uint32_t result = Shift_C(value, type, amount, carry_in, dont_care, success);
- if (*success)
- return result;
- else
- return 0;
+static inline uint32_t Shift(const uint32_t value, ARM_ShifterType type,
+ const uint32_t amount, const uint32_t carry_in,
+ bool *success) {
+ // Don't care about carry out in this case.
+ uint32_t dont_care;
+ uint32_t result = Shift_C(value, type, amount, carry_in, dont_care, success);
+ if (*success)
+ return result;
+ else
+ return 0;
}
-static inline uint32_t bits(const uint32_t val, const uint32_t msbit, const uint32_t lsbit)
-{
- return Bits32(val, msbit, lsbit);
+static inline uint32_t bits(const uint32_t val, const uint32_t msbit,
+ const uint32_t lsbit) {
+ return Bits32(val, msbit, lsbit);
}
-static inline uint32_t bit(const uint32_t val, const uint32_t msbit)
-{
- return bits(val, msbit, msbit);
+static inline uint32_t bit(const uint32_t val, const uint32_t msbit) {
+ return bits(val, msbit, msbit);
}
-static uint32_t ror(uint32_t val, uint32_t N, uint32_t shift)
-{
- uint32_t m = shift % N;
- return (val >> m) | (val << (N - m));
+static uint32_t ror(uint32_t val, uint32_t N, uint32_t shift) {
+ uint32_t m = shift % N;
+ return (val >> m) | (val << (N - m));
}
// (imm32, carry_out) = ARMExpandImm_C(imm12, carry_in)
-static inline uint32_t ARMExpandImm_C(uint32_t opcode, uint32_t carry_in, uint32_t &carry_out)
-{
- uint32_t imm32; // the expanded result
- uint32_t imm = bits(opcode, 7, 0); // immediate value
- uint32_t amt = 2 * bits(opcode, 11, 8); // rotate amount
- if (amt == 0)
- {
- imm32 = imm;
- carry_out = carry_in;
- }
- else
- {
- imm32 = ror(imm, 32, amt);
- carry_out = Bit32(imm32, 31);
- }
- return imm32;
+static inline uint32_t ARMExpandImm_C(uint32_t opcode, uint32_t carry_in,
+ uint32_t &carry_out) {
+ uint32_t imm32; // the expanded result
+ uint32_t imm = bits(opcode, 7, 0); // immediate value
+ uint32_t amt = 2 * bits(opcode, 11, 8); // rotate amount
+ if (amt == 0) {
+ imm32 = imm;
+ carry_out = carry_in;
+ } else {
+ imm32 = ror(imm, 32, amt);
+ carry_out = Bit32(imm32, 31);
+ }
+ return imm32;
}
-static inline uint32_t ARMExpandImm(uint32_t opcode)
-{
- // 'carry_in' argument to following function call does not affect the imm32 result.
- uint32_t carry_in = 0;
- uint32_t carry_out;
- return ARMExpandImm_C(opcode, carry_in, carry_out);
+static inline uint32_t ARMExpandImm(uint32_t opcode) {
+ // 'carry_in' argument to following function call does not affect the imm32
+ // result.
+ uint32_t carry_in = 0;
+ uint32_t carry_out;
+ return ARMExpandImm_C(opcode, carry_in, carry_out);
}
// (imm32, carry_out) = ThumbExpandImm_C(imm12, carry_in)
-static inline uint32_t ThumbExpandImm_C(uint32_t opcode, uint32_t carry_in, uint32_t &carry_out)
-{
- uint32_t imm32; // the expanded result
- const uint32_t i = bit(opcode, 26);
- const uint32_t imm3 = bits(opcode, 14, 12);
- const uint32_t abcdefgh = bits(opcode, 7, 0);
- const uint32_t imm12 = i << 11 | imm3 << 8 | abcdefgh;
-
- if (bits(imm12, 11, 10) == 0)
- {
- switch (bits(imm12, 9, 8)) {
- default: // Keep static analyzer happy with a default case
- case 0:
- imm32 = abcdefgh;
- break;
-
- case 1:
- imm32 = abcdefgh << 16 | abcdefgh;
- break;
-
- case 2:
- imm32 = abcdefgh << 24 | abcdefgh << 8;
- break;
-
- case 3:
- imm32 = abcdefgh << 24 | abcdefgh << 16 | abcdefgh << 8 | abcdefgh;
- break;
- }
- carry_out = carry_in;
- }
- else
- {
- const uint32_t unrotated_value = 0x80 | bits(imm12, 6, 0);
- imm32 = ror(unrotated_value, 32, bits(imm12, 11, 7));
- carry_out = Bit32(imm32, 31);
+static inline uint32_t ThumbExpandImm_C(uint32_t opcode, uint32_t carry_in,
+ uint32_t &carry_out) {
+ uint32_t imm32; // the expanded result
+ const uint32_t i = bit(opcode, 26);
+ const uint32_t imm3 = bits(opcode, 14, 12);
+ const uint32_t abcdefgh = bits(opcode, 7, 0);
+ const uint32_t imm12 = i << 11 | imm3 << 8 | abcdefgh;
+
+ if (bits(imm12, 11, 10) == 0) {
+ switch (bits(imm12, 9, 8)) {
+ default: // Keep static analyzer happy with a default case
+ case 0:
+ imm32 = abcdefgh;
+ break;
+
+ case 1:
+ imm32 = abcdefgh << 16 | abcdefgh;
+ break;
+
+ case 2:
+ imm32 = abcdefgh << 24 | abcdefgh << 8;
+ break;
+
+ case 3:
+ imm32 = abcdefgh << 24 | abcdefgh << 16 | abcdefgh << 8 | abcdefgh;
+ break;
}
- return imm32;
+ carry_out = carry_in;
+ } else {
+ const uint32_t unrotated_value = 0x80 | bits(imm12, 6, 0);
+ imm32 = ror(unrotated_value, 32, bits(imm12, 11, 7));
+ carry_out = Bit32(imm32, 31);
+ }
+ return imm32;
}
-static inline uint32_t ThumbExpandImm(uint32_t opcode)
-{
- // 'carry_in' argument to following function call does not affect the imm32 result.
- uint32_t carry_in = 0;
- uint32_t carry_out;
- return ThumbExpandImm_C(opcode, carry_in, carry_out);
+static inline uint32_t ThumbExpandImm(uint32_t opcode) {
+ // 'carry_in' argument to following function call does not affect the imm32
+ // result.
+ uint32_t carry_in = 0;
+ uint32_t carry_out;
+ return ThumbExpandImm_C(opcode, carry_in, carry_out);
}
// imm32 = ZeroExtend(i:imm3:imm8, 32)
-static inline uint32_t ThumbImm12(uint32_t opcode)
-{
+static inline uint32_t ThumbImm12(uint32_t opcode) {
const uint32_t i = bit(opcode, 26);
const uint32_t imm3 = bits(opcode, 14, 12);
const uint32_t imm8 = bits(opcode, 7, 0);
@@ -372,15 +355,13 @@ static inline uint32_t ThumbImm12(uint32_t opcode)
}
// imm32 = ZeroExtend(imm7:'00', 32)
-static inline uint32_t ThumbImm7Scaled(uint32_t opcode)
-{
+static inline uint32_t ThumbImm7Scaled(uint32_t opcode) {
const uint32_t imm7 = bits(opcode, 6, 0);
return imm7 * 4;
}
// imm32 = ZeroExtend(imm8:'00', 32)
-static inline uint32_t ThumbImm8Scaled(uint32_t opcode)
-{
+static inline uint32_t ThumbImm8Scaled(uint32_t opcode) {
const uint32_t imm8 = bits(opcode, 7, 0);
return imm8 * 4;
}
@@ -389,6 +370,6 @@ static inline uint32_t ThumbImm8Scaled(uint32_t opcode)
// not permitted for many Thumb register specifiers.
static inline bool BadReg(uint32_t n) { return n == 13 || n == 15; }
-} // namespace lldb_private
+} // namespace lldb_private
-#endif // lldb_ARMUtils_h_
+#endif // lldb_ARMUtils_h_
diff --git a/source/Plugins/Process/Utility/CMakeLists.txt b/source/Plugins/Process/Utility/CMakeLists.txt
index eb0c81fd7979..c557667e3910 100644
--- a/source/Plugins/Process/Utility/CMakeLists.txt
+++ b/source/Plugins/Process/Utility/CMakeLists.txt
@@ -16,14 +16,12 @@ add_lldb_library(lldbPluginProcessUtility
RegisterContextDarwin_x86_64.cpp
RegisterContextDummy.cpp
RegisterContextFreeBSD_arm.cpp
- RegisterContextFreeBSD_arm64.cpp
RegisterContextFreeBSD_i386.cpp
RegisterContextFreeBSD_mips64.cpp
RegisterContextFreeBSD_powerpc.cpp
RegisterContextFreeBSD_x86_64.cpp
RegisterContextHistory.cpp
RegisterContextLinux_arm.cpp
- RegisterContextLinux_arm64.cpp
RegisterContextLinux_i386.cpp
RegisterContextLinux_x86_64.cpp
RegisterContextLinux_mips64.cpp
@@ -43,6 +41,7 @@ add_lldb_library(lldbPluginProcessUtility
RegisterContextPOSIX_s390x.cpp
RegisterContextPOSIX_x86.cpp
RegisterContextThreadMemory.cpp
+ RegisterInfoPOSIX_arm64.cpp
StopInfoMachException.cpp
ThreadMemory.cpp
UnwindLLDB.cpp
diff --git a/source/Plugins/Process/Utility/DynamicRegisterInfo.cpp b/source/Plugins/Process/Utility/DynamicRegisterInfo.cpp
index 6efdb468111b..7c8c26047f85 100644
--- a/source/Plugins/Process/Utility/DynamicRegisterInfo.cpp
+++ b/source/Plugins/Process/Utility/DynamicRegisterInfo.cpp
@@ -24,788 +24,725 @@
using namespace lldb;
using namespace lldb_private;
-DynamicRegisterInfo::DynamicRegisterInfo () :
- m_regs (),
- m_sets (),
- m_set_reg_nums (),
- m_set_names (),
- m_value_regs_map (),
- m_invalidate_regs_map (),
- m_dynamic_reg_size_map (),
- m_reg_data_byte_size (0),
- m_finalized (false)
-{
+DynamicRegisterInfo::DynamicRegisterInfo()
+ : m_regs(), m_sets(), m_set_reg_nums(), m_set_names(), m_value_regs_map(),
+ m_invalidate_regs_map(), m_dynamic_reg_size_map(),
+ m_reg_data_byte_size(0), m_finalized(false) {}
+
+DynamicRegisterInfo::DynamicRegisterInfo(
+ const lldb_private::StructuredData::Dictionary &dict,
+ const lldb_private::ArchSpec &arch)
+ : m_regs(), m_sets(), m_set_reg_nums(), m_set_names(), m_value_regs_map(),
+ m_invalidate_regs_map(), m_dynamic_reg_size_map(),
+ m_reg_data_byte_size(0), m_finalized(false) {
+ SetRegisterInfo(dict, arch);
}
-DynamicRegisterInfo::DynamicRegisterInfo(const lldb_private::StructuredData::Dictionary &dict,
- const lldb_private::ArchSpec &arch) :
- m_regs (),
- m_sets (),
- m_set_reg_nums (),
- m_set_names (),
- m_value_regs_map (),
- m_invalidate_regs_map (),
- m_dynamic_reg_size_map (),
- m_reg_data_byte_size (0),
- m_finalized (false)
-{
- SetRegisterInfo (dict, arch);
-}
-
-DynamicRegisterInfo::~DynamicRegisterInfo ()
-{
-}
+DynamicRegisterInfo::~DynamicRegisterInfo() {}
size_t
-DynamicRegisterInfo::SetRegisterInfo(const StructuredData::Dictionary &dict, const ArchSpec &arch)
-{
- assert(!m_finalized);
- StructuredData::Array *sets = nullptr;
- if (dict.GetValueForKeyAsArray("sets", sets))
- {
- const uint32_t num_sets = sets->GetSize();
- for (uint32_t i=0; i<num_sets; ++i)
- {
- std::string set_name_str;
- ConstString set_name;
- if (sets->GetItemAtIndexAsString(i, set_name_str))
- set_name.SetCString(set_name_str.c_str());
- if (set_name)
- {
- RegisterSet new_set = { set_name.AsCString(), NULL, 0, NULL };
- m_sets.push_back (new_set);
- }
- else
- {
- Clear();
- printf("error: register sets must have valid names\n");
- return 0;
- }
- }
- m_set_reg_nums.resize(m_sets.size());
- }
- StructuredData::Array *regs = nullptr;
- if (!dict.GetValueForKeyAsArray("registers", regs))
+DynamicRegisterInfo::SetRegisterInfo(const StructuredData::Dictionary &dict,
+ const ArchSpec &arch) {
+ assert(!m_finalized);
+ StructuredData::Array *sets = nullptr;
+ if (dict.GetValueForKeyAsArray("sets", sets)) {
+ const uint32_t num_sets = sets->GetSize();
+ for (uint32_t i = 0; i < num_sets; ++i) {
+ std::string set_name_str;
+ ConstString set_name;
+ if (sets->GetItemAtIndexAsString(i, set_name_str))
+ set_name.SetCString(set_name_str.c_str());
+ if (set_name) {
+ RegisterSet new_set = {set_name.AsCString(), NULL, 0, NULL};
+ m_sets.push_back(new_set);
+ } else {
+ Clear();
+ printf("error: register sets must have valid names\n");
return 0;
+ }
+ }
+ m_set_reg_nums.resize(m_sets.size());
+ }
+ StructuredData::Array *regs = nullptr;
+ if (!dict.GetValueForKeyAsArray("registers", regs))
+ return 0;
+
+ const uint32_t num_regs = regs->GetSize();
+ // typedef std::map<std::string, std::vector<std::string> >
+ // InvalidateNameMap;
+ // InvalidateNameMap invalidate_map;
+ for (uint32_t i = 0; i < num_regs; ++i) {
+ StructuredData::Dictionary *reg_info_dict = nullptr;
+ if (!regs->GetItemAtIndexAsDictionary(i, reg_info_dict)) {
+ Clear();
+ printf("error: items in the 'registers' array must be dictionaries\n");
+ regs->DumpToStdout();
+ return 0;
+ }
- const uint32_t num_regs = regs->GetSize();
-// typedef std::map<std::string, std::vector<std::string> > InvalidateNameMap;
-// InvalidateNameMap invalidate_map;
- for (uint32_t i = 0; i < num_regs; ++i)
- {
- StructuredData::Dictionary *reg_info_dict = nullptr;
- if (!regs->GetItemAtIndexAsDictionary(i, reg_info_dict))
- {
- Clear();
- printf("error: items in the 'registers' array must be dictionaries\n");
- regs->DumpToStdout();
- return 0;
- }
-
- // { 'name':'rcx' , 'bitsize' : 64, 'offset' : 16, 'encoding':'uint' , 'format':'hex' , 'set': 0, 'ehframe' : 2,
- // 'dwarf' : 2, 'generic':'arg4', 'alt-name':'arg4', },
- RegisterInfo reg_info;
- std::vector<uint32_t> value_regs;
- std::vector<uint32_t> invalidate_regs;
- memset(&reg_info, 0, sizeof(reg_info));
-
- ConstString name_val;
- ConstString alt_name_val;
- if (!reg_info_dict->GetValueForKeyAsString("name", name_val, nullptr))
- {
- Clear();
- printf("error: registers must have valid names and offsets\n");
- reg_info_dict->DumpToStdout();
- return 0;
- }
- reg_info.name = name_val.GetCString();
- reg_info_dict->GetValueForKeyAsString("alt-name", alt_name_val, nullptr);
- reg_info.alt_name = alt_name_val.GetCString();
-
- reg_info_dict->GetValueForKeyAsInteger("offset", reg_info.byte_offset, UINT32_MAX);
-
- const ByteOrder byte_order = arch.GetByteOrder();
-
- if (reg_info.byte_offset == UINT32_MAX)
- {
- // No offset for this register, see if the register has a value expression
- // which indicates this register is part of another register. Value expressions
- // are things like "rax[31:0]" which state that the current register's value
- // is in a concrete register "rax" in bits 31:0. If there is a value expression
- // we can calculate the offset
- bool success = false;
- std::string slice_str;
- if (reg_info_dict->GetValueForKeyAsString("slice", slice_str, nullptr))
- {
- // Slices use the following format:
- // REGNAME[MSBIT:LSBIT]
- // REGNAME - name of the register to grab a slice of
- // MSBIT - the most significant bit at which the current register value starts at
- // LSBIT - the least significant bit at which the current register value ends at
- static RegularExpression g_bitfield_regex("([A-Za-z_][A-Za-z0-9_]*)\\[([0-9]+):([0-9]+)\\]");
- RegularExpression::Match regex_match(3);
- if (g_bitfield_regex.Execute(slice_str.c_str(), &regex_match))
- {
- llvm::StringRef reg_name_str;
- std::string msbit_str;
- std::string lsbit_str;
- if (regex_match.GetMatchAtIndex(slice_str.c_str(), 1, reg_name_str) &&
- regex_match.GetMatchAtIndex(slice_str.c_str(), 2, msbit_str) &&
- regex_match.GetMatchAtIndex(slice_str.c_str(), 3, lsbit_str))
- {
- const uint32_t msbit = StringConvert::ToUInt32(msbit_str.c_str(), UINT32_MAX);
- const uint32_t lsbit = StringConvert::ToUInt32(lsbit_str.c_str(), UINT32_MAX);
- if (msbit != UINT32_MAX && lsbit != UINT32_MAX)
- {
- if (msbit > lsbit)
- {
- const uint32_t msbyte = msbit / 8;
- const uint32_t lsbyte = lsbit / 8;
-
- ConstString containing_reg_name(reg_name_str);
-
- RegisterInfo *containing_reg_info = GetRegisterInfo(containing_reg_name);
- if (containing_reg_info)
- {
- const uint32_t max_bit = containing_reg_info->byte_size * 8;
- if (msbit < max_bit && lsbit < max_bit)
- {
- m_invalidate_regs_map[containing_reg_info->kinds[eRegisterKindLLDB]].push_back(i);
- m_value_regs_map[i].push_back(containing_reg_info->kinds[eRegisterKindLLDB]);
- m_invalidate_regs_map[i].push_back(containing_reg_info->kinds[eRegisterKindLLDB]);
-
- if (byte_order == eByteOrderLittle)
- {
- success = true;
- reg_info.byte_offset = containing_reg_info->byte_offset + lsbyte;
- }
- else if (byte_order == eByteOrderBig)
- {
- success = true;
- reg_info.byte_offset = containing_reg_info->byte_offset + msbyte;
- }
- else
- {
- assert(!"Invalid byte order");
- }
- }
- else
- {
- if (msbit > max_bit)
- printf("error: msbit (%u) must be less than the bitsize of the register (%u)\n", msbit,
- max_bit);
- else
- printf("error: lsbit (%u) must be less than the bitsize of the register (%u)\n", lsbit,
- max_bit);
- }
- }
- else
- {
- printf("error: invalid concrete register \"%s\"\n", containing_reg_name.GetCString());
- }
- }
- else
- {
- printf("error: msbit (%u) must be greater than lsbit (%u)\n", msbit, lsbit);
- }
- }
- else
- {
- printf("error: msbit (%u) and lsbit (%u) must be valid\n", msbit, lsbit);
- }
+ // { 'name':'rcx' , 'bitsize' : 64, 'offset' : 16, 'encoding':'uint'
+ // , 'format':'hex' , 'set': 0, 'ehframe' : 2,
+ // 'dwarf' : 2, 'generic':'arg4', 'alt-name':'arg4', },
+ RegisterInfo reg_info;
+ std::vector<uint32_t> value_regs;
+ std::vector<uint32_t> invalidate_regs;
+ memset(&reg_info, 0, sizeof(reg_info));
+
+ ConstString name_val;
+ ConstString alt_name_val;
+ if (!reg_info_dict->GetValueForKeyAsString("name", name_val, nullptr)) {
+ Clear();
+ printf("error: registers must have valid names and offsets\n");
+ reg_info_dict->DumpToStdout();
+ return 0;
+ }
+ reg_info.name = name_val.GetCString();
+ reg_info_dict->GetValueForKeyAsString("alt-name", alt_name_val, nullptr);
+ reg_info.alt_name = alt_name_val.GetCString();
+
+ reg_info_dict->GetValueForKeyAsInteger("offset", reg_info.byte_offset,
+ UINT32_MAX);
+
+ const ByteOrder byte_order = arch.GetByteOrder();
+
+ if (reg_info.byte_offset == UINT32_MAX) {
+ // No offset for this register, see if the register has a value expression
+ // which indicates this register is part of another register. Value
+ // expressions
+ // are things like "rax[31:0]" which state that the current register's
+ // value
+ // is in a concrete register "rax" in bits 31:0. If there is a value
+ // expression
+ // we can calculate the offset
+ bool success = false;
+ std::string slice_str;
+ if (reg_info_dict->GetValueForKeyAsString("slice", slice_str, nullptr)) {
+ // Slices use the following format:
+ // REGNAME[MSBIT:LSBIT]
+ // REGNAME - name of the register to grab a slice of
+ // MSBIT - the most significant bit at which the current register value
+ // starts at
+ // LSBIT - the least significant bit at which the current register value
+ // ends at
+ static RegularExpression g_bitfield_regex(
+ llvm::StringRef("([A-Za-z_][A-Za-z0-9_]*)\\[([0-9]+):([0-9]+)\\]"));
+ RegularExpression::Match regex_match(3);
+ if (g_bitfield_regex.Execute(slice_str, &regex_match)) {
+ llvm::StringRef reg_name_str;
+ std::string msbit_str;
+ std::string lsbit_str;
+ if (regex_match.GetMatchAtIndex(slice_str.c_str(), 1, reg_name_str) &&
+ regex_match.GetMatchAtIndex(slice_str.c_str(), 2, msbit_str) &&
+ regex_match.GetMatchAtIndex(slice_str.c_str(), 3, lsbit_str)) {
+ const uint32_t msbit =
+ StringConvert::ToUInt32(msbit_str.c_str(), UINT32_MAX);
+ const uint32_t lsbit =
+ StringConvert::ToUInt32(lsbit_str.c_str(), UINT32_MAX);
+ if (msbit != UINT32_MAX && lsbit != UINT32_MAX) {
+ if (msbit > lsbit) {
+ const uint32_t msbyte = msbit / 8;
+ const uint32_t lsbyte = lsbit / 8;
+
+ ConstString containing_reg_name(reg_name_str);
+
+ RegisterInfo *containing_reg_info =
+ GetRegisterInfo(containing_reg_name);
+ if (containing_reg_info) {
+ const uint32_t max_bit = containing_reg_info->byte_size * 8;
+ if (msbit < max_bit && lsbit < max_bit) {
+ m_invalidate_regs_map[containing_reg_info
+ ->kinds[eRegisterKindLLDB]]
+ .push_back(i);
+ m_value_regs_map[i].push_back(
+ containing_reg_info->kinds[eRegisterKindLLDB]);
+ m_invalidate_regs_map[i].push_back(
+ containing_reg_info->kinds[eRegisterKindLLDB]);
+
+ if (byte_order == eByteOrderLittle) {
+ success = true;
+ reg_info.byte_offset =
+ containing_reg_info->byte_offset + lsbyte;
+ } else if (byte_order == eByteOrderBig) {
+ success = true;
+ reg_info.byte_offset =
+ containing_reg_info->byte_offset + msbyte;
+ } else {
+ assert(!"Invalid byte order");
}
+ } else {
+ if (msbit > max_bit)
+ printf("error: msbit (%u) must be less than the bitsize "
+ "of the register (%u)\n",
+ msbit, max_bit);
else
- {
- // TODO: print error invalid slice string that doesn't follow the format
- printf("error: failed to extract regex matches for parsing the register bitfield regex\n");
- }
- }
- else
- {
- // TODO: print error invalid slice string that doesn't follow the format
- printf("error: failed to match against register bitfield regex\n");
+ printf("error: lsbit (%u) must be less than the bitsize "
+ "of the register (%u)\n",
+ lsbit, max_bit);
+ }
+ } else {
+ printf("error: invalid concrete register \"%s\"\n",
+ containing_reg_name.GetCString());
}
+ } else {
+ printf("error: msbit (%u) must be greater than lsbit (%u)\n",
+ msbit, lsbit);
+ }
+ } else {
+ printf("error: msbit (%u) and lsbit (%u) must be valid\n", msbit,
+ lsbit);
}
- else
- {
- StructuredData::Array *composite_reg_list = nullptr;
- if (reg_info_dict->GetValueForKeyAsArray("composite", composite_reg_list))
- {
- const size_t num_composite_regs = composite_reg_list->GetSize();
- if (num_composite_regs > 0)
- {
- uint32_t composite_offset = UINT32_MAX;
- for (uint32_t composite_idx = 0; composite_idx < num_composite_regs; ++composite_idx)
- {
- ConstString composite_reg_name;
- if (composite_reg_list->GetItemAtIndexAsString(composite_idx, composite_reg_name, nullptr))
- {
- RegisterInfo *composite_reg_info = GetRegisterInfo(composite_reg_name);
- if (composite_reg_info)
- {
- composite_offset = std::min(composite_offset, composite_reg_info->byte_offset);
- m_value_regs_map[i].push_back(composite_reg_info->kinds[eRegisterKindLLDB]);
- m_invalidate_regs_map[composite_reg_info->kinds[eRegisterKindLLDB]].push_back(i);
- m_invalidate_regs_map[i].push_back(composite_reg_info->kinds[eRegisterKindLLDB]);
- }
- else
- {
- // TODO: print error invalid slice string that doesn't follow the format
- printf("error: failed to find composite register by name: \"%s\"\n", composite_reg_name.GetCString());
- }
- }
- else
- {
- printf("error: 'composite' list value wasn't a python string\n");
- }
- }
- if (composite_offset != UINT32_MAX)
- {
- reg_info.byte_offset = composite_offset;
- success = m_value_regs_map.find(i) != m_value_regs_map.end();
- }
- else
- {
- printf("error: 'composite' registers must specify at least one real register\n");
- }
- }
- else
- {
- printf("error: 'composite' list was empty\n");
- }
+ } else {
+ // TODO: print error invalid slice string that doesn't follow the
+ // format
+ printf("error: failed to extract regex matches for parsing the "
+ "register bitfield regex\n");
+ }
+ } else {
+ // TODO: print error invalid slice string that doesn't follow the
+ // format
+ printf("error: failed to match against register bitfield regex\n");
+ }
+ } else {
+ StructuredData::Array *composite_reg_list = nullptr;
+ if (reg_info_dict->GetValueForKeyAsArray("composite",
+ composite_reg_list)) {
+ const size_t num_composite_regs = composite_reg_list->GetSize();
+ if (num_composite_regs > 0) {
+ uint32_t composite_offset = UINT32_MAX;
+ for (uint32_t composite_idx = 0; composite_idx < num_composite_regs;
+ ++composite_idx) {
+ ConstString composite_reg_name;
+ if (composite_reg_list->GetItemAtIndexAsString(
+ composite_idx, composite_reg_name, nullptr)) {
+ RegisterInfo *composite_reg_info =
+ GetRegisterInfo(composite_reg_name);
+ if (composite_reg_info) {
+ composite_offset = std::min(composite_offset,
+ composite_reg_info->byte_offset);
+ m_value_regs_map[i].push_back(
+ composite_reg_info->kinds[eRegisterKindLLDB]);
+ m_invalidate_regs_map[composite_reg_info
+ ->kinds[eRegisterKindLLDB]]
+ .push_back(i);
+ m_invalidate_regs_map[i].push_back(
+ composite_reg_info->kinds[eRegisterKindLLDB]);
+ } else {
+ // TODO: print error invalid slice string that doesn't follow
+ // the format
+ printf("error: failed to find composite register by name: "
+ "\"%s\"\n",
+ composite_reg_name.GetCString());
}
+ } else {
+ printf(
+ "error: 'composite' list value wasn't a python string\n");
+ }
}
-
- if (!success)
- {
- Clear();
- reg_info_dict->DumpToStdout();
- return 0;
+ if (composite_offset != UINT32_MAX) {
+ reg_info.byte_offset = composite_offset;
+ success = m_value_regs_map.find(i) != m_value_regs_map.end();
+ } else {
+ printf("error: 'composite' registers must specify at least one "
+ "real register\n");
}
+ } else {
+ printf("error: 'composite' list was empty\n");
+ }
}
+ }
- int64_t bitsize = 0;
- if (!reg_info_dict->GetValueForKeyAsInteger("bitsize", bitsize))
- {
- Clear();
- printf("error: invalid or missing 'bitsize' key/value pair in register dictionary\n");
- reg_info_dict->DumpToStdout();
- return 0;
- }
-
- reg_info.byte_size = bitsize / 8;
-
- std::string dwarf_opcode_string;
- if (reg_info_dict->GetValueForKeyAsString ("dynamic_size_dwarf_expr_bytes", dwarf_opcode_string))
- {
- reg_info.dynamic_size_dwarf_len = dwarf_opcode_string.length () / 2;
- assert (reg_info.dynamic_size_dwarf_len > 0);
-
- std::vector<uint8_t> dwarf_opcode_bytes(reg_info.dynamic_size_dwarf_len);
- uint32_t j;
- StringExtractor opcode_extractor;
- // Swap "dwarf_opcode_string" over into "opcode_extractor"
- opcode_extractor.GetStringRef ().swap (dwarf_opcode_string);
- uint32_t ret_val = opcode_extractor.GetHexBytesAvail (dwarf_opcode_bytes.data (),
- reg_info.dynamic_size_dwarf_len);
- assert (ret_val == reg_info.dynamic_size_dwarf_len);
-
- for (j = 0; j < reg_info.dynamic_size_dwarf_len; ++j)
- m_dynamic_reg_size_map[i].push_back(dwarf_opcode_bytes[j]);
+ if (!success) {
+ Clear();
+ reg_info_dict->DumpToStdout();
+ return 0;
+ }
+ }
- reg_info.dynamic_size_dwarf_expr_bytes = m_dynamic_reg_size_map[i].data ();
- }
+ int64_t bitsize = 0;
+ if (!reg_info_dict->GetValueForKeyAsInteger("bitsize", bitsize)) {
+ Clear();
+ printf("error: invalid or missing 'bitsize' key/value pair in register "
+ "dictionary\n");
+ reg_info_dict->DumpToStdout();
+ return 0;
+ }
- std::string format_str;
- if (reg_info_dict->GetValueForKeyAsString("format", format_str, nullptr))
- {
- if (Args::StringToFormat(format_str.c_str(), reg_info.format, NULL).Fail())
- {
- Clear();
- printf("error: invalid 'format' value in register dictionary\n");
- reg_info_dict->DumpToStdout();
- return 0;
- }
- }
- else
- {
- reg_info_dict->GetValueForKeyAsInteger("format", reg_info.format, eFormatHex);
- }
+ reg_info.byte_size = bitsize / 8;
- std::string encoding_str;
- if (reg_info_dict->GetValueForKeyAsString("encoding", encoding_str))
- reg_info.encoding = Args::StringToEncoding(encoding_str.c_str(), eEncodingUint);
- else
- reg_info_dict->GetValueForKeyAsInteger("encoding", reg_info.encoding, eEncodingUint);
-
- size_t set = 0;
- if (!reg_info_dict->GetValueForKeyAsInteger<size_t>("set", set, -1) || set >= m_sets.size())
- {
- Clear();
- printf("error: invalid 'set' value in register dictionary, valid values are 0 - %i\n", (int)set);
- reg_info_dict->DumpToStdout();
- return 0;
- }
+ std::string dwarf_opcode_string;
+ if (reg_info_dict->GetValueForKeyAsString("dynamic_size_dwarf_expr_bytes",
+ dwarf_opcode_string)) {
+ reg_info.dynamic_size_dwarf_len = dwarf_opcode_string.length() / 2;
+ assert(reg_info.dynamic_size_dwarf_len > 0);
- // Fill in the register numbers
- reg_info.kinds[lldb::eRegisterKindLLDB] = i;
- reg_info.kinds[lldb::eRegisterKindProcessPlugin] = i;
- uint32_t eh_frame_regno = LLDB_INVALID_REGNUM;
- reg_info_dict->GetValueForKeyAsInteger("gcc", eh_frame_regno, LLDB_INVALID_REGNUM);
- if (eh_frame_regno == LLDB_INVALID_REGNUM)
- reg_info_dict->GetValueForKeyAsInteger("ehframe", eh_frame_regno, LLDB_INVALID_REGNUM);
- reg_info.kinds[lldb::eRegisterKindEHFrame] = eh_frame_regno;
- reg_info_dict->GetValueForKeyAsInteger("dwarf", reg_info.kinds[lldb::eRegisterKindDWARF], LLDB_INVALID_REGNUM);
- std::string generic_str;
- if (reg_info_dict->GetValueForKeyAsString("generic", generic_str))
- reg_info.kinds[lldb::eRegisterKindGeneric] = Args::StringToGenericRegister(generic_str.c_str());
- else
- reg_info_dict->GetValueForKeyAsInteger("generic", reg_info.kinds[lldb::eRegisterKindGeneric], LLDB_INVALID_REGNUM);
-
- // Check if this register invalidates any other register values when it is modified
- StructuredData::Array *invalidate_reg_list = nullptr;
- if (reg_info_dict->GetValueForKeyAsArray("invalidate-regs", invalidate_reg_list))
- {
- const size_t num_regs = invalidate_reg_list->GetSize();
- if (num_regs > 0)
- {
- for (uint32_t idx = 0; idx < num_regs; ++idx)
- {
- ConstString invalidate_reg_name;
- uint64_t invalidate_reg_num;
- if (invalidate_reg_list->GetItemAtIndexAsString(idx, invalidate_reg_name))
- {
- RegisterInfo *invalidate_reg_info = GetRegisterInfo(invalidate_reg_name);
- if (invalidate_reg_info)
- {
- m_invalidate_regs_map[i].push_back(invalidate_reg_info->kinds[eRegisterKindLLDB]);
- }
- else
- {
- // TODO: print error invalid slice string that doesn't follow the format
- printf("error: failed to find a 'invalidate-regs' register for \"%s\" while parsing register \"%s\"\n",
- invalidate_reg_name.GetCString(), reg_info.name);
- }
- }
- else if (invalidate_reg_list->GetItemAtIndexAsInteger(idx, invalidate_reg_num))
- {
- if (invalidate_reg_num != UINT64_MAX)
- m_invalidate_regs_map[i].push_back(invalidate_reg_num);
- else
- printf("error: 'invalidate-regs' list value wasn't a valid integer\n");
- }
- else
- {
- printf("error: 'invalidate-regs' list value wasn't a python string or integer\n");
- }
- }
- }
- else
- {
- printf("error: 'invalidate-regs' contained an empty list\n");
- }
- }
+ std::vector<uint8_t> dwarf_opcode_bytes(reg_info.dynamic_size_dwarf_len);
+ uint32_t j;
+ StringExtractor opcode_extractor;
+ // Swap "dwarf_opcode_string" over into "opcode_extractor"
+ opcode_extractor.GetStringRef().swap(dwarf_opcode_string);
+ uint32_t ret_val = opcode_extractor.GetHexBytesAvail(dwarf_opcode_bytes);
+ assert(ret_val == reg_info.dynamic_size_dwarf_len);
- // Calculate the register offset
- const size_t end_reg_offset = reg_info.byte_offset + reg_info.byte_size;
- if (m_reg_data_byte_size < end_reg_offset)
- m_reg_data_byte_size = end_reg_offset;
+ for (j = 0; j < reg_info.dynamic_size_dwarf_len; ++j)
+ m_dynamic_reg_size_map[i].push_back(dwarf_opcode_bytes[j]);
- m_regs.push_back(reg_info);
- m_set_reg_nums[set].push_back(i);
+ reg_info.dynamic_size_dwarf_expr_bytes = m_dynamic_reg_size_map[i].data();
}
- Finalize(arch);
- return m_regs.size();
-}
-
-void
-DynamicRegisterInfo::AddRegister (RegisterInfo &reg_info,
- ConstString &reg_name,
- ConstString &reg_alt_name,
- ConstString &set_name)
-{
- assert(!m_finalized);
- const uint32_t reg_num = m_regs.size();
- reg_info.name = reg_name.AsCString();
- assert (reg_info.name);
- reg_info.alt_name = reg_alt_name.AsCString(NULL);
- uint32_t i;
- if (reg_info.value_regs)
- {
- for (i=0; reg_info.value_regs[i] != LLDB_INVALID_REGNUM; ++i)
- m_value_regs_map[reg_num].push_back(reg_info.value_regs[i]);
+ std::string format_str;
+ if (reg_info_dict->GetValueForKeyAsString("format", format_str, nullptr)) {
+ if (Args::StringToFormat(format_str.c_str(), reg_info.format, NULL)
+ .Fail()) {
+ Clear();
+ printf("error: invalid 'format' value in register dictionary\n");
+ reg_info_dict->DumpToStdout();
+ return 0;
+ }
+ } else {
+ reg_info_dict->GetValueForKeyAsInteger("format", reg_info.format,
+ eFormatHex);
}
- if (reg_info.invalidate_regs)
- {
- for (i=0; reg_info.invalidate_regs[i] != LLDB_INVALID_REGNUM; ++i)
- m_invalidate_regs_map[reg_num].push_back(reg_info.invalidate_regs[i]);
+
+ std::string encoding_str;
+ if (reg_info_dict->GetValueForKeyAsString("encoding", encoding_str))
+ reg_info.encoding = Args::StringToEncoding(encoding_str, eEncodingUint);
+ else
+ reg_info_dict->GetValueForKeyAsInteger("encoding", reg_info.encoding,
+ eEncodingUint);
+
+ size_t set = 0;
+ if (!reg_info_dict->GetValueForKeyAsInteger<size_t>("set", set, -1) ||
+ set >= m_sets.size()) {
+ Clear();
+ printf("error: invalid 'set' value in register dictionary, valid values "
+ "are 0 - %i\n",
+ (int)set);
+ reg_info_dict->DumpToStdout();
+ return 0;
}
- if (reg_info.dynamic_size_dwarf_expr_bytes)
- {
- for (i = 0; i < reg_info.dynamic_size_dwarf_len; ++i)
- m_dynamic_reg_size_map[reg_num].push_back(reg_info.dynamic_size_dwarf_expr_bytes[i]);
- reg_info.dynamic_size_dwarf_expr_bytes = m_dynamic_reg_size_map[reg_num].data ();
+ // Fill in the register numbers
+ reg_info.kinds[lldb::eRegisterKindLLDB] = i;
+ reg_info.kinds[lldb::eRegisterKindProcessPlugin] = i;
+ uint32_t eh_frame_regno = LLDB_INVALID_REGNUM;
+ reg_info_dict->GetValueForKeyAsInteger("gcc", eh_frame_regno,
+ LLDB_INVALID_REGNUM);
+ if (eh_frame_regno == LLDB_INVALID_REGNUM)
+ reg_info_dict->GetValueForKeyAsInteger("ehframe", eh_frame_regno,
+ LLDB_INVALID_REGNUM);
+ reg_info.kinds[lldb::eRegisterKindEHFrame] = eh_frame_regno;
+ reg_info_dict->GetValueForKeyAsInteger(
+ "dwarf", reg_info.kinds[lldb::eRegisterKindDWARF], LLDB_INVALID_REGNUM);
+ std::string generic_str;
+ if (reg_info_dict->GetValueForKeyAsString("generic", generic_str))
+ reg_info.kinds[lldb::eRegisterKindGeneric] =
+ Args::StringToGenericRegister(generic_str);
+ else
+ reg_info_dict->GetValueForKeyAsInteger(
+ "generic", reg_info.kinds[lldb::eRegisterKindGeneric],
+ LLDB_INVALID_REGNUM);
+
+ // Check if this register invalidates any other register values when it is
+ // modified
+ StructuredData::Array *invalidate_reg_list = nullptr;
+ if (reg_info_dict->GetValueForKeyAsArray("invalidate-regs",
+ invalidate_reg_list)) {
+ const size_t num_regs = invalidate_reg_list->GetSize();
+ if (num_regs > 0) {
+ for (uint32_t idx = 0; idx < num_regs; ++idx) {
+ ConstString invalidate_reg_name;
+ uint64_t invalidate_reg_num;
+ if (invalidate_reg_list->GetItemAtIndexAsString(
+ idx, invalidate_reg_name)) {
+ RegisterInfo *invalidate_reg_info =
+ GetRegisterInfo(invalidate_reg_name);
+ if (invalidate_reg_info) {
+ m_invalidate_regs_map[i].push_back(
+ invalidate_reg_info->kinds[eRegisterKindLLDB]);
+ } else {
+ // TODO: print error invalid slice string that doesn't follow the
+ // format
+ printf("error: failed to find a 'invalidate-regs' register for "
+ "\"%s\" while parsing register \"%s\"\n",
+ invalidate_reg_name.GetCString(), reg_info.name);
+ }
+ } else if (invalidate_reg_list->GetItemAtIndexAsInteger(
+ idx, invalidate_reg_num)) {
+ if (invalidate_reg_num != UINT64_MAX)
+ m_invalidate_regs_map[i].push_back(invalidate_reg_num);
+ else
+ printf("error: 'invalidate-regs' list value wasn't a valid "
+ "integer\n");
+ } else {
+ printf("error: 'invalidate-regs' list value wasn't a python string "
+ "or integer\n");
+ }
+ }
+ } else {
+ printf("error: 'invalidate-regs' contained an empty list\n");
+ }
}
- m_regs.push_back (reg_info);
- uint32_t set = GetRegisterSetIndexByName (set_name, true);
- assert (set < m_sets.size());
- assert (set < m_set_reg_nums.size());
- assert (set < m_set_names.size());
- m_set_reg_nums[set].push_back(reg_num);
- size_t end_reg_offset = reg_info.byte_offset + reg_info.byte_size;
+ // Calculate the register offset
+ const size_t end_reg_offset = reg_info.byte_offset + reg_info.byte_size;
if (m_reg_data_byte_size < end_reg_offset)
- m_reg_data_byte_size = end_reg_offset;
+ m_reg_data_byte_size = end_reg_offset;
+
+ m_regs.push_back(reg_info);
+ m_set_reg_nums[set].push_back(i);
+ }
+ Finalize(arch);
+ return m_regs.size();
}
-void
-DynamicRegisterInfo::Finalize (const ArchSpec &arch)
-{
- if (m_finalized)
- return;
-
- m_finalized = true;
- const size_t num_sets = m_sets.size();
- for (size_t set = 0; set < num_sets; ++set)
- {
- assert (m_sets.size() == m_set_reg_nums.size());
- m_sets[set].num_registers = m_set_reg_nums[set].size();
- m_sets[set].registers = &m_set_reg_nums[set][0];
- }
-
- // sort and unique all value registers and make sure each is terminated with
- // LLDB_INVALID_REGNUM
-
- for (reg_to_regs_map::iterator pos = m_value_regs_map.begin(), end = m_value_regs_map.end();
- pos != end;
- ++pos)
- {
- if (pos->second.size() > 1)
- {
- std::sort (pos->second.begin(), pos->second.end());
- reg_num_collection::iterator unique_end = std::unique (pos->second.begin(), pos->second.end());
- if (unique_end != pos->second.end())
- pos->second.erase(unique_end, pos->second.end());
- }
- assert (!pos->second.empty());
- if (pos->second.back() != LLDB_INVALID_REGNUM)
- pos->second.push_back(LLDB_INVALID_REGNUM);
- }
-
- // Now update all value_regs with each register info as needed
- const size_t num_regs = m_regs.size();
- for (size_t i=0; i<num_regs; ++i)
- {
- if (m_value_regs_map.find(i) != m_value_regs_map.end())
- m_regs[i].value_regs = m_value_regs_map[i].data();
- else
- m_regs[i].value_regs = NULL;
- }
+void DynamicRegisterInfo::AddRegister(RegisterInfo &reg_info,
+ ConstString &reg_name,
+ ConstString &reg_alt_name,
+ ConstString &set_name) {
+ assert(!m_finalized);
+ const uint32_t reg_num = m_regs.size();
+ reg_info.name = reg_name.AsCString();
+ assert(reg_info.name);
+ reg_info.alt_name = reg_alt_name.AsCString(NULL);
+ uint32_t i;
+ if (reg_info.value_regs) {
+ for (i = 0; reg_info.value_regs[i] != LLDB_INVALID_REGNUM; ++i)
+ m_value_regs_map[reg_num].push_back(reg_info.value_regs[i]);
+ }
+ if (reg_info.invalidate_regs) {
+ for (i = 0; reg_info.invalidate_regs[i] != LLDB_INVALID_REGNUM; ++i)
+ m_invalidate_regs_map[reg_num].push_back(reg_info.invalidate_regs[i]);
+ }
+ if (reg_info.dynamic_size_dwarf_expr_bytes) {
+ for (i = 0; i < reg_info.dynamic_size_dwarf_len; ++i)
+ m_dynamic_reg_size_map[reg_num].push_back(
+ reg_info.dynamic_size_dwarf_expr_bytes[i]);
+
+ reg_info.dynamic_size_dwarf_expr_bytes =
+ m_dynamic_reg_size_map[reg_num].data();
+ }
+
+ m_regs.push_back(reg_info);
+ uint32_t set = GetRegisterSetIndexByName(set_name, true);
+ assert(set < m_sets.size());
+ assert(set < m_set_reg_nums.size());
+ assert(set < m_set_names.size());
+ m_set_reg_nums[set].push_back(reg_num);
+ size_t end_reg_offset = reg_info.byte_offset + reg_info.byte_size;
+ if (m_reg_data_byte_size < end_reg_offset)
+ m_reg_data_byte_size = end_reg_offset;
+}
- // Expand all invalidation dependencies
- for (reg_to_regs_map::iterator pos = m_invalidate_regs_map.begin(), end = m_invalidate_regs_map.end();
- pos != end;
- ++pos)
- {
- const uint32_t reg_num = pos->first;
-
- if (m_regs[reg_num].value_regs)
- {
- reg_num_collection extra_invalid_regs;
- for (const uint32_t invalidate_reg_num : pos->second)
- {
- reg_to_regs_map::iterator invalidate_pos = m_invalidate_regs_map.find(invalidate_reg_num);
- if (invalidate_pos != m_invalidate_regs_map.end())
- {
- for (const uint32_t concrete_invalidate_reg_num : invalidate_pos->second)
- {
- if (concrete_invalidate_reg_num != reg_num)
- extra_invalid_regs.push_back(concrete_invalidate_reg_num);
- }
- }
- }
- pos->second.insert(pos->second.end(), extra_invalid_regs.begin(), extra_invalid_regs.end());
- }
+void DynamicRegisterInfo::Finalize(const ArchSpec &arch) {
+ if (m_finalized)
+ return;
+
+ m_finalized = true;
+ const size_t num_sets = m_sets.size();
+ for (size_t set = 0; set < num_sets; ++set) {
+ assert(m_sets.size() == m_set_reg_nums.size());
+ m_sets[set].num_registers = m_set_reg_nums[set].size();
+ m_sets[set].registers = &m_set_reg_nums[set][0];
+ }
+
+ // sort and unique all value registers and make sure each is terminated with
+ // LLDB_INVALID_REGNUM
+
+ for (reg_to_regs_map::iterator pos = m_value_regs_map.begin(),
+ end = m_value_regs_map.end();
+ pos != end; ++pos) {
+ if (pos->second.size() > 1) {
+ std::sort(pos->second.begin(), pos->second.end());
+ reg_num_collection::iterator unique_end =
+ std::unique(pos->second.begin(), pos->second.end());
+ if (unique_end != pos->second.end())
+ pos->second.erase(unique_end, pos->second.end());
}
-
- // sort and unique all invalidate registers and make sure each is terminated with
- // LLDB_INVALID_REGNUM
- for (reg_to_regs_map::iterator pos = m_invalidate_regs_map.begin(), end = m_invalidate_regs_map.end();
- pos != end;
- ++pos)
- {
- if (pos->second.size() > 1)
- {
- std::sort (pos->second.begin(), pos->second.end());
- reg_num_collection::iterator unique_end = std::unique (pos->second.begin(), pos->second.end());
- if (unique_end != pos->second.end())
- pos->second.erase(unique_end, pos->second.end());
+ assert(!pos->second.empty());
+ if (pos->second.back() != LLDB_INVALID_REGNUM)
+ pos->second.push_back(LLDB_INVALID_REGNUM);
+ }
+
+ // Now update all value_regs with each register info as needed
+ const size_t num_regs = m_regs.size();
+ for (size_t i = 0; i < num_regs; ++i) {
+ if (m_value_regs_map.find(i) != m_value_regs_map.end())
+ m_regs[i].value_regs = m_value_regs_map[i].data();
+ else
+ m_regs[i].value_regs = NULL;
+ }
+
+ // Expand all invalidation dependencies
+ for (reg_to_regs_map::iterator pos = m_invalidate_regs_map.begin(),
+ end = m_invalidate_regs_map.end();
+ pos != end; ++pos) {
+ const uint32_t reg_num = pos->first;
+
+ if (m_regs[reg_num].value_regs) {
+ reg_num_collection extra_invalid_regs;
+ for (const uint32_t invalidate_reg_num : pos->second) {
+ reg_to_regs_map::iterator invalidate_pos =
+ m_invalidate_regs_map.find(invalidate_reg_num);
+ if (invalidate_pos != m_invalidate_regs_map.end()) {
+ for (const uint32_t concrete_invalidate_reg_num :
+ invalidate_pos->second) {
+ if (concrete_invalidate_reg_num != reg_num)
+ extra_invalid_regs.push_back(concrete_invalidate_reg_num);
+ }
}
- assert (!pos->second.empty());
- if (pos->second.back() != LLDB_INVALID_REGNUM)
- pos->second.push_back(LLDB_INVALID_REGNUM);
+ }
+ pos->second.insert(pos->second.end(), extra_invalid_regs.begin(),
+ extra_invalid_regs.end());
}
-
- // Now update all invalidate_regs with each register info as needed
- for (size_t i=0; i<num_regs; ++i)
- {
- if (m_invalidate_regs_map.find(i) != m_invalidate_regs_map.end())
- m_regs[i].invalidate_regs = m_invalidate_regs_map[i].data();
- else
- m_regs[i].invalidate_regs = NULL;
+ }
+
+ // sort and unique all invalidate registers and make sure each is terminated
+ // with
+ // LLDB_INVALID_REGNUM
+ for (reg_to_regs_map::iterator pos = m_invalidate_regs_map.begin(),
+ end = m_invalidate_regs_map.end();
+ pos != end; ++pos) {
+ if (pos->second.size() > 1) {
+ std::sort(pos->second.begin(), pos->second.end());
+ reg_num_collection::iterator unique_end =
+ std::unique(pos->second.begin(), pos->second.end());
+ if (unique_end != pos->second.end())
+ pos->second.erase(unique_end, pos->second.end());
}
-
- // Check if we need to automatically set the generic registers in case
- // they weren't set
- bool generic_regs_specified = false;
- for (const auto &reg: m_regs)
- {
- if (reg.kinds[eRegisterKindGeneric] != LLDB_INVALID_REGNUM)
- {
- generic_regs_specified = true;
- break;
- }
+ assert(!pos->second.empty());
+ if (pos->second.back() != LLDB_INVALID_REGNUM)
+ pos->second.push_back(LLDB_INVALID_REGNUM);
+ }
+
+ // Now update all invalidate_regs with each register info as needed
+ for (size_t i = 0; i < num_regs; ++i) {
+ if (m_invalidate_regs_map.find(i) != m_invalidate_regs_map.end())
+ m_regs[i].invalidate_regs = m_invalidate_regs_map[i].data();
+ else
+ m_regs[i].invalidate_regs = NULL;
+ }
+
+ // Check if we need to automatically set the generic registers in case
+ // they weren't set
+ bool generic_regs_specified = false;
+ for (const auto &reg : m_regs) {
+ if (reg.kinds[eRegisterKindGeneric] != LLDB_INVALID_REGNUM) {
+ generic_regs_specified = true;
+ break;
}
-
- if (!generic_regs_specified)
- {
- switch (arch.GetMachine())
- {
- case llvm::Triple::aarch64:
- case llvm::Triple::aarch64_be:
- for (auto &reg: m_regs)
- {
- if (strcmp(reg.name, "pc") == 0)
- reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_PC;
- else if ((strcmp(reg.name, "fp") == 0) || (strcmp(reg.name, "x29") == 0))
- reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FP;
- else if ((strcmp(reg.name, "lr") == 0) || (strcmp(reg.name, "x30") == 0))
- reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_RA;
- else if ((strcmp(reg.name, "sp") == 0) || (strcmp(reg.name, "x31") == 0))
- reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_SP;
- else if (strcmp(reg.name, "cpsr") == 0)
- reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FLAGS;
- }
- break;
-
- case llvm::Triple::arm:
- case llvm::Triple::armeb:
- case llvm::Triple::thumb:
- case llvm::Triple::thumbeb:
- for (auto &reg: m_regs)
- {
- if ((strcmp(reg.name, "pc") == 0) || (strcmp(reg.name, "r15") == 0))
- reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_PC;
- else if ((strcmp(reg.name, "sp") == 0) || (strcmp(reg.name, "r13") == 0))
- reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_SP;
- else if ((strcmp(reg.name, "lr") == 0) || (strcmp(reg.name, "r14") == 0))
- reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_RA;
- else if ((strcmp(reg.name, "r7") == 0) && arch.GetTriple().getVendor() == llvm::Triple::Apple)
- reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FP;
- else if ((strcmp(reg.name, "r11") == 0) && arch.GetTriple().getVendor() != llvm::Triple::Apple)
- reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FP;
- else if (strcmp(reg.name, "fp") == 0)
- reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FP;
- else if (strcmp(reg.name, "cpsr") == 0)
- reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FLAGS;
- }
- break;
-
- case llvm::Triple::x86:
- for (auto &reg: m_regs)
- {
- if ((strcmp(reg.name, "eip") == 0) || (strcmp(reg.name, "pc") == 0))
- reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_PC;
- else if ((strcmp(reg.name, "esp") == 0) || (strcmp(reg.name, "sp") == 0))
- reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_SP;
- else if ((strcmp(reg.name, "ebp") == 0) || (strcmp(reg.name, "fp") == 0))
- reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FP;
- else if ((strcmp(reg.name, "eflags") == 0) || (strcmp(reg.name, "flags") == 0))
- reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FLAGS;
- }
- break;
-
- case llvm::Triple::x86_64:
- for (auto &reg: m_regs)
- {
- if ((strcmp(reg.name, "rip") == 0) || (strcmp(reg.name, "pc") == 0))
- reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_PC;
- else if ((strcmp(reg.name, "rsp") == 0) || (strcmp(reg.name, "sp") == 0))
- reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_SP;
- else if ((strcmp(reg.name, "rbp") == 0) || (strcmp(reg.name, "fp") == 0))
- reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FP;
- else if ((strcmp(reg.name, "rflags") == 0) || (strcmp(reg.name, "flags") == 0))
- reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FLAGS;
- }
- break;
-
- default:
- break;
- }
+ }
+
+ if (!generic_regs_specified) {
+ switch (arch.GetMachine()) {
+ case llvm::Triple::aarch64:
+ case llvm::Triple::aarch64_be:
+ for (auto &reg : m_regs) {
+ if (strcmp(reg.name, "pc") == 0)
+ reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_PC;
+ else if ((strcmp(reg.name, "fp") == 0) ||
+ (strcmp(reg.name, "x29") == 0))
+ reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FP;
+ else if ((strcmp(reg.name, "lr") == 0) ||
+ (strcmp(reg.name, "x30") == 0))
+ reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_RA;
+ else if ((strcmp(reg.name, "sp") == 0) ||
+ (strcmp(reg.name, "x31") == 0))
+ reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_SP;
+ else if (strcmp(reg.name, "cpsr") == 0)
+ reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FLAGS;
+ }
+ break;
+
+ case llvm::Triple::arm:
+ case llvm::Triple::armeb:
+ case llvm::Triple::thumb:
+ case llvm::Triple::thumbeb:
+ for (auto &reg : m_regs) {
+ if ((strcmp(reg.name, "pc") == 0) || (strcmp(reg.name, "r15") == 0))
+ reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_PC;
+ else if ((strcmp(reg.name, "sp") == 0) ||
+ (strcmp(reg.name, "r13") == 0))
+ reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_SP;
+ else if ((strcmp(reg.name, "lr") == 0) ||
+ (strcmp(reg.name, "r14") == 0))
+ reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_RA;
+ else if ((strcmp(reg.name, "r7") == 0) &&
+ arch.GetTriple().getVendor() == llvm::Triple::Apple)
+ reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FP;
+ else if ((strcmp(reg.name, "r11") == 0) &&
+ arch.GetTriple().getVendor() != llvm::Triple::Apple)
+ reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FP;
+ else if (strcmp(reg.name, "fp") == 0)
+ reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FP;
+ else if (strcmp(reg.name, "cpsr") == 0)
+ reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FLAGS;
+ }
+ break;
+
+ case llvm::Triple::x86:
+ for (auto &reg : m_regs) {
+ if ((strcmp(reg.name, "eip") == 0) || (strcmp(reg.name, "pc") == 0))
+ reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_PC;
+ else if ((strcmp(reg.name, "esp") == 0) ||
+ (strcmp(reg.name, "sp") == 0))
+ reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_SP;
+ else if ((strcmp(reg.name, "ebp") == 0) ||
+ (strcmp(reg.name, "fp") == 0))
+ reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FP;
+ else if ((strcmp(reg.name, "eflags") == 0) ||
+ (strcmp(reg.name, "flags") == 0))
+ reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FLAGS;
+ }
+ break;
+
+ case llvm::Triple::x86_64:
+ for (auto &reg : m_regs) {
+ if ((strcmp(reg.name, "rip") == 0) || (strcmp(reg.name, "pc") == 0))
+ reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_PC;
+ else if ((strcmp(reg.name, "rsp") == 0) ||
+ (strcmp(reg.name, "sp") == 0))
+ reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_SP;
+ else if ((strcmp(reg.name, "rbp") == 0) ||
+ (strcmp(reg.name, "fp") == 0))
+ reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FP;
+ else if ((strcmp(reg.name, "rflags") == 0) ||
+ (strcmp(reg.name, "flags") == 0))
+ reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FLAGS;
+ }
+ break;
+
+ default:
+ break;
}
+ }
}
-size_t
-DynamicRegisterInfo::GetNumRegisters() const
-{
- return m_regs.size();
-}
+size_t DynamicRegisterInfo::GetNumRegisters() const { return m_regs.size(); }
-size_t
-DynamicRegisterInfo::GetNumRegisterSets() const
-{
- return m_sets.size();
-}
+size_t DynamicRegisterInfo::GetNumRegisterSets() const { return m_sets.size(); }
-size_t
-DynamicRegisterInfo::GetRegisterDataByteSize() const
-{
- return m_reg_data_byte_size;
+size_t DynamicRegisterInfo::GetRegisterDataByteSize() const {
+ return m_reg_data_byte_size;
}
const RegisterInfo *
-DynamicRegisterInfo::GetRegisterInfoAtIndex (uint32_t i) const
-{
- if (i < m_regs.size())
- return &m_regs[i];
- return NULL;
+DynamicRegisterInfo::GetRegisterInfoAtIndex(uint32_t i) const {
+ if (i < m_regs.size())
+ return &m_regs[i];
+ return NULL;
}
-RegisterInfo *
-DynamicRegisterInfo::GetRegisterInfoAtIndex (uint32_t i)
-{
- if (i < m_regs.size())
- return &m_regs[i];
- return NULL;
+RegisterInfo *DynamicRegisterInfo::GetRegisterInfoAtIndex(uint32_t i) {
+ if (i < m_regs.size())
+ return &m_regs[i];
+ return NULL;
}
-const RegisterSet *
-DynamicRegisterInfo::GetRegisterSet (uint32_t i) const
-{
- if (i < m_sets.size())
- return &m_sets[i];
- return NULL;
+const RegisterSet *DynamicRegisterInfo::GetRegisterSet(uint32_t i) const {
+ if (i < m_sets.size())
+ return &m_sets[i];
+ return NULL;
}
-uint32_t
-DynamicRegisterInfo::GetRegisterSetIndexByName (ConstString &set_name, bool can_create)
-{
- name_collection::iterator pos, end = m_set_names.end();
- for (pos = m_set_names.begin(); pos != end; ++pos)
- {
- if (*pos == set_name)
- return std::distance (m_set_names.begin(), pos);
- }
-
- m_set_names.push_back(set_name);
- m_set_reg_nums.resize(m_set_reg_nums.size()+1);
- RegisterSet new_set = { set_name.AsCString(), NULL, 0, NULL };
- m_sets.push_back (new_set);
- return m_sets.size() - 1;
+uint32_t DynamicRegisterInfo::GetRegisterSetIndexByName(ConstString &set_name,
+ bool can_create) {
+ name_collection::iterator pos, end = m_set_names.end();
+ for (pos = m_set_names.begin(); pos != end; ++pos) {
+ if (*pos == set_name)
+ return std::distance(m_set_names.begin(), pos);
+ }
+
+ m_set_names.push_back(set_name);
+ m_set_reg_nums.resize(m_set_reg_nums.size() + 1);
+ RegisterSet new_set = {set_name.AsCString(), NULL, 0, NULL};
+ m_sets.push_back(new_set);
+ return m_sets.size() - 1;
}
uint32_t
-DynamicRegisterInfo::ConvertRegisterKindToRegisterNumber (uint32_t kind, uint32_t num) const
-{
- reg_collection::const_iterator pos, end = m_regs.end();
- for (pos = m_regs.begin(); pos != end; ++pos)
- {
- if (pos->kinds[kind] == num)
- return std::distance (m_regs.begin(), pos);
- }
-
- return LLDB_INVALID_REGNUM;
+DynamicRegisterInfo::ConvertRegisterKindToRegisterNumber(uint32_t kind,
+ uint32_t num) const {
+ reg_collection::const_iterator pos, end = m_regs.end();
+ for (pos = m_regs.begin(); pos != end; ++pos) {
+ if (pos->kinds[kind] == num)
+ return std::distance(m_regs.begin(), pos);
+ }
+
+ return LLDB_INVALID_REGNUM;
}
-void
-DynamicRegisterInfo::Clear()
-{
- m_regs.clear();
- m_sets.clear();
- m_set_reg_nums.clear();
- m_set_names.clear();
- m_value_regs_map.clear();
- m_invalidate_regs_map.clear();
- m_dynamic_reg_size_map.clear();
- m_reg_data_byte_size = 0;
- m_finalized = false;
+void DynamicRegisterInfo::Clear() {
+ m_regs.clear();
+ m_sets.clear();
+ m_set_reg_nums.clear();
+ m_set_names.clear();
+ m_value_regs_map.clear();
+ m_invalidate_regs_map.clear();
+ m_dynamic_reg_size_map.clear();
+ m_reg_data_byte_size = 0;
+ m_finalized = false;
}
-void
-DynamicRegisterInfo::Dump () const
-{
- StreamFile s(stdout, false);
- const size_t num_regs = m_regs.size();
- s.Printf("%p: DynamicRegisterInfo contains %" PRIu64 " registers:\n",
- static_cast<const void*>(this), static_cast<uint64_t>(num_regs));
- for (size_t i=0; i<num_regs; ++i)
- {
- s.Printf("[%3" PRIu64 "] name = %-10s", (uint64_t)i, m_regs[i].name);
- s.Printf(", size = %2u, offset = %4u, encoding = %u, format = %-10s",
- m_regs[i].byte_size,
- m_regs[i].byte_offset,
- m_regs[i].encoding,
- FormatManager::GetFormatAsCString (m_regs[i].format));
- if (m_regs[i].kinds[eRegisterKindProcessPlugin] != LLDB_INVALID_REGNUM)
- s.Printf(", process plugin = %3u", m_regs[i].kinds[eRegisterKindProcessPlugin]);
- if (m_regs[i].kinds[eRegisterKindDWARF] != LLDB_INVALID_REGNUM)
- s.Printf(", dwarf = %3u", m_regs[i].kinds[eRegisterKindDWARF]);
- if (m_regs[i].kinds[eRegisterKindEHFrame] != LLDB_INVALID_REGNUM)
- s.Printf(", ehframe = %3u", m_regs[i].kinds[eRegisterKindEHFrame]);
- if (m_regs[i].kinds[eRegisterKindGeneric] != LLDB_INVALID_REGNUM)
- s.Printf(", generic = %3u", m_regs[i].kinds[eRegisterKindGeneric]);
- if (m_regs[i].alt_name)
- s.Printf(", alt-name = %s", m_regs[i].alt_name);
- if (m_regs[i].value_regs)
- {
- s.Printf(", value_regs = [ ");
- for (size_t j=0; m_regs[i].value_regs[j] != LLDB_INVALID_REGNUM; ++j)
- {
- s.Printf("%s ", m_regs[m_regs[i].value_regs[j]].name);
- }
- s.Printf("]");
- }
- if (m_regs[i].invalidate_regs)
- {
- s.Printf(", invalidate_regs = [ ");
- for (size_t j=0; m_regs[i].invalidate_regs[j] != LLDB_INVALID_REGNUM; ++j)
- {
- s.Printf("%s ", m_regs[m_regs[i].invalidate_regs[j]].name);
- }
- s.Printf("]");
- }
- s.EOL();
+void DynamicRegisterInfo::Dump() const {
+ StreamFile s(stdout, false);
+ const size_t num_regs = m_regs.size();
+ s.Printf("%p: DynamicRegisterInfo contains %" PRIu64 " registers:\n",
+ static_cast<const void *>(this), static_cast<uint64_t>(num_regs));
+ for (size_t i = 0; i < num_regs; ++i) {
+ s.Printf("[%3" PRIu64 "] name = %-10s", (uint64_t)i, m_regs[i].name);
+ s.Printf(", size = %2u, offset = %4u, encoding = %u, format = %-10s",
+ m_regs[i].byte_size, m_regs[i].byte_offset, m_regs[i].encoding,
+ FormatManager::GetFormatAsCString(m_regs[i].format));
+ if (m_regs[i].kinds[eRegisterKindProcessPlugin] != LLDB_INVALID_REGNUM)
+ s.Printf(", process plugin = %3u",
+ m_regs[i].kinds[eRegisterKindProcessPlugin]);
+ if (m_regs[i].kinds[eRegisterKindDWARF] != LLDB_INVALID_REGNUM)
+ s.Printf(", dwarf = %3u", m_regs[i].kinds[eRegisterKindDWARF]);
+ if (m_regs[i].kinds[eRegisterKindEHFrame] != LLDB_INVALID_REGNUM)
+ s.Printf(", ehframe = %3u", m_regs[i].kinds[eRegisterKindEHFrame]);
+ if (m_regs[i].kinds[eRegisterKindGeneric] != LLDB_INVALID_REGNUM)
+ s.Printf(", generic = %3u", m_regs[i].kinds[eRegisterKindGeneric]);
+ if (m_regs[i].alt_name)
+ s.Printf(", alt-name = %s", m_regs[i].alt_name);
+ if (m_regs[i].value_regs) {
+ s.Printf(", value_regs = [ ");
+ for (size_t j = 0; m_regs[i].value_regs[j] != LLDB_INVALID_REGNUM; ++j) {
+ s.Printf("%s ", m_regs[m_regs[i].value_regs[j]].name);
+ }
+ s.Printf("]");
}
-
- const size_t num_sets = m_sets.size();
- s.Printf("%p: DynamicRegisterInfo contains %" PRIu64 " register sets:\n",
- static_cast<const void*>(this), static_cast<uint64_t>(num_sets));
- for (size_t i=0; i<num_sets; ++i)
- {
- s.Printf("set[%" PRIu64 "] name = %s, regs = [", (uint64_t)i, m_sets[i].name);
- for (size_t idx=0; idx<m_sets[i].num_registers; ++idx)
- {
- s.Printf("%s ", m_regs[m_sets[i].registers[idx]].name);
- }
- s.Printf("]\n");
+ if (m_regs[i].invalidate_regs) {
+ s.Printf(", invalidate_regs = [ ");
+ for (size_t j = 0; m_regs[i].invalidate_regs[j] != LLDB_INVALID_REGNUM;
+ ++j) {
+ s.Printf("%s ", m_regs[m_regs[i].invalidate_regs[j]].name);
+ }
+ s.Printf("]");
+ }
+ s.EOL();
+ }
+
+ const size_t num_sets = m_sets.size();
+ s.Printf("%p: DynamicRegisterInfo contains %" PRIu64 " register sets:\n",
+ static_cast<const void *>(this), static_cast<uint64_t>(num_sets));
+ for (size_t i = 0; i < num_sets; ++i) {
+ s.Printf("set[%" PRIu64 "] name = %s, regs = [", (uint64_t)i,
+ m_sets[i].name);
+ for (size_t idx = 0; idx < m_sets[i].num_registers; ++idx) {
+ s.Printf("%s ", m_regs[m_sets[i].registers[idx]].name);
}
+ s.Printf("]\n");
+ }
}
-
-
-lldb_private::RegisterInfo *
-DynamicRegisterInfo::GetRegisterInfo (const lldb_private::ConstString &reg_name)
-{
- for (auto &reg_info : m_regs)
- {
- // We can use pointer comparison since we used a ConstString to set
- // the "name" member in AddRegister()
- if (reg_info.name == reg_name.GetCString())
- {
- return &reg_info;
- }
+lldb_private::RegisterInfo *DynamicRegisterInfo::GetRegisterInfo(
+ const lldb_private::ConstString &reg_name) {
+ for (auto &reg_info : m_regs) {
+ // We can use pointer comparison since we used a ConstString to set
+ // the "name" member in AddRegister()
+ if (reg_info.name == reg_name.GetCString()) {
+ return &reg_info;
}
- return NULL;
+ }
+ return NULL;
}
diff --git a/source/Plugins/Process/Utility/DynamicRegisterInfo.h b/source/Plugins/Process/Utility/DynamicRegisterInfo.h
index d97dc136bd63..e5c22fe484e9 100644
--- a/source/Plugins/Process/Utility/DynamicRegisterInfo.h
+++ b/source/Plugins/Process/Utility/DynamicRegisterInfo.h
@@ -12,93 +12,82 @@
// C Includes
// C++ Includes
-#include <vector>
#include <map>
+#include <vector>
// Other libraries and framework includes
// Project includes
-#include "lldb/lldb-private.h"
#include "lldb/Core/ConstString.h"
#include "lldb/Core/StructuredData.h"
+#include "lldb/lldb-private.h"
-class DynamicRegisterInfo
-{
+class DynamicRegisterInfo {
public:
- DynamicRegisterInfo ();
+ DynamicRegisterInfo();
- DynamicRegisterInfo(const lldb_private::StructuredData::Dictionary &dict,
- const lldb_private::ArchSpec &arch);
+ DynamicRegisterInfo(const lldb_private::StructuredData::Dictionary &dict,
+ const lldb_private::ArchSpec &arch);
- virtual
- ~DynamicRegisterInfo ();
+ virtual ~DynamicRegisterInfo();
- size_t SetRegisterInfo(const lldb_private::StructuredData::Dictionary &dict,
- const lldb_private::ArchSpec &arch);
+ size_t SetRegisterInfo(const lldb_private::StructuredData::Dictionary &dict,
+ const lldb_private::ArchSpec &arch);
- void
- AddRegister (lldb_private::RegisterInfo &reg_info,
- lldb_private::ConstString &reg_name,
- lldb_private::ConstString &reg_alt_name,
- lldb_private::ConstString &set_name);
+ void AddRegister(lldb_private::RegisterInfo &reg_info,
+ lldb_private::ConstString &reg_name,
+ lldb_private::ConstString &reg_alt_name,
+ lldb_private::ConstString &set_name);
- void
- Finalize (const lldb_private::ArchSpec &arch);
+ void Finalize(const lldb_private::ArchSpec &arch);
- size_t
- GetNumRegisters() const;
+ size_t GetNumRegisters() const;
- size_t
- GetNumRegisterSets() const;
+ size_t GetNumRegisterSets() const;
- size_t
- GetRegisterDataByteSize() const;
+ size_t GetRegisterDataByteSize() const;
- const lldb_private::RegisterInfo *
- GetRegisterInfoAtIndex (uint32_t i) const;
+ const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(uint32_t i) const;
- lldb_private::RegisterInfo *
- GetRegisterInfoAtIndex (uint32_t i);
+ lldb_private::RegisterInfo *GetRegisterInfoAtIndex(uint32_t i);
- const lldb_private::RegisterSet *
- GetRegisterSet (uint32_t i) const;
+ const lldb_private::RegisterSet *GetRegisterSet(uint32_t i) const;
- uint32_t
- GetRegisterSetIndexByName (lldb_private::ConstString &set_name, bool can_create);
+ uint32_t GetRegisterSetIndexByName(lldb_private::ConstString &set_name,
+ bool can_create);
- uint32_t
- ConvertRegisterKindToRegisterNumber (uint32_t kind, uint32_t num) const;
+ uint32_t ConvertRegisterKindToRegisterNumber(uint32_t kind,
+ uint32_t num) const;
- void
- Dump () const;
+ void Dump() const;
- void
- Clear();
+ void Clear();
protected:
- //------------------------------------------------------------------
- // Classes that inherit from DynamicRegisterInfo can see and modify these
- //------------------------------------------------------------------
- typedef std::vector <lldb_private::RegisterInfo> reg_collection;
- typedef std::vector <lldb_private::RegisterSet> set_collection;
- typedef std::vector <uint32_t> reg_num_collection;
- typedef std::vector <reg_num_collection> set_reg_num_collection;
- typedef std::vector <lldb_private::ConstString> name_collection;
- typedef std::map<uint32_t, reg_num_collection> reg_to_regs_map;
- typedef std::vector <uint8_t> dwarf_opcode;
- typedef std::map<uint32_t, dwarf_opcode> dynamic_reg_size_map;
-
- lldb_private::RegisterInfo *
- GetRegisterInfo (const lldb_private::ConstString &reg_name);
-
- reg_collection m_regs;
- set_collection m_sets;
- set_reg_num_collection m_set_reg_nums;
- name_collection m_set_names;
- reg_to_regs_map m_value_regs_map;
- reg_to_regs_map m_invalidate_regs_map;
- dynamic_reg_size_map m_dynamic_reg_size_map;
- size_t m_reg_data_byte_size; // The number of bytes required to store all registers
- bool m_finalized;
+ //------------------------------------------------------------------
+ // Classes that inherit from DynamicRegisterInfo can see and modify these
+ //------------------------------------------------------------------
+ typedef std::vector<lldb_private::RegisterInfo> reg_collection;
+ typedef std::vector<lldb_private::RegisterSet> set_collection;
+ typedef std::vector<uint32_t> reg_num_collection;
+ typedef std::vector<reg_num_collection> set_reg_num_collection;
+ typedef std::vector<lldb_private::ConstString> name_collection;
+ typedef std::map<uint32_t, reg_num_collection> reg_to_regs_map;
+ typedef std::vector<uint8_t> dwarf_opcode;
+ typedef std::map<uint32_t, dwarf_opcode> dynamic_reg_size_map;
+
+ lldb_private::RegisterInfo *
+ GetRegisterInfo(const lldb_private::ConstString &reg_name);
+
+ reg_collection m_regs;
+ set_collection m_sets;
+ set_reg_num_collection m_set_reg_nums;
+ name_collection m_set_names;
+ reg_to_regs_map m_value_regs_map;
+ reg_to_regs_map m_invalidate_regs_map;
+ dynamic_reg_size_map m_dynamic_reg_size_map;
+ size_t m_reg_data_byte_size; // The number of bytes required to store all
+ // registers
+ bool m_finalized;
};
-#endif // lldb_DynamicRegisterInfo_h_
+#endif // lldb_DynamicRegisterInfo_h_
diff --git a/source/Plugins/Process/Utility/FreeBSDSignals.cpp b/source/Plugins/Process/Utility/FreeBSDSignals.cpp
index e575e2c6a496..f695a11c9759 100644
--- a/source/Plugins/Process/Utility/FreeBSDSignals.cpp
+++ b/source/Plugins/Process/Utility/FreeBSDSignals.cpp
@@ -15,81 +15,77 @@
using namespace lldb_private;
-FreeBSDSignals::FreeBSDSignals()
- : UnixSignals()
-{
- Reset();
-}
+FreeBSDSignals::FreeBSDSignals() : UnixSignals() { Reset(); }
-void
-FreeBSDSignals::Reset()
-{
- UnixSignals::Reset();
+void FreeBSDSignals::Reset() {
+ UnixSignals::Reset();
- // SIGNO NAME SUPPRESS STOP NOTIFY DESCRIPTION
- // ====== ============ ======== ====== ====== ===================================================
- AddSignal (32, "SIGTHR", false, false, false, "thread interrupt");
- AddSignal (33, "SIGLIBRT", false, false, false, "reserved by real-time library");
- AddSignal (65, "SIGRTMIN", false, false, false, "real time signal 0");
- AddSignal (66, "SIGRTMIN+1", false, false, false, "real time signal 1");
- AddSignal (67, "SIGRTMIN+2", false, false, false, "real time signal 2");
- AddSignal (68, "SIGRTMIN+3", false, false, false, "real time signal 3");
- AddSignal (69, "SIGRTMIN+4", false, false, false, "real time signal 4");
- AddSignal (70, "SIGRTMIN+5", false, false, false, "real time signal 5");
- AddSignal (71, "SIGRTMIN+6", false, false, false, "real time signal 6");
- AddSignal (72, "SIGRTMIN+7", false, false, false, "real time signal 7");
- AddSignal (73, "SIGRTMIN+8", false, false, false, "real time signal 8");
- AddSignal (74, "SIGRTMIN+9", false, false, false, "real time signal 9");
- AddSignal (75, "SIGRTMIN+10", false, false, false, "real time signal 10");
- AddSignal (76, "SIGRTMIN+11", false, false, false, "real time signal 11");
- AddSignal (77, "SIGRTMIN+12", false, false, false, "real time signal 12");
- AddSignal (78, "SIGRTMIN+13", false, false, false, "real time signal 13");
- AddSignal (79, "SIGRTMIN+14", false, false, false, "real time signal 14");
- AddSignal (80, "SIGRTMIN+15", false, false, false, "real time signal 15");
- AddSignal (81, "SIGRTMIN+16", false, false, false, "real time signal 16");
- AddSignal (82, "SIGRTMIN+17", false, false, false, "real time signal 17");
- AddSignal (83, "SIGRTMIN+18", false, false, false, "real time signal 18");
- AddSignal (84, "SIGRTMIN+19", false, false, false, "real time signal 19");
- AddSignal (85, "SIGRTMIN+20", false, false, false, "real time signal 20");
- AddSignal (86, "SIGRTMIN+21", false, false, false, "real time signal 21");
- AddSignal (87, "SIGRTMIN+22", false, false, false, "real time signal 22");
- AddSignal (88, "SIGRTMIN+23", false, false, false, "real time signal 23");
- AddSignal (89, "SIGRTMIN+24", false, false, false, "real time signal 24");
- AddSignal (90, "SIGRTMIN+25", false, false, false, "real time signal 25");
- AddSignal (91, "SIGRTMIN+26", false, false, false, "real time signal 26");
- AddSignal (92, "SIGRTMIN+27", false, false, false, "real time signal 27");
- AddSignal (93, "SIGRTMIN+28", false, false, false, "real time signal 28");
- AddSignal (94, "SIGRTMIN+29", false, false, false, "real time signal 29");
- AddSignal (95, "SIGRTMIN+30", false, false, false, "real time signal 30");
- AddSignal (96, "SIGRTMAX-30", false, false, false, "real time signal 31");
- AddSignal (97, "SIGRTMAX-29", false, false, false, "real time signal 32");
- AddSignal (98, "SIGRTMAX-28", false, false, false, "real time signal 33");
- AddSignal (99, "SIGRTMAX-27", false, false, false, "real time signal 34");
- AddSignal (100, "SIGRTMAX-26", false, false, false, "real time signal 35");
- AddSignal (101, "SIGRTMAX-25", false, false, false, "real time signal 36");
- AddSignal (102, "SIGRTMAX-24", false, false, false, "real time signal 37");
- AddSignal (103, "SIGRTMAX-23", false, false, false, "real time signal 38");
- AddSignal (104, "SIGRTMAX-22", false, false, false, "real time signal 39");
- AddSignal (105, "SIGRTMAX-21", false, false, false, "real time signal 40");
- AddSignal (106, "SIGRTMAX-20", false, false, false, "real time signal 41");
- AddSignal (107, "SIGRTMAX-19", false, false, false, "real time signal 42");
- AddSignal (108, "SIGRTMAX-18", false, false, false, "real time signal 43");
- AddSignal (109, "SIGRTMAX-17", false, false, false, "real time signal 44");
- AddSignal (110, "SIGRTMAX-16", false, false, false, "real time signal 45");
- AddSignal (111, "SIGRTMAX-15", false, false, false, "real time signal 46");
- AddSignal (112, "SIGRTMAX-14", false, false, false, "real time signal 47");
- AddSignal (113, "SIGRTMAX-13", false, false, false, "real time signal 48");
- AddSignal (114, "SIGRTMAX-12", false, false, false, "real time signal 49");
- AddSignal (115, "SIGRTMAX-11", false, false, false, "real time signal 50");
- AddSignal (116, "SIGRTMAX-10", false, false, false, "real time signal 51");
- AddSignal (117, "SIGRTMAX-9", false, false, false, "real time signal 52");
- AddSignal (118, "SIGRTMAX-8", false, false, false, "real time signal 53");
- AddSignal (119, "SIGRTMAX-7", false, false, false, "real time signal 54");
- AddSignal (120, "SIGRTMAX-6", false, false, false, "real time signal 55");
- AddSignal (121, "SIGRTMAX-5", false, false, false, "real time signal 56");
- AddSignal (122, "SIGRTMAX-4", false, false, false, "real time signal 57");
- AddSignal (123, "SIGRTMAX-3", false, false, false, "real time signal 58");
- AddSignal (124, "SIGRTMAX-2", false, false, false, "real time signal 59");
- AddSignal (125, "SIGRTMAX-1", false, false, false, "real time signal 60");
- AddSignal (126, "SIGRTMAX", false, false, false, "real time signal 61");
+ // SIGNO NAME SUPPRESS STOP NOTIFY DESCRIPTION
+ // ====== ============ ======== ====== ======
+ // ===================================================
+ AddSignal(32, "SIGTHR", false, false, false, "thread interrupt");
+ AddSignal(33, "SIGLIBRT", false, false, false,
+ "reserved by real-time library");
+ AddSignal(65, "SIGRTMIN", false, false, false, "real time signal 0");
+ AddSignal(66, "SIGRTMIN+1", false, false, false, "real time signal 1");
+ AddSignal(67, "SIGRTMIN+2", false, false, false, "real time signal 2");
+ AddSignal(68, "SIGRTMIN+3", false, false, false, "real time signal 3");
+ AddSignal(69, "SIGRTMIN+4", false, false, false, "real time signal 4");
+ AddSignal(70, "SIGRTMIN+5", false, false, false, "real time signal 5");
+ AddSignal(71, "SIGRTMIN+6", false, false, false, "real time signal 6");
+ AddSignal(72, "SIGRTMIN+7", false, false, false, "real time signal 7");
+ AddSignal(73, "SIGRTMIN+8", false, false, false, "real time signal 8");
+ AddSignal(74, "SIGRTMIN+9", false, false, false, "real time signal 9");
+ AddSignal(75, "SIGRTMIN+10", false, false, false, "real time signal 10");
+ AddSignal(76, "SIGRTMIN+11", false, false, false, "real time signal 11");
+ AddSignal(77, "SIGRTMIN+12", false, false, false, "real time signal 12");
+ AddSignal(78, "SIGRTMIN+13", false, false, false, "real time signal 13");
+ AddSignal(79, "SIGRTMIN+14", false, false, false, "real time signal 14");
+ AddSignal(80, "SIGRTMIN+15", false, false, false, "real time signal 15");
+ AddSignal(81, "SIGRTMIN+16", false, false, false, "real time signal 16");
+ AddSignal(82, "SIGRTMIN+17", false, false, false, "real time signal 17");
+ AddSignal(83, "SIGRTMIN+18", false, false, false, "real time signal 18");
+ AddSignal(84, "SIGRTMIN+19", false, false, false, "real time signal 19");
+ AddSignal(85, "SIGRTMIN+20", false, false, false, "real time signal 20");
+ AddSignal(86, "SIGRTMIN+21", false, false, false, "real time signal 21");
+ AddSignal(87, "SIGRTMIN+22", false, false, false, "real time signal 22");
+ AddSignal(88, "SIGRTMIN+23", false, false, false, "real time signal 23");
+ AddSignal(89, "SIGRTMIN+24", false, false, false, "real time signal 24");
+ AddSignal(90, "SIGRTMIN+25", false, false, false, "real time signal 25");
+ AddSignal(91, "SIGRTMIN+26", false, false, false, "real time signal 26");
+ AddSignal(92, "SIGRTMIN+27", false, false, false, "real time signal 27");
+ AddSignal(93, "SIGRTMIN+28", false, false, false, "real time signal 28");
+ AddSignal(94, "SIGRTMIN+29", false, false, false, "real time signal 29");
+ AddSignal(95, "SIGRTMIN+30", false, false, false, "real time signal 30");
+ AddSignal(96, "SIGRTMAX-30", false, false, false, "real time signal 31");
+ AddSignal(97, "SIGRTMAX-29", false, false, false, "real time signal 32");
+ AddSignal(98, "SIGRTMAX-28", false, false, false, "real time signal 33");
+ AddSignal(99, "SIGRTMAX-27", false, false, false, "real time signal 34");
+ AddSignal(100, "SIGRTMAX-26", false, false, false, "real time signal 35");
+ AddSignal(101, "SIGRTMAX-25", false, false, false, "real time signal 36");
+ AddSignal(102, "SIGRTMAX-24", false, false, false, "real time signal 37");
+ AddSignal(103, "SIGRTMAX-23", false, false, false, "real time signal 38");
+ AddSignal(104, "SIGRTMAX-22", false, false, false, "real time signal 39");
+ AddSignal(105, "SIGRTMAX-21", false, false, false, "real time signal 40");
+ AddSignal(106, "SIGRTMAX-20", false, false, false, "real time signal 41");
+ AddSignal(107, "SIGRTMAX-19", false, false, false, "real time signal 42");
+ AddSignal(108, "SIGRTMAX-18", false, false, false, "real time signal 43");
+ AddSignal(109, "SIGRTMAX-17", false, false, false, "real time signal 44");
+ AddSignal(110, "SIGRTMAX-16", false, false, false, "real time signal 45");
+ AddSignal(111, "SIGRTMAX-15", false, false, false, "real time signal 46");
+ AddSignal(112, "SIGRTMAX-14", false, false, false, "real time signal 47");
+ AddSignal(113, "SIGRTMAX-13", false, false, false, "real time signal 48");
+ AddSignal(114, "SIGRTMAX-12", false, false, false, "real time signal 49");
+ AddSignal(115, "SIGRTMAX-11", false, false, false, "real time signal 50");
+ AddSignal(116, "SIGRTMAX-10", false, false, false, "real time signal 51");
+ AddSignal(117, "SIGRTMAX-9", false, false, false, "real time signal 52");
+ AddSignal(118, "SIGRTMAX-8", false, false, false, "real time signal 53");
+ AddSignal(119, "SIGRTMAX-7", false, false, false, "real time signal 54");
+ AddSignal(120, "SIGRTMAX-6", false, false, false, "real time signal 55");
+ AddSignal(121, "SIGRTMAX-5", false, false, false, "real time signal 56");
+ AddSignal(122, "SIGRTMAX-4", false, false, false, "real time signal 57");
+ AddSignal(123, "SIGRTMAX-3", false, false, false, "real time signal 58");
+ AddSignal(124, "SIGRTMAX-2", false, false, false, "real time signal 59");
+ AddSignal(125, "SIGRTMAX-1", false, false, false, "real time signal 60");
+ AddSignal(126, "SIGRTMAX", false, false, false, "real time signal 61");
}
diff --git a/source/Plugins/Process/Utility/FreeBSDSignals.h b/source/Plugins/Process/Utility/FreeBSDSignals.h
index b715c62c81e9..8ec96e824f7a 100644
--- a/source/Plugins/Process/Utility/FreeBSDSignals.h
+++ b/source/Plugins/Process/Utility/FreeBSDSignals.h
@@ -16,14 +16,12 @@
namespace lldb_private {
/// FreeBSD specific set of Unix signals.
-class FreeBSDSignals : public UnixSignals
-{
+class FreeBSDSignals : public UnixSignals {
public:
- FreeBSDSignals();
+ FreeBSDSignals();
private:
- void
- Reset() override;
+ void Reset() override;
};
} // namespace lldb_private
diff --git a/source/Plugins/Process/Utility/GDBRemoteSignals.cpp b/source/Plugins/Process/Utility/GDBRemoteSignals.cpp
index 4e355c63b3aa..abcc8a38669a 100644
--- a/source/Plugins/Process/Utility/GDBRemoteSignals.cpp
+++ b/source/Plugins/Process/Utility/GDBRemoteSignals.cpp
@@ -14,19 +14,9 @@
using namespace lldb_private;
-GDBRemoteSignals::GDBRemoteSignals()
- : UnixSignals()
-{
- Reset();
-}
+GDBRemoteSignals::GDBRemoteSignals() : UnixSignals() { Reset(); }
GDBRemoteSignals::GDBRemoteSignals(const lldb::UnixSignalsSP &rhs)
- : UnixSignals(*rhs)
-{
-}
+ : UnixSignals(*rhs) {}
-void
-GDBRemoteSignals::Reset()
-{
- m_signals.clear();
-}
+void GDBRemoteSignals::Reset() { m_signals.clear(); }
diff --git a/source/Plugins/Process/Utility/GDBRemoteSignals.h b/source/Plugins/Process/Utility/GDBRemoteSignals.h
index bbb631a14090..5900fa75d6f2 100644
--- a/source/Plugins/Process/Utility/GDBRemoteSignals.h
+++ b/source/Plugins/Process/Utility/GDBRemoteSignals.h
@@ -19,16 +19,14 @@
namespace lldb_private {
/// Empty set of Unix signals to be filled by PlatformRemoteGDBServer
-class GDBRemoteSignals : public UnixSignals
-{
+class GDBRemoteSignals : public UnixSignals {
public:
- GDBRemoteSignals();
+ GDBRemoteSignals();
- GDBRemoteSignals(const lldb::UnixSignalsSP &rhs);
+ GDBRemoteSignals(const lldb::UnixSignalsSP &rhs);
private:
- void
- Reset() override;
+ void Reset() override;
};
} // namespace lldb_private
diff --git a/source/Plugins/Process/Utility/HistoryThread.cpp b/source/Plugins/Process/Utility/HistoryThread.cpp
index 956539da219c..d27a7b0da943 100644
--- a/source/Plugins/Process/Utility/HistoryThread.cpp
+++ b/source/Plugins/Process/Utility/HistoryThread.cpp
@@ -9,91 +9,75 @@
#include "lldb/lldb-private.h"
-#include "Plugins/Process/Utility/HistoryUnwind.h"
#include "Plugins/Process/Utility/HistoryThread.h"
+#include "Plugins/Process/Utility/HistoryUnwind.h"
#include "Plugins/Process/Utility/RegisterContextHistory.h"
#include "lldb/Core/Log.h"
-#include "lldb/Target/StackFrameList.h"
#include "lldb/Target/Process.h"
+#include "lldb/Target/StackFrameList.h"
using namespace lldb;
using namespace lldb_private;
// Constructor
-HistoryThread::HistoryThread(lldb_private::Process &process, lldb::tid_t tid, std::vector<lldb::addr_t> pcs,
- uint32_t stop_id, bool stop_id_is_valid)
- : Thread(process, tid, true),
- m_framelist_mutex(),
- m_framelist(),
- m_pcs(pcs),
- m_stop_id(stop_id),
- m_stop_id_is_valid(stop_id_is_valid),
- m_extended_unwind_token(LLDB_INVALID_ADDRESS),
- m_queue_name(),
- m_thread_name(),
- m_originating_unique_thread_id(tid),
- m_queue_id(LLDB_INVALID_QUEUE_ID)
-{
- m_unwinder_ap.reset(new HistoryUnwind(*this, pcs, stop_id_is_valid));
- Log *log(lldb_private::GetLogIfAllCategoriesSet(LIBLLDB_LOG_OBJECT));
- if (log)
- log->Printf("%p HistoryThread::HistoryThread", static_cast<void *>(this));
+HistoryThread::HistoryThread(lldb_private::Process &process, lldb::tid_t tid,
+ std::vector<lldb::addr_t> pcs, uint32_t stop_id,
+ bool stop_id_is_valid)
+ : Thread(process, tid, true), m_framelist_mutex(), m_framelist(),
+ m_pcs(pcs), m_stop_id(stop_id), m_stop_id_is_valid(stop_id_is_valid),
+ m_extended_unwind_token(LLDB_INVALID_ADDRESS), m_queue_name(),
+ m_thread_name(), m_originating_unique_thread_id(tid),
+ m_queue_id(LLDB_INVALID_QUEUE_ID) {
+ m_unwinder_ap.reset(new HistoryUnwind(*this, pcs, stop_id_is_valid));
+ Log *log(lldb_private::GetLogIfAllCategoriesSet(LIBLLDB_LOG_OBJECT));
+ if (log)
+ log->Printf("%p HistoryThread::HistoryThread", static_cast<void *>(this));
}
// Destructor
-HistoryThread::~HistoryThread ()
-{
- Log *log(lldb_private::GetLogIfAllCategoriesSet (LIBLLDB_LOG_OBJECT));
- if (log)
- log->Printf ("%p HistoryThread::~HistoryThread (tid=0x%" PRIx64 ")",
- static_cast<void*>(this), GetID());
- DestroyThread();
+HistoryThread::~HistoryThread() {
+ Log *log(lldb_private::GetLogIfAllCategoriesSet(LIBLLDB_LOG_OBJECT));
+ if (log)
+ log->Printf("%p HistoryThread::~HistoryThread (tid=0x%" PRIx64 ")",
+ static_cast<void *>(this), GetID());
+ DestroyThread();
}
-lldb::RegisterContextSP
-HistoryThread::GetRegisterContext ()
-{
- RegisterContextSP rctx ;
- if (m_pcs.size() > 0)
- {
- rctx.reset (new RegisterContextHistory (*this, 0, GetProcess()->GetAddressByteSize(), m_pcs[0]));
- }
- return rctx;
-
+lldb::RegisterContextSP HistoryThread::GetRegisterContext() {
+ RegisterContextSP rctx;
+ if (m_pcs.size() > 0) {
+ rctx.reset(new RegisterContextHistory(
+ *this, 0, GetProcess()->GetAddressByteSize(), m_pcs[0]));
+ }
+ return rctx;
}
lldb::RegisterContextSP
-HistoryThread::CreateRegisterContextForFrame (StackFrame *frame)
-{
- return m_unwinder_ap->CreateRegisterContextForFrame (frame);
+HistoryThread::CreateRegisterContextForFrame(StackFrame *frame) {
+ return m_unwinder_ap->CreateRegisterContextForFrame(frame);
}
-lldb::StackFrameListSP
-HistoryThread::GetStackFrameList ()
-{
- // FIXME do not throw away the lock after we acquire it..
- std::unique_lock<std::mutex> lock(m_framelist_mutex);
- lock.unlock();
- if (m_framelist.get() == NULL)
- {
- m_framelist.reset (new StackFrameList (*this, StackFrameListSP(), true));
- }
+lldb::StackFrameListSP HistoryThread::GetStackFrameList() {
+ // FIXME do not throw away the lock after we acquire it..
+ std::unique_lock<std::mutex> lock(m_framelist_mutex);
+ lock.unlock();
+ if (m_framelist.get() == NULL) {
+ m_framelist.reset(new StackFrameList(*this, StackFrameListSP(), true));
+ }
- return m_framelist;
+ return m_framelist;
}
-uint32_t
-HistoryThread::GetExtendedBacktraceOriginatingIndexID ()
-{
- if (m_originating_unique_thread_id != LLDB_INVALID_THREAD_ID)
- {
- if (GetProcess()->HasAssignedIndexIDToThread (m_originating_unique_thread_id))
- {
- return GetProcess()->AssignIndexIDToThread (m_originating_unique_thread_id);
- }
+uint32_t HistoryThread::GetExtendedBacktraceOriginatingIndexID() {
+ if (m_originating_unique_thread_id != LLDB_INVALID_THREAD_ID) {
+ if (GetProcess()->HasAssignedIndexIDToThread(
+ m_originating_unique_thread_id)) {
+ return GetProcess()->AssignIndexIDToThread(
+ m_originating_unique_thread_id);
}
- return LLDB_INVALID_THREAD_ID;
+ }
+ return LLDB_INVALID_THREAD_ID;
}
diff --git a/source/Plugins/Process/Utility/HistoryThread.h b/source/Plugins/Process/Utility/HistoryThread.h
index 43ac13c2d8bc..1a4898a95b7d 100644
--- a/source/Plugins/Process/Utility/HistoryThread.h
+++ b/source/Plugins/Process/Utility/HistoryThread.h
@@ -16,7 +16,6 @@
// Other libraries and framework includes
// Project includes
-#include "lldb/lldb-private.h"
#include "lldb/Core/Broadcaster.h"
#include "lldb/Core/Event.h"
#include "lldb/Core/UserID.h"
@@ -24,119 +23,78 @@
#include "lldb/Target/ExecutionContextScope.h"
#include "lldb/Target/StackFrameList.h"
#include "lldb/Target/Thread.h"
+#include "lldb/lldb-private.h"
namespace lldb_private {
//----------------------------------------------------------------------
/// @class HistoryThread HistoryThread.h "HistoryThread.h"
-/// @brief A thread object representing a backtrace from a previous point in the process execution
+/// @brief A thread object representing a backtrace from a previous point in the
+/// process execution
///
/// This subclass of Thread is used to provide a backtrace from earlier in
-/// process execution. It is given a backtrace list of pc addresses and
+/// process execution. It is given a backtrace list of pc addresses and
/// optionally a stop_id of when those pc addresses were collected, and it will
/// create stack frames for them.
//----------------------------------------------------------------------
-class HistoryThread : public lldb_private::Thread
-{
+class HistoryThread : public lldb_private::Thread {
public:
- HistoryThread (lldb_private::Process &process, lldb::tid_t tid, std::vector<lldb::addr_t> pcs, uint32_t stop_id, bool stop_id_is_valid);
-
- ~HistoryThread() override;
-
- lldb::RegisterContextSP
- GetRegisterContext() override;
-
- lldb::RegisterContextSP
- CreateRegisterContextForFrame(StackFrame *frame) override;
-
- void
- RefreshStateAfterStop() override { }
-
- bool
- CalculateStopInfo() override
- {
- return false;
- }
-
- void
- SetExtendedBacktraceToken(uint64_t token) override
- {
- m_extended_unwind_token = token;
- }
-
- uint64_t
- GetExtendedBacktraceToken() override
- {
- return m_extended_unwind_token;
- }
-
- const char *
- GetQueueName() override
- {
- return m_queue_name.c_str();
- }
-
- void
- SetQueueName(const char *name) override
- {
- m_queue_name = name;
- }
-
- lldb::queue_id_t
- GetQueueID() override
- {
- return m_queue_id;
- }
-
- void
- SetQueueID(lldb::queue_id_t queue) override
- {
- m_queue_id = queue;
- }
-
- const char *
- GetThreadName ()
- {
- return m_thread_name.c_str();
- }
-
- uint32_t
- GetExtendedBacktraceOriginatingIndexID() override;
-
- void
- SetThreadName (const char *name)
- {
- m_thread_name = name;
- }
-
- const char *
- GetName() override
- {
- return m_thread_name.c_str();
- }
-
- void
- SetName(const char *name) override
- {
- m_thread_name = name;
- }
+ HistoryThread(lldb_private::Process &process, lldb::tid_t tid,
+ std::vector<lldb::addr_t> pcs, uint32_t stop_id,
+ bool stop_id_is_valid);
+
+ ~HistoryThread() override;
+
+ lldb::RegisterContextSP GetRegisterContext() override;
+
+ lldb::RegisterContextSP
+ CreateRegisterContextForFrame(StackFrame *frame) override;
+
+ void RefreshStateAfterStop() override {}
+
+ bool CalculateStopInfo() override { return false; }
+
+ void SetExtendedBacktraceToken(uint64_t token) override {
+ m_extended_unwind_token = token;
+ }
+
+ uint64_t GetExtendedBacktraceToken() override {
+ return m_extended_unwind_token;
+ }
+
+ const char *GetQueueName() override { return m_queue_name.c_str(); }
+
+ void SetQueueName(const char *name) override { m_queue_name = name; }
+
+ lldb::queue_id_t GetQueueID() override { return m_queue_id; }
+
+ void SetQueueID(lldb::queue_id_t queue) override { m_queue_id = queue; }
+
+ const char *GetThreadName() { return m_thread_name.c_str(); }
+
+ uint32_t GetExtendedBacktraceOriginatingIndexID() override;
+
+ void SetThreadName(const char *name) { m_thread_name = name; }
+
+ const char *GetName() override { return m_thread_name.c_str(); }
+
+ void SetName(const char *name) override { m_thread_name = name; }
protected:
- virtual lldb::StackFrameListSP
- GetStackFrameList ();
-
- mutable std::mutex m_framelist_mutex;
- lldb::StackFrameListSP m_framelist;
- std::vector<lldb::addr_t> m_pcs;
- uint32_t m_stop_id;
- bool m_stop_id_is_valid;
-
- uint64_t m_extended_unwind_token;
- std::string m_queue_name;
- std::string m_thread_name;
- lldb::tid_t m_originating_unique_thread_id;
- lldb::queue_id_t m_queue_id;
+ virtual lldb::StackFrameListSP GetStackFrameList();
+
+ mutable std::mutex m_framelist_mutex;
+ lldb::StackFrameListSP m_framelist;
+ std::vector<lldb::addr_t> m_pcs;
+ uint32_t m_stop_id;
+ bool m_stop_id_is_valid;
+
+ uint64_t m_extended_unwind_token;
+ std::string m_queue_name;
+ std::string m_thread_name;
+ lldb::tid_t m_originating_unique_thread_id;
+ lldb::queue_id_t m_queue_id;
};
} // namespace lldb_private
diff --git a/source/Plugins/Process/Utility/HistoryUnwind.cpp b/source/Plugins/Process/Utility/HistoryUnwind.cpp
index 01d8c3ebdcd3..4f0ecba613bf 100644
--- a/source/Plugins/Process/Utility/HistoryUnwind.cpp
+++ b/source/Plugins/Process/Utility/HistoryUnwind.cpp
@@ -9,75 +9,59 @@
#include "lldb/lldb-private.h"
-#include "Plugins/Process/Utility/RegisterContextHistory.h"
#include "Plugins/Process/Utility/HistoryUnwind.h"
+#include "Plugins/Process/Utility/RegisterContextHistory.h"
-#include "lldb/Target/StackFrame.h"
-#include "lldb/Target/Thread.h"
#include "lldb/Target/Process.h"
+#include "lldb/Target/StackFrame.h"
#include "lldb/Target/Target.h"
+#include "lldb/Target/Thread.h"
using namespace lldb;
using namespace lldb_private;
-// Constructor
+// Constructor
-HistoryUnwind::HistoryUnwind (Thread &thread,
- std::vector<lldb::addr_t> pcs,
- bool stop_id_is_valid) :
- Unwind (thread),
- m_pcs (pcs),
- m_stop_id_is_valid (stop_id_is_valid)
-{
-}
+HistoryUnwind::HistoryUnwind(Thread &thread, std::vector<lldb::addr_t> pcs,
+ bool stop_id_is_valid)
+ : Unwind(thread), m_pcs(pcs), m_stop_id_is_valid(stop_id_is_valid) {}
// Destructor
-HistoryUnwind::~HistoryUnwind ()
-{
-}
+HistoryUnwind::~HistoryUnwind() {}
-void
-HistoryUnwind::DoClear ()
-{
- std::lock_guard<std::recursive_mutex> guard(m_unwind_mutex);
- m_pcs.clear();
- m_stop_id_is_valid = false;
+void HistoryUnwind::DoClear() {
+ std::lock_guard<std::recursive_mutex> guard(m_unwind_mutex);
+ m_pcs.clear();
+ m_stop_id_is_valid = false;
}
lldb::RegisterContextSP
-HistoryUnwind::DoCreateRegisterContextForFrame (StackFrame *frame)
-{
- RegisterContextSP rctx;
- if (frame)
- {
- addr_t pc = frame->GetFrameCodeAddress().GetLoadAddress (&frame->GetThread()->GetProcess()->GetTarget());
- if (pc != LLDB_INVALID_ADDRESS)
- {
- rctx.reset (new RegisterContextHistory (*frame->GetThread().get(), frame->GetConcreteFrameIndex(),
- frame->GetThread()->GetProcess()->GetAddressByteSize(), pc));
- }
+HistoryUnwind::DoCreateRegisterContextForFrame(StackFrame *frame) {
+ RegisterContextSP rctx;
+ if (frame) {
+ addr_t pc = frame->GetFrameCodeAddress().GetLoadAddress(
+ &frame->GetThread()->GetProcess()->GetTarget());
+ if (pc != LLDB_INVALID_ADDRESS) {
+ rctx.reset(new RegisterContextHistory(
+ *frame->GetThread().get(), frame->GetConcreteFrameIndex(),
+ frame->GetThread()->GetProcess()->GetAddressByteSize(), pc));
}
- return rctx;
+ }
+ return rctx;
}
-bool
-HistoryUnwind::DoGetFrameInfoAtIndex (uint32_t frame_idx, lldb::addr_t& cfa, lldb::addr_t& pc)
-{
- // FIXME do not throw away the lock after we acquire it..
- std::unique_lock<std::recursive_mutex> guard(m_unwind_mutex);
- guard.unlock();
- if (frame_idx < m_pcs.size())
- {
- cfa = frame_idx;
- pc = m_pcs[frame_idx];
- return true;
- }
- return false;
+bool HistoryUnwind::DoGetFrameInfoAtIndex(uint32_t frame_idx, lldb::addr_t &cfa,
+ lldb::addr_t &pc) {
+ // FIXME do not throw away the lock after we acquire it..
+ std::unique_lock<std::recursive_mutex> guard(m_unwind_mutex);
+ guard.unlock();
+ if (frame_idx < m_pcs.size()) {
+ cfa = frame_idx;
+ pc = m_pcs[frame_idx];
+ return true;
+ }
+ return false;
}
-uint32_t
-HistoryUnwind::DoGetFrameCount ()
-{
- return m_pcs.size();
-}
+uint32_t HistoryUnwind::DoGetFrameCount() { return m_pcs.size(); }
diff --git a/source/Plugins/Process/Utility/HistoryUnwind.h b/source/Plugins/Process/Utility/HistoryUnwind.h
index 890604fcb680..3b64e38bfaa7 100644
--- a/source/Plugins/Process/Utility/HistoryUnwind.h
+++ b/source/Plugins/Process/Utility/HistoryUnwind.h
@@ -16,36 +16,31 @@
// Other libraries and framework includes
// Project includes
-#include "lldb/lldb-private.h"
#include "lldb/Target/Unwind.h"
+#include "lldb/lldb-private.h"
namespace lldb_private {
-class HistoryUnwind : public lldb_private::Unwind
-{
+class HistoryUnwind : public lldb_private::Unwind {
public:
- HistoryUnwind (Thread &thread, std::vector<lldb::addr_t> pcs, bool stop_id_is_valid);
+ HistoryUnwind(Thread &thread, std::vector<lldb::addr_t> pcs,
+ bool stop_id_is_valid);
- ~HistoryUnwind() override;
+ ~HistoryUnwind() override;
protected:
- void
- DoClear() override;
+ void DoClear() override;
- lldb::RegisterContextSP
- DoCreateRegisterContextForFrame(StackFrame *frame) override;
+ lldb::RegisterContextSP
+ DoCreateRegisterContextForFrame(StackFrame *frame) override;
- bool
- DoGetFrameInfoAtIndex(uint32_t frame_idx,
- lldb::addr_t& cfa,
- lldb::addr_t& pc) override;
- uint32_t
- DoGetFrameCount() override;
+ bool DoGetFrameInfoAtIndex(uint32_t frame_idx, lldb::addr_t &cfa,
+ lldb::addr_t &pc) override;
+ uint32_t DoGetFrameCount() override;
private:
-
- std::vector<lldb::addr_t> m_pcs;
- bool m_stop_id_is_valid;
+ std::vector<lldb::addr_t> m_pcs;
+ bool m_stop_id_is_valid;
};
} // namespace lldb_private
diff --git a/source/Plugins/Process/Utility/InferiorCallPOSIX.cpp b/source/Plugins/Process/Utility/InferiorCallPOSIX.cpp
index b694b833cb48..4e1f10c6ae18 100644
--- a/source/Plugins/Process/Utility/InferiorCallPOSIX.cpp
+++ b/source/Plugins/Process/Utility/InferiorCallPOSIX.cpp
@@ -34,225 +34,207 @@
using namespace lldb;
using namespace lldb_private;
-bool
-lldb_private::InferiorCallMmap (Process *process,
- addr_t &allocated_addr,
- addr_t addr,
- addr_t length,
- unsigned prot,
- unsigned flags,
- addr_t fd,
- addr_t offset)
-{
- Thread *thread = process->GetThreadList().GetExpressionExecutionThread().get();
- if (thread == NULL)
- return false;
-
- const bool append = true;
- const bool include_symbols = true;
- const bool include_inlines = false;
- SymbolContextList sc_list;
- const uint32_t count
- = process->GetTarget().GetImages().FindFunctions (ConstString ("mmap"),
- eFunctionNameTypeFull,
- include_symbols,
- include_inlines,
- append,
- sc_list);
- if (count > 0)
- {
- SymbolContext sc;
- if (sc_list.GetContextAtIndex(0, sc))
- {
- const uint32_t range_scope = eSymbolContextFunction | eSymbolContextSymbol;
- const bool use_inline_block_range = false;
- EvaluateExpressionOptions options;
- options.SetStopOthers(true);
- options.SetUnwindOnError(true);
- options.SetIgnoreBreakpoints(true);
- options.SetTryAllThreads(true);
- options.SetDebug (false);
- options.SetTimeoutUsec(500000);
- options.SetTrapExceptions(false);
-
- addr_t prot_arg, flags_arg = 0;
- if (prot == eMmapProtNone)
- prot_arg = PROT_NONE;
- else {
- prot_arg = 0;
- if (prot & eMmapProtExec)
- prot_arg |= PROT_EXEC;
- if (prot & eMmapProtRead)
- prot_arg |= PROT_READ;
- if (prot & eMmapProtWrite)
- prot_arg |= PROT_WRITE;
- }
-
- const ArchSpec arch = process->GetTarget().GetArchitecture();
- flags_arg = process->GetTarget().GetPlatform()->ConvertMmapFlagsToPlatform(arch,flags);
-
- AddressRange mmap_range;
- if (sc.GetAddressRange(range_scope, 0, use_inline_block_range, mmap_range))
- {
- ClangASTContext *clang_ast_context = process->GetTarget().GetScratchClangASTContext();
- CompilerType clang_void_ptr_type = clang_ast_context->GetBasicType(eBasicTypeVoid).GetPointerType();
- lldb::addr_t args[] = { addr, length, prot_arg, flags_arg, fd, offset };
- lldb::ThreadPlanSP call_plan_sp(new ThreadPlanCallFunction(*thread, mmap_range.GetBaseAddress(),
- clang_void_ptr_type, args, options));
- if (call_plan_sp)
- {
- DiagnosticManager diagnostics;
-
- StackFrame *frame = thread->GetStackFrameAtIndex(0).get();
- if (frame)
- {
- ExecutionContext exe_ctx;
- frame->CalculateExecutionContext (exe_ctx);
- ExpressionResults result = process->RunThreadPlan(exe_ctx, call_plan_sp, options, diagnostics);
- if (result == eExpressionCompleted)
- {
+bool lldb_private::InferiorCallMmap(Process *process, addr_t &allocated_addr,
+ addr_t addr, addr_t length, unsigned prot,
+ unsigned flags, addr_t fd, addr_t offset) {
+ Thread *thread =
+ process->GetThreadList().GetExpressionExecutionThread().get();
+ if (thread == NULL)
+ return false;
- allocated_addr = call_plan_sp->GetReturnValueObject()->GetValueAsUnsigned(LLDB_INVALID_ADDRESS);
- if (process->GetAddressByteSize() == 4)
- {
- if (allocated_addr == UINT32_MAX)
- return false;
- }
- else if (process->GetAddressByteSize() == 8)
- {
- if (allocated_addr == UINT64_MAX)
- return false;
- }
- return true;
- }
- }
- }
+ const bool append = true;
+ const bool include_symbols = true;
+ const bool include_inlines = false;
+ SymbolContextList sc_list;
+ const uint32_t count = process->GetTarget().GetImages().FindFunctions(
+ ConstString("mmap"), eFunctionNameTypeFull, include_symbols,
+ include_inlines, append, sc_list);
+ if (count > 0) {
+ SymbolContext sc;
+ if (sc_list.GetContextAtIndex(0, sc)) {
+ const uint32_t range_scope =
+ eSymbolContextFunction | eSymbolContextSymbol;
+ const bool use_inline_block_range = false;
+ EvaluateExpressionOptions options;
+ options.SetStopOthers(true);
+ options.SetUnwindOnError(true);
+ options.SetIgnoreBreakpoints(true);
+ options.SetTryAllThreads(true);
+ options.SetDebug(false);
+ options.SetTimeout(std::chrono::milliseconds(500));
+ options.SetTrapExceptions(false);
+
+ addr_t prot_arg, flags_arg = 0;
+ if (prot == eMmapProtNone)
+ prot_arg = PROT_NONE;
+ else {
+ prot_arg = 0;
+ if (prot & eMmapProtExec)
+ prot_arg |= PROT_EXEC;
+ if (prot & eMmapProtRead)
+ prot_arg |= PROT_READ;
+ if (prot & eMmapProtWrite)
+ prot_arg |= PROT_WRITE;
+ }
+
+ const ArchSpec arch = process->GetTarget().GetArchitecture();
+ flags_arg =
+ process->GetTarget().GetPlatform()->ConvertMmapFlagsToPlatform(arch,
+ flags);
+
+ AddressRange mmap_range;
+ if (sc.GetAddressRange(range_scope, 0, use_inline_block_range,
+ mmap_range)) {
+ ClangASTContext *clang_ast_context =
+ process->GetTarget().GetScratchClangASTContext();
+ CompilerType clang_void_ptr_type =
+ clang_ast_context->GetBasicType(eBasicTypeVoid).GetPointerType();
+ lldb::addr_t args[] = {addr, length, prot_arg, flags_arg, fd, offset};
+ lldb::ThreadPlanSP call_plan_sp(
+ new ThreadPlanCallFunction(*thread, mmap_range.GetBaseAddress(),
+ clang_void_ptr_type, args, options));
+ if (call_plan_sp) {
+ DiagnosticManager diagnostics;
+
+ StackFrame *frame = thread->GetStackFrameAtIndex(0).get();
+ if (frame) {
+ ExecutionContext exe_ctx;
+ frame->CalculateExecutionContext(exe_ctx);
+ ExpressionResults result = process->RunThreadPlan(
+ exe_ctx, call_plan_sp, options, diagnostics);
+ if (result == eExpressionCompleted) {
+
+ allocated_addr =
+ call_plan_sp->GetReturnValueObject()->GetValueAsUnsigned(
+ LLDB_INVALID_ADDRESS);
+ if (process->GetAddressByteSize() == 4) {
+ if (allocated_addr == UINT32_MAX)
+ return false;
+ } else if (process->GetAddressByteSize() == 8) {
+ if (allocated_addr == UINT64_MAX)
+ return false;
+ }
+ return true;
}
+ }
}
+ }
}
+ }
- return false;
+ return false;
}
-bool
-lldb_private::InferiorCallMunmap (Process *process,
- addr_t addr,
- addr_t length)
-{
- Thread *thread = process->GetThreadList().GetExpressionExecutionThread().get();
- if (thread == NULL)
- return false;
-
- const bool append = true;
- const bool include_symbols = true;
- const bool include_inlines = false;
- SymbolContextList sc_list;
- const uint32_t count
- = process->GetTarget().GetImages().FindFunctions (ConstString ("munmap"),
- eFunctionNameTypeFull,
- include_symbols,
- include_inlines,
- append,
- sc_list);
- if (count > 0)
- {
- SymbolContext sc;
- if (sc_list.GetContextAtIndex(0, sc))
- {
- const uint32_t range_scope = eSymbolContextFunction | eSymbolContextSymbol;
- const bool use_inline_block_range = false;
- EvaluateExpressionOptions options;
- options.SetStopOthers(true);
- options.SetUnwindOnError(true);
- options.SetIgnoreBreakpoints(true);
- options.SetTryAllThreads(true);
- options.SetDebug (false);
- options.SetTimeoutUsec(500000);
- options.SetTrapExceptions(false);
-
- AddressRange munmap_range;
- if (sc.GetAddressRange(range_scope, 0, use_inline_block_range, munmap_range))
- {
- lldb::addr_t args[] = { addr, length };
- lldb::ThreadPlanSP call_plan_sp(
- new ThreadPlanCallFunction(*thread, munmap_range.GetBaseAddress(), CompilerType(), args, options));
- if (call_plan_sp)
- {
- DiagnosticManager diagnostics;
+bool lldb_private::InferiorCallMunmap(Process *process, addr_t addr,
+ addr_t length) {
+ Thread *thread =
+ process->GetThreadList().GetExpressionExecutionThread().get();
+ if (thread == NULL)
+ return false;
- StackFrame *frame = thread->GetStackFrameAtIndex(0).get();
- if (frame)
- {
- ExecutionContext exe_ctx;
- frame->CalculateExecutionContext (exe_ctx);
- ExpressionResults result = process->RunThreadPlan(exe_ctx, call_plan_sp, options, diagnostics);
- if (result == eExpressionCompleted)
- {
- return true;
- }
- }
- }
+ const bool append = true;
+ const bool include_symbols = true;
+ const bool include_inlines = false;
+ SymbolContextList sc_list;
+ const uint32_t count = process->GetTarget().GetImages().FindFunctions(
+ ConstString("munmap"), eFunctionNameTypeFull, include_symbols,
+ include_inlines, append, sc_list);
+ if (count > 0) {
+ SymbolContext sc;
+ if (sc_list.GetContextAtIndex(0, sc)) {
+ const uint32_t range_scope =
+ eSymbolContextFunction | eSymbolContextSymbol;
+ const bool use_inline_block_range = false;
+ EvaluateExpressionOptions options;
+ options.SetStopOthers(true);
+ options.SetUnwindOnError(true);
+ options.SetIgnoreBreakpoints(true);
+ options.SetTryAllThreads(true);
+ options.SetDebug(false);
+ options.SetTimeout(std::chrono::milliseconds(500));
+ options.SetTrapExceptions(false);
+
+ AddressRange munmap_range;
+ if (sc.GetAddressRange(range_scope, 0, use_inline_block_range,
+ munmap_range)) {
+ lldb::addr_t args[] = {addr, length};
+ lldb::ThreadPlanSP call_plan_sp(
+ new ThreadPlanCallFunction(*thread, munmap_range.GetBaseAddress(),
+ CompilerType(), args, options));
+ if (call_plan_sp) {
+ DiagnosticManager diagnostics;
+
+ StackFrame *frame = thread->GetStackFrameAtIndex(0).get();
+ if (frame) {
+ ExecutionContext exe_ctx;
+ frame->CalculateExecutionContext(exe_ctx);
+ ExpressionResults result = process->RunThreadPlan(
+ exe_ctx, call_plan_sp, options, diagnostics);
+ if (result == eExpressionCompleted) {
+ return true;
}
+ }
}
+ }
}
+ }
- return false;
+ return false;
}
-// FIXME: This has nothing to do with Posix, it is just a convenience function that calls a
-// function of the form "void * (*)(void)". We should find a better place to put this.
-
-bool
-lldb_private::InferiorCall (Process *process,
- const Address *address,
- addr_t &returned_func,
- bool trap_exceptions)
-{
- Thread *thread = process->GetThreadList().GetExpressionExecutionThread().get();
- if (thread == NULL || address == NULL)
- return false;
-
- EvaluateExpressionOptions options;
- options.SetStopOthers(true);
- options.SetUnwindOnError(true);
- options.SetIgnoreBreakpoints(true);
- options.SetTryAllThreads(true);
- options.SetDebug (false);
- options.SetTimeoutUsec(500000);
- options.SetTrapExceptions(trap_exceptions);
-
- ClangASTContext *clang_ast_context = process->GetTarget().GetScratchClangASTContext();
- CompilerType clang_void_ptr_type = clang_ast_context->GetBasicType(eBasicTypeVoid).GetPointerType();
- lldb::ThreadPlanSP call_plan_sp(
- new ThreadPlanCallFunction(*thread, *address, clang_void_ptr_type, llvm::ArrayRef<addr_t>(), options));
- if (call_plan_sp)
- {
- DiagnosticManager diagnostics;
+// FIXME: This has nothing to do with Posix, it is just a convenience function
+// that calls a
+// function of the form "void * (*)(void)". We should find a better place to
+// put this.
- StackFrame *frame = thread->GetStackFrameAtIndex(0).get();
- if (frame)
- {
- ExecutionContext exe_ctx;
- frame->CalculateExecutionContext (exe_ctx);
- ExpressionResults result = process->RunThreadPlan(exe_ctx, call_plan_sp, options, diagnostics);
- if (result == eExpressionCompleted)
- {
- returned_func = call_plan_sp->GetReturnValueObject()->GetValueAsUnsigned(LLDB_INVALID_ADDRESS);
+bool lldb_private::InferiorCall(Process *process, const Address *address,
+ addr_t &returned_func, bool trap_exceptions) {
+ Thread *thread =
+ process->GetThreadList().GetExpressionExecutionThread().get();
+ if (thread == NULL || address == NULL)
+ return false;
- if (process->GetAddressByteSize() == 4)
- {
- if (returned_func == UINT32_MAX)
- return false;
- }
- else if (process->GetAddressByteSize() == 8)
- {
- if (returned_func == UINT64_MAX)
- return false;
- }
- return true;
- }
+ EvaluateExpressionOptions options;
+ options.SetStopOthers(true);
+ options.SetUnwindOnError(true);
+ options.SetIgnoreBreakpoints(true);
+ options.SetTryAllThreads(true);
+ options.SetDebug(false);
+ options.SetTimeout(std::chrono::milliseconds(500));
+ options.SetTrapExceptions(trap_exceptions);
+
+ ClangASTContext *clang_ast_context =
+ process->GetTarget().GetScratchClangASTContext();
+ CompilerType clang_void_ptr_type =
+ clang_ast_context->GetBasicType(eBasicTypeVoid).GetPointerType();
+ lldb::ThreadPlanSP call_plan_sp(
+ new ThreadPlanCallFunction(*thread, *address, clang_void_ptr_type,
+ llvm::ArrayRef<addr_t>(), options));
+ if (call_plan_sp) {
+ DiagnosticManager diagnostics;
+
+ StackFrame *frame = thread->GetStackFrameAtIndex(0).get();
+ if (frame) {
+ ExecutionContext exe_ctx;
+ frame->CalculateExecutionContext(exe_ctx);
+ ExpressionResults result =
+ process->RunThreadPlan(exe_ctx, call_plan_sp, options, diagnostics);
+ if (result == eExpressionCompleted) {
+ returned_func =
+ call_plan_sp->GetReturnValueObject()->GetValueAsUnsigned(
+ LLDB_INVALID_ADDRESS);
+
+ if (process->GetAddressByteSize() == 4) {
+ if (returned_func == UINT32_MAX)
+ return false;
+ } else if (process->GetAddressByteSize() == 8) {
+ if (returned_func == UINT64_MAX)
+ return false;
}
+ return true;
+ }
}
+ }
- return false;
+ return false;
}
diff --git a/source/Plugins/Process/Utility/InferiorCallPOSIX.h b/source/Plugins/Process/Utility/InferiorCallPOSIX.h
index d10e8490d809..07bde5bf09b3 100644
--- a/source/Plugins/Process/Utility/InferiorCallPOSIX.h
+++ b/source/Plugins/Process/Utility/InferiorCallPOSIX.h
@@ -31,9 +31,9 @@ bool InferiorCallMmap(Process *proc, lldb::addr_t &allocated_addr,
bool InferiorCallMunmap(Process *proc, lldb::addr_t addr, lldb::addr_t length);
-bool InferiorCall(Process *proc, const Address *address, lldb::addr_t &returned_func,
- bool trap_exceptions = false);
+bool InferiorCall(Process *proc, const Address *address,
+ lldb::addr_t &returned_func, bool trap_exceptions = false);
-} // namespace lldb_private
+} // namespace lldb_private
-#endif // lldb_InferiorCallPOSIX_h_
+#endif // lldb_InferiorCallPOSIX_h_
diff --git a/source/Plugins/Process/Utility/InstructionUtils.h b/source/Plugins/Process/Utility/InstructionUtils.h
index 6226fbc04b08..e422a96200c8 100644
--- a/source/Plugins/Process/Utility/InstructionUtils.h
+++ b/source/Plugins/Process/Utility/InstructionUtils.h
@@ -16,123 +16,99 @@ namespace lldb_private {
// Return the bit field(s) from the most significant bit (msbit) to the
// least significant bit (lsbit) of a 64-bit unsigned value.
-static inline uint64_t
-Bits64 (const uint64_t bits, const uint32_t msbit, const uint32_t lsbit)
-{
- assert(msbit < 64 && lsbit <= msbit);
- return (bits >> lsbit) & ((1ull << (msbit - lsbit + 1)) - 1);
+static inline uint64_t Bits64(const uint64_t bits, const uint32_t msbit,
+ const uint32_t lsbit) {
+ assert(msbit < 64 && lsbit <= msbit);
+ return (bits >> lsbit) & ((1ull << (msbit - lsbit + 1)) - 1);
}
// Return the bit field(s) from the most significant bit (msbit) to the
// least significant bit (lsbit) of a 32-bit unsigned value.
-static inline uint32_t
-Bits32 (const uint32_t bits, const uint32_t msbit, const uint32_t lsbit)
-{
- assert(msbit < 32 && lsbit <= msbit);
- return (bits >> lsbit) & ((1u << (msbit - lsbit + 1)) - 1);
+static inline uint32_t Bits32(const uint32_t bits, const uint32_t msbit,
+ const uint32_t lsbit) {
+ assert(msbit < 32 && lsbit <= msbit);
+ return (bits >> lsbit) & ((1u << (msbit - lsbit + 1)) - 1);
}
// Return the bit value from the 'bit' position of a 32-bit unsigned value.
-static inline uint32_t
-Bit32 (const uint32_t bits, const uint32_t bit)
-{
- return (bits >> bit) & 1u;
+static inline uint32_t Bit32(const uint32_t bits, const uint32_t bit) {
+ return (bits >> bit) & 1u;
}
-static inline uint64_t
-Bit64 (const uint64_t bits, const uint32_t bit)
-{
- return (bits >> bit) & 1ull;
+static inline uint64_t Bit64(const uint64_t bits, const uint32_t bit) {
+ return (bits >> bit) & 1ull;
}
// Set the bit field(s) from the most significant bit (msbit) to the
// least significant bit (lsbit) of a 32-bit unsigned value to 'val'.
-static inline void
-SetBits32(uint32_t &bits, const uint32_t msbit, const uint32_t lsbit, const uint32_t val)
-{
- assert(msbit < 32 && lsbit < 32 && msbit >= lsbit);
- uint32_t mask = ((1u << (msbit - lsbit + 1)) - 1);
- bits &= ~(mask << lsbit);
- bits |= (val & mask) << lsbit;
+static inline void SetBits32(uint32_t &bits, const uint32_t msbit,
+ const uint32_t lsbit, const uint32_t val) {
+ assert(msbit < 32 && lsbit < 32 && msbit >= lsbit);
+ uint32_t mask = ((1u << (msbit - lsbit + 1)) - 1);
+ bits &= ~(mask << lsbit);
+ bits |= (val & mask) << lsbit;
}
// Set the 'bit' position of a 32-bit unsigned value to 'val'.
-static inline void
-SetBit32(uint32_t &bits, const uint32_t bit, const uint32_t val)
-{
- SetBits32(bits, bit, bit, val);
+static inline void SetBit32(uint32_t &bits, const uint32_t bit,
+ const uint32_t val) {
+ SetBits32(bits, bit, bit, val);
}
// Rotate a 32-bit unsigned value right by the specified amount.
-static inline uint32_t
-Rotr32 (uint32_t bits, uint32_t amt)
-{
- assert(amt < 32 && "Invalid rotate amount");
- return (bits >> amt) | (bits << ((32-amt)&31));
+static inline uint32_t Rotr32(uint32_t bits, uint32_t amt) {
+ assert(amt < 32 && "Invalid rotate amount");
+ return (bits >> amt) | (bits << ((32 - amt) & 31));
}
// Rotate a 32-bit unsigned value left by the specified amount.
-static inline uint32_t
-Rotl32 (uint32_t bits, uint32_t amt)
-{
- assert(amt < 32 && "Invalid rotate amount");
- return (bits << amt) | (bits >> ((32-amt)&31));
+static inline uint32_t Rotl32(uint32_t bits, uint32_t amt) {
+ assert(amt < 32 && "Invalid rotate amount");
+ return (bits << amt) | (bits >> ((32 - amt) & 31));
}
// Create a mask that starts at bit zero and includes "bit"
-static inline uint64_t
-MaskUpToBit (const uint64_t bit)
-{
- if (bit >= 63)
- return -1ll;
- return (1ull << (bit + 1ull)) - 1ull;
+static inline uint64_t MaskUpToBit(const uint64_t bit) {
+ if (bit >= 63)
+ return -1ll;
+ return (1ull << (bit + 1ull)) - 1ull;
}
// Return an integer result equal to the number of bits of x that are ones.
-static inline uint32_t
-BitCount (uint64_t x)
-{
- // c accumulates the total bits set in x
- uint32_t c;
- for (c = 0; x; ++c)
- {
- x &= x - 1; // clear the least significant bit set
- }
- return c;
+static inline uint32_t BitCount(uint64_t x) {
+ // c accumulates the total bits set in x
+ uint32_t c;
+ for (c = 0; x; ++c) {
+ x &= x - 1; // clear the least significant bit set
+ }
+ return c;
}
-static inline bool
-BitIsSet (const uint64_t value, const uint64_t bit)
-{
- return (value & (1ull << bit)) != 0;
+static inline bool BitIsSet(const uint64_t value, const uint64_t bit) {
+ return (value & (1ull << bit)) != 0;
}
-static inline bool
-BitIsClear (const uint64_t value, const uint64_t bit)
-{
- return (value & (1ull << bit)) == 0;
+static inline bool BitIsClear(const uint64_t value, const uint64_t bit) {
+ return (value & (1ull << bit)) == 0;
}
-static inline uint64_t
-UnsignedBits (const uint64_t value, const uint64_t msbit, const uint64_t lsbit)
-{
- uint64_t result = value >> lsbit;
- result &= MaskUpToBit (msbit - lsbit);
- return result;
+static inline uint64_t UnsignedBits(const uint64_t value, const uint64_t msbit,
+ const uint64_t lsbit) {
+ uint64_t result = value >> lsbit;
+ result &= MaskUpToBit(msbit - lsbit);
+ return result;
}
-static inline int64_t
-SignedBits (const uint64_t value, const uint64_t msbit, const uint64_t lsbit)
-{
- uint64_t result = UnsignedBits (value, msbit, lsbit);
- if (BitIsSet(value, msbit))
- {
- // Sign extend
- result |= ~MaskUpToBit (msbit - lsbit);
- }
- return result;
+static inline int64_t SignedBits(const uint64_t value, const uint64_t msbit,
+ const uint64_t lsbit) {
+ uint64_t result = UnsignedBits(value, msbit, lsbit);
+ if (BitIsSet(value, msbit)) {
+ // Sign extend
+ result |= ~MaskUpToBit(msbit - lsbit);
+ }
+ return result;
}
-} // namespace lldb_private
+} // namespace lldb_private
-#endif // lldb_InstructionUtils_h_
+#endif // lldb_InstructionUtils_h_
diff --git a/source/Plugins/Process/Utility/LinuxSignals.cpp b/source/Plugins/Process/Utility/LinuxSignals.cpp
index 5687577f9d16..eb01075ed133 100644
--- a/source/Plugins/Process/Utility/LinuxSignals.cpp
+++ b/source/Plugins/Process/Utility/LinuxSignals.cpp
@@ -14,80 +14,83 @@
using namespace lldb_private;
-LinuxSignals::LinuxSignals()
- : UnixSignals()
-{
- Reset();
-}
+LinuxSignals::LinuxSignals() : UnixSignals() { Reset(); }
-void
-LinuxSignals::Reset()
-{
- m_signals.clear();
- // SIGNO NAME SUPPRESS STOP NOTIFY DESCRIPTION ALIAS
- // ===== =========== ======== ===== ====== ====================================== ======
- AddSignal (1, "SIGHUP", false, true , true , "hangup" );
- AddSignal (2, "SIGINT", true , true , true , "interrupt" );
- AddSignal (3, "SIGQUIT", false, true , true , "quit" );
- AddSignal (4, "SIGILL", false, true , true , "illegal instruction" );
- AddSignal (5, "SIGTRAP", true , true , true , "trace trap (not reset when caught)" );
- AddSignal (6, "SIGABRT", false, true , true , "abort()/IOT trap", "SIGIOT");
- AddSignal (7, "SIGBUS", false, true , true , "bus error" );
- AddSignal (8, "SIGFPE", false, true , true , "floating point exception" );
- AddSignal (9, "SIGKILL", false, true , true , "kill" );
- AddSignal (10, "SIGUSR1", false, true , true , "user defined signal 1" );
- AddSignal (11, "SIGSEGV", false, true , true , "segmentation violation" );
- AddSignal (12, "SIGUSR2", false, true , true , "user defined signal 2" );
- AddSignal (13, "SIGPIPE", false, true , true , "write to pipe with reading end closed" );
- AddSignal (14, "SIGALRM", false, false, false, "alarm" );
- AddSignal (15, "SIGTERM", false, true , true , "termination requested" );
- AddSignal (16, "SIGSTKFLT", false, true , true , "stack fault" );
- AddSignal (17, "SIGCHLD", false, false, true , "child status has changed", "SIGCLD");
- AddSignal (18, "SIGCONT", false, true , true , "process continue" );
- AddSignal (19, "SIGSTOP", true , true , true , "process stop" );
- AddSignal (20, "SIGTSTP", false, true , true , "tty stop" );
- AddSignal (21, "SIGTTIN", false, true , true , "background tty read" );
- AddSignal (22, "SIGTTOU", false, true , true , "background tty write" );
- AddSignal (23, "SIGURG", false, true , true , "urgent data on socket" );
- AddSignal (24, "SIGXCPU", false, true , true , "CPU resource exceeded" );
- AddSignal (25, "SIGXFSZ", false, true , true , "file size limit exceeded" );
- AddSignal (26, "SIGVTALRM", false, true , true , "virtual time alarm" );
- AddSignal (27, "SIGPROF", false, false, false, "profiling time alarm" );
- AddSignal (28, "SIGWINCH", false, true , true , "window size changes" );
- AddSignal (29, "SIGIO", false, true , true , "input/output ready/Pollable event", "SIGPOLL");
- AddSignal (30, "SIGPWR", false, true , true , "power failure" );
- AddSignal (31, "SIGSYS", false, true , true , "invalid system call" );
- AddSignal (32, "SIG32", false, false, false, "threading library internal signal 1" );
- AddSignal (33, "SIG33", false, false, false, "threading library internal signal 2" );
- AddSignal (34, "SIGRTMIN", false, false, false, "real time signal 0" );
- AddSignal (35, "SIGRTMIN+1", false, false, false, "real time signal 1" );
- AddSignal (36, "SIGRTMIN+2", false, false, false, "real time signal 2" );
- AddSignal (37, "SIGRTMIN+3", false, false, false, "real time signal 3" );
- AddSignal (38, "SIGRTMIN+4", false, false, false, "real time signal 4" );
- AddSignal (39, "SIGRTMIN+5", false, false, false, "real time signal 5" );
- AddSignal (40, "SIGRTMIN+6", false, false, false, "real time signal 6" );
- AddSignal (41, "SIGRTMIN+7", false, false, false, "real time signal 7" );
- AddSignal (42, "SIGRTMIN+8", false, false, false, "real time signal 8" );
- AddSignal (43, "SIGRTMIN+9", false, false, false, "real time signal 9" );
- AddSignal (44, "SIGRTMIN+10", false, false, false, "real time signal 10" );
- AddSignal (45, "SIGRTMIN+11", false, false, false, "real time signal 11" );
- AddSignal (46, "SIGRTMIN+12", false, false, false, "real time signal 12" );
- AddSignal (47, "SIGRTMIN+13", false, false, false, "real time signal 13" );
- AddSignal (48, "SIGRTMIN+14", false, false, false, "real time signal 14" );
- AddSignal (49, "SIGRTMIN+15", false, false, false, "real time signal 15" );
- AddSignal (50, "SIGRTMAX-14", false, false, false, "real time signal 16" ); // switching to SIGRTMAX-xxx to match "kill -l" output
- AddSignal (51, "SIGRTMAX-13", false, false, false, "real time signal 17" );
- AddSignal (52, "SIGRTMAX-12", false, false, false, "real time signal 18" );
- AddSignal (53, "SIGRTMAX-11", false, false, false, "real time signal 19" );
- AddSignal (54, "SIGRTMAX-10", false, false, false, "real time signal 20" );
- AddSignal (55, "SIGRTMAX-9", false, false, false, "real time signal 21" );
- AddSignal (56, "SIGRTMAX-8", false, false, false, "real time signal 22" );
- AddSignal (57, "SIGRTMAX-7", false, false, false, "real time signal 23" );
- AddSignal (58, "SIGRTMAX-6", false, false, false, "real time signal 24" );
- AddSignal (59, "SIGRTMAX-5", false, false, false, "real time signal 25" );
- AddSignal (60, "SIGRTMAX-4", false, false, false, "real time signal 26" );
- AddSignal (61, "SIGRTMAX-3", false, false, false, "real time signal 27" );
- AddSignal (62, "SIGRTMAX-2", false, false, false, "real time signal 28" );
- AddSignal (63, "SIGRTMAX-1", false, false, false, "real time signal 29" );
- AddSignal (64, "SIGRTMAX", false, false, false, "real time signal 30" );
+void LinuxSignals::Reset() {
+ m_signals.clear();
+ // SIGNO NAME SUPPRESS STOP NOTIFY DESCRIPTION ALIAS
+ // ===== =========== ======== ===== ======
+ // ====================================== ======
+ AddSignal(1, "SIGHUP", false, true, true, "hangup");
+ AddSignal(2, "SIGINT", true, true, true, "interrupt");
+ AddSignal(3, "SIGQUIT", false, true, true, "quit");
+ AddSignal(4, "SIGILL", false, true, true, "illegal instruction");
+ AddSignal(5, "SIGTRAP", true, true, true,
+ "trace trap (not reset when caught)");
+ AddSignal(6, "SIGABRT", false, true, true, "abort()/IOT trap", "SIGIOT");
+ AddSignal(7, "SIGBUS", false, true, true, "bus error");
+ AddSignal(8, "SIGFPE", false, true, true, "floating point exception");
+ AddSignal(9, "SIGKILL", false, true, true, "kill");
+ AddSignal(10, "SIGUSR1", false, true, true, "user defined signal 1");
+ AddSignal(11, "SIGSEGV", false, true, true, "segmentation violation");
+ AddSignal(12, "SIGUSR2", false, true, true, "user defined signal 2");
+ AddSignal(13, "SIGPIPE", false, true, true,
+ "write to pipe with reading end closed");
+ AddSignal(14, "SIGALRM", false, false, false, "alarm");
+ AddSignal(15, "SIGTERM", false, true, true, "termination requested");
+ AddSignal(16, "SIGSTKFLT", false, true, true, "stack fault");
+ AddSignal(17, "SIGCHLD", false, false, true, "child status has changed",
+ "SIGCLD");
+ AddSignal(18, "SIGCONT", false, true, true, "process continue");
+ AddSignal(19, "SIGSTOP", true, true, true, "process stop");
+ AddSignal(20, "SIGTSTP", false, true, true, "tty stop");
+ AddSignal(21, "SIGTTIN", false, true, true, "background tty read");
+ AddSignal(22, "SIGTTOU", false, true, true, "background tty write");
+ AddSignal(23, "SIGURG", false, true, true, "urgent data on socket");
+ AddSignal(24, "SIGXCPU", false, true, true, "CPU resource exceeded");
+ AddSignal(25, "SIGXFSZ", false, true, true, "file size limit exceeded");
+ AddSignal(26, "SIGVTALRM", false, true, true, "virtual time alarm");
+ AddSignal(27, "SIGPROF", false, false, false, "profiling time alarm");
+ AddSignal(28, "SIGWINCH", false, true, true, "window size changes");
+ AddSignal(29, "SIGIO", false, true, true, "input/output ready/Pollable event",
+ "SIGPOLL");
+ AddSignal(30, "SIGPWR", false, true, true, "power failure");
+ AddSignal(31, "SIGSYS", false, true, true, "invalid system call");
+ AddSignal(32, "SIG32", false, false, false,
+ "threading library internal signal 1");
+ AddSignal(33, "SIG33", false, false, false,
+ "threading library internal signal 2");
+ AddSignal(34, "SIGRTMIN", false, false, false, "real time signal 0");
+ AddSignal(35, "SIGRTMIN+1", false, false, false, "real time signal 1");
+ AddSignal(36, "SIGRTMIN+2", false, false, false, "real time signal 2");
+ AddSignal(37, "SIGRTMIN+3", false, false, false, "real time signal 3");
+ AddSignal(38, "SIGRTMIN+4", false, false, false, "real time signal 4");
+ AddSignal(39, "SIGRTMIN+5", false, false, false, "real time signal 5");
+ AddSignal(40, "SIGRTMIN+6", false, false, false, "real time signal 6");
+ AddSignal(41, "SIGRTMIN+7", false, false, false, "real time signal 7");
+ AddSignal(42, "SIGRTMIN+8", false, false, false, "real time signal 8");
+ AddSignal(43, "SIGRTMIN+9", false, false, false, "real time signal 9");
+ AddSignal(44, "SIGRTMIN+10", false, false, false, "real time signal 10");
+ AddSignal(45, "SIGRTMIN+11", false, false, false, "real time signal 11");
+ AddSignal(46, "SIGRTMIN+12", false, false, false, "real time signal 12");
+ AddSignal(47, "SIGRTMIN+13", false, false, false, "real time signal 13");
+ AddSignal(48, "SIGRTMIN+14", false, false, false, "real time signal 14");
+ AddSignal(49, "SIGRTMIN+15", false, false, false, "real time signal 15");
+ AddSignal(50, "SIGRTMAX-14", false, false, false,
+ "real time signal 16"); // switching to SIGRTMAX-xxx to match "kill
+ // -l" output
+ AddSignal(51, "SIGRTMAX-13", false, false, false, "real time signal 17");
+ AddSignal(52, "SIGRTMAX-12", false, false, false, "real time signal 18");
+ AddSignal(53, "SIGRTMAX-11", false, false, false, "real time signal 19");
+ AddSignal(54, "SIGRTMAX-10", false, false, false, "real time signal 20");
+ AddSignal(55, "SIGRTMAX-9", false, false, false, "real time signal 21");
+ AddSignal(56, "SIGRTMAX-8", false, false, false, "real time signal 22");
+ AddSignal(57, "SIGRTMAX-7", false, false, false, "real time signal 23");
+ AddSignal(58, "SIGRTMAX-6", false, false, false, "real time signal 24");
+ AddSignal(59, "SIGRTMAX-5", false, false, false, "real time signal 25");
+ AddSignal(60, "SIGRTMAX-4", false, false, false, "real time signal 26");
+ AddSignal(61, "SIGRTMAX-3", false, false, false, "real time signal 27");
+ AddSignal(62, "SIGRTMAX-2", false, false, false, "real time signal 28");
+ AddSignal(63, "SIGRTMAX-1", false, false, false, "real time signal 29");
+ AddSignal(64, "SIGRTMAX", false, false, false, "real time signal 30");
}
diff --git a/source/Plugins/Process/Utility/LinuxSignals.h b/source/Plugins/Process/Utility/LinuxSignals.h
index dd9062f040a2..e41126225cee 100644
--- a/source/Plugins/Process/Utility/LinuxSignals.h
+++ b/source/Plugins/Process/Utility/LinuxSignals.h
@@ -19,14 +19,12 @@
namespace lldb_private {
/// Linux specific set of Unix signals.
-class LinuxSignals : public UnixSignals
-{
+class LinuxSignals : public UnixSignals {
public:
- LinuxSignals();
+ LinuxSignals();
private:
- void
- Reset() override;
+ void Reset() override;
};
} // namespace lldb_private
diff --git a/source/Plugins/Process/Utility/MipsLinuxSignals.cpp b/source/Plugins/Process/Utility/MipsLinuxSignals.cpp
index 422fc9b642d0..36231023aa3a 100644
--- a/source/Plugins/Process/Utility/MipsLinuxSignals.cpp
+++ b/source/Plugins/Process/Utility/MipsLinuxSignals.cpp
@@ -1,4 +1,5 @@
-//===-- MipsLinuxSignals.cpp ----------------------------------------*- C++ -*-===//
+//===-- MipsLinuxSignals.cpp ----------------------------------------*- C++
+//-*-===//
//
// The LLVM Compiler Infrastructure
//
@@ -14,80 +15,83 @@
using namespace lldb_private;
-MipsLinuxSignals::MipsLinuxSignals()
- : UnixSignals()
-{
- Reset();
-}
+MipsLinuxSignals::MipsLinuxSignals() : UnixSignals() { Reset(); }
-void
-MipsLinuxSignals::Reset()
-{
- m_signals.clear();
- // SIGNO NAME SUPPRESS STOP NOTIFY DESCRIPTION ALIAS
- // ===== =========== ======== ===== ====== ====================================== ========
- AddSignal (1, "SIGHUP", false, true , true , "hangup" );
- AddSignal (2, "SIGINT", true , true , true , "interrupt" );
- AddSignal (3, "SIGQUIT", false, true , true , "quit" );
- AddSignal (4, "SIGILL", false, true , true , "illegal instruction" );
- AddSignal (5, "SIGTRAP", true , true , true , "trace trap (not reset when caught)" );
- AddSignal (6, "SIGABRT", false, true , true , "abort()/IOT trap", "SIGIOT");
- AddSignal (7, "SIGEMT", false, true , true , "terminate process with core dump" );
- AddSignal (8, "SIGFPE", false, true , true , "floating point exception" );
- AddSignal (9, "SIGKILL", false, true , true , "kill" );
- AddSignal (10, "SIGBUS", false, true , true , "bus error" );
- AddSignal (11, "SIGSEGV", false, true , true , "segmentation violation" );
- AddSignal (12, "SIGSYS", false, true , true , "invalid system call" );
- AddSignal (13, "SIGPIPE", false, true , true , "write to pipe with reading end closed" );
- AddSignal (14, "SIGALRM", false, false, false, "alarm" );
- AddSignal (15, "SIGTERM", false, true , true , "termination requested" );
- AddSignal (16, "SIGUSR1", false, true , true , "user defined signal 1" );
- AddSignal (17, "SIGUSR2", false, true , true , "user defined signal 2" );
- AddSignal (18, "SIGCHLD", false, false, true , "child status has changed", "SIGCLD");
- AddSignal (19, "SIGPWR", false, true , true , "power failure" );
- AddSignal (20, "SIGWINCH", false, true , true , "window size changes" );
- AddSignal (21, "SIGURG", false, true , true , "urgent data on socket" );
- AddSignal (22, "SIGIO", false, true , true , "input/output ready/Pollable event", "SIGPOLL");
- AddSignal (23, "SIGSTOP", true , true , true , "process stop" );
- AddSignal (24, "SIGTSTP", false, true , true , "tty stop" );
- AddSignal (25, "SIGCONT", false, true , true , "process continue" );
- AddSignal (26, "SIGTTIN", false, true , true , "background tty read" );
- AddSignal (27, "SIGTTOU", false, true , true , "background tty write" );
- AddSignal (28, "SIGVTALRM", false, true , true , "virtual time alarm" );
- AddSignal (29, "SIGPROF", false, false, false, "profiling time alarm" );
- AddSignal (30, "SIGXCPU", false, true , true , "CPU resource exceeded" );
- AddSignal (31, "SIGXFSZ", false, true , true , "file size limit exceeded" );
- AddSignal (32, "SIG32", false, false, false, "threading library internal signal 1" );
- AddSignal (33, "SIG33", false, false, false, "threading library internal signal 2" );
- AddSignal (34, "SIGRTMIN", false, false, false, "real time signal 0" );
- AddSignal (35, "SIGRTMIN+1", false, false, false, "real time signal 1" );
- AddSignal (36, "SIGRTMIN+2", false, false, false, "real time signal 2" );
- AddSignal (37, "SIGRTMIN+3", false, false, false, "real time signal 3" );
- AddSignal (38, "SIGRTMIN+4", false, false, false, "real time signal 4" );
- AddSignal (39, "SIGRTMIN+5", false, false, false, "real time signal 5" );
- AddSignal (40, "SIGRTMIN+6", false, false, false, "real time signal 6" );
- AddSignal (41, "SIGRTMIN+7", false, false, false, "real time signal 7" );
- AddSignal (42, "SIGRTMIN+8", false, false, false, "real time signal 8" );
- AddSignal (43, "SIGRTMIN+9", false, false, false, "real time signal 9" );
- AddSignal (44, "SIGRTMIN+10", false, false, false, "real time signal 10" );
- AddSignal (45, "SIGRTMIN+11", false, false, false, "real time signal 11" );
- AddSignal (46, "SIGRTMIN+12", false, false, false, "real time signal 12" );
- AddSignal (47, "SIGRTMIN+13", false, false, false, "real time signal 13" );
- AddSignal (48, "SIGRTMIN+14", false, false, false, "real time signal 14" );
- AddSignal (49, "SIGRTMIN+15", false, false, false, "real time signal 15" );
- AddSignal (50, "SIGRTMAX-14", false, false, false, "real time signal 16" ); // switching to SIGRTMAX-xxx to match "kill -l" output
- AddSignal (51, "SIGRTMAX-13", false, false, false, "real time signal 17" );
- AddSignal (52, "SIGRTMAX-12", false, false, false, "real time signal 18" );
- AddSignal (53, "SIGRTMAX-11", false, false, false, "real time signal 19" );
- AddSignal (54, "SIGRTMAX-10", false, false, false, "real time signal 20" );
- AddSignal (55, "SIGRTMAX-9", false, false, false, "real time signal 21" );
- AddSignal (56, "SIGRTMAX-8", false, false, false, "real time signal 22" );
- AddSignal (57, "SIGRTMAX-7", false, false, false, "real time signal 23" );
- AddSignal (58, "SIGRTMAX-6", false, false, false, "real time signal 24" );
- AddSignal (59, "SIGRTMAX-5", false, false, false, "real time signal 25" );
- AddSignal (60, "SIGRTMAX-4", false, false, false, "real time signal 26" );
- AddSignal (61, "SIGRTMAX-3", false, false, false, "real time signal 27" );
- AddSignal (62, "SIGRTMAX-2", false, false, false, "real time signal 28" );
- AddSignal (63, "SIGRTMAX-1", false, false, false, "real time signal 29" );
- AddSignal (64, "SIGRTMAX", false, false, false, "real time signal 30" );
+void MipsLinuxSignals::Reset() {
+ m_signals.clear();
+ // SIGNO NAME SUPPRESS STOP NOTIFY DESCRIPTION ALIAS
+ // ===== =========== ======== ===== ======
+ // ====================================== ========
+ AddSignal(1, "SIGHUP", false, true, true, "hangup");
+ AddSignal(2, "SIGINT", true, true, true, "interrupt");
+ AddSignal(3, "SIGQUIT", false, true, true, "quit");
+ AddSignal(4, "SIGILL", false, true, true, "illegal instruction");
+ AddSignal(5, "SIGTRAP", true, true, true,
+ "trace trap (not reset when caught)");
+ AddSignal(6, "SIGABRT", false, true, true, "abort()/IOT trap", "SIGIOT");
+ AddSignal(7, "SIGEMT", false, true, true, "terminate process with core dump");
+ AddSignal(8, "SIGFPE", false, true, true, "floating point exception");
+ AddSignal(9, "SIGKILL", false, true, true, "kill");
+ AddSignal(10, "SIGBUS", false, true, true, "bus error");
+ AddSignal(11, "SIGSEGV", false, true, true, "segmentation violation");
+ AddSignal(12, "SIGSYS", false, true, true, "invalid system call");
+ AddSignal(13, "SIGPIPE", false, true, true,
+ "write to pipe with reading end closed");
+ AddSignal(14, "SIGALRM", false, false, false, "alarm");
+ AddSignal(15, "SIGTERM", false, true, true, "termination requested");
+ AddSignal(16, "SIGUSR1", false, true, true, "user defined signal 1");
+ AddSignal(17, "SIGUSR2", false, true, true, "user defined signal 2");
+ AddSignal(18, "SIGCHLD", false, false, true, "child status has changed",
+ "SIGCLD");
+ AddSignal(19, "SIGPWR", false, true, true, "power failure");
+ AddSignal(20, "SIGWINCH", false, true, true, "window size changes");
+ AddSignal(21, "SIGURG", false, true, true, "urgent data on socket");
+ AddSignal(22, "SIGIO", false, true, true, "input/output ready/Pollable event",
+ "SIGPOLL");
+ AddSignal(23, "SIGSTOP", true, true, true, "process stop");
+ AddSignal(24, "SIGTSTP", false, true, true, "tty stop");
+ AddSignal(25, "SIGCONT", false, true, true, "process continue");
+ AddSignal(26, "SIGTTIN", false, true, true, "background tty read");
+ AddSignal(27, "SIGTTOU", false, true, true, "background tty write");
+ AddSignal(28, "SIGVTALRM", false, true, true, "virtual time alarm");
+ AddSignal(29, "SIGPROF", false, false, false, "profiling time alarm");
+ AddSignal(30, "SIGXCPU", false, true, true, "CPU resource exceeded");
+ AddSignal(31, "SIGXFSZ", false, true, true, "file size limit exceeded");
+ AddSignal(32, "SIG32", false, false, false,
+ "threading library internal signal 1");
+ AddSignal(33, "SIG33", false, false, false,
+ "threading library internal signal 2");
+ AddSignal(34, "SIGRTMIN", false, false, false, "real time signal 0");
+ AddSignal(35, "SIGRTMIN+1", false, false, false, "real time signal 1");
+ AddSignal(36, "SIGRTMIN+2", false, false, false, "real time signal 2");
+ AddSignal(37, "SIGRTMIN+3", false, false, false, "real time signal 3");
+ AddSignal(38, "SIGRTMIN+4", false, false, false, "real time signal 4");
+ AddSignal(39, "SIGRTMIN+5", false, false, false, "real time signal 5");
+ AddSignal(40, "SIGRTMIN+6", false, false, false, "real time signal 6");
+ AddSignal(41, "SIGRTMIN+7", false, false, false, "real time signal 7");
+ AddSignal(42, "SIGRTMIN+8", false, false, false, "real time signal 8");
+ AddSignal(43, "SIGRTMIN+9", false, false, false, "real time signal 9");
+ AddSignal(44, "SIGRTMIN+10", false, false, false, "real time signal 10");
+ AddSignal(45, "SIGRTMIN+11", false, false, false, "real time signal 11");
+ AddSignal(46, "SIGRTMIN+12", false, false, false, "real time signal 12");
+ AddSignal(47, "SIGRTMIN+13", false, false, false, "real time signal 13");
+ AddSignal(48, "SIGRTMIN+14", false, false, false, "real time signal 14");
+ AddSignal(49, "SIGRTMIN+15", false, false, false, "real time signal 15");
+ AddSignal(50, "SIGRTMAX-14", false, false, false,
+ "real time signal 16"); // switching to SIGRTMAX-xxx to match "kill
+ // -l" output
+ AddSignal(51, "SIGRTMAX-13", false, false, false, "real time signal 17");
+ AddSignal(52, "SIGRTMAX-12", false, false, false, "real time signal 18");
+ AddSignal(53, "SIGRTMAX-11", false, false, false, "real time signal 19");
+ AddSignal(54, "SIGRTMAX-10", false, false, false, "real time signal 20");
+ AddSignal(55, "SIGRTMAX-9", false, false, false, "real time signal 21");
+ AddSignal(56, "SIGRTMAX-8", false, false, false, "real time signal 22");
+ AddSignal(57, "SIGRTMAX-7", false, false, false, "real time signal 23");
+ AddSignal(58, "SIGRTMAX-6", false, false, false, "real time signal 24");
+ AddSignal(59, "SIGRTMAX-5", false, false, false, "real time signal 25");
+ AddSignal(60, "SIGRTMAX-4", false, false, false, "real time signal 26");
+ AddSignal(61, "SIGRTMAX-3", false, false, false, "real time signal 27");
+ AddSignal(62, "SIGRTMAX-2", false, false, false, "real time signal 28");
+ AddSignal(63, "SIGRTMAX-1", false, false, false, "real time signal 29");
+ AddSignal(64, "SIGRTMAX", false, false, false, "real time signal 30");
}
diff --git a/source/Plugins/Process/Utility/MipsLinuxSignals.h b/source/Plugins/Process/Utility/MipsLinuxSignals.h
index a5041b50eea3..e48ea5943f2b 100644
--- a/source/Plugins/Process/Utility/MipsLinuxSignals.h
+++ b/source/Plugins/Process/Utility/MipsLinuxSignals.h
@@ -1,4 +1,5 @@
-//===-- MipsLinuxSignals.h ------------------------------------------*- C++ -*-===//
+//===-- MipsLinuxSignals.h ------------------------------------------*- C++
+//-*-===//
//
// The LLVM Compiler Infrastructure
//
@@ -19,14 +20,12 @@
namespace lldb_private {
/// Linux specific set of Unix signals.
-class MipsLinuxSignals : public UnixSignals
-{
+class MipsLinuxSignals : public UnixSignals {
public:
- MipsLinuxSignals();
+ MipsLinuxSignals();
private:
- void
- Reset() override;
+ void Reset() override;
};
} // namespace lldb_private
diff --git a/source/Plugins/Process/Utility/NetBSDSignals.cpp b/source/Plugins/Process/Utility/NetBSDSignals.cpp
index 5dce51616c4e..9b9db51e5167 100644
--- a/source/Plugins/Process/Utility/NetBSDSignals.cpp
+++ b/source/Plugins/Process/Utility/NetBSDSignals.cpp
@@ -15,20 +15,16 @@
using namespace lldb_private;
-NetBSDSignals::NetBSDSignals()
- : UnixSignals()
-{
- Reset();
-}
+NetBSDSignals::NetBSDSignals() : UnixSignals() { Reset(); }
-void
-NetBSDSignals::Reset()
-{
- UnixSignals::Reset();
- // SIGNO NAME SUPPRESS STOP NOTIFY DESCRIPTION
- // ====== ============ ======== ====== ====== ===================================================
- AddSignal (32, "SIGPWR", false, true , true , "power fail/restart (not reset when caught)");
+void NetBSDSignals::Reset() {
+ UnixSignals::Reset();
+ // SIGNO NAME SUPPRESS STOP NOTIFY DESCRIPTION
+ // ====== ============ ======== ====== ======
+ // ===================================================
+ AddSignal(32, "SIGPWR", false, true, true,
+ "power fail/restart (not reset when caught)");
#ifdef SIGRTMIN /* SIGRTMAX */
- /* Kernel only; not exposed to userland yet */
+ /* Kernel only; not exposed to userland yet */
#endif
}
diff --git a/source/Plugins/Process/Utility/NetBSDSignals.h b/source/Plugins/Process/Utility/NetBSDSignals.h
index 441402b056db..4338f881645e 100644
--- a/source/Plugins/Process/Utility/NetBSDSignals.h
+++ b/source/Plugins/Process/Utility/NetBSDSignals.h
@@ -16,14 +16,12 @@
namespace lldb_private {
/// NetBSD specific set of Unix signals.
-class NetBSDSignals : public UnixSignals
-{
+class NetBSDSignals : public UnixSignals {
public:
- NetBSDSignals();
+ NetBSDSignals();
private:
- void
- Reset() override;
+ void Reset() override;
};
} // namespace lldb_private
diff --git a/source/Plugins/Process/Utility/RegisterContextDarwin_arm.cpp b/source/Plugins/Process/Utility/RegisterContextDarwin_arm.cpp
index 1d0fc4fb7020..52ace5602f49 100644
--- a/source/Plugins/Process/Utility/RegisterContextDarwin_arm.cpp
+++ b/source/Plugins/Process/Utility/RegisterContextDarwin_arm.cpp
@@ -42,403 +42,926 @@
using namespace lldb;
using namespace lldb_private;
-enum
-{
- gpr_r0 = 0,
- gpr_r1,
- gpr_r2,
- gpr_r3,
- gpr_r4,
- gpr_r5,
- gpr_r6,
- gpr_r7,
- gpr_r8,
- gpr_r9,
- gpr_r10,
- gpr_r11,
- gpr_r12,
- gpr_r13, gpr_sp = gpr_r13,
- gpr_r14, gpr_lr = gpr_r14,
- gpr_r15, gpr_pc = gpr_r15,
- gpr_cpsr,
-
- fpu_s0,
- fpu_s1,
- fpu_s2,
- fpu_s3,
- fpu_s4,
- fpu_s5,
- fpu_s6,
- fpu_s7,
- fpu_s8,
- fpu_s9,
- fpu_s10,
- fpu_s11,
- fpu_s12,
- fpu_s13,
- fpu_s14,
- fpu_s15,
- fpu_s16,
- fpu_s17,
- fpu_s18,
- fpu_s19,
- fpu_s20,
- fpu_s21,
- fpu_s22,
- fpu_s23,
- fpu_s24,
- fpu_s25,
- fpu_s26,
- fpu_s27,
- fpu_s28,
- fpu_s29,
- fpu_s30,
- fpu_s31,
- fpu_fpscr,
-
- exc_exception,
- exc_fsr,
- exc_far,
-
- dbg_bvr0,
- dbg_bvr1,
- dbg_bvr2,
- dbg_bvr3,
- dbg_bvr4,
- dbg_bvr5,
- dbg_bvr6,
- dbg_bvr7,
- dbg_bvr8,
- dbg_bvr9,
- dbg_bvr10,
- dbg_bvr11,
- dbg_bvr12,
- dbg_bvr13,
- dbg_bvr14,
- dbg_bvr15,
-
- dbg_bcr0,
- dbg_bcr1,
- dbg_bcr2,
- dbg_bcr3,
- dbg_bcr4,
- dbg_bcr5,
- dbg_bcr6,
- dbg_bcr7,
- dbg_bcr8,
- dbg_bcr9,
- dbg_bcr10,
- dbg_bcr11,
- dbg_bcr12,
- dbg_bcr13,
- dbg_bcr14,
- dbg_bcr15,
-
- dbg_wvr0,
- dbg_wvr1,
- dbg_wvr2,
- dbg_wvr3,
- dbg_wvr4,
- dbg_wvr5,
- dbg_wvr6,
- dbg_wvr7,
- dbg_wvr8,
- dbg_wvr9,
- dbg_wvr10,
- dbg_wvr11,
- dbg_wvr12,
- dbg_wvr13,
- dbg_wvr14,
- dbg_wvr15,
-
- dbg_wcr0,
- dbg_wcr1,
- dbg_wcr2,
- dbg_wcr3,
- dbg_wcr4,
- dbg_wcr5,
- dbg_wcr6,
- dbg_wcr7,
- dbg_wcr8,
- dbg_wcr9,
- dbg_wcr10,
- dbg_wcr11,
- dbg_wcr12,
- dbg_wcr13,
- dbg_wcr14,
- dbg_wcr15,
-
- k_num_registers
+enum {
+ gpr_r0 = 0,
+ gpr_r1,
+ gpr_r2,
+ gpr_r3,
+ gpr_r4,
+ gpr_r5,
+ gpr_r6,
+ gpr_r7,
+ gpr_r8,
+ gpr_r9,
+ gpr_r10,
+ gpr_r11,
+ gpr_r12,
+ gpr_r13,
+ gpr_sp = gpr_r13,
+ gpr_r14,
+ gpr_lr = gpr_r14,
+ gpr_r15,
+ gpr_pc = gpr_r15,
+ gpr_cpsr,
+
+ fpu_s0,
+ fpu_s1,
+ fpu_s2,
+ fpu_s3,
+ fpu_s4,
+ fpu_s5,
+ fpu_s6,
+ fpu_s7,
+ fpu_s8,
+ fpu_s9,
+ fpu_s10,
+ fpu_s11,
+ fpu_s12,
+ fpu_s13,
+ fpu_s14,
+ fpu_s15,
+ fpu_s16,
+ fpu_s17,
+ fpu_s18,
+ fpu_s19,
+ fpu_s20,
+ fpu_s21,
+ fpu_s22,
+ fpu_s23,
+ fpu_s24,
+ fpu_s25,
+ fpu_s26,
+ fpu_s27,
+ fpu_s28,
+ fpu_s29,
+ fpu_s30,
+ fpu_s31,
+ fpu_fpscr,
+
+ exc_exception,
+ exc_fsr,
+ exc_far,
+
+ dbg_bvr0,
+ dbg_bvr1,
+ dbg_bvr2,
+ dbg_bvr3,
+ dbg_bvr4,
+ dbg_bvr5,
+ dbg_bvr6,
+ dbg_bvr7,
+ dbg_bvr8,
+ dbg_bvr9,
+ dbg_bvr10,
+ dbg_bvr11,
+ dbg_bvr12,
+ dbg_bvr13,
+ dbg_bvr14,
+ dbg_bvr15,
+
+ dbg_bcr0,
+ dbg_bcr1,
+ dbg_bcr2,
+ dbg_bcr3,
+ dbg_bcr4,
+ dbg_bcr5,
+ dbg_bcr6,
+ dbg_bcr7,
+ dbg_bcr8,
+ dbg_bcr9,
+ dbg_bcr10,
+ dbg_bcr11,
+ dbg_bcr12,
+ dbg_bcr13,
+ dbg_bcr14,
+ dbg_bcr15,
+
+ dbg_wvr0,
+ dbg_wvr1,
+ dbg_wvr2,
+ dbg_wvr3,
+ dbg_wvr4,
+ dbg_wvr5,
+ dbg_wvr6,
+ dbg_wvr7,
+ dbg_wvr8,
+ dbg_wvr9,
+ dbg_wvr10,
+ dbg_wvr11,
+ dbg_wvr12,
+ dbg_wvr13,
+ dbg_wvr14,
+ dbg_wvr15,
+
+ dbg_wcr0,
+ dbg_wcr1,
+ dbg_wcr2,
+ dbg_wcr3,
+ dbg_wcr4,
+ dbg_wcr5,
+ dbg_wcr6,
+ dbg_wcr7,
+ dbg_wcr8,
+ dbg_wcr9,
+ dbg_wcr10,
+ dbg_wcr11,
+ dbg_wcr12,
+ dbg_wcr13,
+ dbg_wcr14,
+ dbg_wcr15,
+
+ k_num_registers
};
-
-#define GPR_OFFSET(idx) ((idx) * 4)
-#define FPU_OFFSET(idx) ((idx) * 4 + sizeof (RegisterContextDarwin_arm::GPR))
-#define EXC_OFFSET(idx) ((idx) * 4 + sizeof (RegisterContextDarwin_arm::GPR) + sizeof (RegisterContextDarwin_arm::FPU))
-#define DBG_OFFSET(reg) ((LLVM_EXTENSION offsetof (RegisterContextDarwin_arm::DBG, reg) + sizeof (RegisterContextDarwin_arm::GPR) + sizeof (RegisterContextDarwin_arm::FPU) + sizeof (RegisterContextDarwin_arm::EXC)))
-
-#define DEFINE_DBG(reg, i) #reg, NULL, sizeof(((RegisterContextDarwin_arm::DBG *)NULL)->reg[i]), DBG_OFFSET(reg[i]), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL, NULL, 0
-#define REG_CONTEXT_SIZE (sizeof (RegisterContextDarwin_arm::GPR) + sizeof (RegisterContextDarwin_arm::FPU) + sizeof (RegisterContextDarwin_arm::EXC))
+#define GPR_OFFSET(idx) ((idx)*4)
+#define FPU_OFFSET(idx) ((idx)*4 + sizeof(RegisterContextDarwin_arm::GPR))
+#define EXC_OFFSET(idx) \
+ ((idx)*4 + sizeof(RegisterContextDarwin_arm::GPR) + \
+ sizeof(RegisterContextDarwin_arm::FPU))
+#define DBG_OFFSET(reg) \
+ ((LLVM_EXTENSION offsetof(RegisterContextDarwin_arm::DBG, reg) + \
+ sizeof(RegisterContextDarwin_arm::GPR) + \
+ sizeof(RegisterContextDarwin_arm::FPU) + \
+ sizeof(RegisterContextDarwin_arm::EXC)))
+
+#define DEFINE_DBG(reg, i) \
+ #reg, NULL, sizeof(((RegisterContextDarwin_arm::DBG *) NULL)->reg[i]), \
+ DBG_OFFSET(reg[i]), eEncodingUint, eFormatHex, \
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ LLDB_INVALID_REGNUM }, \
+ nullptr, nullptr, nullptr, 0
+#define REG_CONTEXT_SIZE \
+ (sizeof(RegisterContextDarwin_arm::GPR) + \
+ sizeof(RegisterContextDarwin_arm::FPU) + \
+ sizeof(RegisterContextDarwin_arm::EXC))
static RegisterInfo g_register_infos[] = {
-// General purpose registers
-// NAME ALT SZ OFFSET ENCODING FORMAT EH_FRAME DWARF GENERIC PROCESS PLUGIN LLDB NATIVE VALUE REGS INVALIDATE REGS
-// ====== ======= == ============= ============= ============ =============== =============== ========================= ===================== ============= ========== ===============
-{ "r0", NULL, 4, GPR_OFFSET(0), eEncodingUint, eFormatHex, { ehframe_r0, dwarf_r0, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r0 }, NULL, NULL},
-{ "r1", NULL, 4, GPR_OFFSET(1), eEncodingUint, eFormatHex, { ehframe_r1, dwarf_r1, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r1 }, NULL, NULL},
-{ "r2", NULL, 4, GPR_OFFSET(2), eEncodingUint, eFormatHex, { ehframe_r2, dwarf_r2, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r2 }, NULL, NULL},
-{ "r3", NULL, 4, GPR_OFFSET(3), eEncodingUint, eFormatHex, { ehframe_r3, dwarf_r3, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r3 }, NULL, NULL},
-{ "r4", NULL, 4, GPR_OFFSET(4), eEncodingUint, eFormatHex, { ehframe_r4, dwarf_r4, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r4 }, NULL, NULL},
-{ "r5", NULL, 4, GPR_OFFSET(5), eEncodingUint, eFormatHex, { ehframe_r5, dwarf_r5, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r5 }, NULL, NULL},
-{ "r6", NULL, 4, GPR_OFFSET(6), eEncodingUint, eFormatHex, { ehframe_r6, dwarf_r6, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r6 }, NULL, NULL},
-{ "r7", NULL, 4, GPR_OFFSET(7), eEncodingUint, eFormatHex, { ehframe_r7, dwarf_r7, LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM, gpr_r7 }, NULL, NULL},
-{ "r8", NULL, 4, GPR_OFFSET(8), eEncodingUint, eFormatHex, { ehframe_r8, dwarf_r8, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r8 }, NULL, NULL},
-{ "r9", NULL, 4, GPR_OFFSET(9), eEncodingUint, eFormatHex, { ehframe_r9, dwarf_r9, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r9 }, NULL, NULL},
-{ "r10", NULL, 4, GPR_OFFSET(10), eEncodingUint, eFormatHex, { ehframe_r10, dwarf_r10, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r10 }, NULL, NULL},
-{ "r11", NULL, 4, GPR_OFFSET(11), eEncodingUint, eFormatHex, { ehframe_r11, dwarf_r11, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r11 }, NULL, NULL},
-{ "r12", NULL, 4, GPR_OFFSET(12), eEncodingUint, eFormatHex, { ehframe_r12, dwarf_r12, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r12 }, NULL, NULL},
-{ "sp", "r13", 4, GPR_OFFSET(13), eEncodingUint, eFormatHex, { ehframe_sp, dwarf_sp, LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM, gpr_sp }, NULL, NULL},
-{ "lr", "r14", 4, GPR_OFFSET(14), eEncodingUint, eFormatHex, { ehframe_lr, dwarf_lr, LLDB_REGNUM_GENERIC_RA, LLDB_INVALID_REGNUM, gpr_lr }, NULL, NULL},
-{ "pc", "r15", 4, GPR_OFFSET(15), eEncodingUint, eFormatHex, { ehframe_pc, dwarf_pc, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM, gpr_pc }, NULL, NULL},
-{ "cpsr", "psr", 4, GPR_OFFSET(16), eEncodingUint, eFormatHex, { ehframe_cpsr, dwarf_cpsr, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM, gpr_cpsr }, NULL, NULL},
-
-{ "s0", NULL, 4, FPU_OFFSET(0), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s0, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s0 }, NULL, NULL},
-{ "s1", NULL, 4, FPU_OFFSET(1), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s1, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s1 }, NULL, NULL},
-{ "s2", NULL, 4, FPU_OFFSET(2), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s2, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s2 }, NULL, NULL},
-{ "s3", NULL, 4, FPU_OFFSET(3), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s3, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s3 }, NULL, NULL},
-{ "s4", NULL, 4, FPU_OFFSET(4), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s4, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s4 }, NULL, NULL},
-{ "s5", NULL, 4, FPU_OFFSET(5), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s5, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s5 }, NULL, NULL},
-{ "s6", NULL, 4, FPU_OFFSET(6), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s6, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s6 }, NULL, NULL},
-{ "s7", NULL, 4, FPU_OFFSET(7), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s7, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s7 }, NULL, NULL},
-{ "s8", NULL, 4, FPU_OFFSET(8), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s8, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s8 }, NULL, NULL},
-{ "s9", NULL, 4, FPU_OFFSET(9), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s9, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s9 }, NULL, NULL},
-{ "s10", NULL, 4, FPU_OFFSET(10), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s10, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s10 }, NULL, NULL},
-{ "s11", NULL, 4, FPU_OFFSET(11), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s11, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s11 }, NULL, NULL},
-{ "s12", NULL, 4, FPU_OFFSET(12), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s12, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s12 }, NULL, NULL},
-{ "s13", NULL, 4, FPU_OFFSET(13), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s13, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s13 }, NULL, NULL},
-{ "s14", NULL, 4, FPU_OFFSET(14), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s14, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s14 }, NULL, NULL},
-{ "s15", NULL, 4, FPU_OFFSET(15), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s15, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s15 }, NULL, NULL},
-{ "s16", NULL, 4, FPU_OFFSET(16), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s16, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s16 }, NULL, NULL},
-{ "s17", NULL, 4, FPU_OFFSET(17), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s17, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s17 }, NULL, NULL},
-{ "s18", NULL, 4, FPU_OFFSET(18), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s18, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s18 }, NULL, NULL},
-{ "s19", NULL, 4, FPU_OFFSET(19), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s19, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s19 }, NULL, NULL},
-{ "s20", NULL, 4, FPU_OFFSET(20), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s20, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s20 }, NULL, NULL},
-{ "s21", NULL, 4, FPU_OFFSET(21), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s21, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s21 }, NULL, NULL},
-{ "s22", NULL, 4, FPU_OFFSET(22), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s22, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s22 }, NULL, NULL},
-{ "s23", NULL, 4, FPU_OFFSET(23), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s23, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s23 }, NULL, NULL},
-{ "s24", NULL, 4, FPU_OFFSET(24), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s24, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s24 }, NULL, NULL},
-{ "s25", NULL, 4, FPU_OFFSET(25), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s25, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s25 }, NULL, NULL},
-{ "s26", NULL, 4, FPU_OFFSET(26), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s26, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s26 }, NULL, NULL},
-{ "s27", NULL, 4, FPU_OFFSET(27), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s27, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s27 }, NULL, NULL},
-{ "s28", NULL, 4, FPU_OFFSET(28), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s28, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s28 }, NULL, NULL},
-{ "s29", NULL, 4, FPU_OFFSET(29), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s29, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s29 }, NULL, NULL},
-{ "s30", NULL, 4, FPU_OFFSET(30), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s30, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s30 }, NULL, NULL},
-{ "s31", NULL, 4, FPU_OFFSET(31), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s31, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s31 }, NULL, NULL},
-{ "fpscr", NULL, 4, FPU_OFFSET(32), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_fpscr }, NULL, NULL},
-
-{ "exception",NULL, 4, EXC_OFFSET(0), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, exc_exception }, NULL, NULL},
-{ "fsr", NULL, 4, EXC_OFFSET(1), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, exc_fsr }, NULL, NULL},
-{ "far", NULL, 4, EXC_OFFSET(2), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, exc_far }, NULL, NULL},
-
-{ DEFINE_DBG (bvr, 0) },
-{ DEFINE_DBG (bvr, 1) },
-{ DEFINE_DBG (bvr, 2) },
-{ DEFINE_DBG (bvr, 3) },
-{ DEFINE_DBG (bvr, 4) },
-{ DEFINE_DBG (bvr, 5) },
-{ DEFINE_DBG (bvr, 6) },
-{ DEFINE_DBG (bvr, 7) },
-{ DEFINE_DBG (bvr, 8) },
-{ DEFINE_DBG (bvr, 9) },
-{ DEFINE_DBG (bvr, 10) },
-{ DEFINE_DBG (bvr, 11) },
-{ DEFINE_DBG (bvr, 12) },
-{ DEFINE_DBG (bvr, 13) },
-{ DEFINE_DBG (bvr, 14) },
-{ DEFINE_DBG (bvr, 15) },
-
-{ DEFINE_DBG (bcr, 0) },
-{ DEFINE_DBG (bcr, 1) },
-{ DEFINE_DBG (bcr, 2) },
-{ DEFINE_DBG (bcr, 3) },
-{ DEFINE_DBG (bcr, 4) },
-{ DEFINE_DBG (bcr, 5) },
-{ DEFINE_DBG (bcr, 6) },
-{ DEFINE_DBG (bcr, 7) },
-{ DEFINE_DBG (bcr, 8) },
-{ DEFINE_DBG (bcr, 9) },
-{ DEFINE_DBG (bcr, 10) },
-{ DEFINE_DBG (bcr, 11) },
-{ DEFINE_DBG (bcr, 12) },
-{ DEFINE_DBG (bcr, 13) },
-{ DEFINE_DBG (bcr, 14) },
-{ DEFINE_DBG (bcr, 15) },
-
-{ DEFINE_DBG (wvr, 0) },
-{ DEFINE_DBG (wvr, 1) },
-{ DEFINE_DBG (wvr, 2) },
-{ DEFINE_DBG (wvr, 3) },
-{ DEFINE_DBG (wvr, 4) },
-{ DEFINE_DBG (wvr, 5) },
-{ DEFINE_DBG (wvr, 6) },
-{ DEFINE_DBG (wvr, 7) },
-{ DEFINE_DBG (wvr, 8) },
-{ DEFINE_DBG (wvr, 9) },
-{ DEFINE_DBG (wvr, 10) },
-{ DEFINE_DBG (wvr, 11) },
-{ DEFINE_DBG (wvr, 12) },
-{ DEFINE_DBG (wvr, 13) },
-{ DEFINE_DBG (wvr, 14) },
-{ DEFINE_DBG (wvr, 15) },
-
-{ DEFINE_DBG (wcr, 0) },
-{ DEFINE_DBG (wcr, 1) },
-{ DEFINE_DBG (wcr, 2) },
-{ DEFINE_DBG (wcr, 3) },
-{ DEFINE_DBG (wcr, 4) },
-{ DEFINE_DBG (wcr, 5) },
-{ DEFINE_DBG (wcr, 6) },
-{ DEFINE_DBG (wcr, 7) },
-{ DEFINE_DBG (wcr, 8) },
-{ DEFINE_DBG (wcr, 9) },
-{ DEFINE_DBG (wcr, 10) },
-{ DEFINE_DBG (wcr, 11) },
-{ DEFINE_DBG (wcr, 12) },
-{ DEFINE_DBG (wcr, 13) },
-{ DEFINE_DBG (wcr, 14) },
-{ DEFINE_DBG (wcr, 15) }
-};
+ // General purpose registers
+ // NAME ALT SZ OFFSET ENCODING FORMAT
+ // EH_FRAME DWARF GENERIC
+ // PROCESS PLUGIN LLDB NATIVE
+ // ====== ======= == ============= ============= ============
+ // =============== =============== =========================
+ // ===================== =============
+ {"r0",
+ NULL,
+ 4,
+ GPR_OFFSET(0),
+ eEncodingUint,
+ eFormatHex,
+ {ehframe_r0, dwarf_r0, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r0},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"r1",
+ NULL,
+ 4,
+ GPR_OFFSET(1),
+ eEncodingUint,
+ eFormatHex,
+ {ehframe_r1, dwarf_r1, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r1},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"r2",
+ NULL,
+ 4,
+ GPR_OFFSET(2),
+ eEncodingUint,
+ eFormatHex,
+ {ehframe_r2, dwarf_r2, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r2},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"r3",
+ NULL,
+ 4,
+ GPR_OFFSET(3),
+ eEncodingUint,
+ eFormatHex,
+ {ehframe_r3, dwarf_r3, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r3},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"r4",
+ NULL,
+ 4,
+ GPR_OFFSET(4),
+ eEncodingUint,
+ eFormatHex,
+ {ehframe_r4, dwarf_r4, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r4},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"r5",
+ NULL,
+ 4,
+ GPR_OFFSET(5),
+ eEncodingUint,
+ eFormatHex,
+ {ehframe_r5, dwarf_r5, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r5},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"r6",
+ NULL,
+ 4,
+ GPR_OFFSET(6),
+ eEncodingUint,
+ eFormatHex,
+ {ehframe_r6, dwarf_r6, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r6},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"r7",
+ NULL,
+ 4,
+ GPR_OFFSET(7),
+ eEncodingUint,
+ eFormatHex,
+ {ehframe_r7, dwarf_r7, LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM,
+ gpr_r7},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"r8",
+ NULL,
+ 4,
+ GPR_OFFSET(8),
+ eEncodingUint,
+ eFormatHex,
+ {ehframe_r8, dwarf_r8, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r8},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"r9",
+ NULL,
+ 4,
+ GPR_OFFSET(9),
+ eEncodingUint,
+ eFormatHex,
+ {ehframe_r9, dwarf_r9, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r9},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"r10",
+ NULL,
+ 4,
+ GPR_OFFSET(10),
+ eEncodingUint,
+ eFormatHex,
+ {ehframe_r10, dwarf_r10, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ gpr_r10},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"r11",
+ NULL,
+ 4,
+ GPR_OFFSET(11),
+ eEncodingUint,
+ eFormatHex,
+ {ehframe_r11, dwarf_r11, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ gpr_r11},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"r12",
+ NULL,
+ 4,
+ GPR_OFFSET(12),
+ eEncodingUint,
+ eFormatHex,
+ {ehframe_r12, dwarf_r12, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ gpr_r12},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"sp",
+ "r13",
+ 4,
+ GPR_OFFSET(13),
+ eEncodingUint,
+ eFormatHex,
+ {ehframe_sp, dwarf_sp, LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM,
+ gpr_sp},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"lr",
+ "r14",
+ 4,
+ GPR_OFFSET(14),
+ eEncodingUint,
+ eFormatHex,
+ {ehframe_lr, dwarf_lr, LLDB_REGNUM_GENERIC_RA, LLDB_INVALID_REGNUM,
+ gpr_lr},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"pc",
+ "r15",
+ 4,
+ GPR_OFFSET(15),
+ eEncodingUint,
+ eFormatHex,
+ {ehframe_pc, dwarf_pc, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM,
+ gpr_pc},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"cpsr",
+ "psr",
+ 4,
+ GPR_OFFSET(16),
+ eEncodingUint,
+ eFormatHex,
+ {ehframe_cpsr, dwarf_cpsr, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM,
+ gpr_cpsr},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+
+ {"s0",
+ NULL,
+ 4,
+ FPU_OFFSET(0),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s0, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s0},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"s1",
+ NULL,
+ 4,
+ FPU_OFFSET(1),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s1, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s1},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"s2",
+ NULL,
+ 4,
+ FPU_OFFSET(2),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s2, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s2},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"s3",
+ NULL,
+ 4,
+ FPU_OFFSET(3),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s3, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s3},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"s4",
+ NULL,
+ 4,
+ FPU_OFFSET(4),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s4, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s4},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"s5",
+ NULL,
+ 4,
+ FPU_OFFSET(5),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s5, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s5},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"s6",
+ NULL,
+ 4,
+ FPU_OFFSET(6),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s6, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s6},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"s7",
+ NULL,
+ 4,
+ FPU_OFFSET(7),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s7, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s7},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"s8",
+ NULL,
+ 4,
+ FPU_OFFSET(8),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s8, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s8},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"s9",
+ NULL,
+ 4,
+ FPU_OFFSET(9),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s9, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s9},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"s10",
+ NULL,
+ 4,
+ FPU_OFFSET(10),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s10, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s10},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"s11",
+ NULL,
+ 4,
+ FPU_OFFSET(11),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s11, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s11},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"s12",
+ NULL,
+ 4,
+ FPU_OFFSET(12),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s12, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s12},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"s13",
+ NULL,
+ 4,
+ FPU_OFFSET(13),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s13, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s13},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"s14",
+ NULL,
+ 4,
+ FPU_OFFSET(14),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s14, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s14},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"s15",
+ NULL,
+ 4,
+ FPU_OFFSET(15),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s15, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s15},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"s16",
+ NULL,
+ 4,
+ FPU_OFFSET(16),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s16, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s16},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"s17",
+ NULL,
+ 4,
+ FPU_OFFSET(17),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s17, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s17},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"s18",
+ NULL,
+ 4,
+ FPU_OFFSET(18),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s18, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s18},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"s19",
+ NULL,
+ 4,
+ FPU_OFFSET(19),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s19, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s19},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"s20",
+ NULL,
+ 4,
+ FPU_OFFSET(20),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s20, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s20},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"s21",
+ NULL,
+ 4,
+ FPU_OFFSET(21),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s21, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s21},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"s22",
+ NULL,
+ 4,
+ FPU_OFFSET(22),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s22, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s22},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"s23",
+ NULL,
+ 4,
+ FPU_OFFSET(23),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s23, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s23},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"s24",
+ NULL,
+ 4,
+ FPU_OFFSET(24),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s24, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s24},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"s25",
+ NULL,
+ 4,
+ FPU_OFFSET(25),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s25, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s25},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"s26",
+ NULL,
+ 4,
+ FPU_OFFSET(26),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s26, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s26},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"s27",
+ NULL,
+ 4,
+ FPU_OFFSET(27),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s27, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s27},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"s28",
+ NULL,
+ 4,
+ FPU_OFFSET(28),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s28, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s28},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"s29",
+ NULL,
+ 4,
+ FPU_OFFSET(29),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s29, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s29},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"s30",
+ NULL,
+ 4,
+ FPU_OFFSET(30),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s30, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s30},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"s31",
+ NULL,
+ 4,
+ FPU_OFFSET(31),
+ eEncodingIEEE754,
+ eFormatFloat,
+ {LLDB_INVALID_REGNUM, dwarf_s31, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ fpu_s31},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"fpscr",
+ NULL,
+ 4,
+ FPU_OFFSET(32),
+ eEncodingUint,
+ eFormatHex,
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_fpscr},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+
+ {"exception",
+ NULL,
+ 4,
+ EXC_OFFSET(0),
+ eEncodingUint,
+ eFormatHex,
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, exc_exception},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"fsr",
+ NULL,
+ 4,
+ EXC_OFFSET(1),
+ eEncodingUint,
+ eFormatHex,
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, exc_fsr},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {"far",
+ NULL,
+ 4,
+ EXC_OFFSET(2),
+ eEncodingUint,
+ eFormatHex,
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, exc_far},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+
+ {DEFINE_DBG(bvr, 0)},
+ {DEFINE_DBG(bvr, 1)},
+ {DEFINE_DBG(bvr, 2)},
+ {DEFINE_DBG(bvr, 3)},
+ {DEFINE_DBG(bvr, 4)},
+ {DEFINE_DBG(bvr, 5)},
+ {DEFINE_DBG(bvr, 6)},
+ {DEFINE_DBG(bvr, 7)},
+ {DEFINE_DBG(bvr, 8)},
+ {DEFINE_DBG(bvr, 9)},
+ {DEFINE_DBG(bvr, 10)},
+ {DEFINE_DBG(bvr, 11)},
+ {DEFINE_DBG(bvr, 12)},
+ {DEFINE_DBG(bvr, 13)},
+ {DEFINE_DBG(bvr, 14)},
+ {DEFINE_DBG(bvr, 15)},
+
+ {DEFINE_DBG(bcr, 0)},
+ {DEFINE_DBG(bcr, 1)},
+ {DEFINE_DBG(bcr, 2)},
+ {DEFINE_DBG(bcr, 3)},
+ {DEFINE_DBG(bcr, 4)},
+ {DEFINE_DBG(bcr, 5)},
+ {DEFINE_DBG(bcr, 6)},
+ {DEFINE_DBG(bcr, 7)},
+ {DEFINE_DBG(bcr, 8)},
+ {DEFINE_DBG(bcr, 9)},
+ {DEFINE_DBG(bcr, 10)},
+ {DEFINE_DBG(bcr, 11)},
+ {DEFINE_DBG(bcr, 12)},
+ {DEFINE_DBG(bcr, 13)},
+ {DEFINE_DBG(bcr, 14)},
+ {DEFINE_DBG(bcr, 15)},
+
+ {DEFINE_DBG(wvr, 0)},
+ {DEFINE_DBG(wvr, 1)},
+ {DEFINE_DBG(wvr, 2)},
+ {DEFINE_DBG(wvr, 3)},
+ {DEFINE_DBG(wvr, 4)},
+ {DEFINE_DBG(wvr, 5)},
+ {DEFINE_DBG(wvr, 6)},
+ {DEFINE_DBG(wvr, 7)},
+ {DEFINE_DBG(wvr, 8)},
+ {DEFINE_DBG(wvr, 9)},
+ {DEFINE_DBG(wvr, 10)},
+ {DEFINE_DBG(wvr, 11)},
+ {DEFINE_DBG(wvr, 12)},
+ {DEFINE_DBG(wvr, 13)},
+ {DEFINE_DBG(wvr, 14)},
+ {DEFINE_DBG(wvr, 15)},
+
+ {DEFINE_DBG(wcr, 0)},
+ {DEFINE_DBG(wcr, 1)},
+ {DEFINE_DBG(wcr, 2)},
+ {DEFINE_DBG(wcr, 3)},
+ {DEFINE_DBG(wcr, 4)},
+ {DEFINE_DBG(wcr, 5)},
+ {DEFINE_DBG(wcr, 6)},
+ {DEFINE_DBG(wcr, 7)},
+ {DEFINE_DBG(wcr, 8)},
+ {DEFINE_DBG(wcr, 9)},
+ {DEFINE_DBG(wcr, 10)},
+ {DEFINE_DBG(wcr, 11)},
+ {DEFINE_DBG(wcr, 12)},
+ {DEFINE_DBG(wcr, 13)},
+ {DEFINE_DBG(wcr, 14)},
+ {DEFINE_DBG(wcr, 15)}};
// General purpose registers
-static uint32_t
-g_gpr_regnums[] =
-{
- gpr_r0,
- gpr_r1,
- gpr_r2,
- gpr_r3,
- gpr_r4,
- gpr_r5,
- gpr_r6,
- gpr_r7,
- gpr_r8,
- gpr_r9,
- gpr_r10,
- gpr_r11,
- gpr_r12,
- gpr_sp,
- gpr_lr,
- gpr_pc,
- gpr_cpsr
-};
+static uint32_t g_gpr_regnums[] = {
+ gpr_r0, gpr_r1, gpr_r2, gpr_r3, gpr_r4, gpr_r5, gpr_r6, gpr_r7, gpr_r8,
+ gpr_r9, gpr_r10, gpr_r11, gpr_r12, gpr_sp, gpr_lr, gpr_pc, gpr_cpsr};
// Floating point registers
-static uint32_t
-g_fpu_regnums[] =
-{
- fpu_s0,
- fpu_s1,
- fpu_s2,
- fpu_s3,
- fpu_s4,
- fpu_s5,
- fpu_s6,
- fpu_s7,
- fpu_s8,
- fpu_s9,
- fpu_s10,
- fpu_s11,
- fpu_s12,
- fpu_s13,
- fpu_s14,
- fpu_s15,
- fpu_s16,
- fpu_s17,
- fpu_s18,
- fpu_s19,
- fpu_s20,
- fpu_s21,
- fpu_s22,
- fpu_s23,
- fpu_s24,
- fpu_s25,
- fpu_s26,
- fpu_s27,
- fpu_s28,
- fpu_s29,
- fpu_s30,
- fpu_s31,
- fpu_fpscr,
+static uint32_t g_fpu_regnums[] = {
+ fpu_s0, fpu_s1, fpu_s2, fpu_s3, fpu_s4, fpu_s5, fpu_s6,
+ fpu_s7, fpu_s8, fpu_s9, fpu_s10, fpu_s11, fpu_s12, fpu_s13,
+ fpu_s14, fpu_s15, fpu_s16, fpu_s17, fpu_s18, fpu_s19, fpu_s20,
+ fpu_s21, fpu_s22, fpu_s23, fpu_s24, fpu_s25, fpu_s26, fpu_s27,
+ fpu_s28, fpu_s29, fpu_s30, fpu_s31, fpu_fpscr,
};
// Exception registers
-static uint32_t
-g_exc_regnums[] =
-{
- exc_exception,
- exc_fsr,
- exc_far,
+static uint32_t g_exc_regnums[] = {
+ exc_exception, exc_fsr, exc_far,
};
static size_t k_num_register_infos = llvm::array_lengthof(g_register_infos);
-RegisterContextDarwin_arm::RegisterContextDarwin_arm(Thread &thread, uint32_t concrete_frame_idx) :
- RegisterContext(thread, concrete_frame_idx),
- gpr(),
- fpu(),
- exc()
-{
- uint32_t i;
- for (i=0; i<kNumErrors; i++)
- {
- gpr_errs[i] = -1;
- fpu_errs[i] = -1;
- exc_errs[i] = -1;
- }
-}
-
-RegisterContextDarwin_arm::~RegisterContextDarwin_arm()
-{
+RegisterContextDarwin_arm::RegisterContextDarwin_arm(
+ Thread &thread, uint32_t concrete_frame_idx)
+ : RegisterContext(thread, concrete_frame_idx), gpr(), fpu(), exc() {
+ uint32_t i;
+ for (i = 0; i < kNumErrors; i++) {
+ gpr_errs[i] = -1;
+ fpu_errs[i] = -1;
+ exc_errs[i] = -1;
+ }
}
+RegisterContextDarwin_arm::~RegisterContextDarwin_arm() {}
-void
-RegisterContextDarwin_arm::InvalidateAllRegisters ()
-{
- InvalidateAllRegisterStates();
+void RegisterContextDarwin_arm::InvalidateAllRegisters() {
+ InvalidateAllRegisterStates();
}
-
-size_t
-RegisterContextDarwin_arm::GetRegisterCount ()
-{
- assert(k_num_register_infos == k_num_registers);
- return k_num_registers;
+size_t RegisterContextDarwin_arm::GetRegisterCount() {
+ assert(k_num_register_infos == k_num_registers);
+ return k_num_registers;
}
const RegisterInfo *
-RegisterContextDarwin_arm::GetRegisterInfoAtIndex (size_t reg)
-{
- assert(k_num_register_infos == k_num_registers);
- if (reg < k_num_registers)
- return &g_register_infos[reg];
- return NULL;
+RegisterContextDarwin_arm::GetRegisterInfoAtIndex(size_t reg) {
+ assert(k_num_register_infos == k_num_registers);
+ if (reg < k_num_registers)
+ return &g_register_infos[reg];
+ return NULL;
}
-size_t
-RegisterContextDarwin_arm::GetRegisterInfosCount ()
-{
- return k_num_register_infos;
+size_t RegisterContextDarwin_arm::GetRegisterInfosCount() {
+ return k_num_register_infos;
}
-const RegisterInfo *
-RegisterContextDarwin_arm::GetRegisterInfos ()
-{
- return g_register_infos;
+const RegisterInfo *RegisterContextDarwin_arm::GetRegisterInfos() {
+ return g_register_infos;
}
-
// Number of registers in each register set
const size_t k_num_gpr_registers = llvm::array_lengthof(g_gpr_regnums);
const size_t k_num_fpu_registers = llvm::array_lengthof(g_fpu_regnums);
@@ -449,782 +972,799 @@ const size_t k_num_exc_registers = llvm::array_lengthof(g_exc_regnums);
// of zero is for all registers, followed by other registers sets. The
// register information for the all register set need not be filled in.
//----------------------------------------------------------------------
-static const RegisterSet g_reg_sets[] =
-{
- { "General Purpose Registers", "gpr", k_num_gpr_registers, g_gpr_regnums, },
- { "Floating Point Registers", "fpu", k_num_fpu_registers, g_fpu_regnums },
- { "Exception State Registers", "exc", k_num_exc_registers, g_exc_regnums }
-};
+static const RegisterSet g_reg_sets[] = {
+ {
+ "General Purpose Registers", "gpr", k_num_gpr_registers, g_gpr_regnums,
+ },
+ {"Floating Point Registers", "fpu", k_num_fpu_registers, g_fpu_regnums},
+ {"Exception State Registers", "exc", k_num_exc_registers, g_exc_regnums}};
const size_t k_num_regsets = llvm::array_lengthof(g_reg_sets);
-
-size_t
-RegisterContextDarwin_arm::GetRegisterSetCount ()
-{
- return k_num_regsets;
+size_t RegisterContextDarwin_arm::GetRegisterSetCount() {
+ return k_num_regsets;
}
-const RegisterSet *
-RegisterContextDarwin_arm::GetRegisterSet (size_t reg_set)
-{
- if (reg_set < k_num_regsets)
- return &g_reg_sets[reg_set];
- return NULL;
+const RegisterSet *RegisterContextDarwin_arm::GetRegisterSet(size_t reg_set) {
+ if (reg_set < k_num_regsets)
+ return &g_reg_sets[reg_set];
+ return NULL;
}
-
//----------------------------------------------------------------------
// Register information definitions for 32 bit i386.
//----------------------------------------------------------------------
-int
-RegisterContextDarwin_arm::GetSetForNativeRegNum (int reg)
-{
- if (reg < fpu_s0)
- return GPRRegSet;
- else if (reg < exc_exception)
- return FPURegSet;
- else if (reg < k_num_registers)
- return EXCRegSet;
- return -1;
+int RegisterContextDarwin_arm::GetSetForNativeRegNum(int reg) {
+ if (reg < fpu_s0)
+ return GPRRegSet;
+ else if (reg < exc_exception)
+ return FPURegSet;
+ else if (reg < k_num_registers)
+ return EXCRegSet;
+ return -1;
}
-int
-RegisterContextDarwin_arm::ReadGPR (bool force)
-{
- int set = GPRRegSet;
- if (force || !RegisterSetIsCached(set))
- {
- SetError(set, Read, DoReadGPR(GetThreadID(), set, gpr));
- }
- return GetError(GPRRegSet, Read);
+int RegisterContextDarwin_arm::ReadGPR(bool force) {
+ int set = GPRRegSet;
+ if (force || !RegisterSetIsCached(set)) {
+ SetError(set, Read, DoReadGPR(GetThreadID(), set, gpr));
+ }
+ return GetError(GPRRegSet, Read);
}
-int
-RegisterContextDarwin_arm::ReadFPU (bool force)
-{
- int set = FPURegSet;
- if (force || !RegisterSetIsCached(set))
- {
- SetError(set, Read, DoReadFPU(GetThreadID(), set, fpu));
- }
- return GetError(FPURegSet, Read);
+int RegisterContextDarwin_arm::ReadFPU(bool force) {
+ int set = FPURegSet;
+ if (force || !RegisterSetIsCached(set)) {
+ SetError(set, Read, DoReadFPU(GetThreadID(), set, fpu));
+ }
+ return GetError(FPURegSet, Read);
}
-int
-RegisterContextDarwin_arm::ReadEXC (bool force)
-{
- int set = EXCRegSet;
- if (force || !RegisterSetIsCached(set))
- {
- SetError(set, Read, DoReadEXC(GetThreadID(), set, exc));
- }
- return GetError(EXCRegSet, Read);
+int RegisterContextDarwin_arm::ReadEXC(bool force) {
+ int set = EXCRegSet;
+ if (force || !RegisterSetIsCached(set)) {
+ SetError(set, Read, DoReadEXC(GetThreadID(), set, exc));
+ }
+ return GetError(EXCRegSet, Read);
}
-int
-RegisterContextDarwin_arm::ReadDBG (bool force)
-{
- int set = DBGRegSet;
- if (force || !RegisterSetIsCached(set))
- {
- SetError(set, Read, DoReadDBG(GetThreadID(), set, dbg));
- }
- return GetError(DBGRegSet, Read);
+int RegisterContextDarwin_arm::ReadDBG(bool force) {
+ int set = DBGRegSet;
+ if (force || !RegisterSetIsCached(set)) {
+ SetError(set, Read, DoReadDBG(GetThreadID(), set, dbg));
+ }
+ return GetError(DBGRegSet, Read);
}
-int
-RegisterContextDarwin_arm::WriteGPR ()
-{
- int set = GPRRegSet;
- if (!RegisterSetIsCached(set))
- {
- SetError (set, Write, -1);
- return KERN_INVALID_ARGUMENT;
- }
- SetError (set, Write, DoWriteGPR(GetThreadID(), set, gpr));
- SetError (set, Read, -1);
- return GetError(GPRRegSet, Write);
-}
-
-int
-RegisterContextDarwin_arm::WriteFPU ()
-{
- int set = FPURegSet;
- if (!RegisterSetIsCached(set))
- {
- SetError (set, Write, -1);
- return KERN_INVALID_ARGUMENT;
- }
- SetError (set, Write, DoWriteFPU(GetThreadID(), set, fpu));
- SetError (set, Read, -1);
- return GetError(FPURegSet, Write);
+int RegisterContextDarwin_arm::WriteGPR() {
+ int set = GPRRegSet;
+ if (!RegisterSetIsCached(set)) {
+ SetError(set, Write, -1);
+ return KERN_INVALID_ARGUMENT;
+ }
+ SetError(set, Write, DoWriteGPR(GetThreadID(), set, gpr));
+ SetError(set, Read, -1);
+ return GetError(GPRRegSet, Write);
}
-int
-RegisterContextDarwin_arm::WriteEXC ()
-{
- int set = EXCRegSet;
- if (!RegisterSetIsCached(set))
- {
- SetError (set, Write, -1);
- return KERN_INVALID_ARGUMENT;
- }
- SetError (set, Write, DoWriteEXC(GetThreadID(), set, exc));
- SetError (set, Read, -1);
- return GetError(EXCRegSet, Write);
+int RegisterContextDarwin_arm::WriteFPU() {
+ int set = FPURegSet;
+ if (!RegisterSetIsCached(set)) {
+ SetError(set, Write, -1);
+ return KERN_INVALID_ARGUMENT;
+ }
+ SetError(set, Write, DoWriteFPU(GetThreadID(), set, fpu));
+ SetError(set, Read, -1);
+ return GetError(FPURegSet, Write);
}
-int
-RegisterContextDarwin_arm::WriteDBG ()
-{
- int set = DBGRegSet;
- if (!RegisterSetIsCached(set))
- {
- SetError (set, Write, -1);
- return KERN_INVALID_ARGUMENT;
- }
- SetError (set, Write, DoWriteDBG(GetThreadID(), set, dbg));
- SetError (set, Read, -1);
- return GetError(DBGRegSet, Write);
+int RegisterContextDarwin_arm::WriteEXC() {
+ int set = EXCRegSet;
+ if (!RegisterSetIsCached(set)) {
+ SetError(set, Write, -1);
+ return KERN_INVALID_ARGUMENT;
+ }
+ SetError(set, Write, DoWriteEXC(GetThreadID(), set, exc));
+ SetError(set, Read, -1);
+ return GetError(EXCRegSet, Write);
}
-
-int
-RegisterContextDarwin_arm::ReadRegisterSet (uint32_t set, bool force)
-{
- switch (set)
- {
- case GPRRegSet: return ReadGPR(force);
- case GPRAltRegSet: return ReadGPR(force);
- case FPURegSet: return ReadFPU(force);
- case EXCRegSet: return ReadEXC(force);
- case DBGRegSet: return ReadDBG(force);
- default: break;
- }
+int RegisterContextDarwin_arm::WriteDBG() {
+ int set = DBGRegSet;
+ if (!RegisterSetIsCached(set)) {
+ SetError(set, Write, -1);
return KERN_INVALID_ARGUMENT;
+ }
+ SetError(set, Write, DoWriteDBG(GetThreadID(), set, dbg));
+ SetError(set, Read, -1);
+ return GetError(DBGRegSet, Write);
}
-int
-RegisterContextDarwin_arm::WriteRegisterSet (uint32_t set)
-{
- // Make sure we have a valid context to set.
- if (RegisterSetIsCached(set))
- {
- switch (set)
- {
- case GPRRegSet: return WriteGPR();
- case GPRAltRegSet: return WriteGPR();
- case FPURegSet: return WriteFPU();
- case EXCRegSet: return WriteEXC();
- case DBGRegSet: return WriteDBG();
- default: break;
- }
- }
- return KERN_INVALID_ARGUMENT;
+int RegisterContextDarwin_arm::ReadRegisterSet(uint32_t set, bool force) {
+ switch (set) {
+ case GPRRegSet:
+ return ReadGPR(force);
+ case GPRAltRegSet:
+ return ReadGPR(force);
+ case FPURegSet:
+ return ReadFPU(force);
+ case EXCRegSet:
+ return ReadEXC(force);
+ case DBGRegSet:
+ return ReadDBG(force);
+ default:
+ break;
+ }
+ return KERN_INVALID_ARGUMENT;
}
-void
-RegisterContextDarwin_arm::LogDBGRegisters (Log *log, const DBG& dbg)
-{
- if (log)
- {
- for (uint32_t i=0; i<16; i++)
- log->Printf("BVR%-2u/BCR%-2u = { 0x%8.8x, 0x%8.8x } WVR%-2u/WCR%-2u = { 0x%8.8x, 0x%8.8x }",
- i, i, dbg.bvr[i], dbg.bcr[i],
- i, i, dbg.wvr[i], dbg.wcr[i]);
+int RegisterContextDarwin_arm::WriteRegisterSet(uint32_t set) {
+ // Make sure we have a valid context to set.
+ if (RegisterSetIsCached(set)) {
+ switch (set) {
+ case GPRRegSet:
+ return WriteGPR();
+ case GPRAltRegSet:
+ return WriteGPR();
+ case FPURegSet:
+ return WriteFPU();
+ case EXCRegSet:
+ return WriteEXC();
+ case DBGRegSet:
+ return WriteDBG();
+ default:
+ break;
}
+ }
+ return KERN_INVALID_ARGUMENT;
}
+void RegisterContextDarwin_arm::LogDBGRegisters(Log *log, const DBG &dbg) {
+ if (log) {
+ for (uint32_t i = 0; i < 16; i++)
+ log->Printf("BVR%-2u/BCR%-2u = { 0x%8.8x, 0x%8.8x } WVR%-2u/WCR%-2u = { "
+ "0x%8.8x, 0x%8.8x }",
+ i, i, dbg.bvr[i], dbg.bcr[i], i, i, dbg.wvr[i], dbg.wcr[i]);
+ }
+}
-bool
-RegisterContextDarwin_arm::ReadRegister (const RegisterInfo *reg_info, RegisterValue &value)
-{
- const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
- int set = RegisterContextDarwin_arm::GetSetForNativeRegNum (reg);
-
- if (set == -1)
- return false;
-
- if (ReadRegisterSet(set, false) != KERN_SUCCESS)
- return false;
+bool RegisterContextDarwin_arm::ReadRegister(const RegisterInfo *reg_info,
+ RegisterValue &value) {
+ const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
+ int set = RegisterContextDarwin_arm::GetSetForNativeRegNum(reg);
- switch (reg)
- {
- case gpr_r0:
- case gpr_r1:
- case gpr_r2:
- case gpr_r3:
- case gpr_r4:
- case gpr_r5:
- case gpr_r6:
- case gpr_r7:
- case gpr_r8:
- case gpr_r9:
- case gpr_r10:
- case gpr_r11:
- case gpr_r12:
- case gpr_sp:
- case gpr_lr:
- case gpr_pc:
- case gpr_cpsr:
- value.SetUInt32 (gpr.r[reg - gpr_r0]);
- break;
-
- case fpu_s0:
- case fpu_s1:
- case fpu_s2:
- case fpu_s3:
- case fpu_s4:
- case fpu_s5:
- case fpu_s6:
- case fpu_s7:
- case fpu_s8:
- case fpu_s9:
- case fpu_s10:
- case fpu_s11:
- case fpu_s12:
- case fpu_s13:
- case fpu_s14:
- case fpu_s15:
- case fpu_s16:
- case fpu_s17:
- case fpu_s18:
- case fpu_s19:
- case fpu_s20:
- case fpu_s21:
- case fpu_s22:
- case fpu_s23:
- case fpu_s24:
- case fpu_s25:
- case fpu_s26:
- case fpu_s27:
- case fpu_s28:
- case fpu_s29:
- case fpu_s30:
- case fpu_s31:
- value.SetUInt32 (fpu.floats.s[reg], RegisterValue::eTypeFloat);
- break;
-
- case fpu_fpscr:
- value.SetUInt32 (fpu.fpscr);
- break;
-
- case exc_exception:
- value.SetUInt32 (exc.exception);
- break;
- case exc_fsr:
- value.SetUInt32 (exc.fsr);
- break;
- case exc_far:
- value.SetUInt32 (exc.far);
- break;
+ if (set == -1)
+ return false;
- default:
- value.SetValueToInvalid();
- return false;
+ if (ReadRegisterSet(set, false) != KERN_SUCCESS)
+ return false;
- }
- return true;
+ switch (reg) {
+ case gpr_r0:
+ case gpr_r1:
+ case gpr_r2:
+ case gpr_r3:
+ case gpr_r4:
+ case gpr_r5:
+ case gpr_r6:
+ case gpr_r7:
+ case gpr_r8:
+ case gpr_r9:
+ case gpr_r10:
+ case gpr_r11:
+ case gpr_r12:
+ case gpr_sp:
+ case gpr_lr:
+ case gpr_pc:
+ case gpr_cpsr:
+ value.SetUInt32(gpr.r[reg - gpr_r0]);
+ break;
+
+ case fpu_s0:
+ case fpu_s1:
+ case fpu_s2:
+ case fpu_s3:
+ case fpu_s4:
+ case fpu_s5:
+ case fpu_s6:
+ case fpu_s7:
+ case fpu_s8:
+ case fpu_s9:
+ case fpu_s10:
+ case fpu_s11:
+ case fpu_s12:
+ case fpu_s13:
+ case fpu_s14:
+ case fpu_s15:
+ case fpu_s16:
+ case fpu_s17:
+ case fpu_s18:
+ case fpu_s19:
+ case fpu_s20:
+ case fpu_s21:
+ case fpu_s22:
+ case fpu_s23:
+ case fpu_s24:
+ case fpu_s25:
+ case fpu_s26:
+ case fpu_s27:
+ case fpu_s28:
+ case fpu_s29:
+ case fpu_s30:
+ case fpu_s31:
+ value.SetUInt32(fpu.floats.s[reg], RegisterValue::eTypeFloat);
+ break;
+
+ case fpu_fpscr:
+ value.SetUInt32(fpu.fpscr);
+ break;
+
+ case exc_exception:
+ value.SetUInt32(exc.exception);
+ break;
+ case exc_fsr:
+ value.SetUInt32(exc.fsr);
+ break;
+ case exc_far:
+ value.SetUInt32(exc.far);
+ break;
+
+ default:
+ value.SetValueToInvalid();
+ return false;
+ }
+ return true;
}
+bool RegisterContextDarwin_arm::WriteRegister(const RegisterInfo *reg_info,
+ const RegisterValue &value) {
+ const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
+ int set = GetSetForNativeRegNum(reg);
-bool
-RegisterContextDarwin_arm::WriteRegister (const RegisterInfo *reg_info,
- const RegisterValue &value)
-{
- const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
- int set = GetSetForNativeRegNum (reg);
-
- if (set == -1)
- return false;
-
- if (ReadRegisterSet(set, false) != KERN_SUCCESS)
- return false;
-
- switch (reg)
- {
- case gpr_r0:
- case gpr_r1:
- case gpr_r2:
- case gpr_r3:
- case gpr_r4:
- case gpr_r5:
- case gpr_r6:
- case gpr_r7:
- case gpr_r8:
- case gpr_r9:
- case gpr_r10:
- case gpr_r11:
- case gpr_r12:
- case gpr_sp:
- case gpr_lr:
- case gpr_pc:
- case gpr_cpsr:
- gpr.r[reg - gpr_r0] = value.GetAsUInt32();
- break;
-
- case fpu_s0:
- case fpu_s1:
- case fpu_s2:
- case fpu_s3:
- case fpu_s4:
- case fpu_s5:
- case fpu_s6:
- case fpu_s7:
- case fpu_s8:
- case fpu_s9:
- case fpu_s10:
- case fpu_s11:
- case fpu_s12:
- case fpu_s13:
- case fpu_s14:
- case fpu_s15:
- case fpu_s16:
- case fpu_s17:
- case fpu_s18:
- case fpu_s19:
- case fpu_s20:
- case fpu_s21:
- case fpu_s22:
- case fpu_s23:
- case fpu_s24:
- case fpu_s25:
- case fpu_s26:
- case fpu_s27:
- case fpu_s28:
- case fpu_s29:
- case fpu_s30:
- case fpu_s31:
- fpu.floats.s[reg] = value.GetAsUInt32();
- break;
-
- case fpu_fpscr:
- fpu.fpscr = value.GetAsUInt32();
- break;
-
- case exc_exception:
- exc.exception = value.GetAsUInt32();
- break;
- case exc_fsr:
- exc.fsr = value.GetAsUInt32();
- break;
- case exc_far:
- exc.far = value.GetAsUInt32();
- break;
+ if (set == -1)
+ return false;
- default:
- return false;
+ if (ReadRegisterSet(set, false) != KERN_SUCCESS)
+ return false;
- }
- return WriteRegisterSet(set) == KERN_SUCCESS;
+ switch (reg) {
+ case gpr_r0:
+ case gpr_r1:
+ case gpr_r2:
+ case gpr_r3:
+ case gpr_r4:
+ case gpr_r5:
+ case gpr_r6:
+ case gpr_r7:
+ case gpr_r8:
+ case gpr_r9:
+ case gpr_r10:
+ case gpr_r11:
+ case gpr_r12:
+ case gpr_sp:
+ case gpr_lr:
+ case gpr_pc:
+ case gpr_cpsr:
+ gpr.r[reg - gpr_r0] = value.GetAsUInt32();
+ break;
+
+ case fpu_s0:
+ case fpu_s1:
+ case fpu_s2:
+ case fpu_s3:
+ case fpu_s4:
+ case fpu_s5:
+ case fpu_s6:
+ case fpu_s7:
+ case fpu_s8:
+ case fpu_s9:
+ case fpu_s10:
+ case fpu_s11:
+ case fpu_s12:
+ case fpu_s13:
+ case fpu_s14:
+ case fpu_s15:
+ case fpu_s16:
+ case fpu_s17:
+ case fpu_s18:
+ case fpu_s19:
+ case fpu_s20:
+ case fpu_s21:
+ case fpu_s22:
+ case fpu_s23:
+ case fpu_s24:
+ case fpu_s25:
+ case fpu_s26:
+ case fpu_s27:
+ case fpu_s28:
+ case fpu_s29:
+ case fpu_s30:
+ case fpu_s31:
+ fpu.floats.s[reg] = value.GetAsUInt32();
+ break;
+
+ case fpu_fpscr:
+ fpu.fpscr = value.GetAsUInt32();
+ break;
+
+ case exc_exception:
+ exc.exception = value.GetAsUInt32();
+ break;
+ case exc_fsr:
+ exc.fsr = value.GetAsUInt32();
+ break;
+ case exc_far:
+ exc.far = value.GetAsUInt32();
+ break;
+
+ default:
+ return false;
+ }
+ return WriteRegisterSet(set) == KERN_SUCCESS;
}
-bool
-RegisterContextDarwin_arm::ReadAllRegisterValues (lldb::DataBufferSP &data_sp)
-{
- data_sp.reset (new DataBufferHeap (REG_CONTEXT_SIZE, 0));
- if (data_sp &&
- ReadGPR (false) == KERN_SUCCESS &&
- ReadFPU (false) == KERN_SUCCESS &&
- ReadEXC (false) == KERN_SUCCESS)
- {
- uint8_t *dst = data_sp->GetBytes();
- ::memcpy (dst, &gpr, sizeof(gpr));
- dst += sizeof(gpr);
+bool RegisterContextDarwin_arm::ReadAllRegisterValues(
+ lldb::DataBufferSP &data_sp) {
+ data_sp.reset(new DataBufferHeap(REG_CONTEXT_SIZE, 0));
+ if (data_sp && ReadGPR(false) == KERN_SUCCESS &&
+ ReadFPU(false) == KERN_SUCCESS && ReadEXC(false) == KERN_SUCCESS) {
+ uint8_t *dst = data_sp->GetBytes();
+ ::memcpy(dst, &gpr, sizeof(gpr));
+ dst += sizeof(gpr);
- ::memcpy (dst, &fpu, sizeof(fpu));
- dst += sizeof(gpr);
+ ::memcpy(dst, &fpu, sizeof(fpu));
+ dst += sizeof(gpr);
- ::memcpy (dst, &exc, sizeof(exc));
- return true;
- }
- return false;
+ ::memcpy(dst, &exc, sizeof(exc));
+ return true;
+ }
+ return false;
}
-bool
-RegisterContextDarwin_arm::WriteAllRegisterValues (const lldb::DataBufferSP &data_sp)
-{
- if (data_sp && data_sp->GetByteSize() == REG_CONTEXT_SIZE)
- {
- const uint8_t *src = data_sp->GetBytes();
- ::memcpy (&gpr, src, sizeof(gpr));
- src += sizeof(gpr);
-
- ::memcpy (&fpu, src, sizeof(fpu));
- src += sizeof(gpr);
-
- ::memcpy (&exc, src, sizeof(exc));
- uint32_t success_count = 0;
- if (WriteGPR() == KERN_SUCCESS)
- ++success_count;
- if (WriteFPU() == KERN_SUCCESS)
- ++success_count;
- if (WriteEXC() == KERN_SUCCESS)
- ++success_count;
- return success_count == 3;
- }
- return false;
+bool RegisterContextDarwin_arm::WriteAllRegisterValues(
+ const lldb::DataBufferSP &data_sp) {
+ if (data_sp && data_sp->GetByteSize() == REG_CONTEXT_SIZE) {
+ const uint8_t *src = data_sp->GetBytes();
+ ::memcpy(&gpr, src, sizeof(gpr));
+ src += sizeof(gpr);
+
+ ::memcpy(&fpu, src, sizeof(fpu));
+ src += sizeof(gpr);
+
+ ::memcpy(&exc, src, sizeof(exc));
+ uint32_t success_count = 0;
+ if (WriteGPR() == KERN_SUCCESS)
+ ++success_count;
+ if (WriteFPU() == KERN_SUCCESS)
+ ++success_count;
+ if (WriteEXC() == KERN_SUCCESS)
+ ++success_count;
+ return success_count == 3;
+ }
+ return false;
}
-uint32_t
-RegisterContextDarwin_arm::ConvertRegisterKindToRegisterNumber (lldb::RegisterKind kind, uint32_t reg)
-{
- if (kind == eRegisterKindGeneric)
- {
- switch (reg)
- {
- case LLDB_REGNUM_GENERIC_PC: return gpr_pc;
- case LLDB_REGNUM_GENERIC_SP: return gpr_sp;
- case LLDB_REGNUM_GENERIC_FP: return gpr_r7;
- case LLDB_REGNUM_GENERIC_RA: return gpr_lr;
- case LLDB_REGNUM_GENERIC_FLAGS: return gpr_cpsr;
- default:
- break;
- }
- }
- else if (kind == eRegisterKindDWARF)
- {
- switch (reg)
- {
- case dwarf_r0: return gpr_r0;
- case dwarf_r1: return gpr_r1;
- case dwarf_r2: return gpr_r2;
- case dwarf_r3: return gpr_r3;
- case dwarf_r4: return gpr_r4;
- case dwarf_r5: return gpr_r5;
- case dwarf_r6: return gpr_r6;
- case dwarf_r7: return gpr_r7;
- case dwarf_r8: return gpr_r8;
- case dwarf_r9: return gpr_r9;
- case dwarf_r10: return gpr_r10;
- case dwarf_r11: return gpr_r11;
- case dwarf_r12: return gpr_r12;
- case dwarf_sp: return gpr_sp;
- case dwarf_lr: return gpr_lr;
- case dwarf_pc: return gpr_pc;
- case dwarf_spsr: return gpr_cpsr;
-
- case dwarf_s0: return fpu_s0;
- case dwarf_s1: return fpu_s1;
- case dwarf_s2: return fpu_s2;
- case dwarf_s3: return fpu_s3;
- case dwarf_s4: return fpu_s4;
- case dwarf_s5: return fpu_s5;
- case dwarf_s6: return fpu_s6;
- case dwarf_s7: return fpu_s7;
- case dwarf_s8: return fpu_s8;
- case dwarf_s9: return fpu_s9;
- case dwarf_s10: return fpu_s10;
- case dwarf_s11: return fpu_s11;
- case dwarf_s12: return fpu_s12;
- case dwarf_s13: return fpu_s13;
- case dwarf_s14: return fpu_s14;
- case dwarf_s15: return fpu_s15;
- case dwarf_s16: return fpu_s16;
- case dwarf_s17: return fpu_s17;
- case dwarf_s18: return fpu_s18;
- case dwarf_s19: return fpu_s19;
- case dwarf_s20: return fpu_s20;
- case dwarf_s21: return fpu_s21;
- case dwarf_s22: return fpu_s22;
- case dwarf_s23: return fpu_s23;
- case dwarf_s24: return fpu_s24;
- case dwarf_s25: return fpu_s25;
- case dwarf_s26: return fpu_s26;
- case dwarf_s27: return fpu_s27;
- case dwarf_s28: return fpu_s28;
- case dwarf_s29: return fpu_s29;
- case dwarf_s30: return fpu_s30;
- case dwarf_s31: return fpu_s31;
-
- default:
- break;
- }
+uint32_t RegisterContextDarwin_arm::ConvertRegisterKindToRegisterNumber(
+ lldb::RegisterKind kind, uint32_t reg) {
+ if (kind == eRegisterKindGeneric) {
+ switch (reg) {
+ case LLDB_REGNUM_GENERIC_PC:
+ return gpr_pc;
+ case LLDB_REGNUM_GENERIC_SP:
+ return gpr_sp;
+ case LLDB_REGNUM_GENERIC_FP:
+ return gpr_r7;
+ case LLDB_REGNUM_GENERIC_RA:
+ return gpr_lr;
+ case LLDB_REGNUM_GENERIC_FLAGS:
+ return gpr_cpsr;
+ default:
+ break;
}
- else if (kind == eRegisterKindEHFrame)
- {
- switch (reg)
- {
- case ehframe_r0: return gpr_r0;
- case ehframe_r1: return gpr_r1;
- case ehframe_r2: return gpr_r2;
- case ehframe_r3: return gpr_r3;
- case ehframe_r4: return gpr_r4;
- case ehframe_r5: return gpr_r5;
- case ehframe_r6: return gpr_r6;
- case ehframe_r7: return gpr_r7;
- case ehframe_r8: return gpr_r8;
- case ehframe_r9: return gpr_r9;
- case ehframe_r10: return gpr_r10;
- case ehframe_r11: return gpr_r11;
- case ehframe_r12: return gpr_r12;
- case ehframe_sp: return gpr_sp;
- case ehframe_lr: return gpr_lr;
- case ehframe_pc: return gpr_pc;
- case ehframe_cpsr: return gpr_cpsr;
- }
+ } else if (kind == eRegisterKindDWARF) {
+ switch (reg) {
+ case dwarf_r0:
+ return gpr_r0;
+ case dwarf_r1:
+ return gpr_r1;
+ case dwarf_r2:
+ return gpr_r2;
+ case dwarf_r3:
+ return gpr_r3;
+ case dwarf_r4:
+ return gpr_r4;
+ case dwarf_r5:
+ return gpr_r5;
+ case dwarf_r6:
+ return gpr_r6;
+ case dwarf_r7:
+ return gpr_r7;
+ case dwarf_r8:
+ return gpr_r8;
+ case dwarf_r9:
+ return gpr_r9;
+ case dwarf_r10:
+ return gpr_r10;
+ case dwarf_r11:
+ return gpr_r11;
+ case dwarf_r12:
+ return gpr_r12;
+ case dwarf_sp:
+ return gpr_sp;
+ case dwarf_lr:
+ return gpr_lr;
+ case dwarf_pc:
+ return gpr_pc;
+ case dwarf_spsr:
+ return gpr_cpsr;
+
+ case dwarf_s0:
+ return fpu_s0;
+ case dwarf_s1:
+ return fpu_s1;
+ case dwarf_s2:
+ return fpu_s2;
+ case dwarf_s3:
+ return fpu_s3;
+ case dwarf_s4:
+ return fpu_s4;
+ case dwarf_s5:
+ return fpu_s5;
+ case dwarf_s6:
+ return fpu_s6;
+ case dwarf_s7:
+ return fpu_s7;
+ case dwarf_s8:
+ return fpu_s8;
+ case dwarf_s9:
+ return fpu_s9;
+ case dwarf_s10:
+ return fpu_s10;
+ case dwarf_s11:
+ return fpu_s11;
+ case dwarf_s12:
+ return fpu_s12;
+ case dwarf_s13:
+ return fpu_s13;
+ case dwarf_s14:
+ return fpu_s14;
+ case dwarf_s15:
+ return fpu_s15;
+ case dwarf_s16:
+ return fpu_s16;
+ case dwarf_s17:
+ return fpu_s17;
+ case dwarf_s18:
+ return fpu_s18;
+ case dwarf_s19:
+ return fpu_s19;
+ case dwarf_s20:
+ return fpu_s20;
+ case dwarf_s21:
+ return fpu_s21;
+ case dwarf_s22:
+ return fpu_s22;
+ case dwarf_s23:
+ return fpu_s23;
+ case dwarf_s24:
+ return fpu_s24;
+ case dwarf_s25:
+ return fpu_s25;
+ case dwarf_s26:
+ return fpu_s26;
+ case dwarf_s27:
+ return fpu_s27;
+ case dwarf_s28:
+ return fpu_s28;
+ case dwarf_s29:
+ return fpu_s29;
+ case dwarf_s30:
+ return fpu_s30;
+ case dwarf_s31:
+ return fpu_s31;
+
+ default:
+ break;
}
- else if (kind == eRegisterKindLLDB)
- {
- return reg;
+ } else if (kind == eRegisterKindEHFrame) {
+ switch (reg) {
+ case ehframe_r0:
+ return gpr_r0;
+ case ehframe_r1:
+ return gpr_r1;
+ case ehframe_r2:
+ return gpr_r2;
+ case ehframe_r3:
+ return gpr_r3;
+ case ehframe_r4:
+ return gpr_r4;
+ case ehframe_r5:
+ return gpr_r5;
+ case ehframe_r6:
+ return gpr_r6;
+ case ehframe_r7:
+ return gpr_r7;
+ case ehframe_r8:
+ return gpr_r8;
+ case ehframe_r9:
+ return gpr_r9;
+ case ehframe_r10:
+ return gpr_r10;
+ case ehframe_r11:
+ return gpr_r11;
+ case ehframe_r12:
+ return gpr_r12;
+ case ehframe_sp:
+ return gpr_sp;
+ case ehframe_lr:
+ return gpr_lr;
+ case ehframe_pc:
+ return gpr_pc;
+ case ehframe_cpsr:
+ return gpr_cpsr;
}
- return LLDB_INVALID_REGNUM;
+ } else if (kind == eRegisterKindLLDB) {
+ return reg;
+ }
+ return LLDB_INVALID_REGNUM;
}
-
-uint32_t
-RegisterContextDarwin_arm::NumSupportedHardwareBreakpoints ()
-{
-#if defined (__arm__)
- // Set the init value to something that will let us know that we need to
- // autodetect how many breakpoints are supported dynamically...
- static uint32_t g_num_supported_hw_breakpoints = UINT32_MAX;
- if (g_num_supported_hw_breakpoints == UINT32_MAX)
- {
- // Set this to zero in case we can't tell if there are any HW breakpoints
- g_num_supported_hw_breakpoints = 0;
-
- uint32_t register_DBGDIDR;
-
- asm("mrc p14, 0, %0, c0, c0, 0" : "=r" (register_DBGDIDR));
- g_num_supported_hw_breakpoints = Bits32 (register_DBGDIDR, 27, 24);
- // Zero is reserved for the BRP count, so don't increment it if it is zero
- if (g_num_supported_hw_breakpoints > 0)
- g_num_supported_hw_breakpoints++;
-// if (log) log->Printf ("DBGDIDR=0x%8.8x (number BRP pairs = %u)", register_DBGDIDR, g_num_supported_hw_breakpoints);
-
- }
- return g_num_supported_hw_breakpoints;
+uint32_t RegisterContextDarwin_arm::NumSupportedHardwareBreakpoints() {
+#if defined(__arm__)
+ // Set the init value to something that will let us know that we need to
+ // autodetect how many breakpoints are supported dynamically...
+ static uint32_t g_num_supported_hw_breakpoints = UINT32_MAX;
+ if (g_num_supported_hw_breakpoints == UINT32_MAX) {
+ // Set this to zero in case we can't tell if there are any HW breakpoints
+ g_num_supported_hw_breakpoints = 0;
+
+ uint32_t register_DBGDIDR;
+
+ asm("mrc p14, 0, %0, c0, c0, 0" : "=r"(register_DBGDIDR));
+ g_num_supported_hw_breakpoints = Bits32(register_DBGDIDR, 27, 24);
+ // Zero is reserved for the BRP count, so don't increment it if it is zero
+ if (g_num_supported_hw_breakpoints > 0)
+ g_num_supported_hw_breakpoints++;
+ // if (log) log->Printf ("DBGDIDR=0x%8.8x (number BRP pairs = %u)",
+ // register_DBGDIDR, g_num_supported_hw_breakpoints);
+ }
+ return g_num_supported_hw_breakpoints;
#else
- // TODO: figure out remote case here!
- return 6;
+ // TODO: figure out remote case here!
+ return 6;
#endif
}
-uint32_t
-RegisterContextDarwin_arm::SetHardwareBreakpoint (lldb::addr_t addr, size_t size)
-{
- // Make sure our address isn't bogus
- if (addr & 1)
- return LLDB_INVALID_INDEX32;
+uint32_t RegisterContextDarwin_arm::SetHardwareBreakpoint(lldb::addr_t addr,
+ size_t size) {
+ // Make sure our address isn't bogus
+ if (addr & 1)
+ return LLDB_INVALID_INDEX32;
- int kret = ReadDBG (false);
+ int kret = ReadDBG(false);
- if (kret == KERN_SUCCESS)
- {
- const uint32_t num_hw_breakpoints = NumSupportedHardwareBreakpoints();
- uint32_t i;
- for (i=0; i<num_hw_breakpoints; ++i)
- {
- if ((dbg.bcr[i] & BCR_ENABLE) == 0)
- break; // We found an available hw breakpoint slot (in i)
- }
-
- // See if we found an available hw breakpoint slot above
- if (i < num_hw_breakpoints)
- {
- // Make sure bits 1:0 are clear in our address
- dbg.bvr[i] = addr & ~((lldb::addr_t)3);
-
- if (size == 2 || addr & 2)
- {
- uint32_t byte_addr_select = (addr & 2) ? BAS_IMVA_2_3 : BAS_IMVA_0_1;
-
- // We have a thumb breakpoint
- // We have an ARM breakpoint
- dbg.bcr[i] = BCR_M_IMVA_MATCH | // Stop on address mismatch
- byte_addr_select | // Set the correct byte address select so we only trigger on the correct opcode
- S_USER | // Which modes should this breakpoint stop in?
- BCR_ENABLE; // Enable this hardware breakpoint
-// if (log) log->Printf ("RegisterContextDarwin_arm::EnableHardwareBreakpoint( addr = %8.8p, size = %u ) - BVR%u/BCR%u = 0x%8.8x / 0x%8.8x (Thumb)",
-// addr,
-// size,
-// i,
-// i,
-// dbg.bvr[i],
-// dbg.bcr[i]);
- }
- else if (size == 4)
- {
- // We have an ARM breakpoint
- dbg.bcr[i] = BCR_M_IMVA_MATCH | // Stop on address mismatch
- BAS_IMVA_ALL | // Stop on any of the four bytes following the IMVA
- S_USER | // Which modes should this breakpoint stop in?
- BCR_ENABLE; // Enable this hardware breakpoint
-// if (log) log->Printf ("RegisterContextDarwin_arm::EnableHardwareBreakpoint( addr = %8.8p, size = %u ) - BVR%u/BCR%u = 0x%8.8x / 0x%8.8x (ARM)",
-// addr,
-// size,
-// i,
-// i,
-// dbg.bvr[i],
-// dbg.bcr[i]);
- }
-
- kret = WriteDBG();
-// if (log) log->Printf ("RegisterContextDarwin_arm::EnableHardwareBreakpoint() WriteDBG() => 0x%8.8x.", kret);
-
- if (kret == KERN_SUCCESS)
- return i;
- }
-// else
-// {
-// if (log) log->Printf ("RegisterContextDarwin_arm::EnableHardwareBreakpoint(addr = %8.8p, size = %u) => all hardware breakpoint resources are being used.", addr, size);
-// }
+ if (kret == KERN_SUCCESS) {
+ const uint32_t num_hw_breakpoints = NumSupportedHardwareBreakpoints();
+ uint32_t i;
+ for (i = 0; i < num_hw_breakpoints; ++i) {
+ if ((dbg.bcr[i] & BCR_ENABLE) == 0)
+ break; // We found an available hw breakpoint slot (in i)
}
- return LLDB_INVALID_INDEX32;
+ // See if we found an available hw breakpoint slot above
+ if (i < num_hw_breakpoints) {
+ // Make sure bits 1:0 are clear in our address
+ dbg.bvr[i] = addr & ~((lldb::addr_t)3);
+
+ if (size == 2 || addr & 2) {
+ uint32_t byte_addr_select = (addr & 2) ? BAS_IMVA_2_3 : BAS_IMVA_0_1;
+
+ // We have a thumb breakpoint
+ // We have an ARM breakpoint
+ dbg.bcr[i] = BCR_M_IMVA_MATCH | // Stop on address mismatch
+ byte_addr_select | // Set the correct byte address select
+ // so we only trigger on the correct
+ // opcode
+ S_USER | // Which modes should this breakpoint stop in?
+ BCR_ENABLE; // Enable this hardware breakpoint
+ // if (log) log->Printf
+ // ("RegisterContextDarwin_arm::EnableHardwareBreakpoint(
+ // addr = %8.8p, size = %u ) - BVR%u/BCR%u = 0x%8.8x /
+ // 0x%8.8x (Thumb)",
+ // addr,
+ // size,
+ // i,
+ // i,
+ // dbg.bvr[i],
+ // dbg.bcr[i]);
+ } else if (size == 4) {
+ // We have an ARM breakpoint
+ dbg.bcr[i] =
+ BCR_M_IMVA_MATCH | // Stop on address mismatch
+ BAS_IMVA_ALL | // Stop on any of the four bytes following the IMVA
+ S_USER | // Which modes should this breakpoint stop in?
+ BCR_ENABLE; // Enable this hardware breakpoint
+ // if (log) log->Printf
+ // ("RegisterContextDarwin_arm::EnableHardwareBreakpoint(
+ // addr = %8.8p, size = %u ) - BVR%u/BCR%u = 0x%8.8x /
+ // 0x%8.8x (ARM)",
+ // addr,
+ // size,
+ // i,
+ // i,
+ // dbg.bvr[i],
+ // dbg.bcr[i]);
+ }
+
+ kret = WriteDBG();
+ // if (log) log->Printf
+ // ("RegisterContextDarwin_arm::EnableHardwareBreakpoint()
+ // WriteDBG() => 0x%8.8x.", kret);
+
+ if (kret == KERN_SUCCESS)
+ return i;
+ }
+ // else
+ // {
+ // if (log) log->Printf
+ // ("RegisterContextDarwin_arm::EnableHardwareBreakpoint(addr =
+ // %8.8p, size = %u) => all hardware breakpoint resources are
+ // being used.", addr, size);
+ // }
+ }
+
+ return LLDB_INVALID_INDEX32;
}
-bool
-RegisterContextDarwin_arm::ClearHardwareBreakpoint (uint32_t hw_index)
-{
- int kret = ReadDBG (false);
-
- const uint32_t num_hw_points = NumSupportedHardwareBreakpoints();
- if (kret == KERN_SUCCESS)
- {
- if (hw_index < num_hw_points)
- {
- dbg.bcr[hw_index] = 0;
-// if (log) log->Printf ("RegisterContextDarwin_arm::SetHardwareBreakpoint( %u ) - BVR%u = 0x%8.8x BCR%u = 0x%8.8x",
-// hw_index,
-// hw_index,
-// dbg.bvr[hw_index],
-// hw_index,
-// dbg.bcr[hw_index]);
-
- kret = WriteDBG();
-
- if (kret == KERN_SUCCESS)
- return true;
- }
+bool RegisterContextDarwin_arm::ClearHardwareBreakpoint(uint32_t hw_index) {
+ int kret = ReadDBG(false);
+
+ const uint32_t num_hw_points = NumSupportedHardwareBreakpoints();
+ if (kret == KERN_SUCCESS) {
+ if (hw_index < num_hw_points) {
+ dbg.bcr[hw_index] = 0;
+ // if (log) log->Printf
+ // ("RegisterContextDarwin_arm::SetHardwareBreakpoint( %u ) -
+ // BVR%u = 0x%8.8x BCR%u = 0x%8.8x",
+ // hw_index,
+ // hw_index,
+ // dbg.bvr[hw_index],
+ // hw_index,
+ // dbg.bcr[hw_index]);
+
+ kret = WriteDBG();
+
+ if (kret == KERN_SUCCESS)
+ return true;
}
- return false;
+ }
+ return false;
}
-uint32_t
-RegisterContextDarwin_arm::NumSupportedHardwareWatchpoints ()
-{
-#if defined (__arm__)
- // Set the init value to something that will let us know that we need to
- // autodetect how many watchpoints are supported dynamically...
- static uint32_t g_num_supported_hw_watchpoints = UINT32_MAX;
- if (g_num_supported_hw_watchpoints == UINT32_MAX)
- {
- // Set this to zero in case we can't tell if there are any HW breakpoints
- g_num_supported_hw_watchpoints = 0;
-
- uint32_t register_DBGDIDR;
- asm("mrc p14, 0, %0, c0, c0, 0" : "=r" (register_DBGDIDR));
- g_num_supported_hw_watchpoints = Bits32 (register_DBGDIDR, 31, 28) + 1;
-// if (log) log->Printf ("DBGDIDR=0x%8.8x (number WRP pairs = %u)", register_DBGDIDR, g_num_supported_hw_watchpoints);
- }
- return g_num_supported_hw_watchpoints;
+uint32_t RegisterContextDarwin_arm::NumSupportedHardwareWatchpoints() {
+#if defined(__arm__)
+ // Set the init value to something that will let us know that we need to
+ // autodetect how many watchpoints are supported dynamically...
+ static uint32_t g_num_supported_hw_watchpoints = UINT32_MAX;
+ if (g_num_supported_hw_watchpoints == UINT32_MAX) {
+ // Set this to zero in case we can't tell if there are any HW breakpoints
+ g_num_supported_hw_watchpoints = 0;
+
+ uint32_t register_DBGDIDR;
+ asm("mrc p14, 0, %0, c0, c0, 0" : "=r"(register_DBGDIDR));
+ g_num_supported_hw_watchpoints = Bits32(register_DBGDIDR, 31, 28) + 1;
+ // if (log) log->Printf ("DBGDIDR=0x%8.8x (number WRP pairs = %u)",
+ // register_DBGDIDR, g_num_supported_hw_watchpoints);
+ }
+ return g_num_supported_hw_watchpoints;
#else
- // TODO: figure out remote case here!
- return 2;
+ // TODO: figure out remote case here!
+ return 2;
#endif
}
+uint32_t RegisterContextDarwin_arm::SetHardwareWatchpoint(lldb::addr_t addr,
+ size_t size,
+ bool read,
+ bool write) {
+ // if (log) log->Printf
+ // ("RegisterContextDarwin_arm::EnableHardwareWatchpoint(addr = %8.8p, size
+ // = %u, read = %u, write = %u)", addr, size, read, write);
-uint32_t
-RegisterContextDarwin_arm::SetHardwareWatchpoint (lldb::addr_t addr, size_t size, bool read, bool write)
-{
-// if (log) log->Printf ("RegisterContextDarwin_arm::EnableHardwareWatchpoint(addr = %8.8p, size = %u, read = %u, write = %u)", addr, size, read, write);
+ const uint32_t num_hw_watchpoints = NumSupportedHardwareWatchpoints();
- const uint32_t num_hw_watchpoints = NumSupportedHardwareWatchpoints();
+ // Can't watch zero bytes
+ if (size == 0)
+ return LLDB_INVALID_INDEX32;
- // Can't watch zero bytes
- if (size == 0)
- return LLDB_INVALID_INDEX32;
+ // We must watch for either read or write
+ if (read == false && write == false)
+ return LLDB_INVALID_INDEX32;
- // We must watch for either read or write
- if (read == false && write == false)
- return LLDB_INVALID_INDEX32;
+ // Can't watch more than 4 bytes per WVR/WCR pair
+ if (size > 4)
+ return LLDB_INVALID_INDEX32;
- // Can't watch more than 4 bytes per WVR/WCR pair
- if (size > 4)
- return LLDB_INVALID_INDEX32;
+ // We can only watch up to four bytes that follow a 4 byte aligned address
+ // per watchpoint register pair. Since we have at most so we can only watch
+ // until the next 4 byte boundary and we need to make sure we can properly
+ // encode this.
+ uint32_t addr_word_offset = addr % 4;
+ // if (log) log->Printf
+ // ("RegisterContextDarwin_arm::EnableHardwareWatchpoint() -
+ // addr_word_offset = 0x%8.8x", addr_word_offset);
+
+ uint32_t byte_mask = ((1u << size) - 1u) << addr_word_offset;
+ // if (log) log->Printf
+ // ("RegisterContextDarwin_arm::EnableHardwareWatchpoint() - byte_mask =
+ // 0x%8.8x", byte_mask);
+ if (byte_mask > 0xfu)
+ return LLDB_INVALID_INDEX32;
- // We can only watch up to four bytes that follow a 4 byte aligned address
- // per watchpoint register pair. Since we have at most so we can only watch
- // until the next 4 byte boundary and we need to make sure we can properly
- // encode this.
- uint32_t addr_word_offset = addr % 4;
-// if (log) log->Printf ("RegisterContextDarwin_arm::EnableHardwareWatchpoint() - addr_word_offset = 0x%8.8x", addr_word_offset);
+ // Read the debug state
+ int kret = ReadDBG(false);
- uint32_t byte_mask = ((1u << size) - 1u) << addr_word_offset;
-// if (log) log->Printf ("RegisterContextDarwin_arm::EnableHardwareWatchpoint() - byte_mask = 0x%8.8x", byte_mask);
- if (byte_mask > 0xfu)
- return LLDB_INVALID_INDEX32;
+ if (kret == KERN_SUCCESS) {
+ // Check to make sure we have the needed hardware support
+ uint32_t i = 0;
- // Read the debug state
- int kret = ReadDBG (false);
+ for (i = 0; i < num_hw_watchpoints; ++i) {
+ if ((dbg.wcr[i] & WCR_ENABLE) == 0)
+ break; // We found an available hw breakpoint slot (in i)
+ }
- if (kret == KERN_SUCCESS)
- {
- // Check to make sure we have the needed hardware support
- uint32_t i = 0;
-
- for (i=0; i<num_hw_watchpoints; ++i)
- {
- if ((dbg.wcr[i] & WCR_ENABLE) == 0)
- break; // We found an available hw breakpoint slot (in i)
- }
-
- // See if we found an available hw breakpoint slot above
- if (i < num_hw_watchpoints)
- {
- // Make the byte_mask into a valid Byte Address Select mask
- uint32_t byte_address_select = byte_mask << 5;
- // Make sure bits 1:0 are clear in our address
- dbg.wvr[i] = addr & ~((lldb::addr_t)3);
- dbg.wcr[i] = byte_address_select | // Which bytes that follow the IMVA that we will watch
- S_USER | // Stop only in user mode
- (read ? WCR_LOAD : 0) | // Stop on read access?
- (write ? WCR_STORE : 0) | // Stop on write access?
- WCR_ENABLE; // Enable this watchpoint;
-
- kret = WriteDBG();
-// if (log) log->Printf ("RegisterContextDarwin_arm::EnableHardwareWatchpoint() WriteDBG() => 0x%8.8x.", kret);
-
- if (kret == KERN_SUCCESS)
- return i;
- }
- else
- {
-// if (log) log->Printf ("RegisterContextDarwin_arm::EnableHardwareWatchpoint(): All hardware resources (%u) are in use.", num_hw_watchpoints);
- }
+ // See if we found an available hw breakpoint slot above
+ if (i < num_hw_watchpoints) {
+ // Make the byte_mask into a valid Byte Address Select mask
+ uint32_t byte_address_select = byte_mask << 5;
+ // Make sure bits 1:0 are clear in our address
+ dbg.wvr[i] = addr & ~((lldb::addr_t)3);
+ dbg.wcr[i] = byte_address_select | // Which bytes that follow the IMVA
+ // that we will watch
+ S_USER | // Stop only in user mode
+ (read ? WCR_LOAD : 0) | // Stop on read access?
+ (write ? WCR_STORE : 0) | // Stop on write access?
+ WCR_ENABLE; // Enable this watchpoint;
+
+ kret = WriteDBG();
+ // if (log) log->Printf
+ // ("RegisterContextDarwin_arm::EnableHardwareWatchpoint()
+ // WriteDBG() => 0x%8.8x.", kret);
+
+ if (kret == KERN_SUCCESS)
+ return i;
+ } else {
+ // if (log) log->Printf
+ // ("RegisterContextDarwin_arm::EnableHardwareWatchpoint(): All
+ // hardware resources (%u) are in use.", num_hw_watchpoints);
}
- return LLDB_INVALID_INDEX32;
+ }
+ return LLDB_INVALID_INDEX32;
}
-bool
-RegisterContextDarwin_arm::ClearHardwareWatchpoint (uint32_t hw_index)
-{
- int kret = ReadDBG (false);
-
- const uint32_t num_hw_points = NumSupportedHardwareWatchpoints();
- if (kret == KERN_SUCCESS)
- {
- if (hw_index < num_hw_points)
- {
- dbg.wcr[hw_index] = 0;
-// if (log) log->Printf ("RegisterContextDarwin_arm::ClearHardwareWatchpoint( %u ) - WVR%u = 0x%8.8x WCR%u = 0x%8.8x",
-// hw_index,
-// hw_index,
-// dbg.wvr[hw_index],
-// hw_index,
-// dbg.wcr[hw_index]);
-
- kret = WriteDBG();
-
- if (kret == KERN_SUCCESS)
- return true;
- }
+bool RegisterContextDarwin_arm::ClearHardwareWatchpoint(uint32_t hw_index) {
+ int kret = ReadDBG(false);
+
+ const uint32_t num_hw_points = NumSupportedHardwareWatchpoints();
+ if (kret == KERN_SUCCESS) {
+ if (hw_index < num_hw_points) {
+ dbg.wcr[hw_index] = 0;
+ // if (log) log->Printf
+ // ("RegisterContextDarwin_arm::ClearHardwareWatchpoint( %u ) -
+ // WVR%u = 0x%8.8x WCR%u = 0x%8.8x",
+ // hw_index,
+ // hw_index,
+ // dbg.wvr[hw_index],
+ // hw_index,
+ // dbg.wcr[hw_index]);
+
+ kret = WriteDBG();
+
+ if (kret == KERN_SUCCESS)
+ return true;
}
- return false;
+ }
+ return false;
}
#endif
diff --git a/source/Plugins/Process/Utility/RegisterContextDarwin_arm.h b/source/Plugins/Process/Utility/RegisterContextDarwin_arm.h
index 4e831b5a8da7..cdf3479dff69 100644
--- a/source/Plugins/Process/Utility/RegisterContextDarwin_arm.h
+++ b/source/Plugins/Process/Utility/RegisterContextDarwin_arm.h
@@ -14,317 +14,256 @@
// C++ Includes
// Other libraries and framework includes
// Project includes
-#include "lldb/lldb-private.h"
#include "lldb/Target/RegisterContext.h"
+#include "lldb/lldb-private.h"
// BCR address match type
-#define BCR_M_IMVA_MATCH ((uint32_t)(0u << 21))
-#define BCR_M_CONTEXT_ID_MATCH ((uint32_t)(1u << 21))
-#define BCR_M_IMVA_MISMATCH ((uint32_t)(2u << 21))
-#define BCR_M_RESERVED ((uint32_t)(3u << 21))
+#define BCR_M_IMVA_MATCH ((uint32_t)(0u << 21))
+#define BCR_M_CONTEXT_ID_MATCH ((uint32_t)(1u << 21))
+#define BCR_M_IMVA_MISMATCH ((uint32_t)(2u << 21))
+#define BCR_M_RESERVED ((uint32_t)(3u << 21))
// Link a BVR/BCR or WVR/WCR pair to another
-#define E_ENABLE_LINKING ((uint32_t)(1u << 20))
+#define E_ENABLE_LINKING ((uint32_t)(1u << 20))
// Byte Address Select
-#define BAS_IMVA_PLUS_0 ((uint32_t)(1u << 5))
-#define BAS_IMVA_PLUS_1 ((uint32_t)(1u << 6))
-#define BAS_IMVA_PLUS_2 ((uint32_t)(1u << 7))
-#define BAS_IMVA_PLUS_3 ((uint32_t)(1u << 8))
-#define BAS_IMVA_0_1 ((uint32_t)(3u << 5))
-#define BAS_IMVA_2_3 ((uint32_t)(3u << 7))
-#define BAS_IMVA_ALL ((uint32_t)(0xfu << 5))
+#define BAS_IMVA_PLUS_0 ((uint32_t)(1u << 5))
+#define BAS_IMVA_PLUS_1 ((uint32_t)(1u << 6))
+#define BAS_IMVA_PLUS_2 ((uint32_t)(1u << 7))
+#define BAS_IMVA_PLUS_3 ((uint32_t)(1u << 8))
+#define BAS_IMVA_0_1 ((uint32_t)(3u << 5))
+#define BAS_IMVA_2_3 ((uint32_t)(3u << 7))
+#define BAS_IMVA_ALL ((uint32_t)(0xfu << 5))
// Break only in privileged or user mode
-#define S_RSVD ((uint32_t)(0u << 1))
-#define S_PRIV ((uint32_t)(1u << 1))
-#define S_USER ((uint32_t)(2u << 1))
-#define S_PRIV_USER ((S_PRIV) | (S_USER))
+#define S_RSVD ((uint32_t)(0u << 1))
+#define S_PRIV ((uint32_t)(1u << 1))
+#define S_USER ((uint32_t)(2u << 1))
+#define S_PRIV_USER ((S_PRIV) | (S_USER))
-#define BCR_ENABLE ((uint32_t)(1u))
-#define WCR_ENABLE ((uint32_t)(1u))
+#define BCR_ENABLE ((uint32_t)(1u))
+#define WCR_ENABLE ((uint32_t)(1u))
// Watchpoint load/store
-#define WCR_LOAD ((uint32_t)(1u << 3))
-#define WCR_STORE ((uint32_t)(1u << 4))
+#define WCR_LOAD ((uint32_t)(1u << 3))
+#define WCR_STORE ((uint32_t)(1u << 4))
-class RegisterContextDarwin_arm : public lldb_private::RegisterContext
-{
+class RegisterContextDarwin_arm : public lldb_private::RegisterContext {
public:
- RegisterContextDarwin_arm(lldb_private::Thread &thread, uint32_t concrete_frame_idx);
+ RegisterContextDarwin_arm(lldb_private::Thread &thread,
+ uint32_t concrete_frame_idx);
- ~RegisterContextDarwin_arm() override;
+ ~RegisterContextDarwin_arm() override;
- void
- InvalidateAllRegisters() override;
+ void InvalidateAllRegisters() override;
- size_t
- GetRegisterCount() override;
+ size_t GetRegisterCount() override;
- const lldb_private::RegisterInfo *
- GetRegisterInfoAtIndex(size_t reg) override;
+ const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
- size_t
- GetRegisterSetCount() override;
+ size_t GetRegisterSetCount() override;
- const lldb_private::RegisterSet *
- GetRegisterSet(size_t set) override;
+ const lldb_private::RegisterSet *GetRegisterSet(size_t set) override;
- bool
- ReadRegister(const lldb_private::RegisterInfo *reg_info,
- lldb_private::RegisterValue &reg_value) override;
-
- bool
- WriteRegister(const lldb_private::RegisterInfo *reg_info,
- const lldb_private::RegisterValue &reg_value) override;
-
- bool
- ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
+ bool ReadRegister(const lldb_private::RegisterInfo *reg_info,
+ lldb_private::RegisterValue &reg_value) override;
- bool
- WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
+ bool WriteRegister(const lldb_private::RegisterInfo *reg_info,
+ const lldb_private::RegisterValue &reg_value) override;
- uint32_t
- ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override;
+ bool ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
- uint32_t
- NumSupportedHardwareBreakpoints() override;
+ bool WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
- uint32_t
- SetHardwareBreakpoint(lldb::addr_t addr, size_t size) override;
+ uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
+ uint32_t num) override;
- bool
- ClearHardwareBreakpoint(uint32_t hw_idx) override;
+ uint32_t NumSupportedHardwareBreakpoints() override;
- uint32_t
- NumSupportedHardwareWatchpoints() override;
+ uint32_t SetHardwareBreakpoint(lldb::addr_t addr, size_t size) override;
- uint32_t
- SetHardwareWatchpoint(lldb::addr_t addr, size_t size, bool read, bool write) override;
+ bool ClearHardwareBreakpoint(uint32_t hw_idx) override;
- bool
- ClearHardwareWatchpoint(uint32_t hw_index) override;
+ uint32_t NumSupportedHardwareWatchpoints() override;
- struct GPR
- {
- uint32_t r[16]; // R0-R15
- uint32_t cpsr; // CPSR
- };
+ uint32_t SetHardwareWatchpoint(lldb::addr_t addr, size_t size, bool read,
+ bool write) override;
- struct QReg
- {
- uint8_t bytes[16];
- };
+ bool ClearHardwareWatchpoint(uint32_t hw_index) override;
- struct FPU
- {
- union {
- uint32_t s[32];
- uint64_t d[32];
- QReg q[16]; // the 128-bit NEON registers
- } floats;
- uint32_t fpscr;
- };
+ struct GPR {
+ uint32_t r[16]; // R0-R15
+ uint32_t cpsr; // CPSR
+ };
-// struct NeonReg
-// {
-// uint8_t bytes[16];
-// };
-//
-// struct VFPv3
-// {
-// union {
-// uint32_t s[32];
-// uint64_t d[32];
-// NeonReg q[16];
-// } v3;
-// uint32_t fpscr;
-// };
-
- struct EXC
- {
- uint32_t exception;
- uint32_t fsr; /* Fault status */
- uint32_t far; /* Virtual Fault Address */
- };
-
- struct DBG
- {
- uint32_t bvr[16];
- uint32_t bcr[16];
- uint32_t wvr[16];
- uint32_t wcr[16];
- };
-
- static void
- LogDBGRegisters (lldb_private::Log *log, const DBG& dbg);
+ struct QReg {
+ uint8_t bytes[16];
+ };
+
+ struct FPU {
+ union {
+ uint32_t s[32];
+ uint64_t d[32];
+ QReg q[16]; // the 128-bit NEON registers
+ } floats;
+ uint32_t fpscr;
+ };
+
+ // struct NeonReg
+ // {
+ // uint8_t bytes[16];
+ // };
+ //
+ // struct VFPv3
+ // {
+ // union {
+ // uint32_t s[32];
+ // uint64_t d[32];
+ // NeonReg q[16];
+ // } v3;
+ // uint32_t fpscr;
+ // };
+
+ struct EXC {
+ uint32_t exception;
+ uint32_t fsr; /* Fault status */
+ uint32_t far; /* Virtual Fault Address */
+ };
+
+ struct DBG {
+ uint32_t bvr[16];
+ uint32_t bcr[16];
+ uint32_t wvr[16];
+ uint32_t wcr[16];
+ };
+
+ static void LogDBGRegisters(lldb_private::Log *log, const DBG &dbg);
protected:
- enum
- {
- GPRRegSet = 1, // ARM_THREAD_STATE
- GPRAltRegSet = 9, // ARM_THREAD_STATE32
- FPURegSet = 2, // ARM_VFP_STATE
- EXCRegSet = 3, // ARM_EXCEPTION_STATE
- DBGRegSet = 4 // ARM_DEBUG_STATE
- };
-
- enum
- {
- GPRWordCount = sizeof(GPR)/sizeof(uint32_t),
- FPUWordCount = sizeof(FPU)/sizeof(uint32_t),
- EXCWordCount = sizeof(EXC)/sizeof(uint32_t),
- DBGWordCount = sizeof(DBG)/sizeof(uint32_t)
- };
-
- enum
- {
- Read = 0,
- Write = 1,
- kNumErrors = 2
- };
-
- GPR gpr;
- FPU fpu;
- EXC exc;
- DBG dbg;
- int gpr_errs[2]; // Read/Write errors
- int fpu_errs[2]; // Read/Write errors
- int exc_errs[2]; // Read/Write errors
- int dbg_errs[2]; // Read/Write errors
-
- void
- InvalidateAllRegisterStates()
- {
- SetError (GPRRegSet, Read, -1);
- SetError (FPURegSet, Read, -1);
- SetError (EXCRegSet, Read, -1);
+ enum {
+ GPRRegSet = 1, // ARM_THREAD_STATE
+ GPRAltRegSet = 9, // ARM_THREAD_STATE32
+ FPURegSet = 2, // ARM_VFP_STATE
+ EXCRegSet = 3, // ARM_EXCEPTION_STATE
+ DBGRegSet = 4 // ARM_DEBUG_STATE
+ };
+
+ enum {
+ GPRWordCount = sizeof(GPR) / sizeof(uint32_t),
+ FPUWordCount = sizeof(FPU) / sizeof(uint32_t),
+ EXCWordCount = sizeof(EXC) / sizeof(uint32_t),
+ DBGWordCount = sizeof(DBG) / sizeof(uint32_t)
+ };
+
+ enum { Read = 0, Write = 1, kNumErrors = 2 };
+
+ GPR gpr;
+ FPU fpu;
+ EXC exc;
+ DBG dbg;
+ int gpr_errs[2]; // Read/Write errors
+ int fpu_errs[2]; // Read/Write errors
+ int exc_errs[2]; // Read/Write errors
+ int dbg_errs[2]; // Read/Write errors
+
+ void InvalidateAllRegisterStates() {
+ SetError(GPRRegSet, Read, -1);
+ SetError(FPURegSet, Read, -1);
+ SetError(EXCRegSet, Read, -1);
+ }
+
+ int GetError(int flavor, uint32_t err_idx) const {
+ if (err_idx < kNumErrors) {
+ switch (flavor) {
+ // When getting all errors, just OR all values together to see if
+ // we got any kind of error.
+ case GPRRegSet:
+ return gpr_errs[err_idx];
+ case FPURegSet:
+ return fpu_errs[err_idx];
+ case EXCRegSet:
+ return exc_errs[err_idx];
+ case DBGRegSet:
+ return dbg_errs[err_idx];
+ default:
+ break;
+ }
}
-
- int
- GetError (int flavor, uint32_t err_idx) const
- {
- if (err_idx < kNumErrors)
- {
- switch (flavor)
- {
- // When getting all errors, just OR all values together to see if
- // we got any kind of error.
- case GPRRegSet: return gpr_errs[err_idx];
- case FPURegSet: return fpu_errs[err_idx];
- case EXCRegSet: return exc_errs[err_idx];
- case DBGRegSet: return dbg_errs[err_idx];
- default: break;
- }
- }
- return -1;
+ return -1;
+ }
+
+ bool SetError(int flavor, uint32_t err_idx, int err) {
+ if (err_idx < kNumErrors) {
+ switch (flavor) {
+ case GPRRegSet:
+ gpr_errs[err_idx] = err;
+ return true;
+
+ case FPURegSet:
+ fpu_errs[err_idx] = err;
+ return true;
+
+ case EXCRegSet:
+ exc_errs[err_idx] = err;
+ return true;
+
+ case DBGRegSet:
+ exc_errs[err_idx] = err;
+ return true;
+
+ default:
+ break;
+ }
}
+ return false;
+ }
- bool
- SetError (int flavor, uint32_t err_idx, int err)
- {
- if (err_idx < kNumErrors)
- {
- switch (flavor)
- {
- case GPRRegSet:
- gpr_errs[err_idx] = err;
- return true;
-
- case FPURegSet:
- fpu_errs[err_idx] = err;
- return true;
-
- case EXCRegSet:
- exc_errs[err_idx] = err;
- return true;
-
- case DBGRegSet:
- exc_errs[err_idx] = err;
- return true;
-
- default: break;
- }
- }
- return false;
- }
+ bool RegisterSetIsCached(int set) const { return GetError(set, Read) == 0; }
- bool
- RegisterSetIsCached (int set) const
- {
- return GetError(set, Read) == 0;
- }
+ int ReadGPR(bool force);
- int
- ReadGPR (bool force);
+ int ReadFPU(bool force);
- int
- ReadFPU (bool force);
+ int ReadEXC(bool force);
- int
- ReadEXC (bool force);
+ int ReadDBG(bool force);
- int
- ReadDBG (bool force);
+ int WriteGPR();
- int
- WriteGPR ();
+ int WriteFPU();
- int
- WriteFPU ();
+ int WriteEXC();
- int
- WriteEXC ();
+ int WriteDBG();
- int
- WriteDBG ();
+ // Subclasses override these to do the actual reading.
+ virtual int DoReadGPR(lldb::tid_t tid, int flavor, GPR &gpr) { return -1; }
-
- // Subclasses override these to do the actual reading.
- virtual int
- DoReadGPR (lldb::tid_t tid, int flavor, GPR &gpr)
- {
- return -1;
- }
-
- virtual int
- DoReadFPU (lldb::tid_t tid, int flavor, FPU &fpu) = 0;
-
- virtual int
- DoReadEXC (lldb::tid_t tid, int flavor, EXC &exc) = 0;
+ virtual int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) = 0;
+
+ virtual int DoReadEXC(lldb::tid_t tid, int flavor, EXC &exc) = 0;
+
+ virtual int DoReadDBG(lldb::tid_t tid, int flavor, DBG &dbg) = 0;
+
+ virtual int DoWriteGPR(lldb::tid_t tid, int flavor, const GPR &gpr) = 0;
- virtual int
- DoReadDBG (lldb::tid_t tid, int flavor, DBG &dbg) = 0;
+ virtual int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
- virtual int
- DoWriteGPR (lldb::tid_t tid, int flavor, const GPR &gpr) = 0;
-
- virtual int
- DoWriteFPU (lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
-
- virtual int
- DoWriteEXC (lldb::tid_t tid, int flavor, const EXC &exc) = 0;
+ virtual int DoWriteEXC(lldb::tid_t tid, int flavor, const EXC &exc) = 0;
- virtual int
- DoWriteDBG (lldb::tid_t tid, int flavor, const DBG &dbg) = 0;
+ virtual int DoWriteDBG(lldb::tid_t tid, int flavor, const DBG &dbg) = 0;
- int
- ReadRegisterSet (uint32_t set, bool force);
+ int ReadRegisterSet(uint32_t set, bool force);
- int
- WriteRegisterSet (uint32_t set);
+ int WriteRegisterSet(uint32_t set);
- static uint32_t
- GetRegisterNumber (uint32_t reg_kind, uint32_t reg_num);
+ static uint32_t GetRegisterNumber(uint32_t reg_kind, uint32_t reg_num);
- static int
- GetSetForNativeRegNum (int reg_num);
+ static int GetSetForNativeRegNum(int reg_num);
- static size_t
- GetRegisterInfosCount ();
+ static size_t GetRegisterInfosCount();
- static const lldb_private::RegisterInfo *
- GetRegisterInfos ();
+ static const lldb_private::RegisterInfo *GetRegisterInfos();
};
#endif // liblldb_RegisterContextDarwin_arm_h_
diff --git a/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.cpp b/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.cpp
index 53cb9dea0fb2..64983a2404e6 100644
--- a/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.cpp
+++ b/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.cpp
@@ -1,4 +1,5 @@
-//===-- RegisterContextDarwin_arm64.cpp ---------------------------*- C++ -*-===//
+//===-- RegisterContextDarwin_arm64.cpp ---------------------------*- C++
+//-*-===//
//
// The LLVM Compiler Infrastructure
//
@@ -24,6 +25,8 @@
#include "lldb/Core/RegisterValue.h"
#include "lldb/Core/Scalar.h"
#include "lldb/Host/Endian.h"
+#include "lldb/Target/Process.h"
+#include "lldb/Target/Thread.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/Support/Compiler.h"
@@ -41,18 +44,36 @@
using namespace lldb;
using namespace lldb_private;
-
-#define GPR_OFFSET(idx) ((idx) * 8)
-#define GPR_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_arm64::GPR, reg))
-
-#define FPU_OFFSET(idx) ((idx) * 16 + sizeof (RegisterContextDarwin_arm64::GPR))
-#define FPU_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_arm64::FPU, reg))
-
-#define EXC_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_arm64::EXC, reg) + sizeof (RegisterContextDarwin_arm64::GPR) + sizeof (RegisterContextDarwin_arm64::FPU))
-#define DBG_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_arm64::DBG, reg) + sizeof (RegisterContextDarwin_arm64::GPR) + sizeof (RegisterContextDarwin_arm64::FPU) + sizeof (RegisterContextDarwin_arm64::EXC))
-
-#define DEFINE_DBG(reg, i) #reg, NULL, sizeof(((RegisterContextDarwin_arm64::DBG *)NULL)->reg[i]), DBG_OFFSET_NAME(reg[i]), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL, NULL, 0
-#define REG_CONTEXT_SIZE (sizeof (RegisterContextDarwin_arm64::GPR) + sizeof (RegisterContextDarwin_arm64::FPU) + sizeof (RegisterContextDarwin_arm64::EXC))
+#define GPR_OFFSET(idx) ((idx)*8)
+#define GPR_OFFSET_NAME(reg) \
+ (LLVM_EXTENSION offsetof(RegisterContextDarwin_arm64::GPR, reg))
+
+#define FPU_OFFSET(idx) ((idx)*16 + sizeof(RegisterContextDarwin_arm64::GPR))
+#define FPU_OFFSET_NAME(reg) \
+ (LLVM_EXTENSION offsetof(RegisterContextDarwin_arm64::FPU, reg))
+
+#define EXC_OFFSET_NAME(reg) \
+ (LLVM_EXTENSION offsetof(RegisterContextDarwin_arm64::EXC, reg) + \
+ sizeof(RegisterContextDarwin_arm64::GPR) + \
+ sizeof(RegisterContextDarwin_arm64::FPU))
+#define DBG_OFFSET_NAME(reg) \
+ (LLVM_EXTENSION offsetof(RegisterContextDarwin_arm64::DBG, reg) + \
+ sizeof(RegisterContextDarwin_arm64::GPR) + \
+ sizeof(RegisterContextDarwin_arm64::FPU) + \
+ sizeof(RegisterContextDarwin_arm64::EXC))
+
+#define DEFINE_DBG(reg, i) \
+ #reg, NULL, \
+ sizeof(((RegisterContextDarwin_arm64::DBG *) NULL)->reg[i]), \
+ DBG_OFFSET_NAME(reg[i]), eEncodingUint, eFormatHex, \
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ LLDB_INVALID_REGNUM }, \
+ NULL, NULL, NULL, 0
+#define REG_CONTEXT_SIZE \
+ (sizeof(RegisterContextDarwin_arm64::GPR) + \
+ sizeof(RegisterContextDarwin_arm64::FPU) + \
+ sizeof(RegisterContextDarwin_arm64::EXC))
//-----------------------------------------------------------------------------
// Include RegisterInfos_arm64 to declare our g_register_infos_arm64 structure.
@@ -62,153 +83,66 @@ using namespace lldb_private;
#undef DECLARE_REGISTER_INFOS_ARM64_STRUCT
// General purpose registers
-static uint32_t
-g_gpr_regnums[] =
-{
- gpr_x0,
- gpr_x1,
- gpr_x2,
- gpr_x3,
- gpr_x4,
- gpr_x5,
- gpr_x6,
- gpr_x7,
- gpr_x8,
- gpr_x9,
- gpr_x10,
- gpr_x11,
- gpr_x12,
- gpr_x13,
- gpr_x14,
- gpr_x15,
- gpr_x16,
- gpr_x17,
- gpr_x18,
- gpr_x19,
- gpr_x20,
- gpr_x21,
- gpr_x22,
- gpr_x23,
- gpr_x24,
- gpr_x25,
- gpr_x26,
- gpr_x27,
- gpr_x28,
- gpr_fp,
- gpr_lr,
- gpr_sp,
- gpr_pc,
- gpr_cpsr
-};
+static uint32_t g_gpr_regnums[] = {
+ gpr_x0, gpr_x1, gpr_x2, gpr_x3, gpr_x4, gpr_x5, gpr_x6,
+ gpr_x7, gpr_x8, gpr_x9, gpr_x10, gpr_x11, gpr_x12, gpr_x13,
+ gpr_x14, gpr_x15, gpr_x16, gpr_x17, gpr_x18, gpr_x19, gpr_x20,
+ gpr_x21, gpr_x22, gpr_x23, gpr_x24, gpr_x25, gpr_x26, gpr_x27,
+ gpr_x28, gpr_fp, gpr_lr, gpr_sp, gpr_pc, gpr_cpsr};
// Floating point registers
-static uint32_t
-g_fpu_regnums[] =
-{
- fpu_v0,
- fpu_v1,
- fpu_v2,
- fpu_v3,
- fpu_v4,
- fpu_v5,
- fpu_v6,
- fpu_v7,
- fpu_v8,
- fpu_v9,
- fpu_v10,
- fpu_v11,
- fpu_v12,
- fpu_v13,
- fpu_v14,
- fpu_v15,
- fpu_v16,
- fpu_v17,
- fpu_v18,
- fpu_v19,
- fpu_v20,
- fpu_v21,
- fpu_v22,
- fpu_v23,
- fpu_v24,
- fpu_v25,
- fpu_v26,
- fpu_v27,
- fpu_v28,
- fpu_v29,
- fpu_v30,
- fpu_v31,
- fpu_fpsr,
- fpu_fpcr
-};
+static uint32_t g_fpu_regnums[] = {
+ fpu_v0, fpu_v1, fpu_v2, fpu_v3, fpu_v4, fpu_v5, fpu_v6,
+ fpu_v7, fpu_v8, fpu_v9, fpu_v10, fpu_v11, fpu_v12, fpu_v13,
+ fpu_v14, fpu_v15, fpu_v16, fpu_v17, fpu_v18, fpu_v19, fpu_v20,
+ fpu_v21, fpu_v22, fpu_v23, fpu_v24, fpu_v25, fpu_v26, fpu_v27,
+ fpu_v28, fpu_v29, fpu_v30, fpu_v31, fpu_fpsr, fpu_fpcr};
// Exception registers
-static uint32_t
-g_exc_regnums[] =
-{
- exc_far,
- exc_esr,
- exc_exception
-};
-
-static size_t k_num_register_infos = llvm::array_lengthof(g_register_infos_arm64);
-
-RegisterContextDarwin_arm64::RegisterContextDarwin_arm64(Thread &thread, uint32_t concrete_frame_idx) :
- RegisterContext(thread, concrete_frame_idx),
- gpr(),
- fpu(),
- exc()
-{
- uint32_t i;
- for (i=0; i<kNumErrors; i++)
- {
- gpr_errs[i] = -1;
- fpu_errs[i] = -1;
- exc_errs[i] = -1;
- }
-}
+static uint32_t g_exc_regnums[] = {exc_far, exc_esr, exc_exception};
+
+static size_t k_num_register_infos =
+ llvm::array_lengthof(g_register_infos_arm64_le);
-RegisterContextDarwin_arm64::~RegisterContextDarwin_arm64()
-{
+RegisterContextDarwin_arm64::RegisterContextDarwin_arm64(
+ Thread &thread, uint32_t concrete_frame_idx)
+ : RegisterContext(thread, concrete_frame_idx), gpr(), fpu(), exc() {
+ uint32_t i;
+ for (i = 0; i < kNumErrors; i++) {
+ gpr_errs[i] = -1;
+ fpu_errs[i] = -1;
+ exc_errs[i] = -1;
+ }
}
+RegisterContextDarwin_arm64::~RegisterContextDarwin_arm64() {}
-void
-RegisterContextDarwin_arm64::InvalidateAllRegisters ()
-{
- InvalidateAllRegisterStates();
+void RegisterContextDarwin_arm64::InvalidateAllRegisters() {
+ InvalidateAllRegisterStates();
}
-
-size_t
-RegisterContextDarwin_arm64::GetRegisterCount ()
-{
- assert(k_num_register_infos == k_num_registers);
- return k_num_registers;
+size_t RegisterContextDarwin_arm64::GetRegisterCount() {
+ assert(k_num_register_infos == k_num_registers);
+ return k_num_registers;
}
const RegisterInfo *
-RegisterContextDarwin_arm64::GetRegisterInfoAtIndex (size_t reg)
-{
- assert(k_num_register_infos == k_num_registers);
- if (reg < k_num_registers)
- return &g_register_infos_arm64[reg];
- return NULL;
+RegisterContextDarwin_arm64::GetRegisterInfoAtIndex(size_t reg) {
+ assert(k_num_register_infos == k_num_registers);
+ if (reg < k_num_registers)
+ return &g_register_infos_arm64_le[reg];
+ return NULL;
}
-size_t
-RegisterContextDarwin_arm64::GetRegisterInfosCount ()
-{
- return k_num_register_infos;
+size_t RegisterContextDarwin_arm64::GetRegisterInfosCount() {
+ return k_num_register_infos;
}
-const RegisterInfo *
-RegisterContextDarwin_arm64::GetRegisterInfos ()
-{
- return g_register_infos_arm64;
+const RegisterInfo *RegisterContextDarwin_arm64::GetRegisterInfos() {
+ return g_register_infos_arm64_le;
}
-
// Number of registers in each register set
const size_t k_num_gpr_registers = llvm::array_lengthof(g_gpr_regnums);
const size_t k_num_fpu_registers = llvm::array_lengthof(g_fpu_regnums);
@@ -219,726 +153,895 @@ const size_t k_num_exc_registers = llvm::array_lengthof(g_exc_regnums);
// of zero is for all registers, followed by other registers sets. The
// register information for the all register set need not be filled in.
//----------------------------------------------------------------------
-static const RegisterSet g_reg_sets[] =
-{
- { "General Purpose Registers", "gpr", k_num_gpr_registers, g_gpr_regnums, },
- { "Floating Point Registers", "fpu", k_num_fpu_registers, g_fpu_regnums },
- { "Exception State Registers", "exc", k_num_exc_registers, g_exc_regnums }
-};
+static const RegisterSet g_reg_sets[] = {
+ {
+ "General Purpose Registers", "gpr", k_num_gpr_registers, g_gpr_regnums,
+ },
+ {"Floating Point Registers", "fpu", k_num_fpu_registers, g_fpu_regnums},
+ {"Exception State Registers", "exc", k_num_exc_registers, g_exc_regnums}};
const size_t k_num_regsets = llvm::array_lengthof(g_reg_sets);
-
-size_t
-RegisterContextDarwin_arm64::GetRegisterSetCount ()
-{
- return k_num_regsets;
+size_t RegisterContextDarwin_arm64::GetRegisterSetCount() {
+ return k_num_regsets;
}
-const RegisterSet *
-RegisterContextDarwin_arm64::GetRegisterSet (size_t reg_set)
-{
- if (reg_set < k_num_regsets)
- return &g_reg_sets[reg_set];
- return NULL;
+const RegisterSet *RegisterContextDarwin_arm64::GetRegisterSet(size_t reg_set) {
+ if (reg_set < k_num_regsets)
+ return &g_reg_sets[reg_set];
+ return NULL;
}
-
//----------------------------------------------------------------------
// Register information definitions for arm64
//----------------------------------------------------------------------
-int
-RegisterContextDarwin_arm64::GetSetForNativeRegNum (int reg)
-{
- if (reg < fpu_v0)
- return GPRRegSet;
- else if (reg < exc_far)
- return FPURegSet;
- else if (reg < k_num_registers)
- return EXCRegSet;
- return -1;
+int RegisterContextDarwin_arm64::GetSetForNativeRegNum(int reg) {
+ if (reg < fpu_v0)
+ return GPRRegSet;
+ else if (reg < exc_far)
+ return FPURegSet;
+ else if (reg < k_num_registers)
+ return EXCRegSet;
+ return -1;
}
-int
-RegisterContextDarwin_arm64::ReadGPR (bool force)
-{
- int set = GPRRegSet;
- if (force || !RegisterSetIsCached(set))
- {
- SetError(set, Read, DoReadGPR(GetThreadID(), set, gpr));
- }
- return GetError(GPRRegSet, Read);
+int RegisterContextDarwin_arm64::ReadGPR(bool force) {
+ int set = GPRRegSet;
+ if (force || !RegisterSetIsCached(set)) {
+ SetError(set, Read, DoReadGPR(GetThreadID(), set, gpr));
+ }
+ return GetError(GPRRegSet, Read);
}
-int
-RegisterContextDarwin_arm64::ReadFPU (bool force)
-{
- int set = FPURegSet;
- if (force || !RegisterSetIsCached(set))
- {
- SetError(set, Read, DoReadFPU(GetThreadID(), set, fpu));
- }
- return GetError(FPURegSet, Read);
+int RegisterContextDarwin_arm64::ReadFPU(bool force) {
+ int set = FPURegSet;
+ if (force || !RegisterSetIsCached(set)) {
+ SetError(set, Read, DoReadFPU(GetThreadID(), set, fpu));
+ }
+ return GetError(FPURegSet, Read);
}
-int
-RegisterContextDarwin_arm64::ReadEXC (bool force)
-{
- int set = EXCRegSet;
- if (force || !RegisterSetIsCached(set))
- {
- SetError(set, Read, DoReadEXC(GetThreadID(), set, exc));
- }
- return GetError(EXCRegSet, Read);
-}
-
-int
-RegisterContextDarwin_arm64::ReadDBG (bool force)
-{
- int set = DBGRegSet;
- if (force || !RegisterSetIsCached(set))
- {
- SetError(set, Read, DoReadDBG(GetThreadID(), set, dbg));
- }
- return GetError(DBGRegSet, Read);
+int RegisterContextDarwin_arm64::ReadEXC(bool force) {
+ int set = EXCRegSet;
+ if (force || !RegisterSetIsCached(set)) {
+ SetError(set, Read, DoReadEXC(GetThreadID(), set, exc));
+ }
+ return GetError(EXCRegSet, Read);
}
-int
-RegisterContextDarwin_arm64::WriteGPR ()
-{
- int set = GPRRegSet;
- if (!RegisterSetIsCached(set))
- {
- SetError (set, Write, -1);
- return KERN_INVALID_ARGUMENT;
- }
- SetError (set, Write, DoWriteGPR(GetThreadID(), set, gpr));
- SetError (set, Read, -1);
- return GetError(GPRRegSet, Write);
+int RegisterContextDarwin_arm64::ReadDBG(bool force) {
+ int set = DBGRegSet;
+ if (force || !RegisterSetIsCached(set)) {
+ SetError(set, Read, DoReadDBG(GetThreadID(), set, dbg));
+ }
+ return GetError(DBGRegSet, Read);
}
-int
-RegisterContextDarwin_arm64::WriteFPU ()
-{
- int set = FPURegSet;
- if (!RegisterSetIsCached(set))
- {
- SetError (set, Write, -1);
- return KERN_INVALID_ARGUMENT;
- }
- SetError (set, Write, DoWriteFPU(GetThreadID(), set, fpu));
- SetError (set, Read, -1);
- return GetError(FPURegSet, Write);
+int RegisterContextDarwin_arm64::WriteGPR() {
+ int set = GPRRegSet;
+ if (!RegisterSetIsCached(set)) {
+ SetError(set, Write, -1);
+ return KERN_INVALID_ARGUMENT;
+ }
+ SetError(set, Write, DoWriteGPR(GetThreadID(), set, gpr));
+ SetError(set, Read, -1);
+ return GetError(GPRRegSet, Write);
}
-int
-RegisterContextDarwin_arm64::WriteEXC ()
-{
- int set = EXCRegSet;
- if (!RegisterSetIsCached(set))
- {
- SetError (set, Write, -1);
- return KERN_INVALID_ARGUMENT;
- }
- SetError (set, Write, DoWriteEXC(GetThreadID(), set, exc));
- SetError (set, Read, -1);
- return GetError(EXCRegSet, Write);
+int RegisterContextDarwin_arm64::WriteFPU() {
+ int set = FPURegSet;
+ if (!RegisterSetIsCached(set)) {
+ SetError(set, Write, -1);
+ return KERN_INVALID_ARGUMENT;
+ }
+ SetError(set, Write, DoWriteFPU(GetThreadID(), set, fpu));
+ SetError(set, Read, -1);
+ return GetError(FPURegSet, Write);
}
-int
-RegisterContextDarwin_arm64::WriteDBG ()
-{
- int set = DBGRegSet;
- if (!RegisterSetIsCached(set))
- {
- SetError (set, Write, -1);
- return KERN_INVALID_ARGUMENT;
- }
- SetError (set, Write, DoWriteDBG(GetThreadID(), set, dbg));
- SetError (set, Read, -1);
- return GetError(DBGRegSet, Write);
+int RegisterContextDarwin_arm64::WriteEXC() {
+ int set = EXCRegSet;
+ if (!RegisterSetIsCached(set)) {
+ SetError(set, Write, -1);
+ return KERN_INVALID_ARGUMENT;
+ }
+ SetError(set, Write, DoWriteEXC(GetThreadID(), set, exc));
+ SetError(set, Read, -1);
+ return GetError(EXCRegSet, Write);
}
-
-int
-RegisterContextDarwin_arm64::ReadRegisterSet (uint32_t set, bool force)
-{
- switch (set)
- {
- case GPRRegSet: return ReadGPR(force);
- case FPURegSet: return ReadFPU(force);
- case EXCRegSet: return ReadEXC(force);
- case DBGRegSet: return ReadDBG(force);
- default: break;
- }
+int RegisterContextDarwin_arm64::WriteDBG() {
+ int set = DBGRegSet;
+ if (!RegisterSetIsCached(set)) {
+ SetError(set, Write, -1);
return KERN_INVALID_ARGUMENT;
+ }
+ SetError(set, Write, DoWriteDBG(GetThreadID(), set, dbg));
+ SetError(set, Read, -1);
+ return GetError(DBGRegSet, Write);
}
-int
-RegisterContextDarwin_arm64::WriteRegisterSet (uint32_t set)
-{
- // Make sure we have a valid context to set.
- if (RegisterSetIsCached(set))
- {
- switch (set)
- {
- case GPRRegSet: return WriteGPR();
- case FPURegSet: return WriteFPU();
- case EXCRegSet: return WriteEXC();
- case DBGRegSet: return WriteDBG();
- default: break;
- }
- }
- return KERN_INVALID_ARGUMENT;
+int RegisterContextDarwin_arm64::ReadRegisterSet(uint32_t set, bool force) {
+ switch (set) {
+ case GPRRegSet:
+ return ReadGPR(force);
+ case FPURegSet:
+ return ReadFPU(force);
+ case EXCRegSet:
+ return ReadEXC(force);
+ case DBGRegSet:
+ return ReadDBG(force);
+ default:
+ break;
+ }
+ return KERN_INVALID_ARGUMENT;
}
-void
-RegisterContextDarwin_arm64::LogDBGRegisters (Log *log, const DBG& dbg)
-{
- if (log)
- {
- for (uint32_t i=0; i<16; i++)
- log->Printf("BVR%-2u/BCR%-2u = { 0x%8.8llx, 0x%8.8llx } WVR%-2u/WCR%-2u = { 0x%8.8llx, 0x%8.8llx }",
- i, i, dbg.bvr[i], dbg.bcr[i],
- i, i, dbg.wvr[i], dbg.wcr[i]);
+int RegisterContextDarwin_arm64::WriteRegisterSet(uint32_t set) {
+ // Make sure we have a valid context to set.
+ if (RegisterSetIsCached(set)) {
+ switch (set) {
+ case GPRRegSet:
+ return WriteGPR();
+ case FPURegSet:
+ return WriteFPU();
+ case EXCRegSet:
+ return WriteEXC();
+ case DBGRegSet:
+ return WriteDBG();
+ default:
+ break;
}
+ }
+ return KERN_INVALID_ARGUMENT;
}
+void RegisterContextDarwin_arm64::LogDBGRegisters(Log *log, const DBG &dbg) {
+ if (log) {
+ for (uint32_t i = 0; i < 16; i++)
+ log->Printf("BVR%-2u/BCR%-2u = { 0x%8.8llx, 0x%8.8llx } WVR%-2u/WCR%-2u "
+ "= { 0x%8.8llx, 0x%8.8llx }",
+ i, i, dbg.bvr[i], dbg.bcr[i], i, i, dbg.wvr[i], dbg.wcr[i]);
+ }
+}
-bool
-RegisterContextDarwin_arm64::ReadRegister (const RegisterInfo *reg_info, RegisterValue &value)
-{
- const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
- int set = RegisterContextDarwin_arm64::GetSetForNativeRegNum (reg);
-
- if (set == -1)
- return false;
-
- if (ReadRegisterSet(set, false) != KERN_SUCCESS)
- return false;
+bool RegisterContextDarwin_arm64::ReadRegister(const RegisterInfo *reg_info,
+ RegisterValue &value) {
+ const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
+ int set = RegisterContextDarwin_arm64::GetSetForNativeRegNum(reg);
- switch (reg)
- {
- case gpr_x0:
- case gpr_x1:
- case gpr_x2:
- case gpr_x3:
- case gpr_x4:
- case gpr_x5:
- case gpr_x6:
- case gpr_x7:
- case gpr_x8:
- case gpr_x9:
- case gpr_x10:
- case gpr_x11:
- case gpr_x12:
- case gpr_x13:
- case gpr_x14:
- case gpr_x15:
- case gpr_x16:
- case gpr_x17:
- case gpr_x18:
- case gpr_x19:
- case gpr_x20:
- case gpr_x21:
- case gpr_x22:
- case gpr_x23:
- case gpr_x24:
- case gpr_x25:
- case gpr_x26:
- case gpr_x27:
- case gpr_x28:
- case gpr_fp:
- case gpr_sp:
- case gpr_lr:
- case gpr_pc:
- case gpr_cpsr:
- value.SetUInt64 (gpr.x[reg - gpr_x0]);
- break;
-
- case fpu_v0:
- case fpu_v1:
- case fpu_v2:
- case fpu_v3:
- case fpu_v4:
- case fpu_v5:
- case fpu_v6:
- case fpu_v7:
- case fpu_v8:
- case fpu_v9:
- case fpu_v10:
- case fpu_v11:
- case fpu_v12:
- case fpu_v13:
- case fpu_v14:
- case fpu_v15:
- case fpu_v16:
- case fpu_v17:
- case fpu_v18:
- case fpu_v19:
- case fpu_v20:
- case fpu_v21:
- case fpu_v22:
- case fpu_v23:
- case fpu_v24:
- case fpu_v25:
- case fpu_v26:
- case fpu_v27:
- case fpu_v28:
- case fpu_v29:
- case fpu_v30:
- case fpu_v31:
- value.SetBytes(fpu.v[reg].bytes, reg_info->byte_size, endian::InlHostByteOrder());
- break;
-
- case fpu_fpsr:
- value.SetUInt32 (fpu.fpsr);
- break;
-
- case fpu_fpcr:
- value.SetUInt32 (fpu.fpcr);
- break;
-
- case exc_exception:
- value.SetUInt32 (exc.exception);
- break;
- case exc_esr:
- value.SetUInt32 (exc.esr);
- break;
- case exc_far:
- value.SetUInt64 (exc.far);
- break;
+ if (set == -1)
+ return false;
- default:
- value.SetValueToInvalid();
- return false;
+ if (ReadRegisterSet(set, false) != KERN_SUCCESS)
+ return false;
+ switch (reg) {
+ case gpr_x0:
+ case gpr_x1:
+ case gpr_x2:
+ case gpr_x3:
+ case gpr_x4:
+ case gpr_x5:
+ case gpr_x6:
+ case gpr_x7:
+ case gpr_x8:
+ case gpr_x9:
+ case gpr_x10:
+ case gpr_x11:
+ case gpr_x12:
+ case gpr_x13:
+ case gpr_x14:
+ case gpr_x15:
+ case gpr_x16:
+ case gpr_x17:
+ case gpr_x18:
+ case gpr_x19:
+ case gpr_x20:
+ case gpr_x21:
+ case gpr_x22:
+ case gpr_x23:
+ case gpr_x24:
+ case gpr_x25:
+ case gpr_x26:
+ case gpr_x27:
+ case gpr_x28:
+ case gpr_fp:
+ case gpr_sp:
+ case gpr_lr:
+ case gpr_pc:
+ case gpr_cpsr:
+ value.SetUInt64(gpr.x[reg - gpr_x0]);
+ break;
+
+ case gpr_w0:
+ case gpr_w1:
+ case gpr_w2:
+ case gpr_w3:
+ case gpr_w4:
+ case gpr_w5:
+ case gpr_w6:
+ case gpr_w7:
+ case gpr_w8:
+ case gpr_w9:
+ case gpr_w10:
+ case gpr_w11:
+ case gpr_w12:
+ case gpr_w13:
+ case gpr_w14:
+ case gpr_w15:
+ case gpr_w16:
+ case gpr_w17:
+ case gpr_w18:
+ case gpr_w19:
+ case gpr_w20:
+ case gpr_w21:
+ case gpr_w22:
+ case gpr_w23:
+ case gpr_w24:
+ case gpr_w25:
+ case gpr_w26:
+ case gpr_w27:
+ case gpr_w28: {
+ ProcessSP process_sp(m_thread.GetProcess());
+ if (process_sp.get()) {
+ DataExtractor regdata(&gpr.x[reg - gpr_w0], 8, process_sp->GetByteOrder(),
+ process_sp->GetAddressByteSize());
+ offset_t offset = 0;
+ uint64_t retval = regdata.GetMaxU64(&offset, 8);
+ uint32_t retval_lower32 = static_cast<uint32_t>(retval & 0xffffffff);
+ value.SetUInt32(retval_lower32);
}
- return true;
+ } break;
+
+ case fpu_v0:
+ case fpu_v1:
+ case fpu_v2:
+ case fpu_v3:
+ case fpu_v4:
+ case fpu_v5:
+ case fpu_v6:
+ case fpu_v7:
+ case fpu_v8:
+ case fpu_v9:
+ case fpu_v10:
+ case fpu_v11:
+ case fpu_v12:
+ case fpu_v13:
+ case fpu_v14:
+ case fpu_v15:
+ case fpu_v16:
+ case fpu_v17:
+ case fpu_v18:
+ case fpu_v19:
+ case fpu_v20:
+ case fpu_v21:
+ case fpu_v22:
+ case fpu_v23:
+ case fpu_v24:
+ case fpu_v25:
+ case fpu_v26:
+ case fpu_v27:
+ case fpu_v28:
+ case fpu_v29:
+ case fpu_v30:
+ case fpu_v31:
+ value.SetBytes(fpu.v[reg].bytes, reg_info->byte_size,
+ endian::InlHostByteOrder());
+ break;
+
+ case fpu_s0:
+ case fpu_s1:
+ case fpu_s2:
+ case fpu_s3:
+ case fpu_s4:
+ case fpu_s5:
+ case fpu_s6:
+ case fpu_s7:
+ case fpu_s8:
+ case fpu_s9:
+ case fpu_s10:
+ case fpu_s11:
+ case fpu_s12:
+ case fpu_s13:
+ case fpu_s14:
+ case fpu_s15:
+ case fpu_s16:
+ case fpu_s17:
+ case fpu_s18:
+ case fpu_s19:
+ case fpu_s20:
+ case fpu_s21:
+ case fpu_s22:
+ case fpu_s23:
+ case fpu_s24:
+ case fpu_s25:
+ case fpu_s26:
+ case fpu_s27:
+ case fpu_s28:
+ case fpu_s29:
+ case fpu_s30:
+ case fpu_s31: {
+ ProcessSP process_sp(m_thread.GetProcess());
+ if (process_sp.get()) {
+ DataExtractor regdata(&fpu.v[reg - fpu_s0], 4, process_sp->GetByteOrder(),
+ process_sp->GetAddressByteSize());
+ offset_t offset = 0;
+ value.SetFloat(regdata.GetFloat(&offset));
+ }
+ } break;
+
+ case fpu_d0:
+ case fpu_d1:
+ case fpu_d2:
+ case fpu_d3:
+ case fpu_d4:
+ case fpu_d5:
+ case fpu_d6:
+ case fpu_d7:
+ case fpu_d8:
+ case fpu_d9:
+ case fpu_d10:
+ case fpu_d11:
+ case fpu_d12:
+ case fpu_d13:
+ case fpu_d14:
+ case fpu_d15:
+ case fpu_d16:
+ case fpu_d17:
+ case fpu_d18:
+ case fpu_d19:
+ case fpu_d20:
+ case fpu_d21:
+ case fpu_d22:
+ case fpu_d23:
+ case fpu_d24:
+ case fpu_d25:
+ case fpu_d26:
+ case fpu_d27:
+ case fpu_d28:
+ case fpu_d29:
+ case fpu_d30:
+ case fpu_d31: {
+ ProcessSP process_sp(m_thread.GetProcess());
+ if (process_sp.get()) {
+ DataExtractor regdata(&fpu.v[reg - fpu_s0], 8, process_sp->GetByteOrder(),
+ process_sp->GetAddressByteSize());
+ offset_t offset = 0;
+ value.SetDouble(regdata.GetDouble(&offset));
+ }
+ } break;
+
+ case fpu_fpsr:
+ value.SetUInt32(fpu.fpsr);
+ break;
+
+ case fpu_fpcr:
+ value.SetUInt32(fpu.fpcr);
+ break;
+
+ case exc_exception:
+ value.SetUInt32(exc.exception);
+ break;
+ case exc_esr:
+ value.SetUInt32(exc.esr);
+ break;
+ case exc_far:
+ value.SetUInt64(exc.far);
+ break;
+
+ default:
+ value.SetValueToInvalid();
+ return false;
+ }
+ return true;
}
+bool RegisterContextDarwin_arm64::WriteRegister(const RegisterInfo *reg_info,
+ const RegisterValue &value) {
+ const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
+ int set = GetSetForNativeRegNum(reg);
-bool
-RegisterContextDarwin_arm64::WriteRegister (const RegisterInfo *reg_info,
- const RegisterValue &value)
-{
- const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
- int set = GetSetForNativeRegNum (reg);
-
- if (set == -1)
- return false;
-
- if (ReadRegisterSet(set, false) != KERN_SUCCESS)
- return false;
-
- switch (reg)
- {
- case gpr_x0:
- case gpr_x1:
- case gpr_x2:
- case gpr_x3:
- case gpr_x4:
- case gpr_x5:
- case gpr_x6:
- case gpr_x7:
- case gpr_x8:
- case gpr_x9:
- case gpr_x10:
- case gpr_x11:
- case gpr_x12:
- case gpr_x13:
- case gpr_x14:
- case gpr_x15:
- case gpr_x16:
- case gpr_x17:
- case gpr_x18:
- case gpr_x19:
- case gpr_x20:
- case gpr_x21:
- case gpr_x22:
- case gpr_x23:
- case gpr_x24:
- case gpr_x25:
- case gpr_x26:
- case gpr_x27:
- case gpr_x28:
- case gpr_fp:
- case gpr_sp:
- case gpr_lr:
- case gpr_pc:
- case gpr_cpsr:
- gpr.x[reg - gpr_x0] = value.GetAsUInt64();
- break;
-
- case fpu_v0:
- case fpu_v1:
- case fpu_v2:
- case fpu_v3:
- case fpu_v4:
- case fpu_v5:
- case fpu_v6:
- case fpu_v7:
- case fpu_v8:
- case fpu_v9:
- case fpu_v10:
- case fpu_v11:
- case fpu_v12:
- case fpu_v13:
- case fpu_v14:
- case fpu_v15:
- case fpu_v16:
- case fpu_v17:
- case fpu_v18:
- case fpu_v19:
- case fpu_v20:
- case fpu_v21:
- case fpu_v22:
- case fpu_v23:
- case fpu_v24:
- case fpu_v25:
- case fpu_v26:
- case fpu_v27:
- case fpu_v28:
- case fpu_v29:
- case fpu_v30:
- case fpu_v31:
- ::memcpy (fpu.v[reg].bytes, value.GetBytes(), value.GetByteSize());
- break;
-
- case fpu_fpsr:
- fpu.fpsr = value.GetAsUInt32();
- break;
-
- case fpu_fpcr:
- fpu.fpcr = value.GetAsUInt32();
- break;
-
- case exc_exception:
- exc.exception = value.GetAsUInt32();
- break;
- case exc_esr:
- exc.esr = value.GetAsUInt32();
- break;
- case exc_far:
- exc.far = value.GetAsUInt64();
- break;
+ if (set == -1)
+ return false;
- default:
- return false;
+ if (ReadRegisterSet(set, false) != KERN_SUCCESS)
+ return false;
- }
- return WriteRegisterSet(set) == KERN_SUCCESS;
+ switch (reg) {
+ case gpr_x0:
+ case gpr_x1:
+ case gpr_x2:
+ case gpr_x3:
+ case gpr_x4:
+ case gpr_x5:
+ case gpr_x6:
+ case gpr_x7:
+ case gpr_x8:
+ case gpr_x9:
+ case gpr_x10:
+ case gpr_x11:
+ case gpr_x12:
+ case gpr_x13:
+ case gpr_x14:
+ case gpr_x15:
+ case gpr_x16:
+ case gpr_x17:
+ case gpr_x18:
+ case gpr_x19:
+ case gpr_x20:
+ case gpr_x21:
+ case gpr_x22:
+ case gpr_x23:
+ case gpr_x24:
+ case gpr_x25:
+ case gpr_x26:
+ case gpr_x27:
+ case gpr_x28:
+ case gpr_fp:
+ case gpr_sp:
+ case gpr_lr:
+ case gpr_pc:
+ case gpr_cpsr:
+ gpr.x[reg - gpr_x0] = value.GetAsUInt64();
+ break;
+
+ case fpu_v0:
+ case fpu_v1:
+ case fpu_v2:
+ case fpu_v3:
+ case fpu_v4:
+ case fpu_v5:
+ case fpu_v6:
+ case fpu_v7:
+ case fpu_v8:
+ case fpu_v9:
+ case fpu_v10:
+ case fpu_v11:
+ case fpu_v12:
+ case fpu_v13:
+ case fpu_v14:
+ case fpu_v15:
+ case fpu_v16:
+ case fpu_v17:
+ case fpu_v18:
+ case fpu_v19:
+ case fpu_v20:
+ case fpu_v21:
+ case fpu_v22:
+ case fpu_v23:
+ case fpu_v24:
+ case fpu_v25:
+ case fpu_v26:
+ case fpu_v27:
+ case fpu_v28:
+ case fpu_v29:
+ case fpu_v30:
+ case fpu_v31:
+ ::memcpy(fpu.v[reg].bytes, value.GetBytes(), value.GetByteSize());
+ break;
+
+ case fpu_fpsr:
+ fpu.fpsr = value.GetAsUInt32();
+ break;
+
+ case fpu_fpcr:
+ fpu.fpcr = value.GetAsUInt32();
+ break;
+
+ case exc_exception:
+ exc.exception = value.GetAsUInt32();
+ break;
+ case exc_esr:
+ exc.esr = value.GetAsUInt32();
+ break;
+ case exc_far:
+ exc.far = value.GetAsUInt64();
+ break;
+
+ default:
+ return false;
+ }
+ return WriteRegisterSet(set) == KERN_SUCCESS;
}
-bool
-RegisterContextDarwin_arm64::ReadAllRegisterValues (lldb::DataBufferSP &data_sp)
-{
- data_sp.reset (new DataBufferHeap (REG_CONTEXT_SIZE, 0));
- if (data_sp &&
- ReadGPR (false) == KERN_SUCCESS &&
- ReadFPU (false) == KERN_SUCCESS &&
- ReadEXC (false) == KERN_SUCCESS)
- {
- uint8_t *dst = data_sp->GetBytes();
- ::memcpy (dst, &gpr, sizeof(gpr));
- dst += sizeof(gpr);
+bool RegisterContextDarwin_arm64::ReadAllRegisterValues(
+ lldb::DataBufferSP &data_sp) {
+ data_sp.reset(new DataBufferHeap(REG_CONTEXT_SIZE, 0));
+ if (data_sp && ReadGPR(false) == KERN_SUCCESS &&
+ ReadFPU(false) == KERN_SUCCESS && ReadEXC(false) == KERN_SUCCESS) {
+ uint8_t *dst = data_sp->GetBytes();
+ ::memcpy(dst, &gpr, sizeof(gpr));
+ dst += sizeof(gpr);
- ::memcpy (dst, &fpu, sizeof(fpu));
- dst += sizeof(gpr);
+ ::memcpy(dst, &fpu, sizeof(fpu));
+ dst += sizeof(gpr);
- ::memcpy (dst, &exc, sizeof(exc));
- return true;
- }
- return false;
+ ::memcpy(dst, &exc, sizeof(exc));
+ return true;
+ }
+ return false;
}
-bool
-RegisterContextDarwin_arm64::WriteAllRegisterValues (const lldb::DataBufferSP &data_sp)
-{
- if (data_sp && data_sp->GetByteSize() == REG_CONTEXT_SIZE)
- {
- const uint8_t *src = data_sp->GetBytes();
- ::memcpy (&gpr, src, sizeof(gpr));
- src += sizeof(gpr);
-
- ::memcpy (&fpu, src, sizeof(fpu));
- src += sizeof(gpr);
-
- ::memcpy (&exc, src, sizeof(exc));
- uint32_t success_count = 0;
- if (WriteGPR() == KERN_SUCCESS)
- ++success_count;
- if (WriteFPU() == KERN_SUCCESS)
- ++success_count;
- if (WriteEXC() == KERN_SUCCESS)
- ++success_count;
- return success_count == 3;
- }
- return false;
+bool RegisterContextDarwin_arm64::WriteAllRegisterValues(
+ const lldb::DataBufferSP &data_sp) {
+ if (data_sp && data_sp->GetByteSize() == REG_CONTEXT_SIZE) {
+ const uint8_t *src = data_sp->GetBytes();
+ ::memcpy(&gpr, src, sizeof(gpr));
+ src += sizeof(gpr);
+
+ ::memcpy(&fpu, src, sizeof(fpu));
+ src += sizeof(gpr);
+
+ ::memcpy(&exc, src, sizeof(exc));
+ uint32_t success_count = 0;
+ if (WriteGPR() == KERN_SUCCESS)
+ ++success_count;
+ if (WriteFPU() == KERN_SUCCESS)
+ ++success_count;
+ if (WriteEXC() == KERN_SUCCESS)
+ ++success_count;
+ return success_count == 3;
+ }
+ return false;
}
-uint32_t
-RegisterContextDarwin_arm64::ConvertRegisterKindToRegisterNumber (RegisterKind kind, uint32_t reg)
-{
- if (kind == eRegisterKindGeneric)
- {
- switch (reg)
- {
- case LLDB_REGNUM_GENERIC_PC: return gpr_pc;
- case LLDB_REGNUM_GENERIC_SP: return gpr_sp;
- case LLDB_REGNUM_GENERIC_FP: return gpr_fp;
- case LLDB_REGNUM_GENERIC_RA: return gpr_lr;
- case LLDB_REGNUM_GENERIC_FLAGS: return gpr_cpsr;
- default:
- break;
- }
- }
- else if (kind == eRegisterKindDWARF)
- {
- switch (reg)
- {
- case arm64_dwarf::x0: return gpr_x0;
- case arm64_dwarf::x1: return gpr_x1;
- case arm64_dwarf::x2: return gpr_x2;
- case arm64_dwarf::x3: return gpr_x3;
- case arm64_dwarf::x4: return gpr_x4;
- case arm64_dwarf::x5: return gpr_x5;
- case arm64_dwarf::x6: return gpr_x6;
- case arm64_dwarf::x7: return gpr_x7;
- case arm64_dwarf::x8: return gpr_x8;
- case arm64_dwarf::x9: return gpr_x9;
- case arm64_dwarf::x10: return gpr_x10;
- case arm64_dwarf::x11: return gpr_x11;
- case arm64_dwarf::x12: return gpr_x12;
- case arm64_dwarf::x13: return gpr_x13;
- case arm64_dwarf::x14: return gpr_x14;
- case arm64_dwarf::x15: return gpr_x15;
- case arm64_dwarf::x16: return gpr_x16;
- case arm64_dwarf::x17: return gpr_x17;
- case arm64_dwarf::x18: return gpr_x18;
- case arm64_dwarf::x19: return gpr_x19;
- case arm64_dwarf::x20: return gpr_x20;
- case arm64_dwarf::x21: return gpr_x21;
- case arm64_dwarf::x22: return gpr_x22;
- case arm64_dwarf::x23: return gpr_x23;
- case arm64_dwarf::x24: return gpr_x24;
- case arm64_dwarf::x25: return gpr_x25;
- case arm64_dwarf::x26: return gpr_x26;
- case arm64_dwarf::x27: return gpr_x27;
- case arm64_dwarf::x28: return gpr_x28;
-
- case arm64_dwarf::fp: return gpr_fp;
- case arm64_dwarf::sp: return gpr_sp;
- case arm64_dwarf::lr: return gpr_lr;
- case arm64_dwarf::pc: return gpr_pc;
- case arm64_dwarf::cpsr: return gpr_cpsr;
-
- case arm64_dwarf::v0: return fpu_v0;
- case arm64_dwarf::v1: return fpu_v1;
- case arm64_dwarf::v2: return fpu_v2;
- case arm64_dwarf::v3: return fpu_v3;
- case arm64_dwarf::v4: return fpu_v4;
- case arm64_dwarf::v5: return fpu_v5;
- case arm64_dwarf::v6: return fpu_v6;
- case arm64_dwarf::v7: return fpu_v7;
- case arm64_dwarf::v8: return fpu_v8;
- case arm64_dwarf::v9: return fpu_v9;
- case arm64_dwarf::v10: return fpu_v10;
- case arm64_dwarf::v11: return fpu_v11;
- case arm64_dwarf::v12: return fpu_v12;
- case arm64_dwarf::v13: return fpu_v13;
- case arm64_dwarf::v14: return fpu_v14;
- case arm64_dwarf::v15: return fpu_v15;
- case arm64_dwarf::v16: return fpu_v16;
- case arm64_dwarf::v17: return fpu_v17;
- case arm64_dwarf::v18: return fpu_v18;
- case arm64_dwarf::v19: return fpu_v19;
- case arm64_dwarf::v20: return fpu_v20;
- case arm64_dwarf::v21: return fpu_v21;
- case arm64_dwarf::v22: return fpu_v22;
- case arm64_dwarf::v23: return fpu_v23;
- case arm64_dwarf::v24: return fpu_v24;
- case arm64_dwarf::v25: return fpu_v25;
- case arm64_dwarf::v26: return fpu_v26;
- case arm64_dwarf::v27: return fpu_v27;
- case arm64_dwarf::v28: return fpu_v28;
- case arm64_dwarf::v29: return fpu_v29;
- case arm64_dwarf::v30: return fpu_v30;
- case arm64_dwarf::v31: return fpu_v31;
-
- default:
- break;
- }
+uint32_t RegisterContextDarwin_arm64::ConvertRegisterKindToRegisterNumber(
+ RegisterKind kind, uint32_t reg) {
+ if (kind == eRegisterKindGeneric) {
+ switch (reg) {
+ case LLDB_REGNUM_GENERIC_PC:
+ return gpr_pc;
+ case LLDB_REGNUM_GENERIC_SP:
+ return gpr_sp;
+ case LLDB_REGNUM_GENERIC_FP:
+ return gpr_fp;
+ case LLDB_REGNUM_GENERIC_RA:
+ return gpr_lr;
+ case LLDB_REGNUM_GENERIC_FLAGS:
+ return gpr_cpsr;
+ default:
+ break;
}
- else if (kind == eRegisterKindEHFrame)
- {
- switch (reg)
- {
- case arm64_ehframe::x0: return gpr_x0;
- case arm64_ehframe::x1: return gpr_x1;
- case arm64_ehframe::x2: return gpr_x2;
- case arm64_ehframe::x3: return gpr_x3;
- case arm64_ehframe::x4: return gpr_x4;
- case arm64_ehframe::x5: return gpr_x5;
- case arm64_ehframe::x6: return gpr_x6;
- case arm64_ehframe::x7: return gpr_x7;
- case arm64_ehframe::x8: return gpr_x8;
- case arm64_ehframe::x9: return gpr_x9;
- case arm64_ehframe::x10: return gpr_x10;
- case arm64_ehframe::x11: return gpr_x11;
- case arm64_ehframe::x12: return gpr_x12;
- case arm64_ehframe::x13: return gpr_x13;
- case arm64_ehframe::x14: return gpr_x14;
- case arm64_ehframe::x15: return gpr_x15;
- case arm64_ehframe::x16: return gpr_x16;
- case arm64_ehframe::x17: return gpr_x17;
- case arm64_ehframe::x18: return gpr_x18;
- case arm64_ehframe::x19: return gpr_x19;
- case arm64_ehframe::x20: return gpr_x20;
- case arm64_ehframe::x21: return gpr_x21;
- case arm64_ehframe::x22: return gpr_x22;
- case arm64_ehframe::x23: return gpr_x23;
- case arm64_ehframe::x24: return gpr_x24;
- case arm64_ehframe::x25: return gpr_x25;
- case arm64_ehframe::x26: return gpr_x26;
- case arm64_ehframe::x27: return gpr_x27;
- case arm64_ehframe::x28: return gpr_x28;
- case arm64_ehframe::fp: return gpr_fp;
- case arm64_ehframe::sp: return gpr_sp;
- case arm64_ehframe::lr: return gpr_lr;
- case arm64_ehframe::pc: return gpr_pc;
- case arm64_ehframe::cpsr: return gpr_cpsr;
- }
+ } else if (kind == eRegisterKindDWARF) {
+ switch (reg) {
+ case arm64_dwarf::x0:
+ return gpr_x0;
+ case arm64_dwarf::x1:
+ return gpr_x1;
+ case arm64_dwarf::x2:
+ return gpr_x2;
+ case arm64_dwarf::x3:
+ return gpr_x3;
+ case arm64_dwarf::x4:
+ return gpr_x4;
+ case arm64_dwarf::x5:
+ return gpr_x5;
+ case arm64_dwarf::x6:
+ return gpr_x6;
+ case arm64_dwarf::x7:
+ return gpr_x7;
+ case arm64_dwarf::x8:
+ return gpr_x8;
+ case arm64_dwarf::x9:
+ return gpr_x9;
+ case arm64_dwarf::x10:
+ return gpr_x10;
+ case arm64_dwarf::x11:
+ return gpr_x11;
+ case arm64_dwarf::x12:
+ return gpr_x12;
+ case arm64_dwarf::x13:
+ return gpr_x13;
+ case arm64_dwarf::x14:
+ return gpr_x14;
+ case arm64_dwarf::x15:
+ return gpr_x15;
+ case arm64_dwarf::x16:
+ return gpr_x16;
+ case arm64_dwarf::x17:
+ return gpr_x17;
+ case arm64_dwarf::x18:
+ return gpr_x18;
+ case arm64_dwarf::x19:
+ return gpr_x19;
+ case arm64_dwarf::x20:
+ return gpr_x20;
+ case arm64_dwarf::x21:
+ return gpr_x21;
+ case arm64_dwarf::x22:
+ return gpr_x22;
+ case arm64_dwarf::x23:
+ return gpr_x23;
+ case arm64_dwarf::x24:
+ return gpr_x24;
+ case arm64_dwarf::x25:
+ return gpr_x25;
+ case arm64_dwarf::x26:
+ return gpr_x26;
+ case arm64_dwarf::x27:
+ return gpr_x27;
+ case arm64_dwarf::x28:
+ return gpr_x28;
+
+ case arm64_dwarf::fp:
+ return gpr_fp;
+ case arm64_dwarf::sp:
+ return gpr_sp;
+ case arm64_dwarf::lr:
+ return gpr_lr;
+ case arm64_dwarf::pc:
+ return gpr_pc;
+ case arm64_dwarf::cpsr:
+ return gpr_cpsr;
+
+ case arm64_dwarf::v0:
+ return fpu_v0;
+ case arm64_dwarf::v1:
+ return fpu_v1;
+ case arm64_dwarf::v2:
+ return fpu_v2;
+ case arm64_dwarf::v3:
+ return fpu_v3;
+ case arm64_dwarf::v4:
+ return fpu_v4;
+ case arm64_dwarf::v5:
+ return fpu_v5;
+ case arm64_dwarf::v6:
+ return fpu_v6;
+ case arm64_dwarf::v7:
+ return fpu_v7;
+ case arm64_dwarf::v8:
+ return fpu_v8;
+ case arm64_dwarf::v9:
+ return fpu_v9;
+ case arm64_dwarf::v10:
+ return fpu_v10;
+ case arm64_dwarf::v11:
+ return fpu_v11;
+ case arm64_dwarf::v12:
+ return fpu_v12;
+ case arm64_dwarf::v13:
+ return fpu_v13;
+ case arm64_dwarf::v14:
+ return fpu_v14;
+ case arm64_dwarf::v15:
+ return fpu_v15;
+ case arm64_dwarf::v16:
+ return fpu_v16;
+ case arm64_dwarf::v17:
+ return fpu_v17;
+ case arm64_dwarf::v18:
+ return fpu_v18;
+ case arm64_dwarf::v19:
+ return fpu_v19;
+ case arm64_dwarf::v20:
+ return fpu_v20;
+ case arm64_dwarf::v21:
+ return fpu_v21;
+ case arm64_dwarf::v22:
+ return fpu_v22;
+ case arm64_dwarf::v23:
+ return fpu_v23;
+ case arm64_dwarf::v24:
+ return fpu_v24;
+ case arm64_dwarf::v25:
+ return fpu_v25;
+ case arm64_dwarf::v26:
+ return fpu_v26;
+ case arm64_dwarf::v27:
+ return fpu_v27;
+ case arm64_dwarf::v28:
+ return fpu_v28;
+ case arm64_dwarf::v29:
+ return fpu_v29;
+ case arm64_dwarf::v30:
+ return fpu_v30;
+ case arm64_dwarf::v31:
+ return fpu_v31;
+
+ default:
+ break;
}
- else if (kind == eRegisterKindLLDB)
- {
- return reg;
+ } else if (kind == eRegisterKindEHFrame) {
+ switch (reg) {
+ case arm64_ehframe::x0:
+ return gpr_x0;
+ case arm64_ehframe::x1:
+ return gpr_x1;
+ case arm64_ehframe::x2:
+ return gpr_x2;
+ case arm64_ehframe::x3:
+ return gpr_x3;
+ case arm64_ehframe::x4:
+ return gpr_x4;
+ case arm64_ehframe::x5:
+ return gpr_x5;
+ case arm64_ehframe::x6:
+ return gpr_x6;
+ case arm64_ehframe::x7:
+ return gpr_x7;
+ case arm64_ehframe::x8:
+ return gpr_x8;
+ case arm64_ehframe::x9:
+ return gpr_x9;
+ case arm64_ehframe::x10:
+ return gpr_x10;
+ case arm64_ehframe::x11:
+ return gpr_x11;
+ case arm64_ehframe::x12:
+ return gpr_x12;
+ case arm64_ehframe::x13:
+ return gpr_x13;
+ case arm64_ehframe::x14:
+ return gpr_x14;
+ case arm64_ehframe::x15:
+ return gpr_x15;
+ case arm64_ehframe::x16:
+ return gpr_x16;
+ case arm64_ehframe::x17:
+ return gpr_x17;
+ case arm64_ehframe::x18:
+ return gpr_x18;
+ case arm64_ehframe::x19:
+ return gpr_x19;
+ case arm64_ehframe::x20:
+ return gpr_x20;
+ case arm64_ehframe::x21:
+ return gpr_x21;
+ case arm64_ehframe::x22:
+ return gpr_x22;
+ case arm64_ehframe::x23:
+ return gpr_x23;
+ case arm64_ehframe::x24:
+ return gpr_x24;
+ case arm64_ehframe::x25:
+ return gpr_x25;
+ case arm64_ehframe::x26:
+ return gpr_x26;
+ case arm64_ehframe::x27:
+ return gpr_x27;
+ case arm64_ehframe::x28:
+ return gpr_x28;
+ case arm64_ehframe::fp:
+ return gpr_fp;
+ case arm64_ehframe::sp:
+ return gpr_sp;
+ case arm64_ehframe::lr:
+ return gpr_lr;
+ case arm64_ehframe::pc:
+ return gpr_pc;
+ case arm64_ehframe::cpsr:
+ return gpr_cpsr;
}
- return LLDB_INVALID_REGNUM;
+ } else if (kind == eRegisterKindLLDB) {
+ return reg;
+ }
+ return LLDB_INVALID_REGNUM;
}
-
-uint32_t
-RegisterContextDarwin_arm64::NumSupportedHardwareWatchpoints ()
-{
-#if defined (__arm64__) || defined (__aarch64__)
- // autodetect how many watchpoints are supported dynamically...
- static uint32_t g_num_supported_hw_watchpoints = UINT32_MAX;
- if (g_num_supported_hw_watchpoints == UINT32_MAX)
- {
- size_t len;
- uint32_t n = 0;
- len = sizeof (n);
- if (::sysctlbyname("hw.optional.watchpoint", &n, &len, NULL, 0) == 0)
- {
- g_num_supported_hw_watchpoints = n;
- }
+uint32_t RegisterContextDarwin_arm64::NumSupportedHardwareWatchpoints() {
+#if defined(__arm64__) || defined(__aarch64__)
+ // autodetect how many watchpoints are supported dynamically...
+ static uint32_t g_num_supported_hw_watchpoints = UINT32_MAX;
+ if (g_num_supported_hw_watchpoints == UINT32_MAX) {
+ size_t len;
+ uint32_t n = 0;
+ len = sizeof(n);
+ if (::sysctlbyname("hw.optional.watchpoint", &n, &len, NULL, 0) == 0) {
+ g_num_supported_hw_watchpoints = n;
}
- return g_num_supported_hw_watchpoints;
+ }
+ return g_num_supported_hw_watchpoints;
#else
- // TODO: figure out remote case here!
- return 2;
+ // TODO: figure out remote case here!
+ return 2;
#endif
}
+uint32_t RegisterContextDarwin_arm64::SetHardwareWatchpoint(lldb::addr_t addr,
+ size_t size,
+ bool read,
+ bool write) {
+ // if (log) log->Printf
+ // ("RegisterContextDarwin_arm64::EnableHardwareWatchpoint(addr = %8.8p,
+ // size = %u, read = %u, write = %u)", addr, size, read, write);
-uint32_t
-RegisterContextDarwin_arm64::SetHardwareWatchpoint (lldb::addr_t addr, size_t size, bool read, bool write)
-{
-// if (log) log->Printf ("RegisterContextDarwin_arm64::EnableHardwareWatchpoint(addr = %8.8p, size = %u, read = %u, write = %u)", addr, size, read, write);
+ const uint32_t num_hw_watchpoints = NumSupportedHardwareWatchpoints();
- const uint32_t num_hw_watchpoints = NumSupportedHardwareWatchpoints();
+ // Can't watch zero bytes
+ if (size == 0)
+ return LLDB_INVALID_INDEX32;
- // Can't watch zero bytes
- if (size == 0)
- return LLDB_INVALID_INDEX32;
+ // We must watch for either read or write
+ if (read == false && write == false)
+ return LLDB_INVALID_INDEX32;
- // We must watch for either read or write
- if (read == false && write == false)
- return LLDB_INVALID_INDEX32;
+ // Can't watch more than 4 bytes per WVR/WCR pair
+ if (size > 4)
+ return LLDB_INVALID_INDEX32;
- // Can't watch more than 4 bytes per WVR/WCR pair
- if (size > 4)
- return LLDB_INVALID_INDEX32;
+ // We can only watch up to four bytes that follow a 4 byte aligned address
+ // per watchpoint register pair. Since we have at most so we can only watch
+ // until the next 4 byte boundary and we need to make sure we can properly
+ // encode this.
+ uint32_t addr_word_offset = addr % 4;
+ // if (log) log->Printf
+ // ("RegisterContextDarwin_arm64::EnableHardwareWatchpoint() -
+ // addr_word_offset = 0x%8.8x", addr_word_offset);
+
+ uint32_t byte_mask = ((1u << size) - 1u) << addr_word_offset;
+ // if (log) log->Printf
+ // ("RegisterContextDarwin_arm64::EnableHardwareWatchpoint() - byte_mask =
+ // 0x%8.8x", byte_mask);
+ if (byte_mask > 0xfu)
+ return LLDB_INVALID_INDEX32;
- // We can only watch up to four bytes that follow a 4 byte aligned address
- // per watchpoint register pair. Since we have at most so we can only watch
- // until the next 4 byte boundary and we need to make sure we can properly
- // encode this.
- uint32_t addr_word_offset = addr % 4;
-// if (log) log->Printf ("RegisterContextDarwin_arm64::EnableHardwareWatchpoint() - addr_word_offset = 0x%8.8x", addr_word_offset);
+ // Read the debug state
+ int kret = ReadDBG(false);
- uint32_t byte_mask = ((1u << size) - 1u) << addr_word_offset;
-// if (log) log->Printf ("RegisterContextDarwin_arm64::EnableHardwareWatchpoint() - byte_mask = 0x%8.8x", byte_mask);
- if (byte_mask > 0xfu)
- return LLDB_INVALID_INDEX32;
+ if (kret == KERN_SUCCESS) {
+ // Check to make sure we have the needed hardware support
+ uint32_t i = 0;
- // Read the debug state
- int kret = ReadDBG (false);
+ for (i = 0; i < num_hw_watchpoints; ++i) {
+ if ((dbg.wcr[i] & WCR_ENABLE) == 0)
+ break; // We found an available hw breakpoint slot (in i)
+ }
- if (kret == KERN_SUCCESS)
- {
- // Check to make sure we have the needed hardware support
- uint32_t i = 0;
-
- for (i=0; i<num_hw_watchpoints; ++i)
- {
- if ((dbg.wcr[i] & WCR_ENABLE) == 0)
- break; // We found an available hw breakpoint slot (in i)
- }
-
- // See if we found an available hw breakpoint slot above
- if (i < num_hw_watchpoints)
- {
- // Make the byte_mask into a valid Byte Address Select mask
- uint32_t byte_address_select = byte_mask << 5;
- // Make sure bits 1:0 are clear in our address
- dbg.wvr[i] = addr & ~((lldb::addr_t)3);
- dbg.wcr[i] = byte_address_select | // Which bytes that follow the IMVA that we will watch
- S_USER | // Stop only in user mode
- (read ? WCR_LOAD : 0) | // Stop on read access?
- (write ? WCR_STORE : 0) | // Stop on write access?
- WCR_ENABLE; // Enable this watchpoint;
-
- kret = WriteDBG();
-// if (log) log->Printf ("RegisterContextDarwin_arm64::EnableHardwareWatchpoint() WriteDBG() => 0x%8.8x.", kret);
-
- if (kret == KERN_SUCCESS)
- return i;
- }
- else
- {
-// if (log) log->Printf ("RegisterContextDarwin_arm64::EnableHardwareWatchpoint(): All hardware resources (%u) are in use.", num_hw_watchpoints);
- }
+ // See if we found an available hw breakpoint slot above
+ if (i < num_hw_watchpoints) {
+ // Make the byte_mask into a valid Byte Address Select mask
+ uint32_t byte_address_select = byte_mask << 5;
+ // Make sure bits 1:0 are clear in our address
+ dbg.wvr[i] = addr & ~((lldb::addr_t)3);
+ dbg.wcr[i] = byte_address_select | // Which bytes that follow the IMVA
+ // that we will watch
+ S_USER | // Stop only in user mode
+ (read ? WCR_LOAD : 0) | // Stop on read access?
+ (write ? WCR_STORE : 0) | // Stop on write access?
+ WCR_ENABLE; // Enable this watchpoint;
+
+ kret = WriteDBG();
+ // if (log) log->Printf
+ // ("RegisterContextDarwin_arm64::EnableHardwareWatchpoint()
+ // WriteDBG() => 0x%8.8x.", kret);
+
+ if (kret == KERN_SUCCESS)
+ return i;
+ } else {
+ // if (log) log->Printf
+ // ("RegisterContextDarwin_arm64::EnableHardwareWatchpoint():
+ // All hardware resources (%u) are in use.",
+ // num_hw_watchpoints);
}
- return LLDB_INVALID_INDEX32;
+ }
+ return LLDB_INVALID_INDEX32;
}
-bool
-RegisterContextDarwin_arm64::ClearHardwareWatchpoint (uint32_t hw_index)
-{
- int kret = ReadDBG (false);
-
- const uint32_t num_hw_points = NumSupportedHardwareWatchpoints();
- if (kret == KERN_SUCCESS)
- {
- if (hw_index < num_hw_points)
- {
- dbg.wcr[hw_index] = 0;
-// if (log) log->Printf ("RegisterContextDarwin_arm64::ClearHardwareWatchpoint( %u ) - WVR%u = 0x%8.8x WCR%u = 0x%8.8x",
-// hw_index,
-// hw_index,
-// dbg.wvr[hw_index],
-// hw_index,
-// dbg.wcr[hw_index]);
-
- kret = WriteDBG();
-
- if (kret == KERN_SUCCESS)
- return true;
- }
+bool RegisterContextDarwin_arm64::ClearHardwareWatchpoint(uint32_t hw_index) {
+ int kret = ReadDBG(false);
+
+ const uint32_t num_hw_points = NumSupportedHardwareWatchpoints();
+ if (kret == KERN_SUCCESS) {
+ if (hw_index < num_hw_points) {
+ dbg.wcr[hw_index] = 0;
+ // if (log) log->Printf
+ // ("RegisterContextDarwin_arm64::ClearHardwareWatchpoint( %u )
+ // - WVR%u = 0x%8.8x WCR%u = 0x%8.8x",
+ // hw_index,
+ // hw_index,
+ // dbg.wvr[hw_index],
+ // hw_index,
+ // dbg.wcr[hw_index]);
+
+ kret = WriteDBG();
+
+ if (kret == KERN_SUCCESS)
+ return true;
}
- return false;
+ }
+ return false;
}
#endif
diff --git a/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.h b/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.h
index b228c42ade53..2d1fe0555b58 100644
--- a/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.h
+++ b/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.h
@@ -1,4 +1,5 @@
-//===-- RegisterContextDarwin_arm64.h -----------------------------*- C++ -*-===//
+//===-- RegisterContextDarwin_arm64.h -----------------------------*- C++
+//-*-===//
//
// The LLVM Compiler Infrastructure
//
@@ -14,279 +15,222 @@
// C++ Includes
// Other libraries and framework includes
// Project includes
-#include "lldb/lldb-private.h"
#include "lldb/Target/RegisterContext.h"
+#include "lldb/lldb-private.h"
// Break only in privileged or user mode
-#define S_RSVD ((uint32_t)(0u << 1))
-#define S_PRIV ((uint32_t)(1u << 1))
-#define S_USER ((uint32_t)(2u << 1))
-#define S_PRIV_USER ((S_PRIV) | (S_USER))
+#define S_RSVD ((uint32_t)(0u << 1))
+#define S_PRIV ((uint32_t)(1u << 1))
+#define S_USER ((uint32_t)(2u << 1))
+#define S_PRIV_USER ((S_PRIV) | (S_USER))
-#define WCR_ENABLE ((uint32_t)(1u))
+#define WCR_ENABLE ((uint32_t)(1u))
// Watchpoint load/store
-#define WCR_LOAD ((uint32_t)(1u << 3))
-#define WCR_STORE ((uint32_t)(1u << 4))
+#define WCR_LOAD ((uint32_t)(1u << 3))
+#define WCR_STORE ((uint32_t)(1u << 4))
-class RegisterContextDarwin_arm64 : public lldb_private::RegisterContext
-{
+class RegisterContextDarwin_arm64 : public lldb_private::RegisterContext {
public:
- RegisterContextDarwin_arm64(lldb_private::Thread &thread, uint32_t concrete_frame_idx);
-
- ~RegisterContextDarwin_arm64() override;
-
- void
- InvalidateAllRegisters() override;
-
- size_t
- GetRegisterCount() override;
-
- const lldb_private::RegisterInfo *
- GetRegisterInfoAtIndex(size_t reg) override;
-
- size_t
- GetRegisterSetCount() override;
-
- const lldb_private::RegisterSet *
- GetRegisterSet(size_t set) override;
-
- bool
- ReadRegister(const lldb_private::RegisterInfo *reg_info,
- lldb_private::RegisterValue &reg_value) override;
-
- bool
- WriteRegister(const lldb_private::RegisterInfo *reg_info,
- const lldb_private::RegisterValue &reg_value) override;
-
- bool
- ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
-
- bool
- WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
-
- uint32_t
- ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override;
-
- uint32_t
- NumSupportedHardwareWatchpoints() override;
-
- uint32_t
- SetHardwareWatchpoint(lldb::addr_t addr, size_t size, bool read, bool write) override;
-
- bool
- ClearHardwareWatchpoint(uint32_t hw_index) override;
-
- // mirrors <mach/arm/thread_status.h> arm_thread_state64_t
- struct GPR
- {
- uint64_t x[29]; // x0-x28
- uint64_t fp; // x29
- uint64_t lr; // x30
- uint64_t sp; // x31
- uint64_t pc; // pc
- uint32_t cpsr; // cpsr
- };
-
- struct VReg
- {
- uint8_t bytes[16];
- };
-
- // mirrors <mach/arm/thread_status.h> arm_neon_state64_t
- struct FPU
- {
- VReg v[32];
- uint32_t fpsr;
- uint32_t fpcr;
- };
-
- // mirrors <mach/arm/thread_status.h> arm_exception_state64_t
- struct EXC
- {
- uint64_t far; // Virtual Fault Address
- uint32_t esr; // Exception syndrome
- uint32_t exception; // number of arm exception token
- };
-
- // mirrors <mach/arm/thread_status.h> arm_debug_state64_t
- struct DBG
- {
- uint64_t bvr[16];
- uint64_t bcr[16];
- uint64_t wvr[16];
- uint64_t wcr[16];
- uint64_t mdscr_el1;
- };
-
- static void
- LogDBGRegisters (lldb_private::Log *log, const DBG& dbg);
+ RegisterContextDarwin_arm64(lldb_private::Thread &thread,
+ uint32_t concrete_frame_idx);
+
+ ~RegisterContextDarwin_arm64() override;
+
+ void InvalidateAllRegisters() override;
+
+ size_t GetRegisterCount() override;
+
+ const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
+
+ size_t GetRegisterSetCount() override;
+
+ const lldb_private::RegisterSet *GetRegisterSet(size_t set) override;
+
+ bool ReadRegister(const lldb_private::RegisterInfo *reg_info,
+ lldb_private::RegisterValue &reg_value) override;
+
+ bool WriteRegister(const lldb_private::RegisterInfo *reg_info,
+ const lldb_private::RegisterValue &reg_value) override;
+
+ bool ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
+
+ bool WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
+
+ uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
+ uint32_t num) override;
+
+ uint32_t NumSupportedHardwareWatchpoints() override;
+
+ uint32_t SetHardwareWatchpoint(lldb::addr_t addr, size_t size, bool read,
+ bool write) override;
+
+ bool ClearHardwareWatchpoint(uint32_t hw_index) override;
+
+ // mirrors <mach/arm/thread_status.h> arm_thread_state64_t
+ struct GPR {
+ uint64_t x[29]; // x0-x28
+ uint64_t fp; // x29
+ uint64_t lr; // x30
+ uint64_t sp; // x31
+ uint64_t pc; // pc
+ uint32_t cpsr; // cpsr
+ };
+
+ struct VReg {
+ uint8_t bytes[16];
+ };
+
+ // mirrors <mach/arm/thread_status.h> arm_neon_state64_t
+ struct FPU {
+ VReg v[32];
+ uint32_t fpsr;
+ uint32_t fpcr;
+ };
+
+ // mirrors <mach/arm/thread_status.h> arm_exception_state64_t
+ struct EXC {
+ uint64_t far; // Virtual Fault Address
+ uint32_t esr; // Exception syndrome
+ uint32_t exception; // number of arm exception token
+ };
+
+ // mirrors <mach/arm/thread_status.h> arm_debug_state64_t
+ struct DBG {
+ uint64_t bvr[16];
+ uint64_t bcr[16];
+ uint64_t wvr[16];
+ uint64_t wcr[16];
+ uint64_t mdscr_el1;
+ };
+
+ static void LogDBGRegisters(lldb_private::Log *log, const DBG &dbg);
protected:
- enum
- {
- GPRRegSet = 6, // ARM_THREAD_STATE64
- FPURegSet = 17, // ARM_NEON_STATE64
- EXCRegSet = 7, // ARM_EXCEPTION_STATE64
- DBGRegSet = 15 // ARM_DEBUG_STATE64
- };
-
- enum
- {
- GPRWordCount = sizeof(GPR)/sizeof(uint32_t), // ARM_THREAD_STATE64_COUNT
- FPUWordCount = sizeof(FPU)/sizeof(uint32_t), // ARM_NEON_STATE64_COUNT
- EXCWordCount = sizeof(EXC)/sizeof(uint32_t), // ARM_EXCEPTION_STATE64_COUNT
- DBGWordCount = sizeof(DBG)/sizeof(uint32_t) // ARM_DEBUG_STATE64_COUNT
- };
-
- enum
- {
- Read = 0,
- Write = 1,
- kNumErrors = 2
- };
-
- GPR gpr;
- FPU fpu;
- EXC exc;
- DBG dbg;
- int gpr_errs[2]; // Read/Write errors
- int fpu_errs[2]; // Read/Write errors
- int exc_errs[2]; // Read/Write errors
- int dbg_errs[2]; // Read/Write errors
-
- void
- InvalidateAllRegisterStates()
- {
- SetError (GPRRegSet, Read, -1);
- SetError (FPURegSet, Read, -1);
- SetError (EXCRegSet, Read, -1);
+ enum {
+ GPRRegSet = 6, // ARM_THREAD_STATE64
+ FPURegSet = 17, // ARM_NEON_STATE64
+ EXCRegSet = 7, // ARM_EXCEPTION_STATE64
+ DBGRegSet = 15 // ARM_DEBUG_STATE64
+ };
+
+ enum {
+ GPRWordCount = sizeof(GPR) / sizeof(uint32_t), // ARM_THREAD_STATE64_COUNT
+ FPUWordCount = sizeof(FPU) / sizeof(uint32_t), // ARM_NEON_STATE64_COUNT
+ EXCWordCount =
+ sizeof(EXC) / sizeof(uint32_t), // ARM_EXCEPTION_STATE64_COUNT
+ DBGWordCount = sizeof(DBG) / sizeof(uint32_t) // ARM_DEBUG_STATE64_COUNT
+ };
+
+ enum { Read = 0, Write = 1, kNumErrors = 2 };
+
+ GPR gpr;
+ FPU fpu;
+ EXC exc;
+ DBG dbg;
+ int gpr_errs[2]; // Read/Write errors
+ int fpu_errs[2]; // Read/Write errors
+ int exc_errs[2]; // Read/Write errors
+ int dbg_errs[2]; // Read/Write errors
+
+ void InvalidateAllRegisterStates() {
+ SetError(GPRRegSet, Read, -1);
+ SetError(FPURegSet, Read, -1);
+ SetError(EXCRegSet, Read, -1);
+ }
+
+ int GetError(int flavor, uint32_t err_idx) const {
+ if (err_idx < kNumErrors) {
+ switch (flavor) {
+ // When getting all errors, just OR all values together to see if
+ // we got any kind of error.
+ case GPRRegSet:
+ return gpr_errs[err_idx];
+ case FPURegSet:
+ return fpu_errs[err_idx];
+ case EXCRegSet:
+ return exc_errs[err_idx];
+ case DBGRegSet:
+ return dbg_errs[err_idx];
+ default:
+ break;
+ }
}
-
- int
- GetError (int flavor, uint32_t err_idx) const
- {
- if (err_idx < kNumErrors)
- {
- switch (flavor)
- {
- // When getting all errors, just OR all values together to see if
- // we got any kind of error.
- case GPRRegSet: return gpr_errs[err_idx];
- case FPURegSet: return fpu_errs[err_idx];
- case EXCRegSet: return exc_errs[err_idx];
- case DBGRegSet: return dbg_errs[err_idx];
- default: break;
- }
- }
- return -1;
+ return -1;
+ }
+
+ bool SetError(int flavor, uint32_t err_idx, int err) {
+ if (err_idx < kNumErrors) {
+ switch (flavor) {
+ case GPRRegSet:
+ gpr_errs[err_idx] = err;
+ return true;
+
+ case FPURegSet:
+ fpu_errs[err_idx] = err;
+ return true;
+
+ case EXCRegSet:
+ exc_errs[err_idx] = err;
+ return true;
+
+ case DBGRegSet:
+ exc_errs[err_idx] = err;
+ return true;
+
+ default:
+ break;
+ }
}
+ return false;
+ }
- bool
- SetError (int flavor, uint32_t err_idx, int err)
- {
- if (err_idx < kNumErrors)
- {
- switch (flavor)
- {
- case GPRRegSet:
- gpr_errs[err_idx] = err;
- return true;
-
- case FPURegSet:
- fpu_errs[err_idx] = err;
- return true;
-
- case EXCRegSet:
- exc_errs[err_idx] = err;
- return true;
-
- case DBGRegSet:
- exc_errs[err_idx] = err;
- return true;
-
- default: break;
- }
- }
- return false;
- }
+ bool RegisterSetIsCached(int set) const { return GetError(set, Read) == 0; }
- bool
- RegisterSetIsCached (int set) const
- {
- return GetError(set, Read) == 0;
- }
+ int ReadGPR(bool force);
- int
- ReadGPR (bool force);
+ int ReadFPU(bool force);
- int
- ReadFPU (bool force);
+ int ReadEXC(bool force);
- int
- ReadEXC (bool force);
+ int ReadDBG(bool force);
- int
- ReadDBG (bool force);
+ int WriteGPR();
- int
- WriteGPR ();
+ int WriteFPU();
- int
- WriteFPU ();
+ int WriteEXC();
- int
- WriteEXC ();
+ int WriteDBG();
- int
- WriteDBG ();
+ // Subclasses override these to do the actual reading.
+ virtual int DoReadGPR(lldb::tid_t tid, int flavor, GPR &gpr) { return -1; }
-
- // Subclasses override these to do the actual reading.
- virtual int
- DoReadGPR (lldb::tid_t tid, int flavor, GPR &gpr)
- {
- return -1;
- }
-
- virtual int
- DoReadFPU (lldb::tid_t tid, int flavor, FPU &fpu) = 0;
-
- virtual int
- DoReadEXC (lldb::tid_t tid, int flavor, EXC &exc) = 0;
+ virtual int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) = 0;
+
+ virtual int DoReadEXC(lldb::tid_t tid, int flavor, EXC &exc) = 0;
+
+ virtual int DoReadDBG(lldb::tid_t tid, int flavor, DBG &dbg) = 0;
+
+ virtual int DoWriteGPR(lldb::tid_t tid, int flavor, const GPR &gpr) = 0;
- virtual int
- DoReadDBG (lldb::tid_t tid, int flavor, DBG &dbg) = 0;
+ virtual int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
- virtual int
- DoWriteGPR (lldb::tid_t tid, int flavor, const GPR &gpr) = 0;
-
- virtual int
- DoWriteFPU (lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
-
- virtual int
- DoWriteEXC (lldb::tid_t tid, int flavor, const EXC &exc) = 0;
+ virtual int DoWriteEXC(lldb::tid_t tid, int flavor, const EXC &exc) = 0;
- virtual int
- DoWriteDBG (lldb::tid_t tid, int flavor, const DBG &dbg) = 0;
+ virtual int DoWriteDBG(lldb::tid_t tid, int flavor, const DBG &dbg) = 0;
- int
- ReadRegisterSet (uint32_t set, bool force);
+ int ReadRegisterSet(uint32_t set, bool force);
- int
- WriteRegisterSet (uint32_t set);
+ int WriteRegisterSet(uint32_t set);
- static uint32_t
- GetRegisterNumber (uint32_t reg_kind, uint32_t reg_num);
+ static uint32_t GetRegisterNumber(uint32_t reg_kind, uint32_t reg_num);
- static int
- GetSetForNativeRegNum (int reg_num);
+ static int GetSetForNativeRegNum(int reg_num);
- static size_t
- GetRegisterInfosCount ();
+ static size_t GetRegisterInfosCount();
- static const lldb_private::RegisterInfo *
- GetRegisterInfos ();
+ static const lldb_private::RegisterInfo *GetRegisterInfos();
};
#endif // liblldb_RegisterContextDarwin_arm64_h_
diff --git a/source/Plugins/Process/Utility/RegisterContextDarwin_i386.cpp b/source/Plugins/Process/Utility/RegisterContextDarwin_i386.cpp
index 1b01c28b5d96..f42fb00b375f 100644
--- a/source/Plugins/Process/Utility/RegisterContextDarwin_i386.cpp
+++ b/source/Plugins/Process/Utility/RegisterContextDarwin_i386.cpp
@@ -7,9 +7,8 @@
//
//===----------------------------------------------------------------------===//
-
// C Includes
-#include <stddef.h> // offsetof
+#include <stddef.h> // offsetof
// C++ Includes
// Other libraries and framework includes
@@ -34,302 +33,430 @@
using namespace lldb;
using namespace lldb_private;
-enum
-{
- gpr_eax = 0,
- gpr_ebx,
- gpr_ecx,
- gpr_edx,
- gpr_edi,
- gpr_esi,
- gpr_ebp,
- gpr_esp,
- gpr_ss,
- gpr_eflags,
- gpr_eip,
- gpr_cs,
- gpr_ds,
- gpr_es,
- gpr_fs,
- gpr_gs,
-
- fpu_fcw,
- fpu_fsw,
- fpu_ftw,
- fpu_fop,
- fpu_ip,
- fpu_cs,
- fpu_dp,
- fpu_ds,
- fpu_mxcsr,
- fpu_mxcsrmask,
- fpu_stmm0,
- fpu_stmm1,
- fpu_stmm2,
- fpu_stmm3,
- fpu_stmm4,
- fpu_stmm5,
- fpu_stmm6,
- fpu_stmm7,
- fpu_xmm0,
- fpu_xmm1,
- fpu_xmm2,
- fpu_xmm3,
- fpu_xmm4,
- fpu_xmm5,
- fpu_xmm6,
- fpu_xmm7,
-
- exc_trapno,
- exc_err,
- exc_faultvaddr,
-
- k_num_registers,
-
- // Aliases
- fpu_fctrl = fpu_fcw,
- fpu_fstat = fpu_fsw,
- fpu_ftag = fpu_ftw,
- fpu_fiseg = fpu_cs,
- fpu_fioff = fpu_ip,
- fpu_foseg = fpu_ds,
- fpu_fooff = fpu_dp
+enum {
+ gpr_eax = 0,
+ gpr_ebx,
+ gpr_ecx,
+ gpr_edx,
+ gpr_edi,
+ gpr_esi,
+ gpr_ebp,
+ gpr_esp,
+ gpr_ss,
+ gpr_eflags,
+ gpr_eip,
+ gpr_cs,
+ gpr_ds,
+ gpr_es,
+ gpr_fs,
+ gpr_gs,
+
+ fpu_fcw,
+ fpu_fsw,
+ fpu_ftw,
+ fpu_fop,
+ fpu_ip,
+ fpu_cs,
+ fpu_dp,
+ fpu_ds,
+ fpu_mxcsr,
+ fpu_mxcsrmask,
+ fpu_stmm0,
+ fpu_stmm1,
+ fpu_stmm2,
+ fpu_stmm3,
+ fpu_stmm4,
+ fpu_stmm5,
+ fpu_stmm6,
+ fpu_stmm7,
+ fpu_xmm0,
+ fpu_xmm1,
+ fpu_xmm2,
+ fpu_xmm3,
+ fpu_xmm4,
+ fpu_xmm5,
+ fpu_xmm6,
+ fpu_xmm7,
+
+ exc_trapno,
+ exc_err,
+ exc_faultvaddr,
+
+ k_num_registers,
+
+ // Aliases
+ fpu_fctrl = fpu_fcw,
+ fpu_fstat = fpu_fsw,
+ fpu_ftag = fpu_ftw,
+ fpu_fiseg = fpu_cs,
+ fpu_fioff = fpu_ip,
+ fpu_foseg = fpu_ds,
+ fpu_fooff = fpu_dp
};
-enum
-{
- ehframe_eax = 0,
- ehframe_ecx,
- ehframe_edx,
- ehframe_ebx,
- ehframe_ebp,
- ehframe_esp,
- ehframe_esi,
- ehframe_edi,
- ehframe_eip,
- ehframe_eflags
+enum {
+ ehframe_eax = 0,
+ ehframe_ecx,
+ ehframe_edx,
+ ehframe_ebx,
+ ehframe_ebp,
+ ehframe_esp,
+ ehframe_esi,
+ ehframe_edi,
+ ehframe_eip,
+ ehframe_eflags
};
-enum
-{
- dwarf_eax = 0,
- dwarf_ecx,
- dwarf_edx,
- dwarf_ebx,
- dwarf_esp,
- dwarf_ebp,
- dwarf_esi,
- dwarf_edi,
- dwarf_eip,
- dwarf_eflags,
- dwarf_stmm0 = 11,
- dwarf_stmm1,
- dwarf_stmm2,
- dwarf_stmm3,
- dwarf_stmm4,
- dwarf_stmm5,
- dwarf_stmm6,
- dwarf_stmm7,
- dwarf_xmm0 = 21,
- dwarf_xmm1,
- dwarf_xmm2,
- dwarf_xmm3,
- dwarf_xmm4,
- dwarf_xmm5,
- dwarf_xmm6,
- dwarf_xmm7
+enum {
+ dwarf_eax = 0,
+ dwarf_ecx,
+ dwarf_edx,
+ dwarf_ebx,
+ dwarf_esp,
+ dwarf_ebp,
+ dwarf_esi,
+ dwarf_edi,
+ dwarf_eip,
+ dwarf_eflags,
+ dwarf_stmm0 = 11,
+ dwarf_stmm1,
+ dwarf_stmm2,
+ dwarf_stmm3,
+ dwarf_stmm4,
+ dwarf_stmm5,
+ dwarf_stmm6,
+ dwarf_stmm7,
+ dwarf_xmm0 = 21,
+ dwarf_xmm1,
+ dwarf_xmm2,
+ dwarf_xmm3,
+ dwarf_xmm4,
+ dwarf_xmm5,
+ dwarf_xmm6,
+ dwarf_xmm7
};
-
-#define GPR_OFFSET(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_i386::GPR, reg))
-#define FPU_OFFSET(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_i386::FPU, reg) + sizeof (RegisterContextDarwin_i386::GPR))
-#define EXC_OFFSET(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_i386::EXC, reg) + sizeof (RegisterContextDarwin_i386::GPR) + sizeof (RegisterContextDarwin_i386::FPU))
+#define GPR_OFFSET(reg) \
+ (LLVM_EXTENSION offsetof(RegisterContextDarwin_i386::GPR, reg))
+#define FPU_OFFSET(reg) \
+ (LLVM_EXTENSION offsetof(RegisterContextDarwin_i386::FPU, reg) + \
+ sizeof(RegisterContextDarwin_i386::GPR))
+#define EXC_OFFSET(reg) \
+ (LLVM_EXTENSION offsetof(RegisterContextDarwin_i386::EXC, reg) + \
+ sizeof(RegisterContextDarwin_i386::GPR) + \
+ sizeof(RegisterContextDarwin_i386::FPU))
// These macros will auto define the register name, alt name, register size,
// register offset, encoding, format and native register. This ensures that
// the register state structures are defined correctly and have the correct
// sizes and offsets.
-#define DEFINE_GPR(reg, alt) #reg, alt, sizeof(((RegisterContextDarwin_i386::GPR *)NULL)->reg), GPR_OFFSET(reg), eEncodingUint, eFormatHex
-#define DEFINE_FPU_UINT(reg) #reg, NULL, sizeof(((RegisterContextDarwin_i386::FPU *)NULL)->reg), FPU_OFFSET(reg), eEncodingUint, eFormatHex
-#define DEFINE_FPU_VECT(reg, i) #reg#i, NULL, sizeof(((RegisterContextDarwin_i386::FPU *)NULL)->reg[i].bytes), FPU_OFFSET(reg[i]), eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_##reg##i, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_##reg##i }, NULL, NULL
-
-#define DEFINE_EXC(reg) #reg, NULL, sizeof(((RegisterContextDarwin_i386::EXC *)NULL)->reg), EXC_OFFSET(reg), eEncodingUint, eFormatHex
-#define REG_CONTEXT_SIZE (sizeof (RegisterContextDarwin_i386::GPR) + sizeof (RegisterContextDarwin_i386::FPU) + sizeof (RegisterContextDarwin_i386::EXC))
-
-static RegisterInfo g_register_infos[] =
-{
-// Macro auto defines most stuff eh_frame DWARF GENERIC PROCESS PLUGIN LLDB VALUE REGS INVALIDATE REGS
-// =============================== ======================= =================== ========================= ================== ================= ========== ===============
- { DEFINE_GPR(eax , NULL) , { ehframe_eax , dwarf_eax , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_eax }, NULL, NULL},
- { DEFINE_GPR(ebx , NULL) , { ehframe_ebx , dwarf_ebx , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_ebx }, NULL, NULL},
- { DEFINE_GPR(ecx , NULL) , { ehframe_ecx , dwarf_ecx , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_ecx }, NULL, NULL},
- { DEFINE_GPR(edx , NULL) , { ehframe_edx , dwarf_edx , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_edx }, NULL, NULL},
- { DEFINE_GPR(edi , NULL) , { ehframe_edi , dwarf_edi , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_edi }, NULL, NULL},
- { DEFINE_GPR(esi , NULL) , { ehframe_esi , dwarf_esi , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_esi }, NULL, NULL},
- { DEFINE_GPR(ebp , "fp") , { ehframe_ebp , dwarf_ebp , LLDB_REGNUM_GENERIC_FP , LLDB_INVALID_REGNUM, gpr_ebp }, NULL, NULL},
- { DEFINE_GPR(esp , "sp") , { ehframe_esp , dwarf_esp , LLDB_REGNUM_GENERIC_SP , LLDB_INVALID_REGNUM, gpr_esp }, NULL, NULL},
- { DEFINE_GPR(ss , NULL) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_ss }, NULL, NULL},
- { DEFINE_GPR(eflags , "flags") , { ehframe_eflags , dwarf_eflags , LLDB_REGNUM_GENERIC_FLAGS , LLDB_INVALID_REGNUM, gpr_eflags }, NULL, NULL},
- { DEFINE_GPR(eip , "pc") , { ehframe_eip , dwarf_eip , LLDB_REGNUM_GENERIC_PC , LLDB_INVALID_REGNUM, gpr_eip }, NULL, NULL},
- { DEFINE_GPR(cs , NULL) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_cs }, NULL, NULL},
- { DEFINE_GPR(ds , NULL) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_ds }, NULL, NULL},
- { DEFINE_GPR(es , NULL) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_es }, NULL, NULL},
- { DEFINE_GPR(fs , NULL) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_fs }, NULL, NULL},
- { DEFINE_GPR(gs , NULL) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_gs }, NULL, NULL},
-
- { DEFINE_FPU_UINT(fcw) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_fcw }, NULL, NULL},
- { DEFINE_FPU_UINT(fsw) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_fsw }, NULL, NULL},
- { DEFINE_FPU_UINT(ftw) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_ftw }, NULL, NULL},
- { DEFINE_FPU_UINT(fop) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_fop }, NULL, NULL},
- { DEFINE_FPU_UINT(ip) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_ip }, NULL, NULL},
- { DEFINE_FPU_UINT(cs) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_cs }, NULL, NULL},
- { DEFINE_FPU_UINT(dp) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_dp }, NULL, NULL},
- { DEFINE_FPU_UINT(ds) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_ds }, NULL, NULL},
- { DEFINE_FPU_UINT(mxcsr) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_mxcsr }, NULL, NULL},
- { DEFINE_FPU_UINT(mxcsrmask) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_mxcsrmask}, NULL, NULL},
- { DEFINE_FPU_VECT(stmm,0) },
- { DEFINE_FPU_VECT(stmm,1) },
- { DEFINE_FPU_VECT(stmm,2) },
- { DEFINE_FPU_VECT(stmm,3) },
- { DEFINE_FPU_VECT(stmm,4) },
- { DEFINE_FPU_VECT(stmm,5) },
- { DEFINE_FPU_VECT(stmm,6) },
- { DEFINE_FPU_VECT(stmm,7) },
- { DEFINE_FPU_VECT(xmm,0) },
- { DEFINE_FPU_VECT(xmm,1) },
- { DEFINE_FPU_VECT(xmm,2) },
- { DEFINE_FPU_VECT(xmm,3) },
- { DEFINE_FPU_VECT(xmm,4) },
- { DEFINE_FPU_VECT(xmm,5) },
- { DEFINE_FPU_VECT(xmm,6) },
- { DEFINE_FPU_VECT(xmm,7) },
-
- { DEFINE_EXC(trapno) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, exc_trapno }, NULL, NULL},
- { DEFINE_EXC(err) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, exc_err }, NULL, NULL},
- { DEFINE_EXC(faultvaddr) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, exc_faultvaddr }, NULL, NULL}
-};
+#define DEFINE_GPR(reg, alt) \
+ #reg, alt, sizeof(((RegisterContextDarwin_i386::GPR *) NULL)->reg), \
+ GPR_OFFSET(reg), eEncodingUint, eFormatHex
+#define DEFINE_FPU_UINT(reg) \
+ #reg, NULL, sizeof(((RegisterContextDarwin_i386::FPU *) NULL)->reg), \
+ FPU_OFFSET(reg), eEncodingUint, eFormatHex
+#define DEFINE_FPU_VECT(reg, i) \
+ #reg #i, NULL, \
+ sizeof(((RegisterContextDarwin_i386::FPU *) NULL)->reg[i].bytes), \
+ FPU_OFFSET(reg[i]), eEncodingVector, eFormatVectorOfUInt8, \
+ {LLDB_INVALID_REGNUM, dwarf_##reg##i, \
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ fpu_##reg##i }, \
+ nullptr, nullptr, nullptr, 0
+
+#define DEFINE_EXC(reg) \
+ #reg, NULL, sizeof(((RegisterContextDarwin_i386::EXC *) NULL)->reg), \
+ EXC_OFFSET(reg), eEncodingUint, eFormatHex
+#define REG_CONTEXT_SIZE \
+ (sizeof(RegisterContextDarwin_i386::GPR) + \
+ sizeof(RegisterContextDarwin_i386::FPU) + \
+ sizeof(RegisterContextDarwin_i386::EXC))
+
+static RegisterInfo g_register_infos[] = {
+ // Macro auto defines most stuff eh_frame DWARF
+ // GENERIC PROCESS PLUGIN LLDB
+ // =============================== =======================
+ // =================== ========================= ==================
+ // =================
+ {DEFINE_GPR(eax, NULL),
+ {ehframe_eax, dwarf_eax, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ gpr_eax},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(ebx, NULL),
+ {ehframe_ebx, dwarf_ebx, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ gpr_ebx},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(ecx, NULL),
+ {ehframe_ecx, dwarf_ecx, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ gpr_ecx},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(edx, NULL),
+ {ehframe_edx, dwarf_edx, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ gpr_edx},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(edi, NULL),
+ {ehframe_edi, dwarf_edi, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ gpr_edi},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(esi, NULL),
+ {ehframe_esi, dwarf_esi, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ gpr_esi},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(ebp, "fp"),
+ {ehframe_ebp, dwarf_ebp, LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM,
+ gpr_ebp},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(esp, "sp"),
+ {ehframe_esp, dwarf_esp, LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM,
+ gpr_esp},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(ss, NULL),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_ss},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(eflags, "flags"),
+ {ehframe_eflags, dwarf_eflags, LLDB_REGNUM_GENERIC_FLAGS,
+ LLDB_INVALID_REGNUM, gpr_eflags},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(eip, "pc"),
+ {ehframe_eip, dwarf_eip, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM,
+ gpr_eip},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(cs, NULL),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_cs},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(ds, NULL),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_ds},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(es, NULL),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_es},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(fs, NULL),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_fs},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(gs, NULL),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_gs},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+
+ {DEFINE_FPU_UINT(fcw),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_fcw},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_UINT(fsw),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_fsw},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_UINT(ftw),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_ftw},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_UINT(fop),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_fop},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_UINT(ip),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_ip},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_UINT(cs),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_cs},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_UINT(dp),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_dp},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_UINT(ds),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_ds},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_UINT(mxcsr),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_mxcsr},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_UINT(mxcsrmask),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_mxcsrmask},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_VECT(stmm, 0)},
+ {DEFINE_FPU_VECT(stmm, 1)},
+ {DEFINE_FPU_VECT(stmm, 2)},
+ {DEFINE_FPU_VECT(stmm, 3)},
+ {DEFINE_FPU_VECT(stmm, 4)},
+ {DEFINE_FPU_VECT(stmm, 5)},
+ {DEFINE_FPU_VECT(stmm, 6)},
+ {DEFINE_FPU_VECT(stmm, 7)},
+ {DEFINE_FPU_VECT(xmm, 0)},
+ {DEFINE_FPU_VECT(xmm, 1)},
+ {DEFINE_FPU_VECT(xmm, 2)},
+ {DEFINE_FPU_VECT(xmm, 3)},
+ {DEFINE_FPU_VECT(xmm, 4)},
+ {DEFINE_FPU_VECT(xmm, 5)},
+ {DEFINE_FPU_VECT(xmm, 6)},
+ {DEFINE_FPU_VECT(xmm, 7)},
+
+ {DEFINE_EXC(trapno),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, exc_trapno},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_EXC(err),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, exc_err},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_EXC(faultvaddr),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, exc_faultvaddr},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0}};
static size_t k_num_register_infos = llvm::array_lengthof(g_register_infos);
-RegisterContextDarwin_i386::RegisterContextDarwin_i386 (Thread &thread, uint32_t concrete_frame_idx) :
- RegisterContext(thread, concrete_frame_idx),
- gpr(),
- fpu(),
- exc()
-{
- uint32_t i;
- for (i=0; i<kNumErrors; i++)
- {
- gpr_errs[i] = -1;
- fpu_errs[i] = -1;
- exc_errs[i] = -1;
- }
-}
-
-RegisterContextDarwin_i386::~RegisterContextDarwin_i386()
-{
+RegisterContextDarwin_i386::RegisterContextDarwin_i386(
+ Thread &thread, uint32_t concrete_frame_idx)
+ : RegisterContext(thread, concrete_frame_idx), gpr(), fpu(), exc() {
+ uint32_t i;
+ for (i = 0; i < kNumErrors; i++) {
+ gpr_errs[i] = -1;
+ fpu_errs[i] = -1;
+ exc_errs[i] = -1;
+ }
}
+RegisterContextDarwin_i386::~RegisterContextDarwin_i386() {}
-void
-RegisterContextDarwin_i386::InvalidateAllRegisters ()
-{
- InvalidateAllRegisterStates();
+void RegisterContextDarwin_i386::InvalidateAllRegisters() {
+ InvalidateAllRegisterStates();
}
-
-size_t
-RegisterContextDarwin_i386::GetRegisterCount ()
-{
- assert(k_num_register_infos == k_num_registers);
- return k_num_registers;
+size_t RegisterContextDarwin_i386::GetRegisterCount() {
+ assert(k_num_register_infos == k_num_registers);
+ return k_num_registers;
}
const RegisterInfo *
-RegisterContextDarwin_i386::GetRegisterInfoAtIndex (size_t reg)
-{
- assert(k_num_register_infos == k_num_registers);
- if (reg < k_num_registers)
- return &g_register_infos[reg];
- return NULL;
+RegisterContextDarwin_i386::GetRegisterInfoAtIndex(size_t reg) {
+ assert(k_num_register_infos == k_num_registers);
+ if (reg < k_num_registers)
+ return &g_register_infos[reg];
+ return NULL;
}
-size_t
-RegisterContextDarwin_i386::GetRegisterInfosCount ()
-{
- return k_num_register_infos;
+size_t RegisterContextDarwin_i386::GetRegisterInfosCount() {
+ return k_num_register_infos;
}
-const RegisterInfo *
-RegisterContextDarwin_i386::GetRegisterInfos ()
-{
- return g_register_infos;
+const RegisterInfo *RegisterContextDarwin_i386::GetRegisterInfos() {
+ return g_register_infos;
}
-
// General purpose registers
-static uint32_t
-g_gpr_regnums[] =
-{
- gpr_eax,
- gpr_ebx,
- gpr_ecx,
- gpr_edx,
- gpr_edi,
- gpr_esi,
- gpr_ebp,
- gpr_esp,
- gpr_ss,
- gpr_eflags,
- gpr_eip,
- gpr_cs,
- gpr_ds,
- gpr_es,
- gpr_fs,
- gpr_gs
-};
+static uint32_t g_gpr_regnums[] = {
+ gpr_eax, gpr_ebx, gpr_ecx, gpr_edx, gpr_edi, gpr_esi, gpr_ebp, gpr_esp,
+ gpr_ss, gpr_eflags, gpr_eip, gpr_cs, gpr_ds, gpr_es, gpr_fs, gpr_gs};
// Floating point registers
-static uint32_t
-g_fpu_regnums[] =
-{
- fpu_fcw,
- fpu_fsw,
- fpu_ftw,
- fpu_fop,
- fpu_ip,
- fpu_cs,
- fpu_dp,
- fpu_ds,
- fpu_mxcsr,
- fpu_mxcsrmask,
- fpu_stmm0,
- fpu_stmm1,
- fpu_stmm2,
- fpu_stmm3,
- fpu_stmm4,
- fpu_stmm5,
- fpu_stmm6,
- fpu_stmm7,
- fpu_xmm0,
- fpu_xmm1,
- fpu_xmm2,
- fpu_xmm3,
- fpu_xmm4,
- fpu_xmm5,
- fpu_xmm6,
- fpu_xmm7
-};
+static uint32_t g_fpu_regnums[] = {
+ fpu_fcw, fpu_fsw, fpu_ftw, fpu_fop, fpu_ip, fpu_cs,
+ fpu_dp, fpu_ds, fpu_mxcsr, fpu_mxcsrmask, fpu_stmm0, fpu_stmm1,
+ fpu_stmm2, fpu_stmm3, fpu_stmm4, fpu_stmm5, fpu_stmm6, fpu_stmm7,
+ fpu_xmm0, fpu_xmm1, fpu_xmm2, fpu_xmm3, fpu_xmm4, fpu_xmm5,
+ fpu_xmm6, fpu_xmm7};
// Exception registers
-static uint32_t
-g_exc_regnums[] =
-{
- exc_trapno,
- exc_err,
- exc_faultvaddr
-};
+static uint32_t g_exc_regnums[] = {exc_trapno, exc_err, exc_faultvaddr};
// Number of registers in each register set
const size_t k_num_gpr_registers = llvm::array_lengthof(g_gpr_regnums);
@@ -341,539 +468,514 @@ const size_t k_num_exc_registers = llvm::array_lengthof(g_exc_regnums);
// of zero is for all registers, followed by other registers sets. The
// register information for the all register set need not be filled in.
//----------------------------------------------------------------------
-static const RegisterSet g_reg_sets[] =
-{
- { "General Purpose Registers", "gpr", k_num_gpr_registers, g_gpr_regnums, },
- { "Floating Point Registers", "fpu", k_num_fpu_registers, g_fpu_regnums },
- { "Exception State Registers", "exc", k_num_exc_registers, g_exc_regnums }
-};
+static const RegisterSet g_reg_sets[] = {
+ {
+ "General Purpose Registers", "gpr", k_num_gpr_registers, g_gpr_regnums,
+ },
+ {"Floating Point Registers", "fpu", k_num_fpu_registers, g_fpu_regnums},
+ {"Exception State Registers", "exc", k_num_exc_registers, g_exc_regnums}};
const size_t k_num_regsets = llvm::array_lengthof(g_reg_sets);
-
-size_t
-RegisterContextDarwin_i386::GetRegisterSetCount ()
-{
- return k_num_regsets;
+size_t RegisterContextDarwin_i386::GetRegisterSetCount() {
+ return k_num_regsets;
}
-const RegisterSet *
-RegisterContextDarwin_i386::GetRegisterSet (size_t reg_set)
-{
- if (reg_set < k_num_regsets)
- return &g_reg_sets[reg_set];
- return NULL;
+const RegisterSet *RegisterContextDarwin_i386::GetRegisterSet(size_t reg_set) {
+ if (reg_set < k_num_regsets)
+ return &g_reg_sets[reg_set];
+ return NULL;
}
-
//----------------------------------------------------------------------
// Register information definitions for 32 bit i386.
//----------------------------------------------------------------------
-int
-RegisterContextDarwin_i386::GetSetForNativeRegNum (int reg_num)
-{
- if (reg_num < fpu_fcw)
- return GPRRegSet;
- else if (reg_num < exc_trapno)
- return FPURegSet;
- else if (reg_num < k_num_registers)
- return EXCRegSet;
- return -1;
+int RegisterContextDarwin_i386::GetSetForNativeRegNum(int reg_num) {
+ if (reg_num < fpu_fcw)
+ return GPRRegSet;
+ else if (reg_num < exc_trapno)
+ return FPURegSet;
+ else if (reg_num < k_num_registers)
+ return EXCRegSet;
+ return -1;
}
-
-void
-RegisterContextDarwin_i386::LogGPR(Log *log, const char *title)
-{
- if (log)
- {
- if (title)
- log->Printf ("%s", title);
- for (uint32_t i=0; i<k_num_gpr_registers; i++)
- {
- uint32_t reg = gpr_eax + i;
- log->Printf("%12s = 0x%8.8x", g_register_infos[reg].name, (&gpr.eax)[reg]);
- }
+void RegisterContextDarwin_i386::LogGPR(Log *log, const char *title) {
+ if (log) {
+ if (title)
+ log->Printf("%s", title);
+ for (uint32_t i = 0; i < k_num_gpr_registers; i++) {
+ uint32_t reg = gpr_eax + i;
+ log->Printf("%12s = 0x%8.8x", g_register_infos[reg].name,
+ (&gpr.eax)[reg]);
}
+ }
}
-
-
-int
-RegisterContextDarwin_i386::ReadGPR (bool force)
-{
- int set = GPRRegSet;
- if (force || !RegisterSetIsCached(set))
- {
- SetError(set, Read, DoReadGPR(GetThreadID(), set, gpr));
- }
- return GetError(set, Read);
+int RegisterContextDarwin_i386::ReadGPR(bool force) {
+ int set = GPRRegSet;
+ if (force || !RegisterSetIsCached(set)) {
+ SetError(set, Read, DoReadGPR(GetThreadID(), set, gpr));
+ }
+ return GetError(set, Read);
}
-int
-RegisterContextDarwin_i386::ReadFPU (bool force)
-{
- int set = FPURegSet;
- if (force || !RegisterSetIsCached(set))
- {
- SetError(set, Read, DoReadFPU(GetThreadID(), set, fpu));
- }
- return GetError(set, Read);
+int RegisterContextDarwin_i386::ReadFPU(bool force) {
+ int set = FPURegSet;
+ if (force || !RegisterSetIsCached(set)) {
+ SetError(set, Read, DoReadFPU(GetThreadID(), set, fpu));
+ }
+ return GetError(set, Read);
}
-int
-RegisterContextDarwin_i386::ReadEXC (bool force)
-{
- int set = EXCRegSet;
- if (force || !RegisterSetIsCached(set))
- {
- SetError(set, Read, DoReadEXC(GetThreadID(), set, exc));
- }
- return GetError(set, Read);
+int RegisterContextDarwin_i386::ReadEXC(bool force) {
+ int set = EXCRegSet;
+ if (force || !RegisterSetIsCached(set)) {
+ SetError(set, Read, DoReadEXC(GetThreadID(), set, exc));
+ }
+ return GetError(set, Read);
}
-int
-RegisterContextDarwin_i386::WriteGPR ()
-{
- int set = GPRRegSet;
- if (!RegisterSetIsCached(set))
- {
- SetError (set, Write, -1);
- return -1;
- }
- SetError (set, Write, DoWriteGPR(GetThreadID(), set, gpr));
- SetError (set, Read, -1);
- return GetError(set, Write);
+int RegisterContextDarwin_i386::WriteGPR() {
+ int set = GPRRegSet;
+ if (!RegisterSetIsCached(set)) {
+ SetError(set, Write, -1);
+ return -1;
+ }
+ SetError(set, Write, DoWriteGPR(GetThreadID(), set, gpr));
+ SetError(set, Read, -1);
+ return GetError(set, Write);
}
-int
-RegisterContextDarwin_i386::WriteFPU ()
-{
- int set = FPURegSet;
- if (!RegisterSetIsCached(set))
- {
- SetError (set, Write, -1);
- return -1;
- }
- SetError (set, Write, DoWriteFPU(GetThreadID(), set, fpu));
- SetError (set, Read, -1);
- return GetError(set, Write);
+int RegisterContextDarwin_i386::WriteFPU() {
+ int set = FPURegSet;
+ if (!RegisterSetIsCached(set)) {
+ SetError(set, Write, -1);
+ return -1;
+ }
+ SetError(set, Write, DoWriteFPU(GetThreadID(), set, fpu));
+ SetError(set, Read, -1);
+ return GetError(set, Write);
}
-int
-RegisterContextDarwin_i386::WriteEXC ()
-{
- int set = EXCRegSet;
- if (!RegisterSetIsCached(set))
- {
- SetError (set, Write, -1);
- return -1;
- }
- SetError (set, Write, DoWriteEXC(GetThreadID(), set, exc));
- SetError (set, Read, -1);
- return GetError(set, Write);
+int RegisterContextDarwin_i386::WriteEXC() {
+ int set = EXCRegSet;
+ if (!RegisterSetIsCached(set)) {
+ SetError(set, Write, -1);
+ return -1;
+ }
+ SetError(set, Write, DoWriteEXC(GetThreadID(), set, exc));
+ SetError(set, Read, -1);
+ return GetError(set, Write);
}
-int
-RegisterContextDarwin_i386::ReadRegisterSet (uint32_t set, bool force)
-{
- switch (set)
- {
- case GPRRegSet: return ReadGPR(force);
- case FPURegSet: return ReadFPU(force);
- case EXCRegSet: return ReadEXC(force);
- default: break;
- }
- return -1;
+int RegisterContextDarwin_i386::ReadRegisterSet(uint32_t set, bool force) {
+ switch (set) {
+ case GPRRegSet:
+ return ReadGPR(force);
+ case FPURegSet:
+ return ReadFPU(force);
+ case EXCRegSet:
+ return ReadEXC(force);
+ default:
+ break;
+ }
+ return -1;
}
-int
-RegisterContextDarwin_i386::WriteRegisterSet (uint32_t set)
-{
- // Make sure we have a valid context to set.
- if (RegisterSetIsCached(set))
- {
- switch (set)
- {
- case GPRRegSet: return WriteGPR();
- case FPURegSet: return WriteFPU();
- case EXCRegSet: return WriteEXC();
- default: break;
- }
+int RegisterContextDarwin_i386::WriteRegisterSet(uint32_t set) {
+ // Make sure we have a valid context to set.
+ if (RegisterSetIsCached(set)) {
+ switch (set) {
+ case GPRRegSet:
+ return WriteGPR();
+ case FPURegSet:
+ return WriteFPU();
+ case EXCRegSet:
+ return WriteEXC();
+ default:
+ break;
}
- return -1;
+ }
+ return -1;
}
-bool
-RegisterContextDarwin_i386::ReadRegister (const RegisterInfo *reg_info,
- RegisterValue &value)
-{
- const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
- int set = RegisterContextDarwin_i386::GetSetForNativeRegNum (reg);
+bool RegisterContextDarwin_i386::ReadRegister(const RegisterInfo *reg_info,
+ RegisterValue &value) {
+ const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
+ int set = RegisterContextDarwin_i386::GetSetForNativeRegNum(reg);
- if (set == -1)
- return false;
+ if (set == -1)
+ return false;
- if (ReadRegisterSet(set, false) != 0)
- return false;
+ if (ReadRegisterSet(set, false) != 0)
+ return false;
- switch (reg)
- {
- case gpr_eax:
- case gpr_ebx:
- case gpr_ecx:
- case gpr_edx:
- case gpr_edi:
- case gpr_esi:
- case gpr_ebp:
- case gpr_esp:
- case gpr_ss:
- case gpr_eflags:
- case gpr_eip:
- case gpr_cs:
- case gpr_ds:
- case gpr_es:
- case gpr_fs:
- case gpr_gs:
- value = (&gpr.eax)[reg - gpr_eax];
- break;
-
- case fpu_fcw:
- value = fpu.fcw;
- break;
-
- case fpu_fsw:
- value = fpu.fsw;
- break;
-
- case fpu_ftw:
- value = fpu.ftw;
- break;
-
- case fpu_fop:
- value = fpu.fop;
- break;
-
- case fpu_ip:
- value = fpu.ip;
- break;
-
- case fpu_cs:
- value = fpu.cs;
- break;
-
- case fpu_dp:
- value = fpu.dp;
- break;
-
- case fpu_ds:
- value = fpu.ds;
- break;
-
- case fpu_mxcsr:
- value = fpu.mxcsr;
- break;
-
- case fpu_mxcsrmask:
- value = fpu.mxcsrmask;
- break;
-
- case fpu_stmm0:
- case fpu_stmm1:
- case fpu_stmm2:
- case fpu_stmm3:
- case fpu_stmm4:
- case fpu_stmm5:
- case fpu_stmm6:
- case fpu_stmm7:
- // These values don't fit into scalar types,
- // RegisterContext::ReadRegisterBytes() must be used for these
- // registers
- //::memcpy (reg_value.value.vector.uint8, fpu.stmm[reg - fpu_stmm0].bytes, 10);
- return false;
-
- case fpu_xmm0:
- case fpu_xmm1:
- case fpu_xmm2:
- case fpu_xmm3:
- case fpu_xmm4:
- case fpu_xmm5:
- case fpu_xmm6:
- case fpu_xmm7:
- // These values don't fit into scalar types, RegisterContext::ReadRegisterBytes()
- // must be used for these registers
- //::memcpy (reg_value.value.vector.uint8, fpu.xmm[reg - fpu_xmm0].bytes, 16);
- return false;
-
- case exc_trapno:
- value = exc.trapno;
- break;
-
- case exc_err:
- value = exc.err;
- break;
-
- case exc_faultvaddr:
- value = exc.faultvaddr;
- break;
+ switch (reg) {
+ case gpr_eax:
+ case gpr_ebx:
+ case gpr_ecx:
+ case gpr_edx:
+ case gpr_edi:
+ case gpr_esi:
+ case gpr_ebp:
+ case gpr_esp:
+ case gpr_ss:
+ case gpr_eflags:
+ case gpr_eip:
+ case gpr_cs:
+ case gpr_ds:
+ case gpr_es:
+ case gpr_fs:
+ case gpr_gs:
+ value = (&gpr.eax)[reg - gpr_eax];
+ break;
+
+ case fpu_fcw:
+ value = fpu.fcw;
+ break;
+
+ case fpu_fsw:
+ value = fpu.fsw;
+ break;
+
+ case fpu_ftw:
+ value = fpu.ftw;
+ break;
+
+ case fpu_fop:
+ value = fpu.fop;
+ break;
+
+ case fpu_ip:
+ value = fpu.ip;
+ break;
+
+ case fpu_cs:
+ value = fpu.cs;
+ break;
+
+ case fpu_dp:
+ value = fpu.dp;
+ break;
+
+ case fpu_ds:
+ value = fpu.ds;
+ break;
+
+ case fpu_mxcsr:
+ value = fpu.mxcsr;
+ break;
+
+ case fpu_mxcsrmask:
+ value = fpu.mxcsrmask;
+ break;
+
+ case fpu_stmm0:
+ case fpu_stmm1:
+ case fpu_stmm2:
+ case fpu_stmm3:
+ case fpu_stmm4:
+ case fpu_stmm5:
+ case fpu_stmm6:
+ case fpu_stmm7:
+ // These values don't fit into scalar types,
+ // RegisterContext::ReadRegisterBytes() must be used for these
+ // registers
+ //::memcpy (reg_value.value.vector.uint8, fpu.stmm[reg - fpu_stmm0].bytes,
+ //10);
+ return false;
- default:
- return false;
- }
- return true;
-}
+ case fpu_xmm0:
+ case fpu_xmm1:
+ case fpu_xmm2:
+ case fpu_xmm3:
+ case fpu_xmm4:
+ case fpu_xmm5:
+ case fpu_xmm6:
+ case fpu_xmm7:
+ // These values don't fit into scalar types,
+ // RegisterContext::ReadRegisterBytes()
+ // must be used for these registers
+ //::memcpy (reg_value.value.vector.uint8, fpu.xmm[reg - fpu_xmm0].bytes,
+ //16);
+ return false;
+ case exc_trapno:
+ value = exc.trapno;
+ break;
-bool
-RegisterContextDarwin_i386::WriteRegister (const RegisterInfo *reg_info,
- const RegisterValue &value)
-{
- const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
- int set = GetSetForNativeRegNum (reg);
+ case exc_err:
+ value = exc.err;
+ break;
- if (set == -1)
- return false;
+ case exc_faultvaddr:
+ value = exc.faultvaddr;
+ break;
- if (ReadRegisterSet(set, false) != 0)
- return false;
+ default:
+ return false;
+ }
+ return true;
+}
- switch (reg)
- {
- case gpr_eax:
- case gpr_ebx:
- case gpr_ecx:
- case gpr_edx:
- case gpr_edi:
- case gpr_esi:
- case gpr_ebp:
- case gpr_esp:
- case gpr_ss:
- case gpr_eflags:
- case gpr_eip:
- case gpr_cs:
- case gpr_ds:
- case gpr_es:
- case gpr_fs:
- case gpr_gs:
- (&gpr.eax)[reg - gpr_eax] = value.GetAsUInt32();
- break;
-
- case fpu_fcw:
- fpu.fcw = value.GetAsUInt16();
- break;
-
- case fpu_fsw:
- fpu.fsw = value.GetAsUInt16();
- break;
-
- case fpu_ftw:
- fpu.ftw = value.GetAsUInt8();
- break;
-
- case fpu_fop:
- fpu.fop = value.GetAsUInt16();
- break;
-
- case fpu_ip:
- fpu.ip = value.GetAsUInt32();
- break;
-
- case fpu_cs:
- fpu.cs = value.GetAsUInt16();
- break;
-
- case fpu_dp:
- fpu.dp = value.GetAsUInt32();
- break;
-
- case fpu_ds:
- fpu.ds = value.GetAsUInt16();
- break;
-
- case fpu_mxcsr:
- fpu.mxcsr = value.GetAsUInt32();
- break;
-
- case fpu_mxcsrmask:
- fpu.mxcsrmask = value.GetAsUInt32();
- break;
-
- case fpu_stmm0:
- case fpu_stmm1:
- case fpu_stmm2:
- case fpu_stmm3:
- case fpu_stmm4:
- case fpu_stmm5:
- case fpu_stmm6:
- case fpu_stmm7:
- // These values don't fit into scalar types, RegisterContext::ReadRegisterBytes()
- // must be used for these registers
- ::memcpy (fpu.stmm[reg - fpu_stmm0].bytes, value.GetBytes(), value.GetByteSize());
- return false;
-
- case fpu_xmm0:
- case fpu_xmm1:
- case fpu_xmm2:
- case fpu_xmm3:
- case fpu_xmm4:
- case fpu_xmm5:
- case fpu_xmm6:
- case fpu_xmm7:
- // These values don't fit into scalar types, RegisterContext::ReadRegisterBytes()
- // must be used for these registers
- ::memcpy (fpu.xmm[reg - fpu_xmm0].bytes, value.GetBytes(), value.GetByteSize());
- return false;
-
- case exc_trapno:
- exc.trapno = value.GetAsUInt32();
- break;
-
- case exc_err:
- exc.err = value.GetAsUInt32();
- break;
-
- case exc_faultvaddr:
- exc.faultvaddr = value.GetAsUInt32();
- break;
+bool RegisterContextDarwin_i386::WriteRegister(const RegisterInfo *reg_info,
+ const RegisterValue &value) {
+ const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
+ int set = GetSetForNativeRegNum(reg);
- default:
- return false;
- }
- return WriteRegisterSet(set) == 0;
-}
+ if (set == -1)
+ return false;
-bool
-RegisterContextDarwin_i386::ReadAllRegisterValues (lldb::DataBufferSP &data_sp)
-{
- data_sp.reset (new DataBufferHeap (REG_CONTEXT_SIZE, 0));
- if (data_sp &&
- ReadGPR (false) == 0 &&
- ReadFPU (false) == 0 &&
- ReadEXC (false) == 0)
- {
- uint8_t *dst = data_sp->GetBytes();
- ::memcpy (dst, &gpr, sizeof(gpr));
- dst += sizeof(gpr);
+ if (ReadRegisterSet(set, false) != 0)
+ return false;
- ::memcpy (dst, &fpu, sizeof(fpu));
- dst += sizeof(gpr);
+ switch (reg) {
+ case gpr_eax:
+ case gpr_ebx:
+ case gpr_ecx:
+ case gpr_edx:
+ case gpr_edi:
+ case gpr_esi:
+ case gpr_ebp:
+ case gpr_esp:
+ case gpr_ss:
+ case gpr_eflags:
+ case gpr_eip:
+ case gpr_cs:
+ case gpr_ds:
+ case gpr_es:
+ case gpr_fs:
+ case gpr_gs:
+ (&gpr.eax)[reg - gpr_eax] = value.GetAsUInt32();
+ break;
+
+ case fpu_fcw:
+ fpu.fcw = value.GetAsUInt16();
+ break;
+
+ case fpu_fsw:
+ fpu.fsw = value.GetAsUInt16();
+ break;
+
+ case fpu_ftw:
+ fpu.ftw = value.GetAsUInt8();
+ break;
+
+ case fpu_fop:
+ fpu.fop = value.GetAsUInt16();
+ break;
+
+ case fpu_ip:
+ fpu.ip = value.GetAsUInt32();
+ break;
+
+ case fpu_cs:
+ fpu.cs = value.GetAsUInt16();
+ break;
+
+ case fpu_dp:
+ fpu.dp = value.GetAsUInt32();
+ break;
+
+ case fpu_ds:
+ fpu.ds = value.GetAsUInt16();
+ break;
+
+ case fpu_mxcsr:
+ fpu.mxcsr = value.GetAsUInt32();
+ break;
+
+ case fpu_mxcsrmask:
+ fpu.mxcsrmask = value.GetAsUInt32();
+ break;
+
+ case fpu_stmm0:
+ case fpu_stmm1:
+ case fpu_stmm2:
+ case fpu_stmm3:
+ case fpu_stmm4:
+ case fpu_stmm5:
+ case fpu_stmm6:
+ case fpu_stmm7:
+ // These values don't fit into scalar types,
+ // RegisterContext::ReadRegisterBytes()
+ // must be used for these registers
+ ::memcpy(fpu.stmm[reg - fpu_stmm0].bytes, value.GetBytes(),
+ value.GetByteSize());
+ return false;
- ::memcpy (dst, &exc, sizeof(exc));
- return true;
- }
+ case fpu_xmm0:
+ case fpu_xmm1:
+ case fpu_xmm2:
+ case fpu_xmm3:
+ case fpu_xmm4:
+ case fpu_xmm5:
+ case fpu_xmm6:
+ case fpu_xmm7:
+ // These values don't fit into scalar types,
+ // RegisterContext::ReadRegisterBytes()
+ // must be used for these registers
+ ::memcpy(fpu.xmm[reg - fpu_xmm0].bytes, value.GetBytes(),
+ value.GetByteSize());
return false;
-}
-bool
-RegisterContextDarwin_i386::WriteAllRegisterValues (const lldb::DataBufferSP &data_sp)
-{
- if (data_sp && data_sp->GetByteSize() == REG_CONTEXT_SIZE)
- {
- const uint8_t *src = data_sp->GetBytes();
- ::memcpy (&gpr, src, sizeof(gpr));
- src += sizeof(gpr);
-
- ::memcpy (&fpu, src, sizeof(fpu));
- src += sizeof(gpr);
-
- ::memcpy (&exc, src, sizeof(exc));
- uint32_t success_count = 0;
- if (WriteGPR() == 0)
- ++success_count;
- if (WriteFPU() == 0)
- ++success_count;
- if (WriteEXC() == 0)
- ++success_count;
- return success_count == 3;
- }
+ case exc_trapno:
+ exc.trapno = value.GetAsUInt32();
+ break;
+
+ case exc_err:
+ exc.err = value.GetAsUInt32();
+ break;
+
+ case exc_faultvaddr:
+ exc.faultvaddr = value.GetAsUInt32();
+ break;
+
+ default:
return false;
+ }
+ return WriteRegisterSet(set) == 0;
}
+bool RegisterContextDarwin_i386::ReadAllRegisterValues(
+ lldb::DataBufferSP &data_sp) {
+ data_sp.reset(new DataBufferHeap(REG_CONTEXT_SIZE, 0));
+ if (data_sp && ReadGPR(false) == 0 && ReadFPU(false) == 0 &&
+ ReadEXC(false) == 0) {
+ uint8_t *dst = data_sp->GetBytes();
+ ::memcpy(dst, &gpr, sizeof(gpr));
+ dst += sizeof(gpr);
-uint32_t
-RegisterContextDarwin_i386::ConvertRegisterKindToRegisterNumber (lldb::RegisterKind kind, uint32_t reg)
-{
- if (kind == eRegisterKindGeneric)
- {
- switch (reg)
- {
- case LLDB_REGNUM_GENERIC_PC: return gpr_eip;
- case LLDB_REGNUM_GENERIC_SP: return gpr_esp;
- case LLDB_REGNUM_GENERIC_FP: return gpr_ebp;
- case LLDB_REGNUM_GENERIC_FLAGS: return gpr_eflags;
- case LLDB_REGNUM_GENERIC_RA:
- default:
- break;
- }
- }
- else if (kind == eRegisterKindEHFrame || kind == eRegisterKindDWARF)
- {
- switch (reg)
- {
- case dwarf_eax: return gpr_eax;
- case dwarf_ecx: return gpr_ecx;
- case dwarf_edx: return gpr_edx;
- case dwarf_ebx: return gpr_ebx;
- case dwarf_esp: return gpr_esp;
- case dwarf_ebp: return gpr_ebp;
- case dwarf_esi: return gpr_esi;
- case dwarf_edi: return gpr_edi;
- case dwarf_eip: return gpr_eip;
- case dwarf_eflags: return gpr_eflags;
- case dwarf_stmm0: return fpu_stmm0;
- case dwarf_stmm1: return fpu_stmm1;
- case dwarf_stmm2: return fpu_stmm2;
- case dwarf_stmm3: return fpu_stmm3;
- case dwarf_stmm4: return fpu_stmm4;
- case dwarf_stmm5: return fpu_stmm5;
- case dwarf_stmm6: return fpu_stmm6;
- case dwarf_stmm7: return fpu_stmm7;
- case dwarf_xmm0: return fpu_xmm0;
- case dwarf_xmm1: return fpu_xmm1;
- case dwarf_xmm2: return fpu_xmm2;
- case dwarf_xmm3: return fpu_xmm3;
- case dwarf_xmm4: return fpu_xmm4;
- case dwarf_xmm5: return fpu_xmm5;
- case dwarf_xmm6: return fpu_xmm6;
- case dwarf_xmm7: return fpu_xmm7;
- default:
- break;
- }
- }
- else if (kind == eRegisterKindLLDB)
- {
- return reg;
- }
- return LLDB_INVALID_REGNUM;
-}
+ ::memcpy(dst, &fpu, sizeof(fpu));
+ dst += sizeof(gpr);
+ ::memcpy(dst, &exc, sizeof(exc));
+ return true;
+ }
+ return false;
+}
-bool
-RegisterContextDarwin_i386::HardwareSingleStep (bool enable)
-{
- if (ReadGPR(false) != 0)
- return false;
+bool RegisterContextDarwin_i386::WriteAllRegisterValues(
+ const lldb::DataBufferSP &data_sp) {
+ if (data_sp && data_sp->GetByteSize() == REG_CONTEXT_SIZE) {
+ const uint8_t *src = data_sp->GetBytes();
+ ::memcpy(&gpr, src, sizeof(gpr));
+ src += sizeof(gpr);
+
+ ::memcpy(&fpu, src, sizeof(fpu));
+ src += sizeof(gpr);
+
+ ::memcpy(&exc, src, sizeof(exc));
+ uint32_t success_count = 0;
+ if (WriteGPR() == 0)
+ ++success_count;
+ if (WriteFPU() == 0)
+ ++success_count;
+ if (WriteEXC() == 0)
+ ++success_count;
+ return success_count == 3;
+ }
+ return false;
+}
- const uint32_t trace_bit = 0x100u;
- if (enable)
- {
- // If the trace bit is already set, there is nothing to do
- if (gpr.eflags & trace_bit)
- return true;
- else
- gpr.eflags |= trace_bit;
+uint32_t RegisterContextDarwin_i386::ConvertRegisterKindToRegisterNumber(
+ lldb::RegisterKind kind, uint32_t reg) {
+ if (kind == eRegisterKindGeneric) {
+ switch (reg) {
+ case LLDB_REGNUM_GENERIC_PC:
+ return gpr_eip;
+ case LLDB_REGNUM_GENERIC_SP:
+ return gpr_esp;
+ case LLDB_REGNUM_GENERIC_FP:
+ return gpr_ebp;
+ case LLDB_REGNUM_GENERIC_FLAGS:
+ return gpr_eflags;
+ case LLDB_REGNUM_GENERIC_RA:
+ default:
+ break;
}
- else
- {
- // If the trace bit is already cleared, there is nothing to do
- if (gpr.eflags & trace_bit)
- gpr.eflags &= ~trace_bit;
- else
- return true;
+ } else if (kind == eRegisterKindEHFrame || kind == eRegisterKindDWARF) {
+ switch (reg) {
+ case dwarf_eax:
+ return gpr_eax;
+ case dwarf_ecx:
+ return gpr_ecx;
+ case dwarf_edx:
+ return gpr_edx;
+ case dwarf_ebx:
+ return gpr_ebx;
+ case dwarf_esp:
+ return gpr_esp;
+ case dwarf_ebp:
+ return gpr_ebp;
+ case dwarf_esi:
+ return gpr_esi;
+ case dwarf_edi:
+ return gpr_edi;
+ case dwarf_eip:
+ return gpr_eip;
+ case dwarf_eflags:
+ return gpr_eflags;
+ case dwarf_stmm0:
+ return fpu_stmm0;
+ case dwarf_stmm1:
+ return fpu_stmm1;
+ case dwarf_stmm2:
+ return fpu_stmm2;
+ case dwarf_stmm3:
+ return fpu_stmm3;
+ case dwarf_stmm4:
+ return fpu_stmm4;
+ case dwarf_stmm5:
+ return fpu_stmm5;
+ case dwarf_stmm6:
+ return fpu_stmm6;
+ case dwarf_stmm7:
+ return fpu_stmm7;
+ case dwarf_xmm0:
+ return fpu_xmm0;
+ case dwarf_xmm1:
+ return fpu_xmm1;
+ case dwarf_xmm2:
+ return fpu_xmm2;
+ case dwarf_xmm3:
+ return fpu_xmm3;
+ case dwarf_xmm4:
+ return fpu_xmm4;
+ case dwarf_xmm5:
+ return fpu_xmm5;
+ case dwarf_xmm6:
+ return fpu_xmm6;
+ case dwarf_xmm7:
+ return fpu_xmm7;
+ default:
+ break;
}
-
- return WriteGPR() == 0;
+ } else if (kind == eRegisterKindLLDB) {
+ return reg;
+ }
+ return LLDB_INVALID_REGNUM;
}
+bool RegisterContextDarwin_i386::HardwareSingleStep(bool enable) {
+ if (ReadGPR(false) != 0)
+ return false;
+ const uint32_t trace_bit = 0x100u;
+ if (enable) {
+ // If the trace bit is already set, there is nothing to do
+ if (gpr.eflags & trace_bit)
+ return true;
+ else
+ gpr.eflags |= trace_bit;
+ } else {
+ // If the trace bit is already cleared, there is nothing to do
+ if (gpr.eflags & trace_bit)
+ gpr.eflags &= ~trace_bit;
+ else
+ return true;
+ }
+ return WriteGPR() == 0;
+}
diff --git a/source/Plugins/Process/Utility/RegisterContextDarwin_i386.h b/source/Plugins/Process/Utility/RegisterContextDarwin_i386.h
index 9568b0332b4c..aea8a2900911 100644
--- a/source/Plugins/Process/Utility/RegisterContextDarwin_i386.h
+++ b/source/Plugins/Process/Utility/RegisterContextDarwin_i386.h
@@ -14,255 +14,200 @@
// C++ Includes
// Other libraries and framework includes
// Project includes
-#include "lldb/lldb-private.h"
#include "lldb/Target/RegisterContext.h"
+#include "lldb/lldb-private.h"
-class RegisterContextDarwin_i386 : public lldb_private::RegisterContext
-{
+class RegisterContextDarwin_i386 : public lldb_private::RegisterContext {
public:
- RegisterContextDarwin_i386(lldb_private::Thread &thread,
- uint32_t concrete_frame_idx);
-
- ~RegisterContextDarwin_i386() override;
-
- void
- InvalidateAllRegisters() override;
-
- size_t
- GetRegisterCount() override;
-
- const lldb_private::RegisterInfo *
- GetRegisterInfoAtIndex(size_t reg) override;
-
- size_t
- GetRegisterSetCount() override;
-
- const lldb_private::RegisterSet *
- GetRegisterSet(size_t set) override;
-
- bool
- ReadRegister(const lldb_private::RegisterInfo *reg_info,
- lldb_private::RegisterValue &value) override;
-
- bool
- WriteRegister(const lldb_private::RegisterInfo *reg_info,
- const lldb_private::RegisterValue &value) override;
-
- bool
- ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
-
- bool
- WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
-
- uint32_t
- ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override;
-
- bool
- HardwareSingleStep(bool enable) override;
-
- struct GPR
- {
- uint32_t eax;
- uint32_t ebx;
- uint32_t ecx;
- uint32_t edx;
- uint32_t edi;
- uint32_t esi;
- uint32_t ebp;
- uint32_t esp;
- uint32_t ss;
- uint32_t eflags;
- uint32_t eip;
- uint32_t cs;
- uint32_t ds;
- uint32_t es;
- uint32_t fs;
- uint32_t gs;
- };
-
- struct MMSReg
- {
- uint8_t bytes[10];
- uint8_t pad[6];
- };
-
- struct XMMReg
- {
- uint8_t bytes[16];
- };
-
- struct FPU
- {
- uint32_t pad[2];
- uint16_t fcw;
- uint16_t fsw;
- uint8_t ftw;
- uint8_t pad1;
- uint16_t fop;
- uint32_t ip;
- uint16_t cs;
- uint16_t pad2;
- uint32_t dp;
- uint16_t ds;
- uint16_t pad3;
- uint32_t mxcsr;
- uint32_t mxcsrmask;
- MMSReg stmm[8];
- XMMReg xmm[8];
- uint8_t pad4[14*16];
- int pad5;
- };
-
- struct EXC
- {
- uint32_t trapno;
- uint32_t err;
- uint32_t faultvaddr;
- };
+ RegisterContextDarwin_i386(lldb_private::Thread &thread,
+ uint32_t concrete_frame_idx);
+
+ ~RegisterContextDarwin_i386() override;
+
+ void InvalidateAllRegisters() override;
+
+ size_t GetRegisterCount() override;
+
+ const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
+
+ size_t GetRegisterSetCount() override;
+
+ const lldb_private::RegisterSet *GetRegisterSet(size_t set) override;
+
+ bool ReadRegister(const lldb_private::RegisterInfo *reg_info,
+ lldb_private::RegisterValue &value) override;
+
+ bool WriteRegister(const lldb_private::RegisterInfo *reg_info,
+ const lldb_private::RegisterValue &value) override;
+
+ bool ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
+
+ bool WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
+
+ uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
+ uint32_t num) override;
+
+ bool HardwareSingleStep(bool enable) override;
+
+ struct GPR {
+ uint32_t eax;
+ uint32_t ebx;
+ uint32_t ecx;
+ uint32_t edx;
+ uint32_t edi;
+ uint32_t esi;
+ uint32_t ebp;
+ uint32_t esp;
+ uint32_t ss;
+ uint32_t eflags;
+ uint32_t eip;
+ uint32_t cs;
+ uint32_t ds;
+ uint32_t es;
+ uint32_t fs;
+ uint32_t gs;
+ };
+
+ struct MMSReg {
+ uint8_t bytes[10];
+ uint8_t pad[6];
+ };
+
+ struct XMMReg {
+ uint8_t bytes[16];
+ };
+
+ struct FPU {
+ uint32_t pad[2];
+ uint16_t fcw;
+ uint16_t fsw;
+ uint8_t ftw;
+ uint8_t pad1;
+ uint16_t fop;
+ uint32_t ip;
+ uint16_t cs;
+ uint16_t pad2;
+ uint32_t dp;
+ uint16_t ds;
+ uint16_t pad3;
+ uint32_t mxcsr;
+ uint32_t mxcsrmask;
+ MMSReg stmm[8];
+ XMMReg xmm[8];
+ uint8_t pad4[14 * 16];
+ int pad5;
+ };
+
+ struct EXC {
+ uint32_t trapno;
+ uint32_t err;
+ uint32_t faultvaddr;
+ };
protected:
- enum
- {
- GPRRegSet = 1,
- FPURegSet = 2,
- EXCRegSet = 3
- };
-
- enum
- {
- GPRWordCount = sizeof(GPR)/sizeof(uint32_t),
- FPUWordCount = sizeof(FPU)/sizeof(uint32_t),
- EXCWordCount = sizeof(EXC)/sizeof(uint32_t)
- };
-
- enum
- {
- Read = 0,
- Write = 1,
- kNumErrors = 2
- };
-
- GPR gpr;
- FPU fpu;
- EXC exc;
- int gpr_errs[2]; // Read/Write errors
- int fpu_errs[2]; // Read/Write errors
- int exc_errs[2]; // Read/Write errors
-
- void
- InvalidateAllRegisterStates()
- {
- SetError (GPRRegSet, Read, -1);
- SetError (FPURegSet, Read, -1);
- SetError (EXCRegSet, Read, -1);
+ enum { GPRRegSet = 1, FPURegSet = 2, EXCRegSet = 3 };
+
+ enum {
+ GPRWordCount = sizeof(GPR) / sizeof(uint32_t),
+ FPUWordCount = sizeof(FPU) / sizeof(uint32_t),
+ EXCWordCount = sizeof(EXC) / sizeof(uint32_t)
+ };
+
+ enum { Read = 0, Write = 1, kNumErrors = 2 };
+
+ GPR gpr;
+ FPU fpu;
+ EXC exc;
+ int gpr_errs[2]; // Read/Write errors
+ int fpu_errs[2]; // Read/Write errors
+ int exc_errs[2]; // Read/Write errors
+
+ void InvalidateAllRegisterStates() {
+ SetError(GPRRegSet, Read, -1);
+ SetError(FPURegSet, Read, -1);
+ SetError(EXCRegSet, Read, -1);
+ }
+
+ int GetError(int flavor, uint32_t err_idx) const {
+ if (err_idx < kNumErrors) {
+ switch (flavor) {
+ // When getting all errors, just OR all values together to see if
+ // we got any kind of error.
+ case GPRRegSet:
+ return gpr_errs[err_idx];
+ case FPURegSet:
+ return fpu_errs[err_idx];
+ case EXCRegSet:
+ return exc_errs[err_idx];
+ default:
+ break;
+ }
}
-
- int
- GetError (int flavor, uint32_t err_idx) const
- {
- if (err_idx < kNumErrors)
- {
- switch (flavor)
- {
- // When getting all errors, just OR all values together to see if
- // we got any kind of error.
- case GPRRegSet: return gpr_errs[err_idx];
- case FPURegSet: return fpu_errs[err_idx];
- case EXCRegSet: return exc_errs[err_idx];
- default: break;
- }
- }
- return -1;
+ return -1;
+ }
+
+ bool SetError(int flavor, uint32_t err_idx, int err) {
+ if (err_idx < kNumErrors) {
+ switch (flavor) {
+ case GPRRegSet:
+ gpr_errs[err_idx] = err;
+ return true;
+
+ case FPURegSet:
+ fpu_errs[err_idx] = err;
+ return true;
+
+ case EXCRegSet:
+ exc_errs[err_idx] = err;
+ return true;
+
+ default:
+ break;
+ }
}
+ return false;
+ }
- bool
- SetError (int flavor, uint32_t err_idx, int err)
- {
- if (err_idx < kNumErrors)
- {
- switch (flavor)
- {
- case GPRRegSet:
- gpr_errs[err_idx] = err;
- return true;
-
- case FPURegSet:
- fpu_errs[err_idx] = err;
- return true;
-
- case EXCRegSet:
- exc_errs[err_idx] = err;
- return true;
-
- default: break;
- }
- }
- return false;
- }
+ bool RegisterSetIsCached(int set) const { return GetError(set, Read) == 0; }
- bool
- RegisterSetIsCached (int set) const
- {
- return GetError(set, Read) == 0;
- }
+ void LogGPR(lldb_private::Log *log, const char *title);
+
+ int ReadGPR(bool force);
+
+ int ReadFPU(bool force);
- void
- LogGPR (lldb_private::Log *log, const char *title);
+ int ReadEXC(bool force);
- int
- ReadGPR (bool force);
+ int WriteGPR();
- int
- ReadFPU (bool force);
+ int WriteFPU();
- int
- ReadEXC (bool force);
+ int WriteEXC();
- int
- WriteGPR ();
+ // Subclasses override these to do the actual reading.
+ virtual int DoReadGPR(lldb::tid_t tid, int flavor, GPR &gpr) = 0;
- int
- WriteFPU ();
+ virtual int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) = 0;
- int
- WriteEXC ();
+ virtual int DoReadEXC(lldb::tid_t tid, int flavor, EXC &exc) = 0;
- // Subclasses override these to do the actual reading.
- virtual int
- DoReadGPR (lldb::tid_t tid, int flavor, GPR &gpr) = 0;
-
- virtual int
- DoReadFPU (lldb::tid_t tid, int flavor, FPU &fpu) = 0;
+ virtual int DoWriteGPR(lldb::tid_t tid, int flavor, const GPR &gpr) = 0;
- virtual int
- DoReadEXC (lldb::tid_t tid, int flavor, EXC &exc) = 0;
+ virtual int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
- virtual int
- DoWriteGPR (lldb::tid_t tid, int flavor, const GPR &gpr) = 0;
-
- virtual int
- DoWriteFPU (lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
-
- virtual int
- DoWriteEXC (lldb::tid_t tid, int flavor, const EXC &exc) = 0;
+ virtual int DoWriteEXC(lldb::tid_t tid, int flavor, const EXC &exc) = 0;
- int
- ReadRegisterSet (uint32_t set, bool force);
+ int ReadRegisterSet(uint32_t set, bool force);
- int
- WriteRegisterSet (uint32_t set);
+ int WriteRegisterSet(uint32_t set);
- static uint32_t
- GetRegisterNumber (uint32_t reg_kind, uint32_t reg_num);
+ static uint32_t GetRegisterNumber(uint32_t reg_kind, uint32_t reg_num);
- static int
- GetSetForNativeRegNum (int reg_num);
+ static int GetSetForNativeRegNum(int reg_num);
- static size_t
- GetRegisterInfosCount ();
+ static size_t GetRegisterInfosCount();
- static const lldb_private::RegisterInfo *
- GetRegisterInfos ();
+ static const lldb_private::RegisterInfo *GetRegisterInfos();
};
#endif // liblldb_RegisterContextDarwin_i386_h_
diff --git a/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.cpp b/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.cpp
index aee6e1228d2a..7c0bafa68f9e 100644
--- a/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.cpp
+++ b/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.cpp
@@ -7,11 +7,10 @@
//
//===----------------------------------------------------------------------===//
-
// C Includes
#include <inttypes.h> // PRIx64
#include <stdarg.h>
-#include <stddef.h> // offsetof
+#include <stddef.h> // offsetof
// C++ Includes
// Other libraries and framework includes
@@ -36,340 +35,489 @@
using namespace lldb;
using namespace lldb_private;
-enum
-{
- gpr_rax = 0,
- gpr_rbx,
- gpr_rcx,
- gpr_rdx,
- gpr_rdi,
- gpr_rsi,
- gpr_rbp,
- gpr_rsp,
- gpr_r8,
- gpr_r9,
- gpr_r10,
- gpr_r11,
- gpr_r12,
- gpr_r13,
- gpr_r14,
- gpr_r15,
- gpr_rip,
- gpr_rflags,
- gpr_cs,
- gpr_fs,
- gpr_gs,
-
- fpu_fcw,
- fpu_fsw,
- fpu_ftw,
- fpu_fop,
- fpu_ip,
- fpu_cs,
- fpu_dp,
- fpu_ds,
- fpu_mxcsr,
- fpu_mxcsrmask,
- fpu_stmm0,
- fpu_stmm1,
- fpu_stmm2,
- fpu_stmm3,
- fpu_stmm4,
- fpu_stmm5,
- fpu_stmm6,
- fpu_stmm7,
- fpu_xmm0,
- fpu_xmm1,
- fpu_xmm2,
- fpu_xmm3,
- fpu_xmm4,
- fpu_xmm5,
- fpu_xmm6,
- fpu_xmm7,
- fpu_xmm8,
- fpu_xmm9,
- fpu_xmm10,
- fpu_xmm11,
- fpu_xmm12,
- fpu_xmm13,
- fpu_xmm14,
- fpu_xmm15,
-
- exc_trapno,
- exc_err,
- exc_faultvaddr,
-
- k_num_registers,
-
- // Aliases
- fpu_fctrl = fpu_fcw,
- fpu_fstat = fpu_fsw,
- fpu_ftag = fpu_ftw,
- fpu_fiseg = fpu_cs,
- fpu_fioff = fpu_ip,
- fpu_foseg = fpu_ds,
- fpu_fooff = fpu_dp
+enum {
+ gpr_rax = 0,
+ gpr_rbx,
+ gpr_rcx,
+ gpr_rdx,
+ gpr_rdi,
+ gpr_rsi,
+ gpr_rbp,
+ gpr_rsp,
+ gpr_r8,
+ gpr_r9,
+ gpr_r10,
+ gpr_r11,
+ gpr_r12,
+ gpr_r13,
+ gpr_r14,
+ gpr_r15,
+ gpr_rip,
+ gpr_rflags,
+ gpr_cs,
+ gpr_fs,
+ gpr_gs,
+
+ fpu_fcw,
+ fpu_fsw,
+ fpu_ftw,
+ fpu_fop,
+ fpu_ip,
+ fpu_cs,
+ fpu_dp,
+ fpu_ds,
+ fpu_mxcsr,
+ fpu_mxcsrmask,
+ fpu_stmm0,
+ fpu_stmm1,
+ fpu_stmm2,
+ fpu_stmm3,
+ fpu_stmm4,
+ fpu_stmm5,
+ fpu_stmm6,
+ fpu_stmm7,
+ fpu_xmm0,
+ fpu_xmm1,
+ fpu_xmm2,
+ fpu_xmm3,
+ fpu_xmm4,
+ fpu_xmm5,
+ fpu_xmm6,
+ fpu_xmm7,
+ fpu_xmm8,
+ fpu_xmm9,
+ fpu_xmm10,
+ fpu_xmm11,
+ fpu_xmm12,
+ fpu_xmm13,
+ fpu_xmm14,
+ fpu_xmm15,
+
+ exc_trapno,
+ exc_err,
+ exc_faultvaddr,
+
+ k_num_registers,
+
+ // Aliases
+ fpu_fctrl = fpu_fcw,
+ fpu_fstat = fpu_fsw,
+ fpu_ftag = fpu_ftw,
+ fpu_fiseg = fpu_cs,
+ fpu_fioff = fpu_ip,
+ fpu_foseg = fpu_ds,
+ fpu_fooff = fpu_dp
};
-enum ehframe_dwarf_regnums
-{
- ehframe_dwarf_gpr_rax = 0,
- ehframe_dwarf_gpr_rdx,
- ehframe_dwarf_gpr_rcx,
- ehframe_dwarf_gpr_rbx,
- ehframe_dwarf_gpr_rsi,
- ehframe_dwarf_gpr_rdi,
- ehframe_dwarf_gpr_rbp,
- ehframe_dwarf_gpr_rsp,
- ehframe_dwarf_gpr_r8,
- ehframe_dwarf_gpr_r9,
- ehframe_dwarf_gpr_r10,
- ehframe_dwarf_gpr_r11,
- ehframe_dwarf_gpr_r12,
- ehframe_dwarf_gpr_r13,
- ehframe_dwarf_gpr_r14,
- ehframe_dwarf_gpr_r15,
- ehframe_dwarf_gpr_rip,
- ehframe_dwarf_fpu_xmm0,
- ehframe_dwarf_fpu_xmm1,
- ehframe_dwarf_fpu_xmm2,
- ehframe_dwarf_fpu_xmm3,
- ehframe_dwarf_fpu_xmm4,
- ehframe_dwarf_fpu_xmm5,
- ehframe_dwarf_fpu_xmm6,
- ehframe_dwarf_fpu_xmm7,
- ehframe_dwarf_fpu_xmm8,
- ehframe_dwarf_fpu_xmm9,
- ehframe_dwarf_fpu_xmm10,
- ehframe_dwarf_fpu_xmm11,
- ehframe_dwarf_fpu_xmm12,
- ehframe_dwarf_fpu_xmm13,
- ehframe_dwarf_fpu_xmm14,
- ehframe_dwarf_fpu_xmm15,
- ehframe_dwarf_fpu_stmm0,
- ehframe_dwarf_fpu_stmm1,
- ehframe_dwarf_fpu_stmm2,
- ehframe_dwarf_fpu_stmm3,
- ehframe_dwarf_fpu_stmm4,
- ehframe_dwarf_fpu_stmm5,
- ehframe_dwarf_fpu_stmm6,
- ehframe_dwarf_fpu_stmm7
+enum ehframe_dwarf_regnums {
+ ehframe_dwarf_gpr_rax = 0,
+ ehframe_dwarf_gpr_rdx,
+ ehframe_dwarf_gpr_rcx,
+ ehframe_dwarf_gpr_rbx,
+ ehframe_dwarf_gpr_rsi,
+ ehframe_dwarf_gpr_rdi,
+ ehframe_dwarf_gpr_rbp,
+ ehframe_dwarf_gpr_rsp,
+ ehframe_dwarf_gpr_r8,
+ ehframe_dwarf_gpr_r9,
+ ehframe_dwarf_gpr_r10,
+ ehframe_dwarf_gpr_r11,
+ ehframe_dwarf_gpr_r12,
+ ehframe_dwarf_gpr_r13,
+ ehframe_dwarf_gpr_r14,
+ ehframe_dwarf_gpr_r15,
+ ehframe_dwarf_gpr_rip,
+ ehframe_dwarf_fpu_xmm0,
+ ehframe_dwarf_fpu_xmm1,
+ ehframe_dwarf_fpu_xmm2,
+ ehframe_dwarf_fpu_xmm3,
+ ehframe_dwarf_fpu_xmm4,
+ ehframe_dwarf_fpu_xmm5,
+ ehframe_dwarf_fpu_xmm6,
+ ehframe_dwarf_fpu_xmm7,
+ ehframe_dwarf_fpu_xmm8,
+ ehframe_dwarf_fpu_xmm9,
+ ehframe_dwarf_fpu_xmm10,
+ ehframe_dwarf_fpu_xmm11,
+ ehframe_dwarf_fpu_xmm12,
+ ehframe_dwarf_fpu_xmm13,
+ ehframe_dwarf_fpu_xmm14,
+ ehframe_dwarf_fpu_xmm15,
+ ehframe_dwarf_fpu_stmm0,
+ ehframe_dwarf_fpu_stmm1,
+ ehframe_dwarf_fpu_stmm2,
+ ehframe_dwarf_fpu_stmm3,
+ ehframe_dwarf_fpu_stmm4,
+ ehframe_dwarf_fpu_stmm5,
+ ehframe_dwarf_fpu_stmm6,
+ ehframe_dwarf_fpu_stmm7
};
-#define GPR_OFFSET(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_x86_64::GPR, reg))
-#define FPU_OFFSET(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_x86_64::FPU, reg) + sizeof (RegisterContextDarwin_x86_64::GPR))
-#define EXC_OFFSET(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_x86_64::EXC, reg) + sizeof (RegisterContextDarwin_x86_64::GPR) + sizeof (RegisterContextDarwin_x86_64::FPU))
+#define GPR_OFFSET(reg) \
+ (LLVM_EXTENSION offsetof(RegisterContextDarwin_x86_64::GPR, reg))
+#define FPU_OFFSET(reg) \
+ (LLVM_EXTENSION offsetof(RegisterContextDarwin_x86_64::FPU, reg) + \
+ sizeof(RegisterContextDarwin_x86_64::GPR))
+#define EXC_OFFSET(reg) \
+ (LLVM_EXTENSION offsetof(RegisterContextDarwin_x86_64::EXC, reg) + \
+ sizeof(RegisterContextDarwin_x86_64::GPR) + \
+ sizeof(RegisterContextDarwin_x86_64::FPU))
// These macros will auto define the register name, alt name, register size,
// register offset, encoding, format and native register. This ensures that
// the register state structures are defined correctly and have the correct
// sizes and offsets.
-#define DEFINE_GPR(reg, alt) #reg, alt, sizeof(((RegisterContextDarwin_x86_64::GPR *)NULL)->reg), GPR_OFFSET(reg), eEncodingUint, eFormatHex
-#define DEFINE_FPU_UINT(reg) #reg, NULL, sizeof(((RegisterContextDarwin_x86_64::FPU *)NULL)->reg), FPU_OFFSET(reg), eEncodingUint, eFormatHex
-#define DEFINE_FPU_VECT(reg, i) #reg#i, NULL, sizeof(((RegisterContextDarwin_x86_64::FPU *)NULL)->reg[i].bytes), FPU_OFFSET(reg[i]), eEncodingVector, eFormatVectorOfUInt8, { ehframe_dwarf_fpu_##reg##i, ehframe_dwarf_fpu_##reg##i, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_##reg##i }, NULL, NULL
-#define DEFINE_EXC(reg) #reg, NULL, sizeof(((RegisterContextDarwin_x86_64::EXC *)NULL)->reg), EXC_OFFSET(reg), eEncodingUint, eFormatHex
-
-#define REG_CONTEXT_SIZE (sizeof (RegisterContextDarwin_x86_64::GPR) + sizeof (RegisterContextDarwin_x86_64::FPU) + sizeof (RegisterContextDarwin_x86_64::EXC))
+#define DEFINE_GPR(reg, alt) \
+ #reg, alt, sizeof(((RegisterContextDarwin_x86_64::GPR *) NULL)->reg), \
+ GPR_OFFSET(reg), eEncodingUint, eFormatHex
+#define DEFINE_FPU_UINT(reg) \
+ #reg, NULL, sizeof(((RegisterContextDarwin_x86_64::FPU *) NULL)->reg), \
+ FPU_OFFSET(reg), eEncodingUint, eFormatHex
+#define DEFINE_FPU_VECT(reg, i) \
+ #reg #i, NULL, \
+ sizeof(((RegisterContextDarwin_x86_64::FPU *) NULL)->reg[i].bytes), \
+ FPU_OFFSET(reg[i]), eEncodingVector, eFormatVectorOfUInt8, \
+ {ehframe_dwarf_fpu_##reg##i, \
+ ehframe_dwarf_fpu_##reg##i, LLDB_INVALID_REGNUM, \
+ LLDB_INVALID_REGNUM, fpu_##reg##i }, \
+ nullptr, nullptr, nullptr, 0
+#define DEFINE_EXC(reg) \
+ #reg, NULL, sizeof(((RegisterContextDarwin_x86_64::EXC *) NULL)->reg), \
+ EXC_OFFSET(reg), eEncodingUint, eFormatHex
+
+#define REG_CONTEXT_SIZE \
+ (sizeof(RegisterContextDarwin_x86_64::GPR) + \
+ sizeof(RegisterContextDarwin_x86_64::FPU) + \
+ sizeof(RegisterContextDarwin_x86_64::EXC))
// General purpose registers for 64 bit
-static RegisterInfo g_register_infos[] =
-{
-// Macro auto defines most stuff EH_FRAME DWARF GENERIC PROCESS PLUGIN LLDB VALUE REGS INVALIDATE REGS
-// =============================== ====================== =================== ========================== ==================== =================== ========== ===============
- { DEFINE_GPR (rax , NULL) , { ehframe_dwarf_gpr_rax , ehframe_dwarf_gpr_rax , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_rax }, NULL, NULL},
- { DEFINE_GPR (rbx , NULL) , { ehframe_dwarf_gpr_rbx , ehframe_dwarf_gpr_rbx , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_rbx }, NULL, NULL},
- { DEFINE_GPR (rcx , NULL) , { ehframe_dwarf_gpr_rcx , ehframe_dwarf_gpr_rcx , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_rcx }, NULL, NULL},
- { DEFINE_GPR (rdx , NULL) , { ehframe_dwarf_gpr_rdx , ehframe_dwarf_gpr_rdx , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_rdx }, NULL, NULL},
- { DEFINE_GPR (rdi , NULL) , { ehframe_dwarf_gpr_rdi , ehframe_dwarf_gpr_rdi , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_rdi }, NULL, NULL},
- { DEFINE_GPR (rsi , NULL) , { ehframe_dwarf_gpr_rsi , ehframe_dwarf_gpr_rsi , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_rsi }, NULL, NULL},
- { DEFINE_GPR (rbp , "fp") , { ehframe_dwarf_gpr_rbp , ehframe_dwarf_gpr_rbp , LLDB_REGNUM_GENERIC_FP , LLDB_INVALID_REGNUM, gpr_rbp }, NULL, NULL},
- { DEFINE_GPR (rsp , "sp") , { ehframe_dwarf_gpr_rsp , ehframe_dwarf_gpr_rsp , LLDB_REGNUM_GENERIC_SP , LLDB_INVALID_REGNUM, gpr_rsp }, NULL, NULL},
- { DEFINE_GPR (r8 , NULL) , { ehframe_dwarf_gpr_r8 , ehframe_dwarf_gpr_r8 , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_r8 }, NULL, NULL},
- { DEFINE_GPR (r9 , NULL) , { ehframe_dwarf_gpr_r9 , ehframe_dwarf_gpr_r9 , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_r9 }, NULL, NULL},
- { DEFINE_GPR (r10 , NULL) , { ehframe_dwarf_gpr_r10 , ehframe_dwarf_gpr_r10 , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_r10 }, NULL, NULL},
- { DEFINE_GPR (r11 , NULL) , { ehframe_dwarf_gpr_r11 , ehframe_dwarf_gpr_r11 , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_r11 }, NULL, NULL},
- { DEFINE_GPR (r12 , NULL) , { ehframe_dwarf_gpr_r12 , ehframe_dwarf_gpr_r12 , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_r12 }, NULL, NULL},
- { DEFINE_GPR (r13 , NULL) , { ehframe_dwarf_gpr_r13 , ehframe_dwarf_gpr_r13 , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_r13 }, NULL, NULL},
- { DEFINE_GPR (r14 , NULL) , { ehframe_dwarf_gpr_r14 , ehframe_dwarf_gpr_r14 , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_r14 }, NULL, NULL},
- { DEFINE_GPR (r15 , NULL) , { ehframe_dwarf_gpr_r15 , ehframe_dwarf_gpr_r15 , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_r15 }, NULL, NULL},
- { DEFINE_GPR (rip , "pc") , { ehframe_dwarf_gpr_rip , ehframe_dwarf_gpr_rip , LLDB_REGNUM_GENERIC_PC , LLDB_INVALID_REGNUM, gpr_rip }, NULL, NULL},
- { DEFINE_GPR (rflags, "flags") , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM, gpr_rflags }, NULL, NULL},
- { DEFINE_GPR (cs , NULL) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_cs }, NULL, NULL},
- { DEFINE_GPR (fs , NULL) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_fs }, NULL, NULL},
- { DEFINE_GPR (gs , NULL) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_gs }, NULL, NULL},
-
- { DEFINE_FPU_UINT(fcw) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_fcw }, NULL, NULL},
- { DEFINE_FPU_UINT(fsw) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_fsw }, NULL, NULL},
- { DEFINE_FPU_UINT(ftw) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_ftw }, NULL, NULL},
- { DEFINE_FPU_UINT(fop) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_fop }, NULL, NULL},
- { DEFINE_FPU_UINT(ip) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_ip }, NULL, NULL},
- { DEFINE_FPU_UINT(cs) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_cs }, NULL, NULL},
- { DEFINE_FPU_UINT(dp) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_dp }, NULL, NULL},
- { DEFINE_FPU_UINT(ds) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_ds }, NULL, NULL},
- { DEFINE_FPU_UINT(mxcsr) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_mxcsr }, NULL, NULL},
- { DEFINE_FPU_UINT(mxcsrmask) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_mxcsrmask }, NULL, NULL},
- { DEFINE_FPU_VECT(stmm,0) },
- { DEFINE_FPU_VECT(stmm,1) },
- { DEFINE_FPU_VECT(stmm,2) },
- { DEFINE_FPU_VECT(stmm,3) },
- { DEFINE_FPU_VECT(stmm,4) },
- { DEFINE_FPU_VECT(stmm,5) },
- { DEFINE_FPU_VECT(stmm,6) },
- { DEFINE_FPU_VECT(stmm,7) },
- { DEFINE_FPU_VECT(xmm,0) },
- { DEFINE_FPU_VECT(xmm,1) },
- { DEFINE_FPU_VECT(xmm,2) },
- { DEFINE_FPU_VECT(xmm,3) },
- { DEFINE_FPU_VECT(xmm,4) },
- { DEFINE_FPU_VECT(xmm,5) },
- { DEFINE_FPU_VECT(xmm,6) },
- { DEFINE_FPU_VECT(xmm,7) },
- { DEFINE_FPU_VECT(xmm,8) },
- { DEFINE_FPU_VECT(xmm,9) },
- { DEFINE_FPU_VECT(xmm,10) },
- { DEFINE_FPU_VECT(xmm,11) },
- { DEFINE_FPU_VECT(xmm,12) },
- { DEFINE_FPU_VECT(xmm,13) },
- { DEFINE_FPU_VECT(xmm,14) },
- { DEFINE_FPU_VECT(xmm,15) },
-
- { DEFINE_EXC(trapno) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, exc_trapno }, NULL, NULL},
- { DEFINE_EXC(err) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, exc_err }, NULL, NULL},
- { DEFINE_EXC(faultvaddr) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, exc_faultvaddr }, NULL, NULL}
-};
+static RegisterInfo g_register_infos[] = {
+ // Macro auto defines most stuff EH_FRAME DWARF
+ // GENERIC PROCESS PLUGIN LLDB
+ // =============================== ======================
+ // =================== ========================== ====================
+ // ===================
+ {DEFINE_GPR(rax, NULL),
+ {ehframe_dwarf_gpr_rax, ehframe_dwarf_gpr_rax, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_rax},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(rbx, NULL),
+ {ehframe_dwarf_gpr_rbx, ehframe_dwarf_gpr_rbx, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_rbx},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(rcx, NULL),
+ {ehframe_dwarf_gpr_rcx, ehframe_dwarf_gpr_rcx, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_rcx},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(rdx, NULL),
+ {ehframe_dwarf_gpr_rdx, ehframe_dwarf_gpr_rdx, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_rdx},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(rdi, NULL),
+ {ehframe_dwarf_gpr_rdi, ehframe_dwarf_gpr_rdi, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_rdi},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(rsi, NULL),
+ {ehframe_dwarf_gpr_rsi, ehframe_dwarf_gpr_rsi, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_rsi},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(rbp, "fp"),
+ {ehframe_dwarf_gpr_rbp, ehframe_dwarf_gpr_rbp, LLDB_REGNUM_GENERIC_FP,
+ LLDB_INVALID_REGNUM, gpr_rbp},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(rsp, "sp"),
+ {ehframe_dwarf_gpr_rsp, ehframe_dwarf_gpr_rsp, LLDB_REGNUM_GENERIC_SP,
+ LLDB_INVALID_REGNUM, gpr_rsp},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(r8, NULL),
+ {ehframe_dwarf_gpr_r8, ehframe_dwarf_gpr_r8, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_r8},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(r9, NULL),
+ {ehframe_dwarf_gpr_r9, ehframe_dwarf_gpr_r9, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_r9},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(r10, NULL),
+ {ehframe_dwarf_gpr_r10, ehframe_dwarf_gpr_r10, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_r10},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(r11, NULL),
+ {ehframe_dwarf_gpr_r11, ehframe_dwarf_gpr_r11, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_r11},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(r12, NULL),
+ {ehframe_dwarf_gpr_r12, ehframe_dwarf_gpr_r12, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_r12},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(r13, NULL),
+ {ehframe_dwarf_gpr_r13, ehframe_dwarf_gpr_r13, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_r13},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(r14, NULL),
+ {ehframe_dwarf_gpr_r14, ehframe_dwarf_gpr_r14, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_r14},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(r15, NULL),
+ {ehframe_dwarf_gpr_r15, ehframe_dwarf_gpr_r15, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_r15},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(rip, "pc"),
+ {ehframe_dwarf_gpr_rip, ehframe_dwarf_gpr_rip, LLDB_REGNUM_GENERIC_PC,
+ LLDB_INVALID_REGNUM, gpr_rip},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(rflags, "flags"),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_REGNUM_GENERIC_FLAGS,
+ LLDB_INVALID_REGNUM, gpr_rflags},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(cs, NULL),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_cs},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(fs, NULL),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_fs},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_GPR(gs, NULL),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, gpr_gs},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+
+ {DEFINE_FPU_UINT(fcw),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_fcw},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_UINT(fsw),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_fsw},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_UINT(ftw),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_ftw},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_UINT(fop),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_fop},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_UINT(ip),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_ip},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_UINT(cs),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_cs},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_UINT(dp),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_dp},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_UINT(ds),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_ds},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_UINT(mxcsr),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_mxcsr},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_UINT(mxcsrmask),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, fpu_mxcsrmask},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_FPU_VECT(stmm, 0)},
+ {DEFINE_FPU_VECT(stmm, 1)},
+ {DEFINE_FPU_VECT(stmm, 2)},
+ {DEFINE_FPU_VECT(stmm, 3)},
+ {DEFINE_FPU_VECT(stmm, 4)},
+ {DEFINE_FPU_VECT(stmm, 5)},
+ {DEFINE_FPU_VECT(stmm, 6)},
+ {DEFINE_FPU_VECT(stmm, 7)},
+ {DEFINE_FPU_VECT(xmm, 0)},
+ {DEFINE_FPU_VECT(xmm, 1)},
+ {DEFINE_FPU_VECT(xmm, 2)},
+ {DEFINE_FPU_VECT(xmm, 3)},
+ {DEFINE_FPU_VECT(xmm, 4)},
+ {DEFINE_FPU_VECT(xmm, 5)},
+ {DEFINE_FPU_VECT(xmm, 6)},
+ {DEFINE_FPU_VECT(xmm, 7)},
+ {DEFINE_FPU_VECT(xmm, 8)},
+ {DEFINE_FPU_VECT(xmm, 9)},
+ {DEFINE_FPU_VECT(xmm, 10)},
+ {DEFINE_FPU_VECT(xmm, 11)},
+ {DEFINE_FPU_VECT(xmm, 12)},
+ {DEFINE_FPU_VECT(xmm, 13)},
+ {DEFINE_FPU_VECT(xmm, 14)},
+ {DEFINE_FPU_VECT(xmm, 15)},
+
+ {DEFINE_EXC(trapno),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, exc_trapno},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_EXC(err),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, exc_err},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0},
+ {DEFINE_EXC(faultvaddr),
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+ LLDB_INVALID_REGNUM, exc_faultvaddr},
+ nullptr,
+ nullptr,
+ nullptr,
+ 0}};
static size_t k_num_register_infos = llvm::array_lengthof(g_register_infos);
-RegisterContextDarwin_x86_64::RegisterContextDarwin_x86_64 (Thread &thread, uint32_t concrete_frame_idx) :
- RegisterContext (thread, concrete_frame_idx),
- gpr(),
- fpu(),
- exc()
-{
- uint32_t i;
- for (i=0; i<kNumErrors; i++)
- {
- gpr_errs[i] = -1;
- fpu_errs[i] = -1;
- exc_errs[i] = -1;
- }
-}
-
-RegisterContextDarwin_x86_64::~RegisterContextDarwin_x86_64()
-{
+RegisterContextDarwin_x86_64::RegisterContextDarwin_x86_64(
+ Thread &thread, uint32_t concrete_frame_idx)
+ : RegisterContext(thread, concrete_frame_idx), gpr(), fpu(), exc() {
+ uint32_t i;
+ for (i = 0; i < kNumErrors; i++) {
+ gpr_errs[i] = -1;
+ fpu_errs[i] = -1;
+ exc_errs[i] = -1;
+ }
}
+RegisterContextDarwin_x86_64::~RegisterContextDarwin_x86_64() {}
-void
-RegisterContextDarwin_x86_64::InvalidateAllRegisters ()
-{
- InvalidateAllRegisterStates();
+void RegisterContextDarwin_x86_64::InvalidateAllRegisters() {
+ InvalidateAllRegisterStates();
}
-
-size_t
-RegisterContextDarwin_x86_64::GetRegisterCount ()
-{
- assert(k_num_register_infos == k_num_registers);
- return k_num_registers;
+size_t RegisterContextDarwin_x86_64::GetRegisterCount() {
+ assert(k_num_register_infos == k_num_registers);
+ return k_num_registers;
}
-
const RegisterInfo *
-RegisterContextDarwin_x86_64::GetRegisterInfoAtIndex (size_t reg)
-{
- assert(k_num_register_infos == k_num_registers);
- if (reg < k_num_registers)
- return &g_register_infos[reg];
- return NULL;
+RegisterContextDarwin_x86_64::GetRegisterInfoAtIndex(size_t reg) {
+ assert(k_num_register_infos == k_num_registers);
+ if (reg < k_num_registers)
+ return &g_register_infos[reg];
+ return NULL;
}
-
-size_t
-RegisterContextDarwin_x86_64::GetRegisterInfosCount ()
-{
- return k_num_register_infos;
+size_t RegisterContextDarwin_x86_64::GetRegisterInfosCount() {
+ return k_num_register_infos;
}
const lldb_private::RegisterInfo *
-RegisterContextDarwin_x86_64::GetRegisterInfos ()
-{
- return g_register_infos;
+RegisterContextDarwin_x86_64::GetRegisterInfos() {
+ return g_register_infos;
}
+static uint32_t g_gpr_regnums[] = {
+ gpr_rax, gpr_rbx, gpr_rcx, gpr_rdx, gpr_rdi, gpr_rsi, gpr_rbp,
+ gpr_rsp, gpr_r8, gpr_r9, gpr_r10, gpr_r11, gpr_r12, gpr_r13,
+ gpr_r14, gpr_r15, gpr_rip, gpr_rflags, gpr_cs, gpr_fs, gpr_gs};
+static uint32_t g_fpu_regnums[] = {
+ fpu_fcw, fpu_fsw, fpu_ftw, fpu_fop, fpu_ip, fpu_cs,
+ fpu_dp, fpu_ds, fpu_mxcsr, fpu_mxcsrmask, fpu_stmm0, fpu_stmm1,
+ fpu_stmm2, fpu_stmm3, fpu_stmm4, fpu_stmm5, fpu_stmm6, fpu_stmm7,
+ fpu_xmm0, fpu_xmm1, fpu_xmm2, fpu_xmm3, fpu_xmm4, fpu_xmm5,
+ fpu_xmm6, fpu_xmm7, fpu_xmm8, fpu_xmm9, fpu_xmm10, fpu_xmm11,
+ fpu_xmm12, fpu_xmm13, fpu_xmm14, fpu_xmm15};
-static uint32_t g_gpr_regnums[] =
-{
- gpr_rax,
- gpr_rbx,
- gpr_rcx,
- gpr_rdx,
- gpr_rdi,
- gpr_rsi,
- gpr_rbp,
- gpr_rsp,
- gpr_r8,
- gpr_r9,
- gpr_r10,
- gpr_r11,
- gpr_r12,
- gpr_r13,
- gpr_r14,
- gpr_r15,
- gpr_rip,
- gpr_rflags,
- gpr_cs,
- gpr_fs,
- gpr_gs
-};
-
-static uint32_t g_fpu_regnums[] =
-{
- fpu_fcw,
- fpu_fsw,
- fpu_ftw,
- fpu_fop,
- fpu_ip,
- fpu_cs,
- fpu_dp,
- fpu_ds,
- fpu_mxcsr,
- fpu_mxcsrmask,
- fpu_stmm0,
- fpu_stmm1,
- fpu_stmm2,
- fpu_stmm3,
- fpu_stmm4,
- fpu_stmm5,
- fpu_stmm6,
- fpu_stmm7,
- fpu_xmm0,
- fpu_xmm1,
- fpu_xmm2,
- fpu_xmm3,
- fpu_xmm4,
- fpu_xmm5,
- fpu_xmm6,
- fpu_xmm7,
- fpu_xmm8,
- fpu_xmm9,
- fpu_xmm10,
- fpu_xmm11,
- fpu_xmm12,
- fpu_xmm13,
- fpu_xmm14,
- fpu_xmm15
-};
-
-static uint32_t
-g_exc_regnums[] =
-{
- exc_trapno,
- exc_err,
- exc_faultvaddr
-};
+static uint32_t g_exc_regnums[] = {exc_trapno, exc_err, exc_faultvaddr};
// Number of registers in each register set
const size_t k_num_gpr_registers = llvm::array_lengthof(g_gpr_regnums);
@@ -381,562 +529,556 @@ const size_t k_num_exc_registers = llvm::array_lengthof(g_exc_regnums);
// of zero is for all registers, followed by other registers sets. The
// register information for the all register set need not be filled in.
//----------------------------------------------------------------------
-static const RegisterSet g_reg_sets[] =
-{
- { "General Purpose Registers", "gpr", k_num_gpr_registers, g_gpr_regnums, },
- { "Floating Point Registers", "fpu", k_num_fpu_registers, g_fpu_regnums },
- { "Exception State Registers", "exc", k_num_exc_registers, g_exc_regnums }
-};
+static const RegisterSet g_reg_sets[] = {
+ {
+ "General Purpose Registers", "gpr", k_num_gpr_registers, g_gpr_regnums,
+ },
+ {"Floating Point Registers", "fpu", k_num_fpu_registers, g_fpu_regnums},
+ {"Exception State Registers", "exc", k_num_exc_registers, g_exc_regnums}};
const size_t k_num_regsets = llvm::array_lengthof(g_reg_sets);
-
-size_t
-RegisterContextDarwin_x86_64::GetRegisterSetCount ()
-{
- return k_num_regsets;
+size_t RegisterContextDarwin_x86_64::GetRegisterSetCount() {
+ return k_num_regsets;
}
const RegisterSet *
-RegisterContextDarwin_x86_64::GetRegisterSet (size_t reg_set)
-{
- if (reg_set < k_num_regsets)
- return &g_reg_sets[reg_set];
- return NULL;
-}
-
-int
-RegisterContextDarwin_x86_64::GetSetForNativeRegNum (int reg_num)
-{
- if (reg_num < fpu_fcw)
- return GPRRegSet;
- else if (reg_num < exc_trapno)
- return FPURegSet;
- else if (reg_num < k_num_registers)
- return EXCRegSet;
- return -1;
+RegisterContextDarwin_x86_64::GetRegisterSet(size_t reg_set) {
+ if (reg_set < k_num_regsets)
+ return &g_reg_sets[reg_set];
+ return NULL;
}
-void
-RegisterContextDarwin_x86_64::LogGPR(Log *log, const char *format, ...)
-{
- if (log)
- {
- if (format)
- {
- va_list args;
- va_start (args, format);
- log->VAPrintf (format, args);
- va_end (args);
- }
- for (uint32_t i=0; i<k_num_gpr_registers; i++)
- {
- uint32_t reg = gpr_rax + i;
- log->Printf("%12s = 0x%16.16" PRIx64, g_register_infos[reg].name, (&gpr.rax)[reg]);
- }
- }
+int RegisterContextDarwin_x86_64::GetSetForNativeRegNum(int reg_num) {
+ if (reg_num < fpu_fcw)
+ return GPRRegSet;
+ else if (reg_num < exc_trapno)
+ return FPURegSet;
+ else if (reg_num < k_num_registers)
+ return EXCRegSet;
+ return -1;
}
-int
-RegisterContextDarwin_x86_64::ReadGPR (bool force)
-{
- int set = GPRRegSet;
- if (force || !RegisterSetIsCached(set))
- {
- SetError(set, Read, DoReadGPR(GetThreadID(), set, gpr));
+void RegisterContextDarwin_x86_64::LogGPR(Log *log, const char *format, ...) {
+ if (log) {
+ if (format) {
+ va_list args;
+ va_start(args, format);
+ log->VAPrintf(format, args);
+ va_end(args);
}
- return GetError(GPRRegSet, Read);
-}
-
-int
-RegisterContextDarwin_x86_64::ReadFPU (bool force)
-{
- int set = FPURegSet;
- if (force || !RegisterSetIsCached(set))
- {
- SetError(set, Read, DoReadFPU(GetThreadID(), set, fpu));
+ for (uint32_t i = 0; i < k_num_gpr_registers; i++) {
+ uint32_t reg = gpr_rax + i;
+ log->Printf("%12s = 0x%16.16" PRIx64, g_register_infos[reg].name,
+ (&gpr.rax)[reg]);
}
- return GetError(FPURegSet, Read);
+ }
}
-int
-RegisterContextDarwin_x86_64::ReadEXC (bool force)
-{
- int set = EXCRegSet;
- if (force || !RegisterSetIsCached(set))
- {
- SetError(set, Read, DoReadEXC(GetThreadID(), set, exc));
- }
- return GetError(EXCRegSet, Read);
+int RegisterContextDarwin_x86_64::ReadGPR(bool force) {
+ int set = GPRRegSet;
+ if (force || !RegisterSetIsCached(set)) {
+ SetError(set, Read, DoReadGPR(GetThreadID(), set, gpr));
+ }
+ return GetError(GPRRegSet, Read);
}
-int
-RegisterContextDarwin_x86_64::WriteGPR ()
-{
- int set = GPRRegSet;
- if (!RegisterSetIsCached(set))
- {
- SetError (set, Write, -1);
- return -1;
- }
- SetError (set, Write, DoWriteGPR(GetThreadID(), set, gpr));
- SetError (set, Read, -1);
- return GetError (set, Write);
+int RegisterContextDarwin_x86_64::ReadFPU(bool force) {
+ int set = FPURegSet;
+ if (force || !RegisterSetIsCached(set)) {
+ SetError(set, Read, DoReadFPU(GetThreadID(), set, fpu));
+ }
+ return GetError(FPURegSet, Read);
}
-int
-RegisterContextDarwin_x86_64::WriteFPU ()
-{
- int set = FPURegSet;
- if (!RegisterSetIsCached(set))
- {
- SetError (set, Write, -1);
- return -1;
- }
- SetError (set, Write, DoWriteFPU(GetThreadID(), set, fpu));
- SetError (set, Read, -1);
- return GetError (set, Write);
+int RegisterContextDarwin_x86_64::ReadEXC(bool force) {
+ int set = EXCRegSet;
+ if (force || !RegisterSetIsCached(set)) {
+ SetError(set, Read, DoReadEXC(GetThreadID(), set, exc));
+ }
+ return GetError(EXCRegSet, Read);
}
-int
-RegisterContextDarwin_x86_64::WriteEXC ()
-{
- int set = EXCRegSet;
- if (!RegisterSetIsCached(set))
- {
- SetError (set, Write, -1);
- return -1;
- }
- SetError (set, Write, DoWriteEXC(GetThreadID(), set, exc));
- SetError (set, Read, -1);
- return GetError (set, Write);
+int RegisterContextDarwin_x86_64::WriteGPR() {
+ int set = GPRRegSet;
+ if (!RegisterSetIsCached(set)) {
+ SetError(set, Write, -1);
+ return -1;
+ }
+ SetError(set, Write, DoWriteGPR(GetThreadID(), set, gpr));
+ SetError(set, Read, -1);
+ return GetError(set, Write);
}
-int
-RegisterContextDarwin_x86_64::ReadRegisterSet(uint32_t set, bool force)
-{
- switch (set)
- {
- case GPRRegSet: return ReadGPR (force);
- case FPURegSet: return ReadFPU (force);
- case EXCRegSet: return ReadEXC (force);
- default: break;
- }
+int RegisterContextDarwin_x86_64::WriteFPU() {
+ int set = FPURegSet;
+ if (!RegisterSetIsCached(set)) {
+ SetError(set, Write, -1);
return -1;
+ }
+ SetError(set, Write, DoWriteFPU(GetThreadID(), set, fpu));
+ SetError(set, Read, -1);
+ return GetError(set, Write);
}
-int
-RegisterContextDarwin_x86_64::WriteRegisterSet(uint32_t set)
-{
- // Make sure we have a valid context to set.
- switch (set)
- {
- case GPRRegSet: return WriteGPR ();
- case FPURegSet: return WriteFPU ();
- case EXCRegSet: return WriteEXC ();
- default: break;
- }
+int RegisterContextDarwin_x86_64::WriteEXC() {
+ int set = EXCRegSet;
+ if (!RegisterSetIsCached(set)) {
+ SetError(set, Write, -1);
return -1;
+ }
+ SetError(set, Write, DoWriteEXC(GetThreadID(), set, exc));
+ SetError(set, Read, -1);
+ return GetError(set, Write);
}
+int RegisterContextDarwin_x86_64::ReadRegisterSet(uint32_t set, bool force) {
+ switch (set) {
+ case GPRRegSet:
+ return ReadGPR(force);
+ case FPURegSet:
+ return ReadFPU(force);
+ case EXCRegSet:
+ return ReadEXC(force);
+ default:
+ break;
+ }
+ return -1;
+}
-bool
-RegisterContextDarwin_x86_64::ReadRegister (const RegisterInfo *reg_info,
- RegisterValue &value)
-{
- const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
- int set = RegisterContextDarwin_x86_64::GetSetForNativeRegNum (reg);
- if (set == -1)
- return false;
+int RegisterContextDarwin_x86_64::WriteRegisterSet(uint32_t set) {
+ // Make sure we have a valid context to set.
+ switch (set) {
+ case GPRRegSet:
+ return WriteGPR();
+ case FPURegSet:
+ return WriteFPU();
+ case EXCRegSet:
+ return WriteEXC();
+ default:
+ break;
+ }
+ return -1;
+}
- if (ReadRegisterSet(set, false) != 0)
- return false;
+bool RegisterContextDarwin_x86_64::ReadRegister(const RegisterInfo *reg_info,
+ RegisterValue &value) {
+ const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
+ int set = RegisterContextDarwin_x86_64::GetSetForNativeRegNum(reg);
+ if (set == -1)
+ return false;
- switch (reg)
- {
- case gpr_rax:
- case gpr_rbx:
- case gpr_rcx:
- case gpr_rdx:
- case gpr_rdi:
- case gpr_rsi:
- case gpr_rbp:
- case gpr_rsp:
- case gpr_r8:
- case gpr_r9:
- case gpr_r10:
- case gpr_r11:
- case gpr_r12:
- case gpr_r13:
- case gpr_r14:
- case gpr_r15:
- case gpr_rip:
- case gpr_rflags:
- case gpr_cs:
- case gpr_fs:
- case gpr_gs:
- value = (&gpr.rax)[reg - gpr_rax];
- break;
-
- case fpu_fcw:
- value = fpu.fcw;
- break;
-
- case fpu_fsw:
- value = fpu.fsw;
- break;
-
- case fpu_ftw:
- value = fpu.ftw;
- break;
-
- case fpu_fop:
- value = fpu.fop;
- break;
-
- case fpu_ip:
- value = fpu.ip;
- break;
-
- case fpu_cs:
- value = fpu.cs;
- break;
-
- case fpu_dp:
- value = fpu.dp;
- break;
-
- case fpu_ds:
- value = fpu.ds;
- break;
-
- case fpu_mxcsr:
- value = fpu.mxcsr;
- break;
-
- case fpu_mxcsrmask:
- value = fpu.mxcsrmask;
- break;
-
- case fpu_stmm0:
- case fpu_stmm1:
- case fpu_stmm2:
- case fpu_stmm3:
- case fpu_stmm4:
- case fpu_stmm5:
- case fpu_stmm6:
- case fpu_stmm7:
- value.SetBytes(fpu.stmm[reg - fpu_stmm0].bytes, reg_info->byte_size, endian::InlHostByteOrder());
- break;
-
- case fpu_xmm0:
- case fpu_xmm1:
- case fpu_xmm2:
- case fpu_xmm3:
- case fpu_xmm4:
- case fpu_xmm5:
- case fpu_xmm6:
- case fpu_xmm7:
- case fpu_xmm8:
- case fpu_xmm9:
- case fpu_xmm10:
- case fpu_xmm11:
- case fpu_xmm12:
- case fpu_xmm13:
- case fpu_xmm14:
- case fpu_xmm15:
- value.SetBytes(fpu.xmm[reg - fpu_xmm0].bytes, reg_info->byte_size, endian::InlHostByteOrder());
- break;
-
- case exc_trapno:
- value = exc.trapno;
- break;
-
- case exc_err:
- value = exc.err;
- break;
-
- case exc_faultvaddr:
- value = exc.faultvaddr;
- break;
+ if (ReadRegisterSet(set, false) != 0)
+ return false;
- default:
- return false;
- }
- return true;
+ switch (reg) {
+ case gpr_rax:
+ case gpr_rbx:
+ case gpr_rcx:
+ case gpr_rdx:
+ case gpr_rdi:
+ case gpr_rsi:
+ case gpr_rbp:
+ case gpr_rsp:
+ case gpr_r8:
+ case gpr_r9:
+ case gpr_r10:
+ case gpr_r11:
+ case gpr_r12:
+ case gpr_r13:
+ case gpr_r14:
+ case gpr_r15:
+ case gpr_rip:
+ case gpr_rflags:
+ case gpr_cs:
+ case gpr_fs:
+ case gpr_gs:
+ value = (&gpr.rax)[reg - gpr_rax];
+ break;
+
+ case fpu_fcw:
+ value = fpu.fcw;
+ break;
+
+ case fpu_fsw:
+ value = fpu.fsw;
+ break;
+
+ case fpu_ftw:
+ value = fpu.ftw;
+ break;
+
+ case fpu_fop:
+ value = fpu.fop;
+ break;
+
+ case fpu_ip:
+ value = fpu.ip;
+ break;
+
+ case fpu_cs:
+ value = fpu.cs;
+ break;
+
+ case fpu_dp:
+ value = fpu.dp;
+ break;
+
+ case fpu_ds:
+ value = fpu.ds;
+ break;
+
+ case fpu_mxcsr:
+ value = fpu.mxcsr;
+ break;
+
+ case fpu_mxcsrmask:
+ value = fpu.mxcsrmask;
+ break;
+
+ case fpu_stmm0:
+ case fpu_stmm1:
+ case fpu_stmm2:
+ case fpu_stmm3:
+ case fpu_stmm4:
+ case fpu_stmm5:
+ case fpu_stmm6:
+ case fpu_stmm7:
+ value.SetBytes(fpu.stmm[reg - fpu_stmm0].bytes, reg_info->byte_size,
+ endian::InlHostByteOrder());
+ break;
+
+ case fpu_xmm0:
+ case fpu_xmm1:
+ case fpu_xmm2:
+ case fpu_xmm3:
+ case fpu_xmm4:
+ case fpu_xmm5:
+ case fpu_xmm6:
+ case fpu_xmm7:
+ case fpu_xmm8:
+ case fpu_xmm9:
+ case fpu_xmm10:
+ case fpu_xmm11:
+ case fpu_xmm12:
+ case fpu_xmm13:
+ case fpu_xmm14:
+ case fpu_xmm15:
+ value.SetBytes(fpu.xmm[reg - fpu_xmm0].bytes, reg_info->byte_size,
+ endian::InlHostByteOrder());
+ break;
+
+ case exc_trapno:
+ value = exc.trapno;
+ break;
+
+ case exc_err:
+ value = exc.err;
+ break;
+
+ case exc_faultvaddr:
+ value = exc.faultvaddr;
+ break;
+
+ default:
+ return false;
+ }
+ return true;
}
+bool RegisterContextDarwin_x86_64::WriteRegister(const RegisterInfo *reg_info,
+ const RegisterValue &value) {
+ const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
+ int set = RegisterContextDarwin_x86_64::GetSetForNativeRegNum(reg);
-bool
-RegisterContextDarwin_x86_64::WriteRegister (const RegisterInfo *reg_info,
- const RegisterValue &value)
-{
- const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
- int set = RegisterContextDarwin_x86_64::GetSetForNativeRegNum (reg);
-
- if (set == -1)
- return false;
+ if (set == -1)
+ return false;
- if (ReadRegisterSet(set, false) != 0)
- return false;
+ if (ReadRegisterSet(set, false) != 0)
+ return false;
- switch (reg)
- {
- case gpr_rax:
- case gpr_rbx:
- case gpr_rcx:
- case gpr_rdx:
- case gpr_rdi:
- case gpr_rsi:
- case gpr_rbp:
- case gpr_rsp:
- case gpr_r8:
- case gpr_r9:
- case gpr_r10:
- case gpr_r11:
- case gpr_r12:
- case gpr_r13:
- case gpr_r14:
- case gpr_r15:
- case gpr_rip:
- case gpr_rflags:
- case gpr_cs:
- case gpr_fs:
- case gpr_gs:
- (&gpr.rax)[reg - gpr_rax] = value.GetAsUInt64();
- break;
-
- case fpu_fcw:
- fpu.fcw = value.GetAsUInt16();
- break;
-
- case fpu_fsw:
- fpu.fsw = value.GetAsUInt16();
- break;
-
- case fpu_ftw:
- fpu.ftw = value.GetAsUInt8();
- break;
-
- case fpu_fop:
- fpu.fop = value.GetAsUInt16();
- break;
-
- case fpu_ip:
- fpu.ip = value.GetAsUInt32();
- break;
-
- case fpu_cs:
- fpu.cs = value.GetAsUInt16();
- break;
-
- case fpu_dp:
- fpu.dp = value.GetAsUInt32();
- break;
-
- case fpu_ds:
- fpu.ds = value.GetAsUInt16();
- break;
-
- case fpu_mxcsr:
- fpu.mxcsr = value.GetAsUInt32();
- break;
-
- case fpu_mxcsrmask:
- fpu.mxcsrmask = value.GetAsUInt32();
- break;
-
- case fpu_stmm0:
- case fpu_stmm1:
- case fpu_stmm2:
- case fpu_stmm3:
- case fpu_stmm4:
- case fpu_stmm5:
- case fpu_stmm6:
- case fpu_stmm7:
- ::memcpy (fpu.stmm[reg - fpu_stmm0].bytes, value.GetBytes(), value.GetByteSize());
- break;
-
- case fpu_xmm0:
- case fpu_xmm1:
- case fpu_xmm2:
- case fpu_xmm3:
- case fpu_xmm4:
- case fpu_xmm5:
- case fpu_xmm6:
- case fpu_xmm7:
- case fpu_xmm8:
- case fpu_xmm9:
- case fpu_xmm10:
- case fpu_xmm11:
- case fpu_xmm12:
- case fpu_xmm13:
- case fpu_xmm14:
- case fpu_xmm15:
- ::memcpy (fpu.xmm[reg - fpu_xmm0].bytes, value.GetBytes(), value.GetByteSize());
- return false;
-
- case exc_trapno:
- exc.trapno = value.GetAsUInt32();
- break;
-
- case exc_err:
- exc.err = value.GetAsUInt32();
- break;
-
- case exc_faultvaddr:
- exc.faultvaddr = value.GetAsUInt64();
- break;
+ switch (reg) {
+ case gpr_rax:
+ case gpr_rbx:
+ case gpr_rcx:
+ case gpr_rdx:
+ case gpr_rdi:
+ case gpr_rsi:
+ case gpr_rbp:
+ case gpr_rsp:
+ case gpr_r8:
+ case gpr_r9:
+ case gpr_r10:
+ case gpr_r11:
+ case gpr_r12:
+ case gpr_r13:
+ case gpr_r14:
+ case gpr_r15:
+ case gpr_rip:
+ case gpr_rflags:
+ case gpr_cs:
+ case gpr_fs:
+ case gpr_gs:
+ (&gpr.rax)[reg - gpr_rax] = value.GetAsUInt64();
+ break;
+
+ case fpu_fcw:
+ fpu.fcw = value.GetAsUInt16();
+ break;
+
+ case fpu_fsw:
+ fpu.fsw = value.GetAsUInt16();
+ break;
+
+ case fpu_ftw:
+ fpu.ftw = value.GetAsUInt8();
+ break;
+
+ case fpu_fop:
+ fpu.fop = value.GetAsUInt16();
+ break;
+
+ case fpu_ip:
+ fpu.ip = value.GetAsUInt32();
+ break;
+
+ case fpu_cs:
+ fpu.cs = value.GetAsUInt16();
+ break;
+
+ case fpu_dp:
+ fpu.dp = value.GetAsUInt32();
+ break;
+
+ case fpu_ds:
+ fpu.ds = value.GetAsUInt16();
+ break;
+
+ case fpu_mxcsr:
+ fpu.mxcsr = value.GetAsUInt32();
+ break;
+
+ case fpu_mxcsrmask:
+ fpu.mxcsrmask = value.GetAsUInt32();
+ break;
+
+ case fpu_stmm0:
+ case fpu_stmm1:
+ case fpu_stmm2:
+ case fpu_stmm3:
+ case fpu_stmm4:
+ case fpu_stmm5:
+ case fpu_stmm6:
+ case fpu_stmm7:
+ ::memcpy(fpu.stmm[reg - fpu_stmm0].bytes, value.GetBytes(),
+ value.GetByteSize());
+ break;
+
+ case fpu_xmm0:
+ case fpu_xmm1:
+ case fpu_xmm2:
+ case fpu_xmm3:
+ case fpu_xmm4:
+ case fpu_xmm5:
+ case fpu_xmm6:
+ case fpu_xmm7:
+ case fpu_xmm8:
+ case fpu_xmm9:
+ case fpu_xmm10:
+ case fpu_xmm11:
+ case fpu_xmm12:
+ case fpu_xmm13:
+ case fpu_xmm14:
+ case fpu_xmm15:
+ ::memcpy(fpu.xmm[reg - fpu_xmm0].bytes, value.GetBytes(),
+ value.GetByteSize());
+ return false;
- default:
- return false;
- }
- return WriteRegisterSet(set) == 0;
-}
+ case exc_trapno:
+ exc.trapno = value.GetAsUInt32();
+ break;
-bool
-RegisterContextDarwin_x86_64::ReadAllRegisterValues (lldb::DataBufferSP &data_sp)
-{
- data_sp.reset (new DataBufferHeap (REG_CONTEXT_SIZE, 0));
- if (data_sp &&
- ReadGPR (false) == 0 &&
- ReadFPU (false) == 0 &&
- ReadEXC (false) == 0)
- {
- uint8_t *dst = data_sp->GetBytes();
- ::memcpy (dst, &gpr, sizeof(gpr));
- dst += sizeof(gpr);
+ case exc_err:
+ exc.err = value.GetAsUInt32();
+ break;
- ::memcpy (dst, &fpu, sizeof(fpu));
- dst += sizeof(gpr);
+ case exc_faultvaddr:
+ exc.faultvaddr = value.GetAsUInt64();
+ break;
- ::memcpy (dst, &exc, sizeof(exc));
- return true;
- }
+ default:
return false;
+ }
+ return WriteRegisterSet(set) == 0;
}
-bool
-RegisterContextDarwin_x86_64::WriteAllRegisterValues (const lldb::DataBufferSP &data_sp)
-{
- if (data_sp && data_sp->GetByteSize() == REG_CONTEXT_SIZE)
- {
- const uint8_t *src = data_sp->GetBytes();
- ::memcpy (&gpr, src, sizeof(gpr));
- src += sizeof(gpr);
-
- ::memcpy (&fpu, src, sizeof(fpu));
- src += sizeof(gpr);
-
- ::memcpy (&exc, src, sizeof(exc));
- uint32_t success_count = 0;
- if (WriteGPR() == 0)
- ++success_count;
- if (WriteFPU() == 0)
- ++success_count;
- if (WriteEXC() == 0)
- ++success_count;
- return success_count == 3;
- }
- return false;
+bool RegisterContextDarwin_x86_64::ReadAllRegisterValues(
+ lldb::DataBufferSP &data_sp) {
+ data_sp.reset(new DataBufferHeap(REG_CONTEXT_SIZE, 0));
+ if (data_sp && ReadGPR(false) == 0 && ReadFPU(false) == 0 &&
+ ReadEXC(false) == 0) {
+ uint8_t *dst = data_sp->GetBytes();
+ ::memcpy(dst, &gpr, sizeof(gpr));
+ dst += sizeof(gpr);
+
+ ::memcpy(dst, &fpu, sizeof(fpu));
+ dst += sizeof(gpr);
+
+ ::memcpy(dst, &exc, sizeof(exc));
+ return true;
+ }
+ return false;
}
+bool RegisterContextDarwin_x86_64::WriteAllRegisterValues(
+ const lldb::DataBufferSP &data_sp) {
+ if (data_sp && data_sp->GetByteSize() == REG_CONTEXT_SIZE) {
+ const uint8_t *src = data_sp->GetBytes();
+ ::memcpy(&gpr, src, sizeof(gpr));
+ src += sizeof(gpr);
+
+ ::memcpy(&fpu, src, sizeof(fpu));
+ src += sizeof(gpr);
+
+ ::memcpy(&exc, src, sizeof(exc));
+ uint32_t success_count = 0;
+ if (WriteGPR() == 0)
+ ++success_count;
+ if (WriteFPU() == 0)
+ ++success_count;
+ if (WriteEXC() == 0)
+ ++success_count;
+ return success_count == 3;
+ }
+ return false;
+}
-uint32_t
-RegisterContextDarwin_x86_64::ConvertRegisterKindToRegisterNumber (lldb::RegisterKind kind, uint32_t reg)
-{
- if (kind == eRegisterKindGeneric)
- {
- switch (reg)
- {
- case LLDB_REGNUM_GENERIC_PC: return gpr_rip;
- case LLDB_REGNUM_GENERIC_SP: return gpr_rsp;
- case LLDB_REGNUM_GENERIC_FP: return gpr_rbp;
- case LLDB_REGNUM_GENERIC_FLAGS: return gpr_rflags;
- case LLDB_REGNUM_GENERIC_RA:
- default:
- break;
- }
- }
- else if (kind == eRegisterKindEHFrame || kind == eRegisterKindDWARF)
- {
- switch (reg)
- {
- case ehframe_dwarf_gpr_rax: return gpr_rax;
- case ehframe_dwarf_gpr_rdx: return gpr_rdx;
- case ehframe_dwarf_gpr_rcx: return gpr_rcx;
- case ehframe_dwarf_gpr_rbx: return gpr_rbx;
- case ehframe_dwarf_gpr_rsi: return gpr_rsi;
- case ehframe_dwarf_gpr_rdi: return gpr_rdi;
- case ehframe_dwarf_gpr_rbp: return gpr_rbp;
- case ehframe_dwarf_gpr_rsp: return gpr_rsp;
- case ehframe_dwarf_gpr_r8: return gpr_r8;
- case ehframe_dwarf_gpr_r9: return gpr_r9;
- case ehframe_dwarf_gpr_r10: return gpr_r10;
- case ehframe_dwarf_gpr_r11: return gpr_r11;
- case ehframe_dwarf_gpr_r12: return gpr_r12;
- case ehframe_dwarf_gpr_r13: return gpr_r13;
- case ehframe_dwarf_gpr_r14: return gpr_r14;
- case ehframe_dwarf_gpr_r15: return gpr_r15;
- case ehframe_dwarf_gpr_rip: return gpr_rip;
- case ehframe_dwarf_fpu_xmm0: return fpu_xmm0;
- case ehframe_dwarf_fpu_xmm1: return fpu_xmm1;
- case ehframe_dwarf_fpu_xmm2: return fpu_xmm2;
- case ehframe_dwarf_fpu_xmm3: return fpu_xmm3;
- case ehframe_dwarf_fpu_xmm4: return fpu_xmm4;
- case ehframe_dwarf_fpu_xmm5: return fpu_xmm5;
- case ehframe_dwarf_fpu_xmm6: return fpu_xmm6;
- case ehframe_dwarf_fpu_xmm7: return fpu_xmm7;
- case ehframe_dwarf_fpu_xmm8: return fpu_xmm8;
- case ehframe_dwarf_fpu_xmm9: return fpu_xmm9;
- case ehframe_dwarf_fpu_xmm10: return fpu_xmm10;
- case ehframe_dwarf_fpu_xmm11: return fpu_xmm11;
- case ehframe_dwarf_fpu_xmm12: return fpu_xmm12;
- case ehframe_dwarf_fpu_xmm13: return fpu_xmm13;
- case ehframe_dwarf_fpu_xmm14: return fpu_xmm14;
- case ehframe_dwarf_fpu_xmm15: return fpu_xmm15;
- case ehframe_dwarf_fpu_stmm0: return fpu_stmm0;
- case ehframe_dwarf_fpu_stmm1: return fpu_stmm1;
- case ehframe_dwarf_fpu_stmm2: return fpu_stmm2;
- case ehframe_dwarf_fpu_stmm3: return fpu_stmm3;
- case ehframe_dwarf_fpu_stmm4: return fpu_stmm4;
- case ehframe_dwarf_fpu_stmm5: return fpu_stmm5;
- case ehframe_dwarf_fpu_stmm6: return fpu_stmm6;
- case ehframe_dwarf_fpu_stmm7: return fpu_stmm7;
- default:
- break;
- }
+uint32_t RegisterContextDarwin_x86_64::ConvertRegisterKindToRegisterNumber(
+ lldb::RegisterKind kind, uint32_t reg) {
+ if (kind == eRegisterKindGeneric) {
+ switch (reg) {
+ case LLDB_REGNUM_GENERIC_PC:
+ return gpr_rip;
+ case LLDB_REGNUM_GENERIC_SP:
+ return gpr_rsp;
+ case LLDB_REGNUM_GENERIC_FP:
+ return gpr_rbp;
+ case LLDB_REGNUM_GENERIC_FLAGS:
+ return gpr_rflags;
+ case LLDB_REGNUM_GENERIC_RA:
+ default:
+ break;
}
- else if (kind == eRegisterKindLLDB)
- {
- return reg;
+ } else if (kind == eRegisterKindEHFrame || kind == eRegisterKindDWARF) {
+ switch (reg) {
+ case ehframe_dwarf_gpr_rax:
+ return gpr_rax;
+ case ehframe_dwarf_gpr_rdx:
+ return gpr_rdx;
+ case ehframe_dwarf_gpr_rcx:
+ return gpr_rcx;
+ case ehframe_dwarf_gpr_rbx:
+ return gpr_rbx;
+ case ehframe_dwarf_gpr_rsi:
+ return gpr_rsi;
+ case ehframe_dwarf_gpr_rdi:
+ return gpr_rdi;
+ case ehframe_dwarf_gpr_rbp:
+ return gpr_rbp;
+ case ehframe_dwarf_gpr_rsp:
+ return gpr_rsp;
+ case ehframe_dwarf_gpr_r8:
+ return gpr_r8;
+ case ehframe_dwarf_gpr_r9:
+ return gpr_r9;
+ case ehframe_dwarf_gpr_r10:
+ return gpr_r10;
+ case ehframe_dwarf_gpr_r11:
+ return gpr_r11;
+ case ehframe_dwarf_gpr_r12:
+ return gpr_r12;
+ case ehframe_dwarf_gpr_r13:
+ return gpr_r13;
+ case ehframe_dwarf_gpr_r14:
+ return gpr_r14;
+ case ehframe_dwarf_gpr_r15:
+ return gpr_r15;
+ case ehframe_dwarf_gpr_rip:
+ return gpr_rip;
+ case ehframe_dwarf_fpu_xmm0:
+ return fpu_xmm0;
+ case ehframe_dwarf_fpu_xmm1:
+ return fpu_xmm1;
+ case ehframe_dwarf_fpu_xmm2:
+ return fpu_xmm2;
+ case ehframe_dwarf_fpu_xmm3:
+ return fpu_xmm3;
+ case ehframe_dwarf_fpu_xmm4:
+ return fpu_xmm4;
+ case ehframe_dwarf_fpu_xmm5:
+ return fpu_xmm5;
+ case ehframe_dwarf_fpu_xmm6:
+ return fpu_xmm6;
+ case ehframe_dwarf_fpu_xmm7:
+ return fpu_xmm7;
+ case ehframe_dwarf_fpu_xmm8:
+ return fpu_xmm8;
+ case ehframe_dwarf_fpu_xmm9:
+ return fpu_xmm9;
+ case ehframe_dwarf_fpu_xmm10:
+ return fpu_xmm10;
+ case ehframe_dwarf_fpu_xmm11:
+ return fpu_xmm11;
+ case ehframe_dwarf_fpu_xmm12:
+ return fpu_xmm12;
+ case ehframe_dwarf_fpu_xmm13:
+ return fpu_xmm13;
+ case ehframe_dwarf_fpu_xmm14:
+ return fpu_xmm14;
+ case ehframe_dwarf_fpu_xmm15:
+ return fpu_xmm15;
+ case ehframe_dwarf_fpu_stmm0:
+ return fpu_stmm0;
+ case ehframe_dwarf_fpu_stmm1:
+ return fpu_stmm1;
+ case ehframe_dwarf_fpu_stmm2:
+ return fpu_stmm2;
+ case ehframe_dwarf_fpu_stmm3:
+ return fpu_stmm3;
+ case ehframe_dwarf_fpu_stmm4:
+ return fpu_stmm4;
+ case ehframe_dwarf_fpu_stmm5:
+ return fpu_stmm5;
+ case ehframe_dwarf_fpu_stmm6:
+ return fpu_stmm6;
+ case ehframe_dwarf_fpu_stmm7:
+ return fpu_stmm7;
+ default:
+ break;
}
- return LLDB_INVALID_REGNUM;
+ } else if (kind == eRegisterKindLLDB) {
+ return reg;
+ }
+ return LLDB_INVALID_REGNUM;
}
-bool
-RegisterContextDarwin_x86_64::HardwareSingleStep (bool enable)
-{
- if (ReadGPR(true) != 0)
- return false;
+bool RegisterContextDarwin_x86_64::HardwareSingleStep(bool enable) {
+ if (ReadGPR(true) != 0)
+ return false;
- const uint64_t trace_bit = 0x100ull;
- if (enable)
- {
+ const uint64_t trace_bit = 0x100ull;
+ if (enable) {
- if (gpr.rflags & trace_bit)
- return true; // trace bit is already set, there is nothing to do
- else
- gpr.rflags |= trace_bit;
- }
+ if (gpr.rflags & trace_bit)
+ return true; // trace bit is already set, there is nothing to do
else
- {
- if (gpr.rflags & trace_bit)
- gpr.rflags &= ~trace_bit;
- else
- return true; // trace bit is clear, there is nothing to do
- }
+ gpr.rflags |= trace_bit;
+ } else {
+ if (gpr.rflags & trace_bit)
+ gpr.rflags &= ~trace_bit;
+ else
+ return true; // trace bit is clear, there is nothing to do
+ }
- return WriteGPR() == 0;
+ return WriteGPR() == 0;
}
-
diff --git a/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.h b/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.h
index ed627e194a26..fdd5e8036dee 100644
--- a/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.h
+++ b/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.h
@@ -14,261 +14,205 @@
// C++ Includes
// Other libraries and framework includes
// Project includes
-#include "lldb/lldb-private.h"
#include "lldb/Target/RegisterContext.h"
+#include "lldb/lldb-private.h"
-class RegisterContextDarwin_x86_64 : public lldb_private::RegisterContext
-{
+class RegisterContextDarwin_x86_64 : public lldb_private::RegisterContext {
public:
- RegisterContextDarwin_x86_64 (lldb_private::Thread &thread,
- uint32_t concrete_frame_idx);
-
- ~RegisterContextDarwin_x86_64() override;
-
- void
- InvalidateAllRegisters() override;
-
- size_t
- GetRegisterCount() override;
-
- const lldb_private::RegisterInfo *
- GetRegisterInfoAtIndex(size_t reg) override;
-
- size_t
- GetRegisterSetCount() override;
-
- const lldb_private::RegisterSet *
- GetRegisterSet(size_t set) override;
-
- bool
- ReadRegister(const lldb_private::RegisterInfo *reg_info,
- lldb_private::RegisterValue &value) override;
-
- bool
- WriteRegister(const lldb_private::RegisterInfo *reg_info,
- const lldb_private::RegisterValue &value) override;
-
- bool
- ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
-
- bool
- WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
-
- uint32_t
- ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override;
-
- bool
- HardwareSingleStep(bool enable) override;
-
- struct GPR
- {
- uint64_t rax;
- uint64_t rbx;
- uint64_t rcx;
- uint64_t rdx;
- uint64_t rdi;
- uint64_t rsi;
- uint64_t rbp;
- uint64_t rsp;
- uint64_t r8;
- uint64_t r9;
- uint64_t r10;
- uint64_t r11;
- uint64_t r12;
- uint64_t r13;
- uint64_t r14;
- uint64_t r15;
- uint64_t rip;
- uint64_t rflags;
- uint64_t cs;
- uint64_t fs;
- uint64_t gs;
- };
-
- struct MMSReg
- {
- uint8_t bytes[10];
- uint8_t pad[6];
- };
-
- struct XMMReg
- {
- uint8_t bytes[16];
- };
-
- struct FPU
- {
- uint32_t pad[2];
- uint16_t fcw; // "fctrl"
- uint16_t fsw; // "fstat"
- uint8_t ftw; // "ftag"
- uint8_t pad1;
- uint16_t fop; // "fop"
- uint32_t ip; // "fioff"
- uint16_t cs; // "fiseg"
- uint16_t pad2;
- uint32_t dp; // "fooff"
- uint16_t ds; // "foseg"
- uint16_t pad3;
- uint32_t mxcsr;
- uint32_t mxcsrmask;
- MMSReg stmm[8];
- XMMReg xmm[16];
- uint8_t pad4[6*16];
- int pad5;
- };
-
- struct EXC
- {
- uint32_t trapno;
- uint32_t err;
- uint64_t faultvaddr;
- };
+ RegisterContextDarwin_x86_64(lldb_private::Thread &thread,
+ uint32_t concrete_frame_idx);
+
+ ~RegisterContextDarwin_x86_64() override;
+
+ void InvalidateAllRegisters() override;
+
+ size_t GetRegisterCount() override;
+
+ const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
+
+ size_t GetRegisterSetCount() override;
+
+ const lldb_private::RegisterSet *GetRegisterSet(size_t set) override;
+
+ bool ReadRegister(const lldb_private::RegisterInfo *reg_info,
+ lldb_private::RegisterValue &value) override;
+
+ bool WriteRegister(const lldb_private::RegisterInfo *reg_info,
+ const lldb_private::RegisterValue &value) override;
+
+ bool ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
+
+ bool WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
+
+ uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
+ uint32_t num) override;
+
+ bool HardwareSingleStep(bool enable) override;
+
+ struct GPR {
+ uint64_t rax;
+ uint64_t rbx;
+ uint64_t rcx;
+ uint64_t rdx;
+ uint64_t rdi;
+ uint64_t rsi;
+ uint64_t rbp;
+ uint64_t rsp;
+ uint64_t r8;
+ uint64_t r9;
+ uint64_t r10;
+ uint64_t r11;
+ uint64_t r12;
+ uint64_t r13;
+ uint64_t r14;
+ uint64_t r15;
+ uint64_t rip;
+ uint64_t rflags;
+ uint64_t cs;
+ uint64_t fs;
+ uint64_t gs;
+ };
+
+ struct MMSReg {
+ uint8_t bytes[10];
+ uint8_t pad[6];
+ };
+
+ struct XMMReg {
+ uint8_t bytes[16];
+ };
+
+ struct FPU {
+ uint32_t pad[2];
+ uint16_t fcw; // "fctrl"
+ uint16_t fsw; // "fstat"
+ uint8_t ftw; // "ftag"
+ uint8_t pad1;
+ uint16_t fop; // "fop"
+ uint32_t ip; // "fioff"
+ uint16_t cs; // "fiseg"
+ uint16_t pad2;
+ uint32_t dp; // "fooff"
+ uint16_t ds; // "foseg"
+ uint16_t pad3;
+ uint32_t mxcsr;
+ uint32_t mxcsrmask;
+ MMSReg stmm[8];
+ XMMReg xmm[16];
+ uint8_t pad4[6 * 16];
+ int pad5;
+ };
+
+ struct EXC {
+ uint32_t trapno;
+ uint32_t err;
+ uint64_t faultvaddr;
+ };
protected:
-
- enum
- {
- GPRRegSet = 4,
- FPURegSet = 5,
- EXCRegSet = 6
- };
-
- enum
- {
- GPRWordCount = sizeof(GPR)/sizeof(uint32_t),
- FPUWordCount = sizeof(FPU)/sizeof(uint32_t),
- EXCWordCount = sizeof(EXC)/sizeof(uint32_t)
- };
-
- enum
- {
- Read = 0,
- Write = 1,
- kNumErrors = 2
- };
-
- GPR gpr;
- FPU fpu;
- EXC exc;
- int gpr_errs[2]; // Read/Write errors
- int fpu_errs[2]; // Read/Write errors
- int exc_errs[2]; // Read/Write errors
-
- void
- InvalidateAllRegisterStates()
- {
- SetError (GPRRegSet, Read, -1);
- SetError (FPURegSet, Read, -1);
- SetError (EXCRegSet, Read, -1);
+ enum { GPRRegSet = 4, FPURegSet = 5, EXCRegSet = 6 };
+
+ enum {
+ GPRWordCount = sizeof(GPR) / sizeof(uint32_t),
+ FPUWordCount = sizeof(FPU) / sizeof(uint32_t),
+ EXCWordCount = sizeof(EXC) / sizeof(uint32_t)
+ };
+
+ enum { Read = 0, Write = 1, kNumErrors = 2 };
+
+ GPR gpr;
+ FPU fpu;
+ EXC exc;
+ int gpr_errs[2]; // Read/Write errors
+ int fpu_errs[2]; // Read/Write errors
+ int exc_errs[2]; // Read/Write errors
+
+ void InvalidateAllRegisterStates() {
+ SetError(GPRRegSet, Read, -1);
+ SetError(FPURegSet, Read, -1);
+ SetError(EXCRegSet, Read, -1);
+ }
+
+ int GetError(int flavor, uint32_t err_idx) const {
+ if (err_idx < kNumErrors) {
+ switch (flavor) {
+ // When getting all errors, just OR all values together to see if
+ // we got any kind of error.
+ case GPRRegSet:
+ return gpr_errs[err_idx];
+ case FPURegSet:
+ return fpu_errs[err_idx];
+ case EXCRegSet:
+ return exc_errs[err_idx];
+ default:
+ break;
+ }
}
-
- int
- GetError (int flavor, uint32_t err_idx) const
- {
- if (err_idx < kNumErrors)
- {
- switch (flavor)
- {
- // When getting all errors, just OR all values together to see if
- // we got any kind of error.
- case GPRRegSet: return gpr_errs[err_idx];
- case FPURegSet: return fpu_errs[err_idx];
- case EXCRegSet: return exc_errs[err_idx];
- default: break;
- }
- }
- return -1;
+ return -1;
+ }
+
+ bool SetError(int flavor, uint32_t err_idx, int err) {
+ if (err_idx < kNumErrors) {
+ switch (flavor) {
+ case GPRRegSet:
+ gpr_errs[err_idx] = err;
+ return true;
+
+ case FPURegSet:
+ fpu_errs[err_idx] = err;
+ return true;
+
+ case EXCRegSet:
+ exc_errs[err_idx] = err;
+ return true;
+
+ default:
+ break;
+ }
}
+ return false;
+ }
- bool
- SetError (int flavor, uint32_t err_idx, int err)
- {
- if (err_idx < kNumErrors)
- {
- switch (flavor)
- {
- case GPRRegSet:
- gpr_errs[err_idx] = err;
- return true;
-
- case FPURegSet:
- fpu_errs[err_idx] = err;
- return true;
-
- case EXCRegSet:
- exc_errs[err_idx] = err;
- return true;
-
- default: break;
- }
- }
- return false;
- }
+ bool RegisterSetIsCached(int set) const { return GetError(set, Read) == 0; }
- bool
- RegisterSetIsCached (int set) const
- {
- return GetError(set, Read) == 0;
- }
+ void LogGPR(lldb_private::Log *log, const char *format, ...);
+
+ int ReadGPR(bool force);
+
+ int ReadFPU(bool force);
+
+ int ReadEXC(bool force);
+
+ int WriteGPR();
+
+ int WriteFPU();
+
+ int WriteEXC();
+
+ // Subclasses override these to do the actual reading.
+ virtual int DoReadGPR(lldb::tid_t tid, int flavor, GPR &gpr) = 0;
+
+ virtual int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) = 0;
+
+ virtual int DoReadEXC(lldb::tid_t tid, int flavor, EXC &exc) = 0;
+
+ virtual int DoWriteGPR(lldb::tid_t tid, int flavor, const GPR &gpr) = 0;
+
+ virtual int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
+
+ virtual int DoWriteEXC(lldb::tid_t tid, int flavor, const EXC &exc) = 0;
+
+ int ReadRegisterSet(uint32_t set, bool force);
+
+ int WriteRegisterSet(uint32_t set);
+
+ static uint32_t GetRegisterNumber(uint32_t reg_kind, uint32_t reg_num);
+
+ static int GetSetForNativeRegNum(int reg_num);
+
+ static size_t GetRegisterInfosCount();
- void
- LogGPR (lldb_private::Log *log, const char *format, ...);
-
- int
- ReadGPR (bool force);
-
- int
- ReadFPU (bool force);
-
- int
- ReadEXC (bool force);
-
- int
- WriteGPR ();
-
- int
- WriteFPU ();
-
- int
- WriteEXC ();
-
- // Subclasses override these to do the actual reading.
- virtual int
- DoReadGPR (lldb::tid_t tid, int flavor, GPR &gpr) = 0;
-
- virtual int
- DoReadFPU (lldb::tid_t tid, int flavor, FPU &fpu) = 0;
-
- virtual int
- DoReadEXC (lldb::tid_t tid, int flavor, EXC &exc) = 0;
-
- virtual int
- DoWriteGPR (lldb::tid_t tid, int flavor, const GPR &gpr) = 0;
-
- virtual int
- DoWriteFPU (lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
-
- virtual int
- DoWriteEXC (lldb::tid_t tid, int flavor, const EXC &exc) = 0;
-
- int
- ReadRegisterSet (uint32_t set, bool force);
-
- int
- WriteRegisterSet (uint32_t set);
-
- static uint32_t
- GetRegisterNumber (uint32_t reg_kind, uint32_t reg_num);
-
- static int
- GetSetForNativeRegNum (int reg_num);
-
- static size_t
- GetRegisterInfosCount ();
-
- static const lldb_private::RegisterInfo *
- GetRegisterInfos ();
+ static const lldb_private::RegisterInfo *GetRegisterInfos();
};
#endif // liblldb_RegisterContextDarwin_x86_64_h_
diff --git a/source/Plugins/Process/Utility/RegisterContextDummy.cpp b/source/Plugins/Process/Utility/RegisterContextDummy.cpp
index 0859e4e9419c..93bb09b810ac 100644
--- a/source/Plugins/Process/Utility/RegisterContextDummy.cpp
+++ b/source/Plugins/Process/Utility/RegisterContextDummy.cpp
@@ -1,4 +1,5 @@
-//===-- RegisterContextDummy.cpp ---------------------------------*- C++ -*-===//
+//===-- RegisterContextDummy.cpp ---------------------------------*- C++
+//-*-===//
//
// The LLVM Compiler Infrastructure
//
@@ -7,8 +8,6 @@
//
//===----------------------------------------------------------------------===//
-
-#include "lldb/lldb-private.h"
#include "lldb/Core/Address.h"
#include "lldb/Core/AddressRange.h"
#include "lldb/Core/DataBufferHeap.h"
@@ -20,118 +19,103 @@
#include "lldb/Symbol/FuncUnwinders.h"
#include "lldb/Symbol/Function.h"
#include "lldb/Symbol/ObjectFile.h"
-#include "lldb/Symbol/SymbolContext.h"
#include "lldb/Symbol/Symbol.h"
+#include "lldb/Symbol/SymbolContext.h"
#include "lldb/Target/ABI.h"
+#include "lldb/Target/DynamicLoader.h"
#include "lldb/Target/ExecutionContext.h"
#include "lldb/Target/Process.h"
#include "lldb/Target/StackFrame.h"
#include "lldb/Target/Target.h"
#include "lldb/Target/Thread.h"
-#include "lldb/Target/DynamicLoader.h"
+#include "lldb/lldb-private.h"
#include "RegisterContextDummy.h"
using namespace lldb;
using namespace lldb_private;
-RegisterContextDummy::RegisterContextDummy (Thread &thread, uint32_t concrete_frame_idx, uint32_t address_byte_size) :
-RegisterContext (thread, concrete_frame_idx)
-{
- m_reg_set0.name = "General Purpose Registers";
- m_reg_set0.short_name = "GPR";
- m_reg_set0.num_registers = 1;
- m_reg_set0.registers = new uint32_t(0);
-
- m_pc_reg_info.name = "pc";
- m_pc_reg_info.alt_name = "pc";
- m_pc_reg_info.byte_offset = 0;
- m_pc_reg_info.byte_size = address_byte_size;
- m_pc_reg_info.encoding = eEncodingUint;
- m_pc_reg_info.format = eFormatPointer;
- m_pc_reg_info.invalidate_regs = NULL;
- m_pc_reg_info.value_regs = NULL;
- m_pc_reg_info.kinds[eRegisterKindEHFrame] = LLDB_INVALID_REGNUM;
- m_pc_reg_info.kinds[eRegisterKindDWARF] = LLDB_INVALID_REGNUM;
- m_pc_reg_info.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_PC;
- m_pc_reg_info.kinds[eRegisterKindProcessPlugin] = LLDB_INVALID_REGNUM;
- m_pc_reg_info.kinds[eRegisterKindLLDB] = LLDB_INVALID_REGNUM;
+RegisterContextDummy::RegisterContextDummy(Thread &thread,
+ uint32_t concrete_frame_idx,
+ uint32_t address_byte_size)
+ : RegisterContext(thread, concrete_frame_idx) {
+ m_reg_set0.name = "General Purpose Registers";
+ m_reg_set0.short_name = "GPR";
+ m_reg_set0.num_registers = 1;
+ m_reg_set0.registers = new uint32_t(0);
+
+ m_pc_reg_info.name = "pc";
+ m_pc_reg_info.alt_name = "pc";
+ m_pc_reg_info.byte_offset = 0;
+ m_pc_reg_info.byte_size = address_byte_size;
+ m_pc_reg_info.encoding = eEncodingUint;
+ m_pc_reg_info.format = eFormatPointer;
+ m_pc_reg_info.invalidate_regs = NULL;
+ m_pc_reg_info.value_regs = NULL;
+ m_pc_reg_info.kinds[eRegisterKindEHFrame] = LLDB_INVALID_REGNUM;
+ m_pc_reg_info.kinds[eRegisterKindDWARF] = LLDB_INVALID_REGNUM;
+ m_pc_reg_info.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_PC;
+ m_pc_reg_info.kinds[eRegisterKindProcessPlugin] = LLDB_INVALID_REGNUM;
+ m_pc_reg_info.kinds[eRegisterKindLLDB] = LLDB_INVALID_REGNUM;
}
-RegisterContextDummy::~RegisterContextDummy ()
-{
- delete m_reg_set0.registers;
- delete m_pc_reg_info.invalidate_regs;
- delete m_pc_reg_info.value_regs;
+RegisterContextDummy::~RegisterContextDummy() {
+ delete m_reg_set0.registers;
+ delete m_pc_reg_info.invalidate_regs;
+ delete m_pc_reg_info.value_regs;
}
-void
-RegisterContextDummy::InvalidateAllRegisters () {}
+void RegisterContextDummy::InvalidateAllRegisters() {}
-size_t
-RegisterContextDummy::GetRegisterCount ()
-{
- return 1;
-}
+size_t RegisterContextDummy::GetRegisterCount() { return 1; }
const lldb_private::RegisterInfo *
-RegisterContextDummy::GetRegisterInfoAtIndex (size_t reg)
-{
- if (reg)
- return NULL;
- return &m_pc_reg_info;
+RegisterContextDummy::GetRegisterInfoAtIndex(size_t reg) {
+ if (reg)
+ return NULL;
+ return &m_pc_reg_info;
}
-size_t
-RegisterContextDummy::GetRegisterSetCount ()
-{
- return 1;
-}
+size_t RegisterContextDummy::GetRegisterSetCount() { return 1; }
const lldb_private::RegisterSet *
-RegisterContextDummy::GetRegisterSet (size_t reg_set)
-{
- if (reg_set)
- return NULL;
- return &m_reg_set0;
+RegisterContextDummy::GetRegisterSet(size_t reg_set) {
+ if (reg_set)
+ return NULL;
+ return &m_reg_set0;
}
-bool
-RegisterContextDummy::ReadRegister (const lldb_private::RegisterInfo *reg_info, lldb_private::RegisterValue &value)
-{
- if (!reg_info)
- return false;
- uint32_t reg_number = reg_info->kinds[eRegisterKindGeneric];
- if (reg_number == LLDB_REGNUM_GENERIC_PC)
- {
- value.SetUInt(LLDB_INVALID_ADDRESS, reg_info->byte_size);
- return true;
- }
+bool RegisterContextDummy::ReadRegister(
+ const lldb_private::RegisterInfo *reg_info,
+ lldb_private::RegisterValue &value) {
+ if (!reg_info)
return false;
+ uint32_t reg_number = reg_info->kinds[eRegisterKindGeneric];
+ if (reg_number == LLDB_REGNUM_GENERIC_PC) {
+ value.SetUInt(LLDB_INVALID_ADDRESS, reg_info->byte_size);
+ return true;
+ }
+ return false;
}
-bool
-RegisterContextDummy::WriteRegister (const lldb_private::RegisterInfo *reg_info, const lldb_private::RegisterValue &value)
-{
- return false;
+bool RegisterContextDummy::WriteRegister(
+ const lldb_private::RegisterInfo *reg_info,
+ const lldb_private::RegisterValue &value) {
+ return false;
}
-bool
-RegisterContextDummy::ReadAllRegisterValues (lldb::DataBufferSP &data_sp)
-{
- return false;
+bool RegisterContextDummy::ReadAllRegisterValues(lldb::DataBufferSP &data_sp) {
+ return false;
}
-bool
-RegisterContextDummy::WriteAllRegisterValues (const lldb::DataBufferSP &data_sp)
-{
- return false;
+bool RegisterContextDummy::WriteAllRegisterValues(
+ const lldb::DataBufferSP &data_sp) {
+ return false;
}
-uint32_t
-RegisterContextDummy::ConvertRegisterKindToRegisterNumber (lldb::RegisterKind kind, uint32_t num)
-{
- if (kind == eRegisterKindGeneric && num == LLDB_REGNUM_GENERIC_PC)
- return 0;
- return LLDB_INVALID_REGNUM;
+uint32_t RegisterContextDummy::ConvertRegisterKindToRegisterNumber(
+ lldb::RegisterKind kind, uint32_t num) {
+ if (kind == eRegisterKindGeneric && num == LLDB_REGNUM_GENERIC_PC)
+ return 0;
+ return LLDB_INVALID_REGNUM;
}
diff --git a/source/Plugins/Process/Utility/RegisterContextDummy.h b/source/Plugins/Process/Utility/RegisterContextDummy.h
index 9f6a8dc347b5..ea70288f3d69 100644
--- a/source/Plugins/Process/Utility/RegisterContextDummy.h
+++ b/source/Plugins/Process/Utility/RegisterContextDummy.h
@@ -1,4 +1,5 @@
-//===-- RegisterContextDummy.h ----------------------------------------*- C++ -*-===//
+//===-- RegisterContextDummy.h ----------------------------------------*- C++
+//-*-===//
//
// The LLVM Compiler Infrastructure
//
@@ -16,62 +17,53 @@
// Other libraries and framework includes
// Project includes
-#include "lldb/lldb-private.h"
-#include "lldb/Target/RegisterContext.h"
#include "lldb/Symbol/SymbolContext.h"
+#include "lldb/Target/RegisterContext.h"
+#include "lldb/lldb-private.h"
namespace lldb_private {
-
-class RegisterContextDummy : public lldb_private::RegisterContext
-{
+
+class RegisterContextDummy : public lldb_private::RegisterContext {
public:
- typedef std::shared_ptr<RegisterContextDummy> SharedPtr;
-
- RegisterContextDummy (Thread &thread, uint32_t concrete_frame_idx, uint32_t address_byte_size);
-
- ~RegisterContextDummy() override;
+ typedef std::shared_ptr<RegisterContextDummy> SharedPtr;
- void
- InvalidateAllRegisters() override;
+ RegisterContextDummy(Thread &thread, uint32_t concrete_frame_idx,
+ uint32_t address_byte_size);
- size_t
- GetRegisterCount() override;
+ ~RegisterContextDummy() override;
- const lldb_private::RegisterInfo *
- GetRegisterInfoAtIndex(size_t reg) override;
+ void InvalidateAllRegisters() override;
- size_t
- GetRegisterSetCount() override;
+ size_t GetRegisterCount() override;
- const lldb_private::RegisterSet *
- GetRegisterSet(size_t reg_set) override;
+ const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
- bool
- ReadRegister(const lldb_private::RegisterInfo *reg_info,
- lldb_private::RegisterValue &value) override;
+ size_t GetRegisterSetCount() override;
- bool
- WriteRegister(const lldb_private::RegisterInfo *reg_info,
- const lldb_private::RegisterValue &value) override;
+ const lldb_private::RegisterSet *GetRegisterSet(size_t reg_set) override;
- bool
- ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
+ bool ReadRegister(const lldb_private::RegisterInfo *reg_info,
+ lldb_private::RegisterValue &value) override;
- bool
- WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
+ bool WriteRegister(const lldb_private::RegisterInfo *reg_info,
+ const lldb_private::RegisterValue &value) override;
+
+ bool ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
+
+ bool WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
+
+ uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
+ uint32_t num) override;
- uint32_t
- ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override;
-
private:
- //------------------------------------------------------------------
- // For RegisterContextLLDB only
- //------------------------------------------------------------------
-
- lldb_private::RegisterSet m_reg_set0; // register set 0 (PC only)
- lldb_private::RegisterInfo m_pc_reg_info;
-
- DISALLOW_COPY_AND_ASSIGN (RegisterContextDummy);
+ //------------------------------------------------------------------
+ // For RegisterContextLLDB only
+ //------------------------------------------------------------------
+
+ lldb_private::RegisterSet m_reg_set0; // register set 0 (PC only)
+ lldb_private::RegisterInfo m_pc_reg_info;
+
+ DISALLOW_COPY_AND_ASSIGN(RegisterContextDummy);
};
} // namespace lldb_private
diff --git a/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.cpp b/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.cpp
index 588793d5a644..fecfae0b7e66 100644
--- a/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.cpp
+++ b/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.cpp
@@ -7,12 +7,12 @@
//
//===---------------------------------------------------------------------===//
+#include <cassert>
#include <stddef.h>
#include <vector>
-#include <cassert>
-#include "llvm/Support/Compiler.h"
#include "lldb/lldb-defines.h"
+#include "llvm/Support/Compiler.h"
#include "RegisterContextFreeBSD_arm.h"
@@ -21,14 +21,31 @@ using namespace lldb_private;
// Based on RegisterContextLinux_arm.cpp and
// http://svnweb.freebsd.org/base/head/sys/arm/include/reg.h
-#define GPR_OFFSET(idx) ((idx) * 4)
-#define FPU_OFFSET(idx) ((idx) * 4 + sizeof (RegisterContextFreeBSD_arm::GPR))
-#define FPSCR_OFFSET (LLVM_EXTENSION offsetof (RegisterContextFreeBSD_arm::FPU, fpscr) + sizeof (RegisterContextFreeBSD_arm::GPR))
-#define EXC_OFFSET(idx) ((idx) * 4 + sizeof (RegisterContextFreeBSD_arm::GPR) + sizeof (RegisterContextFreeBSD_arm::FPU))
-#define DBG_OFFSET(reg) ((LLVM_EXTENSION offsetof (RegisterContextFreeBSD_arm::DBG, reg) + sizeof (RegisterContextFreeBSD_arm::GPR) + sizeof (RegisterContextFreeBSD_arm::FPU) + sizeof (RegisterContextFreeBSD_arm::EXC)))
+#define GPR_OFFSET(idx) ((idx)*4)
+#define FPU_OFFSET(idx) ((idx)*4 + sizeof(RegisterContextFreeBSD_arm::GPR))
+#define FPSCR_OFFSET \
+ (LLVM_EXTENSION offsetof(RegisterContextFreeBSD_arm::FPU, fpscr) + \
+ sizeof(RegisterContextFreeBSD_arm::GPR))
+#define EXC_OFFSET(idx) \
+ ((idx)*4 + sizeof(RegisterContextFreeBSD_arm::GPR) + \
+ sizeof(RegisterContextFreeBSD_arm::FPU))
+#define DBG_OFFSET(reg) \
+ ((LLVM_EXTENSION offsetof(RegisterContextFreeBSD_arm::DBG, reg) + \
+ sizeof(RegisterContextFreeBSD_arm::GPR) + \
+ sizeof(RegisterContextFreeBSD_arm::FPU) + \
+ sizeof(RegisterContextFreeBSD_arm::EXC)))
-#define DEFINE_DBG(reg, i) #reg, NULL, sizeof(((RegisterContextFreeBSD_arm::DBG *)NULL)->reg[i]), DBG_OFFSET(reg[i]), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, dbg_##reg##i }, NULL, NULL, NULL, 0
-#define REG_CONTEXT_SIZE (sizeof (RegisterContextFreeBSD_arm::GPR) + sizeof (RegisterContextFreeBSD_arm::FPU) + sizeof (RegisterContextFreeBSD_arm::EXC))
+#define DEFINE_DBG(reg, i) \
+ #reg, NULL, sizeof(((RegisterContextFreeBSD_arm::DBG *) NULL)->reg[i]), \
+ DBG_OFFSET(reg[i]), eEncodingUint, eFormatHex, \
+ {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
+ dbg_##reg##i }, \
+ NULL, NULL, NULL, 0
+#define REG_CONTEXT_SIZE \
+ (sizeof(RegisterContextFreeBSD_arm::GPR) + \
+ sizeof(RegisterContextFreeBSD_arm::FPU) + \
+ sizeof(RegisterContextFreeBSD_arm::EXC))
//-----------------------------------------------------------------------------
// Include RegisterInfos_arm to declare our g_register_infos_arm structure.
@@ -38,52 +55,43 @@ using namespace lldb_private;
#undef DECLARE_REGISTER_INFOS_ARM_STRUCT
static const lldb_private::RegisterInfo *
-GetRegisterInfoPtr (const lldb_private::ArchSpec &target_arch)
-{
- switch (target_arch.GetMachine())
- {
- case llvm::Triple::arm:
- return g_register_infos_arm;
- default:
- assert(false && "Unhandled target architecture.");
- return NULL;
- }
+GetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch) {
+ switch (target_arch.GetMachine()) {
+ case llvm::Triple::arm:
+ return g_register_infos_arm;
+ default:
+ assert(false && "Unhandled target architecture.");
+ return NULL;
+ }
}
static uint32_t
-GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch)
-{
- switch (target_arch.GetMachine())
- {
- case llvm::Triple::arm:
- return static_cast<uint32_t>(sizeof(g_register_infos_arm) / sizeof(g_register_infos_arm[0]));
- default:
- assert(false && "Unhandled target architecture.");
- return 0;
- }
+GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch) {
+ switch (target_arch.GetMachine()) {
+ case llvm::Triple::arm:
+ return static_cast<uint32_t>(sizeof(g_register_infos_arm) /
+ sizeof(g_register_infos_arm[0]));
+ default:
+ assert(false && "Unhandled target architecture.");
+ return 0;
+ }
}
-RegisterContextFreeBSD_arm::RegisterContextFreeBSD_arm(const lldb_private::ArchSpec &target_arch) :
- lldb_private::RegisterInfoInterface(target_arch),
- m_register_info_p(GetRegisterInfoPtr(target_arch)),
- m_register_info_count(GetRegisterInfoCount(target_arch))
-{
-}
+RegisterContextFreeBSD_arm::RegisterContextFreeBSD_arm(
+ const lldb_private::ArchSpec &target_arch)
+ : lldb_private::RegisterInfoInterface(target_arch),
+ m_register_info_p(GetRegisterInfoPtr(target_arch)),
+ m_register_info_count(GetRegisterInfoCount(target_arch)) {}
-size_t
-RegisterContextFreeBSD_arm::GetGPRSize() const
-{
- return sizeof(struct RegisterContextFreeBSD_arm::GPR);
+size_t RegisterContextFreeBSD_arm::GetGPRSize() const {
+ return sizeof(struct RegisterContextFreeBSD_arm::GPR);
}
const lldb_private::RegisterInfo *
-RegisterContextFreeBSD_arm::GetRegisterInfo() const
-{
- return m_register_info_p;
+RegisterContextFreeBSD_arm::GetRegisterInfo() const {
+ return m_register_info_p;
}
-uint32_t
-RegisterContextFreeBSD_arm::GetRegisterCount() const
-{
- return m_register_info_count;
+uint32_t RegisterContextFreeBSD_arm::GetRegisterCount() const {
+ return m_register_info_count;
}
diff --git a/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.h b/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.h
index f2d9364b3ce6..422ecb7686dc 100644
--- a/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.h
+++ b/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.h
@@ -10,65 +10,53 @@
#ifndef liblldb_RegisterContextFreeBSD_arm_h_
#define liblldb_RegisterContextFreeBSD_arm_h_
-#include "lldb/lldb-private.h"
-#include "lldb/Target/RegisterContext.h"
#include "RegisterInfoInterface.h"
+#include "lldb/Target/RegisterContext.h"
+#include "lldb/lldb-private.h"
-class RegisterContextFreeBSD_arm
- : public lldb_private::RegisterInfoInterface
-{
+class RegisterContextFreeBSD_arm : public lldb_private::RegisterInfoInterface {
public:
-
- struct GPR
- {
- uint32_t r[16]; // R0-R15
- uint32_t cpsr; // CPSR
- };
-
-
- struct QReg
- {
- uint8_t bytes[16];
- };
-
- struct FPU
- {
- union {
- uint32_t s[32];
- uint64_t d[32];
- QReg q[16]; // the 128-bit NEON registers
- } floats;
- uint32_t fpscr;
- };
- struct EXC
- {
- uint32_t exception;
- uint32_t fsr; /* Fault status */
- uint32_t far; /* Virtual Fault Address */
- };
-
- struct DBG
- {
- uint32_t bvr[16];
- uint32_t bcr[16];
- uint32_t wvr[16];
- uint32_t wcr[16];
- };
-
- RegisterContextFreeBSD_arm(const lldb_private::ArchSpec &target_arch);
-
- size_t
- GetGPRSize() const override;
-
- const lldb_private::RegisterInfo *
- GetRegisterInfo() const override;
-
- uint32_t
- GetRegisterCount () const override;
+ struct GPR {
+ uint32_t r[16]; // R0-R15
+ uint32_t cpsr; // CPSR
+ };
+
+ struct QReg {
+ uint8_t bytes[16];
+ };
+
+ struct FPU {
+ union {
+ uint32_t s[32];
+ uint64_t d[32];
+ QReg q[16]; // the 128-bit NEON registers
+ } floats;
+ uint32_t fpscr;
+ };
+ struct EXC {
+ uint32_t exception;
+ uint32_t fsr; /* Fault status */
+ uint32_t far; /* Virtual Fault Address */
+ };
+
+ struct DBG {
+ uint32_t bvr[16];
+ uint32_t bcr[16];
+ uint32_t wvr[16];
+ uint32_t wcr[16];
+ };
+
+ RegisterContextFreeBSD_arm(const lldb_private::ArchSpec &target_arch);
+
+ size_t GetGPRSize() const override;
+
+ const lldb_private::RegisterInfo *GetRegisterInfo() const override;
+
+ uint32_t GetRegisterCount() const override;
private:
- const lldb_private::RegisterInfo *m_register_info_p;
- uint32_t m_register_info_count;
+ const lldb_private::RegisterInfo *m_register_info_p;
+ uint32_t m_register_info_count;
};
-#endif // liblldb_RegisterContextFreeBSD_arm_h_
+#endif // liblldb_RegisterContextFreeBSD_arm_h_
diff --git a/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm64.cpp b/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm64.cpp
deleted file mode 100644
index 6e7e9e67f524..000000000000
--- a/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm64.cpp
+++ /dev/null
@@ -1,86 +0,0 @@
-//===-- RegisterContextFreeBSD_arm64.cpp ----------------------*- C++ -*-===//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===---------------------------------------------------------------------===//
-
-#include <vector>
-#include "RegisterContextPOSIX_arm64.h"
-#include "RegisterContextFreeBSD_arm64.h"
-
-using namespace lldb;
-
-// Based on RegisterContextDarwin_arm64.cpp
-#define GPR_OFFSET(idx) ((idx) * 8)
-#define GPR_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextFreeBSD_arm64::GPR, reg))
-
-#define FPU_OFFSET(idx) ((idx) * 16 + sizeof (RegisterContextFreeBSD_arm64::GPR))
-#define FPU_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextFreeBSD_arm64::FPU, reg))
-
-#define EXC_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextFreeBSD_arm64::EXC, reg) + sizeof (RegisterContextFreeBSD_arm64::GPR) + sizeof (RegisterContextFreeBSD_arm64::FPU))
-#define DBG_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextFreeBSD_arm64::DBG, reg) + sizeof (RegisterContextFreeBSD_arm64::GPR) + sizeof (RegisterContextFreeBSD_arm64::FPU) + sizeof (RegisterContextFreeBSD_arm64::EXC))
-
-#define DEFINE_DBG(reg, i) #reg, NULL, sizeof(((RegisterContextFreeBSD_arm64::DBG *)NULL)->reg[i]), DBG_OFFSET_NAME(reg[i]), lldb::eEncodingUint, lldb::eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, dbg_##reg##i }, NULL, NULL, NULL, 0
-#define REG_CONTEXT_SIZE (sizeof (RegisterContextFreeBSD_arm64::GPR) + sizeof (RegisterContextFreeBSD_arm64::FPU) + sizeof (RegisterContextFreeBSD_arm64::EXC))
-
-//-----------------------------------------------------------------------------
-// Include RegisterInfos_arm64 to declare our g_register_infos_arm64 structure.
-//-----------------------------------------------------------------------------
-#define DECLARE_REGISTER_INFOS_ARM64_STRUCT
-#include "RegisterInfos_arm64.h"
-#undef DECLARE_REGISTER_INFOS_ARM64_STRUCT
-
-static const lldb_private::RegisterInfo *
-GetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch)
-{
- switch (target_arch.GetMachine())
- {
- case llvm::Triple::aarch64:
- return g_register_infos_arm64;
- default:
- assert(false && "Unhandled target architecture.");
- return nullptr;
- }
-}
-
-static uint32_t
-GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch)
-{
- switch (target_arch.GetMachine())
- {
- case llvm::Triple::aarch64:
- return static_cast<uint32_t>(sizeof(g_register_infos_arm64) / sizeof(g_register_infos_arm64[0]));
- default:
- assert(false && "Unhandled target architecture.");
- return 0;
- }
-}
-
-RegisterContextFreeBSD_arm64::RegisterContextFreeBSD_arm64(const lldb_private::ArchSpec &target_arch) :
- RegisterInfoInterface(target_arch),
- m_register_info_p(GetRegisterInfoPtr(target_arch)),
- m_register_info_count(GetRegisterInfoCount(target_arch))
-{
-}
-
-size_t
-RegisterContextFreeBSD_arm64::GetGPRSize() const
-{
- return sizeof(struct RegisterContextFreeBSD_arm64::GPR);
-}
-
-const lldb_private::RegisterInfo *
-RegisterContextFreeBSD_arm64::GetRegisterInfo() const
-{
- return m_register_info_p;
-}
-
-uint32_t
-RegisterContextFreeBSD_arm64::GetRegisterCount() const
-{
- return m_register_info_count;
-}
-
diff --git a/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm64.h b/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm64.h
deleted file mode 100644
index cfdae4d2b557..000000000000
--- a/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm64.h
+++ /dev/null
@@ -1,78 +0,0 @@
-//===-- RegisterContextFreeBSD_arm64.h --------------------------*- C++ -*-===//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef liblldb_RegisterContextFreeBSD_arm64_H_
-#define liblldb_RegisterContextFreeBSD_arm64_H_
-
-#include "RegisterInfoInterface.h"
-
-class RegisterContextFreeBSD_arm64:
- public lldb_private::RegisterInfoInterface
-{
-public:
- // based on RegisterContextDarwin_arm64.h
- struct GPR
- {
- uint64_t x[29]; // x0-x28
- uint64_t fp; // x29
- uint64_t lr; // x30
- uint64_t sp; // x31
- uint64_t pc; // pc
- uint32_t cpsr; // cpsr
- };
-
- // based on RegisterContextDarwin_arm64.h
- struct VReg
- {
- uint8_t bytes[16];
- };
-
- // based on RegisterContextDarwin_arm64.h
- struct FPU
- {
- VReg v[32];
- uint32_t fpsr;
- uint32_t fpcr;
- };
-
- // based on RegisterContextDarwin_arm64.h
- struct EXC
- {
- uint64_t far; // Virtual Fault Address
- uint32_t esr; // Exception syndrome
- uint32_t exception; // number of arm exception token
- };
-
- // based on RegisterContextDarwin_arm64.h
- struct DBG
- {
- uint64_t bvr[16];
- uint64_t bcr[16];
- uint64_t wvr[16];
- uint64_t wcr[16];
- uint64_t mdscr_el1;
- };
-
- RegisterContextFreeBSD_arm64(const lldb_private::ArchSpec &target_arch);
-
- size_t
- GetGPRSize() const override;
-
- const lldb_private::RegisterInfo *
- GetRegisterInfo() const override;
-
- uint32_t
- GetRegisterCount () const override;
-
-private:
- const lldb_private::RegisterInfo *m_register_info_p;
- uint32_t m_register_info_count;
-};
-
-#endif
diff --git a/source/Plugins/Process/Utility/RegisterContextFreeBSD_i386.cpp b/source/Plugins/Process/Utility/RegisterContextFreeBSD_i386.cpp
index 0171da66a199..4ccfa2a16fef 100644
--- a/source/Plugins/Process/Utility/RegisterContextFreeBSD_i386.cpp
+++ b/source/Plugins/Process/Utility/RegisterContextFreeBSD_i386.cpp
@@ -7,55 +7,52 @@
//
//===---------------------------------------------------------------------===//
-#include "RegisterContextPOSIX_x86.h"
#include "RegisterContextFreeBSD_i386.h"
+#include "RegisterContextPOSIX_x86.h"
using namespace lldb_private;
using namespace lldb;
// http://svnweb.freebsd.org/base/head/sys/x86/include/reg.h
-struct GPR
-{
- uint32_t fs;
- uint32_t es;
- uint32_t ds;
- uint32_t edi;
- uint32_t esi;
- uint32_t ebp;
- uint32_t isp;
- uint32_t ebx;
- uint32_t edx;
- uint32_t ecx;
- uint32_t eax;
- uint32_t trapno;
- uint32_t err;
- uint32_t eip;
- uint32_t cs;
- uint32_t eflags;
- uint32_t esp;
- uint32_t ss;
- uint32_t gs;
+struct GPR {
+ uint32_t fs;
+ uint32_t es;
+ uint32_t ds;
+ uint32_t edi;
+ uint32_t esi;
+ uint32_t ebp;
+ uint32_t isp;
+ uint32_t ebx;
+ uint32_t edx;
+ uint32_t ecx;
+ uint32_t eax;
+ uint32_t trapno;
+ uint32_t err;
+ uint32_t eip;
+ uint32_t cs;
+ uint32_t eflags;
+ uint32_t esp;
+ uint32_t ss;
+ uint32_t gs;
};
struct dbreg {
- uint32_t dr[8]; /* debug registers */
- /* Index 0-3: debug address registers */
- /* Index 4-5: reserved */
- /* Index 6: debug status */
- /* Index 7: debug control */
+ uint32_t dr[8]; /* debug registers */
+ /* Index 0-3: debug address registers */
+ /* Index 4-5: reserved */
+ /* Index 6: debug status */
+ /* Index 7: debug control */
};
using FPR_i386 = FXSAVE;
-struct UserArea
-{
- GPR gpr;
- FPR_i386 i387;
+struct UserArea {
+ GPR gpr;
+ FPR_i386 i387;
};
#define DR_SIZE sizeof(uint32_t)
-#define DR_OFFSET(reg_index) \
- (LLVM_EXTENSION offsetof(dbreg, dr[reg_index]))
+#define DR_OFFSET(reg_index) (LLVM_EXTENSION offsetof(dbreg, dr[reg_index]))
//---------------------------------------------------------------------------
// Include RegisterInfos_i386 to declare our g_register_infos_i386 structure.
@@ -64,32 +61,23 @@ struct UserArea
#include "RegisterInfos_i386.h"
#undef DECLARE_REGISTER_INFOS_I386_STRUCT
-RegisterContextFreeBSD_i386::RegisterContextFreeBSD_i386(const ArchSpec &target_arch) :
- RegisterInfoInterface(target_arch)
-{
-}
+RegisterContextFreeBSD_i386::RegisterContextFreeBSD_i386(
+ const ArchSpec &target_arch)
+ : RegisterInfoInterface(target_arch) {}
-size_t
-RegisterContextFreeBSD_i386::GetGPRSize() const
-{
- return sizeof(GPR);
-}
+size_t RegisterContextFreeBSD_i386::GetGPRSize() const { return sizeof(GPR); }
-const RegisterInfo *
-RegisterContextFreeBSD_i386::GetRegisterInfo() const
-{
- switch (m_target_arch.GetMachine())
- {
- case llvm::Triple::x86:
- return g_register_infos_i386;
- default:
- assert(false && "Unhandled target architecture.");
- return NULL;
- }
+const RegisterInfo *RegisterContextFreeBSD_i386::GetRegisterInfo() const {
+ switch (m_target_arch.GetMachine()) {
+ case llvm::Triple::x86:
+ return g_register_infos_i386;
+ default:
+ assert(false && "Unhandled target architecture.");
+ return NULL;
+ }
}
-uint32_t
-RegisterContextFreeBSD_i386::GetRegisterCount () const
-{
- return static_cast<uint32_t> (sizeof (g_register_infos_i386) / sizeof (g_register_infos_i386 [0]));
+uint32_t RegisterContextFreeBSD_i386::GetRegisterCount() const {
+ return static_cast<uint32_t>(sizeof(g_register_infos_i386) /
+ sizeof(g_register_infos_i386[0]));
}
diff --git a/source/Plugins/Process/Utility/RegisterContextFreeBSD_i386.h b/source/Plugins/Process/Utility/RegisterContextFreeBSD_i386.h
index 9527fc03f728..35a79c14abfc 100644
--- a/source/Plugins/Process/Utility/RegisterContextFreeBSD_i386.h
+++ b/source/Plugins/Process/Utility/RegisterContextFreeBSD_i386.h
@@ -12,20 +12,15 @@
#include "RegisterInfoInterface.h"
-class RegisterContextFreeBSD_i386
- : public lldb_private::RegisterInfoInterface
-{
+class RegisterContextFreeBSD_i386 : public lldb_private::RegisterInfoInterface {
public:
- RegisterContextFreeBSD_i386(const lldb_private::ArchSpec &target_arch);
+ RegisterContextFreeBSD_i386(const lldb_private::ArchSpec &target_arch);
- size_t
- GetGPRSize() const override;
+ size_t GetGPRSize() const override;
- const lldb_private::RegisterInfo *
- GetRegisterInfo() const override;
+ const lldb_private::RegisterInfo *GetRegisterInfo() const override;
- uint32_t
- GetRegisterCount () const override;
+ uint32_t GetRegisterCount() const override;
};
#endif
diff --git a/source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.cpp b/source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.cpp
index 53fa4169bffc..c114cfb829f5 100644
--- a/source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.cpp
+++ b/source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.cpp
@@ -7,87 +7,79 @@
//
//===---------------------------------------------------------------------===//
-#include <vector>
-#include "RegisterContextPOSIX_mips64.h"
#include "RegisterContextFreeBSD_mips64.h"
+#include "RegisterContextPOSIX_mips64.h"
+#include <vector>
using namespace lldb_private;
using namespace lldb;
// http://svnweb.freebsd.org/base/head/sys/mips/include/regnum.h
-typedef struct _GPR
-{
- uint64_t zero;
- uint64_t r1;
- uint64_t r2;
- uint64_t r3;
- uint64_t r4;
- uint64_t r5;
- uint64_t r6;
- uint64_t r7;
- uint64_t r8;
- uint64_t r9;
- uint64_t r10;
- uint64_t r11;
- uint64_t r12;
- uint64_t r13;
- uint64_t r14;
- uint64_t r15;
- uint64_t r16;
- uint64_t r17;
- uint64_t r18;
- uint64_t r19;
- uint64_t r20;
- uint64_t r21;
- uint64_t r22;
- uint64_t r23;
- uint64_t r24;
- uint64_t r25;
- uint64_t r26;
- uint64_t r27;
- uint64_t gp;
- uint64_t sp;
- uint64_t r30;
- uint64_t ra;
- uint64_t sr;
- uint64_t mullo;
- uint64_t mulhi;
- uint64_t badvaddr;
- uint64_t cause;
- uint64_t pc;
- uint64_t ic;
- uint64_t dummy;
+typedef struct _GPR {
+ uint64_t zero;
+ uint64_t r1;
+ uint64_t r2;
+ uint64_t r3;
+ uint64_t r4;
+ uint64_t r5;
+ uint64_t r6;
+ uint64_t r7;
+ uint64_t r8;
+ uint64_t r9;
+ uint64_t r10;
+ uint64_t r11;
+ uint64_t r12;
+ uint64_t r13;
+ uint64_t r14;
+ uint64_t r15;
+ uint64_t r16;
+ uint64_t r17;
+ uint64_t r18;
+ uint64_t r19;
+ uint64_t r20;
+ uint64_t r21;
+ uint64_t r22;
+ uint64_t r23;
+ uint64_t r24;
+ uint64_t r25;
+ uint64_t r26;
+ uint64_t r27;
+ uint64_t gp;
+ uint64_t sp;
+ uint64_t r30;
+ uint64_t ra;
+ uint64_t sr;
+ uint64_t mullo;
+ uint64_t mulhi;
+ uint64_t badvaddr;
+ uint64_t cause;
+ uint64_t pc;
+ uint64_t ic;
+ uint64_t dummy;
} GPR_freebsd_mips;
//---------------------------------------------------------------------------
-// Include RegisterInfos_mips64 to declare our g_register_infos_mips64 structure.
+// Include RegisterInfos_mips64 to declare our g_register_infos_mips64
+// structure.
//---------------------------------------------------------------------------
#define DECLARE_REGISTER_INFOS_MIPS64_STRUCT
#include "RegisterInfos_mips64.h"
#undef DECLARE_REGISTER_INFOS_MIPS64_STRUCT
-RegisterContextFreeBSD_mips64::RegisterContextFreeBSD_mips64(const ArchSpec &target_arch) :
- RegisterInfoInterface(target_arch)
-{
-}
+RegisterContextFreeBSD_mips64::RegisterContextFreeBSD_mips64(
+ const ArchSpec &target_arch)
+ : RegisterInfoInterface(target_arch) {}
-size_t
-RegisterContextFreeBSD_mips64::GetGPRSize() const
-{
- return sizeof(GPR_freebsd_mips);
+size_t RegisterContextFreeBSD_mips64::GetGPRSize() const {
+ return sizeof(GPR_freebsd_mips);
}
-const RegisterInfo *
-RegisterContextFreeBSD_mips64::GetRegisterInfo() const
-{
- assert (m_target_arch.GetCore() == ArchSpec::eCore_mips64);
- return g_register_infos_mips64;
+const RegisterInfo *RegisterContextFreeBSD_mips64::GetRegisterInfo() const {
+ assert(m_target_arch.GetCore() == ArchSpec::eCore_mips64);
+ return g_register_infos_mips64;
}
-uint32_t
-RegisterContextFreeBSD_mips64::GetRegisterCount () const
-{
- return static_cast<uint32_t> (sizeof (g_register_infos_mips64) / sizeof (g_register_infos_mips64 [0]));
+uint32_t RegisterContextFreeBSD_mips64::GetRegisterCount() const {
+ return static_cast<uint32_t>(sizeof(g_register_infos_mips64) /
+ sizeof(g_register_infos_mips64[0]));
}
-
-
diff --git a/source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.h b/source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.h
index 5c042af20eac..043e638758da 100644
--- a/source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.h
+++ b/source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.h
@@ -12,20 +12,16 @@
#include "RegisterInfoInterface.h"
-class RegisterContextFreeBSD_mips64:
- public lldb_private::RegisterInfoInterface
-{
+class RegisterContextFreeBSD_mips64
+ : public lldb_private::RegisterInfoInterface {
public:
- RegisterContextFreeBSD_mips64(const lldb_private::ArchSpec &target_arch);
+ RegisterContextFreeBSD_mips64(const lldb_private::ArchSpec &target_arch);
- size_t
- GetGPRSize() const override;
+ size_t GetGPRSize() const override;
- const lldb_private::RegisterInfo *
- GetRegisterInfo() const override;
+ const lldb_private::RegisterInfo *GetRegisterInfo() const override;
- uint32_t
- GetRegisterCount () const override;
+ uint32_t GetRegisterCount() const override;
};
#endif
diff --git a/source/Plugins/Process/Utility/RegisterContextFreeBSD_powerpc.cpp b/source/Plugins/Process/Utility/RegisterContextFreeBSD_powerpc.cpp
index 5133d6088bd3..efa4cc6d8182 100644
--- a/source/Plugins/Process/Utility/RegisterContextFreeBSD_powerpc.cpp
+++ b/source/Plugins/Process/Utility/RegisterContextFreeBSD_powerpc.cpp
@@ -7,263 +7,233 @@
//
//===---------------------------------------------------------------------===//
-#include <vector>
-#include "RegisterContextPOSIX_powerpc.h"
#include "RegisterContextFreeBSD_powerpc.h"
+#include "RegisterContextPOSIX_powerpc.h"
+#include <vector>
using namespace lldb_private;
using namespace lldb;
// http://svnweb.freebsd.org/base/head/sys/powerpc/include/reg.h
-typedef struct _GPR64
-{
- uint64_t r0;
- uint64_t r1;
- uint64_t r2;
- uint64_t r3;
- uint64_t r4;
- uint64_t r5;
- uint64_t r6;
- uint64_t r7;
- uint64_t r8;
- uint64_t r9;
- uint64_t r10;
- uint64_t r11;
- uint64_t r12;
- uint64_t r13;
- uint64_t r14;
- uint64_t r15;
- uint64_t r16;
- uint64_t r17;
- uint64_t r18;
- uint64_t r19;
- uint64_t r20;
- uint64_t r21;
- uint64_t r22;
- uint64_t r23;
- uint64_t r24;
- uint64_t r25;
- uint64_t r26;
- uint64_t r27;
- uint64_t r28;
- uint64_t r29;
- uint64_t r30;
- uint64_t r31;
- uint64_t lr;
- uint64_t cr;
- uint64_t xer;
- uint64_t ctr;
- uint64_t pc;
+typedef struct _GPR64 {
+ uint64_t r0;
+ uint64_t r1;
+ uint64_t r2;
+ uint64_t r3;
+ uint64_t r4;
+ uint64_t r5;
+ uint64_t r6;
+ uint64_t r7;
+ uint64_t r8;
+ uint64_t r9;
+ uint64_t r10;
+ uint64_t r11;
+ uint64_t r12;
+ uint64_t r13;
+ uint64_t r14;
+ uint64_t r15;
+ uint64_t r16;
+ uint64_t r17;
+ uint64_t r18;
+ uint64_t r19;
+ uint64_t r20;
+ uint64_t r21;
+ uint64_t r22;
+ uint64_t r23;
+ uint64_t r24;
+ uint64_t r25;
+ uint64_t r26;
+ uint64_t r27;
+ uint64_t r28;
+ uint64_t r29;
+ uint64_t r30;
+ uint64_t r31;
+ uint64_t lr;
+ uint64_t cr;
+ uint64_t xer;
+ uint64_t ctr;
+ uint64_t pc;
} GPR64;
-typedef struct _GPR32
-{
- uint32_t r0;
- uint32_t r1;
- uint32_t r2;
- uint32_t r3;
- uint32_t r4;
- uint32_t r5;
- uint32_t r6;
- uint32_t r7;
- uint32_t r8;
- uint32_t r9;
- uint32_t r10;
- uint32_t r11;
- uint32_t r12;
- uint32_t r13;
- uint32_t r14;
- uint32_t r15;
- uint32_t r16;
- uint32_t r17;
- uint32_t r18;
- uint32_t r19;
- uint32_t r20;
- uint32_t r21;
- uint32_t r22;
- uint32_t r23;
- uint32_t r24;
- uint32_t r25;
- uint32_t r26;
- uint32_t r27;
- uint32_t r28;
- uint32_t r29;
- uint32_t r30;
- uint32_t r31;
- uint32_t lr;
- uint32_t cr;
- uint32_t xer;
- uint32_t ctr;
- uint32_t pc;
+typedef struct _GPR32 {
+ uint32_t r0;
+ uint32_t r1;
+ uint32_t r2;
+ uint32_t r3;
+ uint32_t r4;
+ uint32_t r5;
+ uint32_t r6;
+ uint32_t r7;
+ uint32_t r8;
+ uint32_t r9;
+ uint32_t r10;
+ uint32_t r11;
+ uint32_t r12;
+ uint32_t r13;
+ uint32_t r14;
+ uint32_t r15;
+ uint32_t r16;
+ uint32_t r17;
+ uint32_t r18;
+ uint32_t r19;
+ uint32_t r20;
+ uint32_t r21;
+ uint32_t r22;
+ uint32_t r23;
+ uint32_t r24;
+ uint32_t r25;
+ uint32_t r26;
+ uint32_t r27;
+ uint32_t r28;
+ uint32_t r29;
+ uint32_t r30;
+ uint32_t r31;
+ uint32_t lr;
+ uint32_t cr;
+ uint32_t xer;
+ uint32_t ctr;
+ uint32_t pc;
} GPR32;
-typedef struct _FPR
-{
- uint64_t f0;
- uint64_t f1;
- uint64_t f2;
- uint64_t f3;
- uint64_t f4;
- uint64_t f5;
- uint64_t f6;
- uint64_t f7;
- uint64_t f8;
- uint64_t f9;
- uint64_t f10;
- uint64_t f11;
- uint64_t f12;
- uint64_t f13;
- uint64_t f14;
- uint64_t f15;
- uint64_t f16;
- uint64_t f17;
- uint64_t f18;
- uint64_t f19;
- uint64_t f20;
- uint64_t f21;
- uint64_t f22;
- uint64_t f23;
- uint64_t f24;
- uint64_t f25;
- uint64_t f26;
- uint64_t f27;
- uint64_t f28;
- uint64_t f29;
- uint64_t f30;
- uint64_t f31;
- uint64_t fpscr;
+typedef struct _FPR {
+ uint64_t f0;
+ uint64_t f1;
+ uint64_t f2;
+ uint64_t f3;
+ uint64_t f4;
+ uint64_t f5;
+ uint64_t f6;
+ uint64_t f7;
+ uint64_t f8;
+ uint64_t f9;
+ uint64_t f10;
+ uint64_t f11;
+ uint64_t f12;
+ uint64_t f13;
+ uint64_t f14;
+ uint64_t f15;
+ uint64_t f16;
+ uint64_t f17;
+ uint64_t f18;
+ uint64_t f19;
+ uint64_t f20;
+ uint64_t f21;
+ uint64_t f22;
+ uint64_t f23;
+ uint64_t f24;
+ uint64_t f25;
+ uint64_t f26;
+ uint64_t f27;
+ uint64_t f28;
+ uint64_t f29;
+ uint64_t f30;
+ uint64_t f31;
+ uint64_t fpscr;
} FPR;
-typedef struct _VMX
-{
- uint32_t v0[4];
- uint32_t v1[4];
- uint32_t v2[4];
- uint32_t v3[4];
- uint32_t v4[4];
- uint32_t v5[4];
- uint32_t v6[4];
- uint32_t v7[4];
- uint32_t v8[4];
- uint32_t v9[4];
- uint32_t v10[4];
- uint32_t v11[4];
- uint32_t v12[4];
- uint32_t v13[4];
- uint32_t v14[4];
- uint32_t v15[4];
- uint32_t v16[4];
- uint32_t v17[4];
- uint32_t v18[4];
- uint32_t v19[4];
- uint32_t v20[4];
- uint32_t v21[4];
- uint32_t v22[4];
- uint32_t v23[4];
- uint32_t v24[4];
- uint32_t v25[4];
- uint32_t v26[4];
- uint32_t v27[4];
- uint32_t v28[4];
- uint32_t v29[4];
- uint32_t v30[4];
- uint32_t v31[4];
- uint32_t pad[2];
- uint32_t vrsave;
- uint32_t vscr;
+typedef struct _VMX {
+ uint32_t v0[4];
+ uint32_t v1[4];
+ uint32_t v2[4];
+ uint32_t v3[4];
+ uint32_t v4[4];
+ uint32_t v5[4];
+ uint32_t v6[4];
+ uint32_t v7[4];
+ uint32_t v8[4];
+ uint32_t v9[4];
+ uint32_t v10[4];
+ uint32_t v11[4];
+ uint32_t v12[4];
+ uint32_t v13[4];
+ uint32_t v14[4];
+ uint32_t v15[4];
+ uint32_t v16[4];
+ uint32_t v17[4];
+ uint32_t v18[4];
+ uint32_t v19[4];
+ uint32_t v20[4];
+ uint32_t v21[4];
+ uint32_t v22[4];
+ uint32_t v23[4];
+ uint32_t v24[4];
+ uint32_t v25[4];
+ uint32_t v26[4];
+ uint32_t v27[4];
+ uint32_t v28[4];
+ uint32_t v29[4];
+ uint32_t v30[4];
+ uint32_t v31[4];
+ uint32_t pad[2];
+ uint32_t vrsave;
+ uint32_t vscr;
} VMX;
//---------------------------------------------------------------------------
-// Include RegisterInfos_powerpc to declare our g_register_infos_powerpc structure.
+// Include RegisterInfos_powerpc to declare our g_register_infos_powerpc
+// structure.
//---------------------------------------------------------------------------
#define DECLARE_REGISTER_INFOS_POWERPC_STRUCT
#include "RegisterInfos_powerpc.h"
#undef DECLARE_REGISTER_INFOS_POWERPC_STRUCT
-RegisterContextFreeBSD_powerpc::RegisterContextFreeBSD_powerpc(const ArchSpec &target_arch) :
- RegisterInfoInterface(target_arch)
-{
-}
+RegisterContextFreeBSD_powerpc::RegisterContextFreeBSD_powerpc(
+ const ArchSpec &target_arch)
+ : RegisterInfoInterface(target_arch) {}
-RegisterContextFreeBSD_powerpc::~RegisterContextFreeBSD_powerpc()
-{
-}
+RegisterContextFreeBSD_powerpc::~RegisterContextFreeBSD_powerpc() {}
-size_t
-RegisterContextFreeBSD_powerpc::GetGPRSize() const
-{
- // This is an 'abstract' base, so no GPR struct.
- return 0;
+size_t RegisterContextFreeBSD_powerpc::GetGPRSize() const {
+ // This is an 'abstract' base, so no GPR struct.
+ return 0;
}
-const RegisterInfo *
-RegisterContextFreeBSD_powerpc::GetRegisterInfo() const
-{
- //assert (m_target_arch.GetCore() == ArchSpec::eCore_powerpc);
- llvm_unreachable("Abstract class!");
- return NULL;
+const RegisterInfo *RegisterContextFreeBSD_powerpc::GetRegisterInfo() const {
+ // assert (m_target_arch.GetCore() == ArchSpec::eCore_powerpc);
+ llvm_unreachable("Abstract class!");
+ return NULL;
}
-uint32_t
-RegisterContextFreeBSD_powerpc::GetRegisterCount () const
-{
- return 0;
-}
+uint32_t RegisterContextFreeBSD_powerpc::GetRegisterCount() const { return 0; }
-RegisterContextFreeBSD_powerpc32::RegisterContextFreeBSD_powerpc32(const ArchSpec &target_arch) :
- RegisterContextFreeBSD_powerpc(target_arch)
-{
-}
+RegisterContextFreeBSD_powerpc32::RegisterContextFreeBSD_powerpc32(
+ const ArchSpec &target_arch)
+ : RegisterContextFreeBSD_powerpc(target_arch) {}
-RegisterContextFreeBSD_powerpc32::~RegisterContextFreeBSD_powerpc32()
-{
-}
+RegisterContextFreeBSD_powerpc32::~RegisterContextFreeBSD_powerpc32() {}
-size_t
-RegisterContextFreeBSD_powerpc32::GetGPRSize() const
-{
- return sizeof(GPR32);
+size_t RegisterContextFreeBSD_powerpc32::GetGPRSize() const {
+ return sizeof(GPR32);
}
-const RegisterInfo *
-RegisterContextFreeBSD_powerpc32::GetRegisterInfo() const
-{
- //assert (m_target_arch.GetCore() == ArchSpec::eCore_powerpc);
- return g_register_infos_powerpc32;
+const RegisterInfo *RegisterContextFreeBSD_powerpc32::GetRegisterInfo() const {
+ // assert (m_target_arch.GetCore() == ArchSpec::eCore_powerpc);
+ return g_register_infos_powerpc32;
}
-uint32_t
-RegisterContextFreeBSD_powerpc32::GetRegisterCount () const
-{
- return static_cast<uint32_t> (sizeof (g_register_infos_powerpc32) / sizeof (g_register_infos_powerpc32 [0]));
+uint32_t RegisterContextFreeBSD_powerpc32::GetRegisterCount() const {
+ return static_cast<uint32_t>(sizeof(g_register_infos_powerpc32) /
+ sizeof(g_register_infos_powerpc32[0]));
}
-RegisterContextFreeBSD_powerpc64::RegisterContextFreeBSD_powerpc64(const ArchSpec &target_arch) :
- RegisterContextFreeBSD_powerpc(target_arch)
-{
-}
+RegisterContextFreeBSD_powerpc64::RegisterContextFreeBSD_powerpc64(
+ const ArchSpec &target_arch)
+ : RegisterContextFreeBSD_powerpc(target_arch) {}
-RegisterContextFreeBSD_powerpc64::~RegisterContextFreeBSD_powerpc64()
-{
-}
+RegisterContextFreeBSD_powerpc64::~RegisterContextFreeBSD_powerpc64() {}
-size_t
-RegisterContextFreeBSD_powerpc64::GetGPRSize() const
-{
- return sizeof(GPR64);
+size_t RegisterContextFreeBSD_powerpc64::GetGPRSize() const {
+ return sizeof(GPR64);
}
-const RegisterInfo *
-RegisterContextFreeBSD_powerpc64::GetRegisterInfo() const
-{
- //assert (m_target_arch.GetCore() == ArchSpec::eCore_powerpc);
- if (m_target_arch.GetMachine() == llvm::Triple::ppc)
- return g_register_infos_powerpc64_32;
- return g_register_infos_powerpc64;
+const RegisterInfo *RegisterContextFreeBSD_powerpc64::GetRegisterInfo() const {
+ // assert (m_target_arch.GetCore() == ArchSpec::eCore_powerpc);
+ if (m_target_arch.GetMachine() == llvm::Triple::ppc)
+ return g_register_infos_powerpc64_32;
+ return g_register_infos_powerpc64;
}
-uint32_t
-RegisterContextFreeBSD_powerpc64::GetRegisterCount () const
-{
- return static_cast<uint32_t> (sizeof (g_register_infos_powerpc64) / sizeof (g_register_infos_powerpc64 [0]));
+uint32_t RegisterContextFreeBSD_powerpc64::GetRegisterCount() const {
+ return static_cast<uint32_t>(sizeof(g_register_infos_powerpc64) /
+ sizeof(g_register_infos_powerpc64[0]));
}
diff --git a/source/Plugins/Process/Utility/RegisterContextFreeBSD_powerpc.h b/source/Plugins/Process/Utility/RegisterContextFreeBSD_powerpc.h
index 930683f8a870..c9a65b1cacce 100644
--- a/source/Plugins/Process/Utility/RegisterContextFreeBSD_powerpc.h
+++ b/source/Plugins/Process/Utility/RegisterContextFreeBSD_powerpc.h
@@ -1,4 +1,5 @@
-//===-- RegisterContextFreeBSD_powerpc.h -------------------------*- C++ -*-===//
+//===-- RegisterContextFreeBSD_powerpc.h -------------------------*- C++
+//-*-===//
//
// The LLVM Compiler Infrastructure
//
@@ -16,55 +17,41 @@
// Project includes
#include "RegisterInfoInterface.h"
-class RegisterContextFreeBSD_powerpc:
- public lldb_private::RegisterInfoInterface
-{
+class RegisterContextFreeBSD_powerpc
+ : public lldb_private::RegisterInfoInterface {
public:
- RegisterContextFreeBSD_powerpc(const lldb_private::ArchSpec &target_arch);
- ~RegisterContextFreeBSD_powerpc() override;
+ RegisterContextFreeBSD_powerpc(const lldb_private::ArchSpec &target_arch);
+ ~RegisterContextFreeBSD_powerpc() override;
- size_t
- GetGPRSize() const override;
+ size_t GetGPRSize() const override;
- const lldb_private::RegisterInfo *
- GetRegisterInfo() const override;
+ const lldb_private::RegisterInfo *GetRegisterInfo() const override;
- uint32_t
- GetRegisterCount() const override;
+ uint32_t GetRegisterCount() const override;
};
-class RegisterContextFreeBSD_powerpc32:
- public RegisterContextFreeBSD_powerpc
-{
+class RegisterContextFreeBSD_powerpc32 : public RegisterContextFreeBSD_powerpc {
public:
- RegisterContextFreeBSD_powerpc32(const lldb_private::ArchSpec &target_arch);
- ~RegisterContextFreeBSD_powerpc32() override;
+ RegisterContextFreeBSD_powerpc32(const lldb_private::ArchSpec &target_arch);
+ ~RegisterContextFreeBSD_powerpc32() override;
- size_t
- GetGPRSize() const override;
+ size_t GetGPRSize() const override;
- const lldb_private::RegisterInfo *
- GetRegisterInfo() const override;
+ const lldb_private::RegisterInfo *GetRegisterInfo() const override;
- uint32_t
- GetRegisterCount() const override;
+ uint32_t GetRegisterCount() const override;
};
-class RegisterContextFreeBSD_powerpc64:
- public RegisterContextFreeBSD_powerpc
-{
+class RegisterContextFreeBSD_powerpc64 : public RegisterContextFreeBSD_powerpc {
public:
- RegisterContextFreeBSD_powerpc64(const lldb_private::ArchSpec &target_arch);
- ~RegisterContextFreeBSD_powerpc64() override;
+ RegisterContextFreeBSD_powerpc64(const lldb_private::ArchSpec &target_arch);
+ ~RegisterContextFreeBSD_powerpc64() override;
- size_t
- GetGPRSize() const override;
+ size_t GetGPRSize() const override;
- const lldb_private::RegisterInfo *
- GetRegisterInfo() const override;
+ const lldb_private::RegisterInfo *GetRegisterInfo() const override;
- uint32_t
- GetRegisterCount() const override;
+ uint32_t GetRegisterCount() const override;
};
#endif // liblldb_RegisterContextFreeBSD_powerpc_h_
diff --git a/source/Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.cpp b/source/Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.cpp
index 34f2d185da8a..4bbbd5c3d0a6 100644
--- a/source/Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.cpp
+++ b/source/Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.cpp
@@ -7,158 +7,142 @@
//
//===---------------------------------------------------------------------===//
-#include <vector>
-#include "RegisterContextPOSIX_x86.h"
-#include "RegisterContextFreeBSD_i386.h"
#include "RegisterContextFreeBSD_x86_64.h"
+#include "RegisterContextFreeBSD_i386.h"
+#include "RegisterContextPOSIX_x86.h"
+#include <vector>
using namespace lldb_private;
using namespace lldb;
// http://svnweb.freebsd.org/base/head/sys/x86/include/reg.h
-typedef struct _GPR
-{
- uint64_t r15;
- uint64_t r14;
- uint64_t r13;
- uint64_t r12;
- uint64_t r11;
- uint64_t r10;
- uint64_t r9;
- uint64_t r8;
- uint64_t rdi;
- uint64_t rsi;
- uint64_t rbp;
- uint64_t rbx;
- uint64_t rdx;
- uint64_t rcx;
- uint64_t rax;
- uint32_t trapno;
- uint16_t fs;
- uint16_t gs;
- uint32_t err;
- uint16_t es;
- uint16_t ds;
- uint64_t rip;
- uint64_t cs;
- uint64_t rflags;
- uint64_t rsp;
- uint64_t ss;
+typedef struct _GPR {
+ uint64_t r15;
+ uint64_t r14;
+ uint64_t r13;
+ uint64_t r12;
+ uint64_t r11;
+ uint64_t r10;
+ uint64_t r9;
+ uint64_t r8;
+ uint64_t rdi;
+ uint64_t rsi;
+ uint64_t rbp;
+ uint64_t rbx;
+ uint64_t rdx;
+ uint64_t rcx;
+ uint64_t rax;
+ uint32_t trapno;
+ uint16_t fs;
+ uint16_t gs;
+ uint32_t err;
+ uint16_t es;
+ uint16_t ds;
+ uint64_t rip;
+ uint64_t cs;
+ uint64_t rflags;
+ uint64_t rsp;
+ uint64_t ss;
} GPR;
struct DBG {
- uint64_t dr[16]; /* debug registers */
- /* Index 0-3: debug address registers */
- /* Index 4-5: reserved */
- /* Index 6: debug status */
- /* Index 7: debug control */
- /* Index 8-15: reserved */
+ uint64_t dr[16]; /* debug registers */
+ /* Index 0-3: debug address registers */
+ /* Index 4-5: reserved */
+ /* Index 6: debug status */
+ /* Index 7: debug control */
+ /* Index 8-15: reserved */
};
-struct UserArea
-{
- GPR gpr;
- FPR fpr;
- DBG dbg;
+struct UserArea {
+ GPR gpr;
+ FPR fpr;
+ DBG dbg;
};
-#define DR_OFFSET(reg_index) \
- (LLVM_EXTENSION offsetof(DBG, dr[reg_index]))
+#define DR_OFFSET(reg_index) (LLVM_EXTENSION offsetof(DBG, dr[reg_index]))
//---------------------------------------------------------------------------
-// Include RegisterInfos_x86_64 to declare our g_register_infos_x86_64 structure.
+// Include RegisterInfos_x86_64 to declare our g_register_infos_x86_64
+// structure.
//---------------------------------------------------------------------------
#define DECLARE_REGISTER_INFOS_X86_64_STRUCT
#include "RegisterInfos_x86_64.h"
#undef DECLARE_REGISTER_INFOS_X86_64_STRUCT
-static std::vector<lldb_private::RegisterInfo>&
-GetSharedRegisterInfoVector ()
-{
- static std::vector<lldb_private::RegisterInfo> register_infos;
- return register_infos;
+static std::vector<lldb_private::RegisterInfo> &GetSharedRegisterInfoVector() {
+ static std::vector<lldb_private::RegisterInfo> register_infos;
+ return register_infos;
}
static const RegisterInfo *
-GetRegisterInfo_i386(const lldb_private::ArchSpec& arch)
-{
- static std::vector<lldb_private::RegisterInfo> g_register_infos (GetSharedRegisterInfoVector ());
-
- // Allocate RegisterInfo only once
- if (g_register_infos.empty())
- {
- // Copy the register information from base class
- std::unique_ptr<RegisterContextFreeBSD_i386> reg_interface(new RegisterContextFreeBSD_i386 (arch));
- const RegisterInfo *base_info = reg_interface->GetRegisterInfo();
- g_register_infos.insert(g_register_infos.end(), &base_info[0], &base_info[k_num_registers_i386]);
-
- //---------------------------------------------------------------------------
- // Include RegisterInfos_x86_64 to update the g_register_infos structure
- // with x86_64 offsets.
- //---------------------------------------------------------------------------
- #define UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS
- #include "RegisterInfos_x86_64.h"
- #undef UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS
- }
-
- return &g_register_infos[0];
+GetRegisterInfo_i386(const lldb_private::ArchSpec &arch) {
+ static std::vector<lldb_private::RegisterInfo> g_register_infos(
+ GetSharedRegisterInfoVector());
+
+ // Allocate RegisterInfo only once
+ if (g_register_infos.empty()) {
+ // Copy the register information from base class
+ std::unique_ptr<RegisterContextFreeBSD_i386> reg_interface(
+ new RegisterContextFreeBSD_i386(arch));
+ const RegisterInfo *base_info = reg_interface->GetRegisterInfo();
+ g_register_infos.insert(g_register_infos.end(), &base_info[0],
+ &base_info[k_num_registers_i386]);
+
+//---------------------------------------------------------------------------
+// Include RegisterInfos_x86_64 to update the g_register_infos structure
+// with x86_64 offsets.
+//---------------------------------------------------------------------------
+#define UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS
+#include "RegisterInfos_x86_64.h"
+#undef UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS
+ }
+
+ return &g_register_infos[0];
}
static const RegisterInfo *
-PrivateGetRegisterInfoPtr (const lldb_private::ArchSpec& target_arch)
-{
- switch (target_arch.GetMachine())
- {
- case llvm::Triple::x86:
- return GetRegisterInfo_i386 (target_arch);
- case llvm::Triple::x86_64:
- return g_register_infos_x86_64;
- default:
- assert(false && "Unhandled target architecture.");
- return nullptr;
- }
+PrivateGetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch) {
+ switch (target_arch.GetMachine()) {
+ case llvm::Triple::x86:
+ return GetRegisterInfo_i386(target_arch);
+ case llvm::Triple::x86_64:
+ return g_register_infos_x86_64;
+ default:
+ assert(false && "Unhandled target architecture.");
+ return nullptr;
+ }
}
static uint32_t
-PrivateGetRegisterCount (const lldb_private::ArchSpec& target_arch)
-{
- switch (target_arch.GetMachine())
- {
- case llvm::Triple::x86:
- // This vector should have already been filled.
- assert (!GetSharedRegisterInfoVector ().empty () && "i386 register info vector not filled.");
- return static_cast<uint32_t> (GetSharedRegisterInfoVector().size ());
- case llvm::Triple::x86_64:
- return static_cast<uint32_t> (sizeof (g_register_infos_x86_64) / sizeof (g_register_infos_x86_64 [0]));
- default:
- assert(false && "Unhandled target architecture.");
- return 0;
- }
+PrivateGetRegisterCount(const lldb_private::ArchSpec &target_arch) {
+ switch (target_arch.GetMachine()) {
+ case llvm::Triple::x86:
+ // This vector should have already been filled.
+ assert(!GetSharedRegisterInfoVector().empty() &&
+ "i386 register info vector not filled.");
+ return static_cast<uint32_t>(GetSharedRegisterInfoVector().size());
+ case llvm::Triple::x86_64:
+ return static_cast<uint32_t>(sizeof(g_register_infos_x86_64) /
+ sizeof(g_register_infos_x86_64[0]));
+ default:
+ assert(false && "Unhandled target architecture.");
+ return 0;
+ }
}
-RegisterContextFreeBSD_x86_64::RegisterContextFreeBSD_x86_64(const ArchSpec &target_arch) :
- lldb_private::RegisterInfoInterface(target_arch),
- m_register_info_p (PrivateGetRegisterInfoPtr (target_arch)),
- m_register_count (PrivateGetRegisterCount (target_arch))
-{
-}
+RegisterContextFreeBSD_x86_64::RegisterContextFreeBSD_x86_64(
+ const ArchSpec &target_arch)
+ : lldb_private::RegisterInfoInterface(target_arch),
+ m_register_info_p(PrivateGetRegisterInfoPtr(target_arch)),
+ m_register_count(PrivateGetRegisterCount(target_arch)) {}
-size_t
-RegisterContextFreeBSD_x86_64::GetGPRSize() const
-{
- return sizeof(GPR);
-}
+size_t RegisterContextFreeBSD_x86_64::GetGPRSize() const { return sizeof(GPR); }
-const RegisterInfo *
-RegisterContextFreeBSD_x86_64::GetRegisterInfo() const
-{
- return m_register_info_p;
+const RegisterInfo *RegisterContextFreeBSD_x86_64::GetRegisterInfo() const {
+ return m_register_info_p;
}
-uint32_t
-RegisterContextFreeBSD_x86_64::GetRegisterCount () const
-{
- return m_register_count;
+uint32_t RegisterContextFreeBSD_x86_64::GetRegisterCount() const {
+ return m_register_count;
}
-
-
diff --git a/source/Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.h b/source/Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.h
index e739fa50ed6c..dc30f1783b41 100644
--- a/source/Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.h
+++ b/source/Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.h
@@ -12,24 +12,20 @@
#include "RegisterInfoInterface.h"
-class RegisterContextFreeBSD_x86_64:
- public lldb_private::RegisterInfoInterface
-{
+class RegisterContextFreeBSD_x86_64
+ : public lldb_private::RegisterInfoInterface {
public:
- RegisterContextFreeBSD_x86_64(const lldb_private::ArchSpec &target_arch);
+ RegisterContextFreeBSD_x86_64(const lldb_private::ArchSpec &target_arch);
- size_t
- GetGPRSize() const override;
+ size_t GetGPRSize() const override;
- const lldb_private::RegisterInfo *
- GetRegisterInfo() const override;
+ const lldb_private::RegisterInfo *GetRegisterInfo() const override;
- uint32_t
- GetRegisterCount () const override;
+ uint32_t GetRegisterCount() const override;
private:
- const lldb_private::RegisterInfo *m_register_info_p;
- const uint32_t m_register_count;
+ const lldb_private::RegisterInfo *m_register_info_p;
+ const uint32_t m_register_count;
};
#endif
diff --git a/source/Plugins/Process/Utility/RegisterContextHistory.cpp b/source/Plugins/Process/Utility/RegisterContextHistory.cpp
index 9d2181376e09..0fc47fcd8e3a 100644
--- a/source/Plugins/Process/Utility/RegisterContextHistory.cpp
+++ b/source/Plugins/Process/Utility/RegisterContextHistory.cpp
@@ -1,4 +1,5 @@
-//===-- RegisterContextHistory.cpp ---------------------------------*- C++ -*-===//
+//===-- RegisterContextHistory.cpp ---------------------------------*- C++
+//-*-===//
//
// The LLVM Compiler Infrastructure
//
@@ -7,8 +8,6 @@
//
//===----------------------------------------------------------------------===//
-
-#include "lldb/lldb-private.h"
#include "lldb/Core/Address.h"
#include "lldb/Core/AddressRange.h"
#include "lldb/Core/DataBufferHeap.h"
@@ -20,119 +19,105 @@
#include "lldb/Symbol/FuncUnwinders.h"
#include "lldb/Symbol/Function.h"
#include "lldb/Symbol/ObjectFile.h"
-#include "lldb/Symbol/SymbolContext.h"
#include "lldb/Symbol/Symbol.h"
+#include "lldb/Symbol/SymbolContext.h"
#include "lldb/Target/ABI.h"
+#include "lldb/Target/DynamicLoader.h"
#include "lldb/Target/ExecutionContext.h"
#include "lldb/Target/Process.h"
#include "lldb/Target/StackFrame.h"
#include "lldb/Target/Target.h"
#include "lldb/Target/Thread.h"
-#include "lldb/Target/DynamicLoader.h"
+#include "lldb/lldb-private.h"
#include "RegisterContextHistory.h"
using namespace lldb;
using namespace lldb_private;
-RegisterContextHistory::RegisterContextHistory (Thread &thread, uint32_t concrete_frame_idx, uint32_t address_byte_size, addr_t pc_value) :
-RegisterContext (thread, concrete_frame_idx),
- m_pc_value (pc_value)
-{
- m_reg_set0.name = "General Purpose Registers";
- m_reg_set0.short_name = "GPR";
- m_reg_set0.num_registers = 1;
- m_reg_set0.registers = new uint32_t(0);
-
- m_pc_reg_info.name = "pc";
- m_pc_reg_info.alt_name = "pc";
- m_pc_reg_info.byte_offset = 0;
- m_pc_reg_info.byte_size = address_byte_size;
- m_pc_reg_info.encoding = eEncodingUint;
- m_pc_reg_info.format = eFormatPointer;
- m_pc_reg_info.invalidate_regs = NULL;
- m_pc_reg_info.value_regs = NULL;
- m_pc_reg_info.kinds[eRegisterKindEHFrame] = LLDB_INVALID_REGNUM;
- m_pc_reg_info.kinds[eRegisterKindDWARF] = LLDB_INVALID_REGNUM;
- m_pc_reg_info.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_PC;
- m_pc_reg_info.kinds[eRegisterKindProcessPlugin] = LLDB_INVALID_REGNUM;
- m_pc_reg_info.kinds[eRegisterKindLLDB] = LLDB_INVALID_REGNUM;
+RegisterContextHistory::RegisterContextHistory(Thread &thread,
+ uint32_t concrete_frame_idx,
+ uint32_t address_byte_size,
+ addr_t pc_value)
+ : RegisterContext(thread, concrete_frame_idx), m_pc_value(pc_value) {
+ m_reg_set0.name = "General Purpose Registers";
+ m_reg_set0.short_name = "GPR";
+ m_reg_set0.num_registers = 1;
+ m_reg_set0.registers = new uint32_t(0);
+
+ m_pc_reg_info.name = "pc";
+ m_pc_reg_info.alt_name = "pc";
+ m_pc_reg_info.byte_offset = 0;
+ m_pc_reg_info.byte_size = address_byte_size;
+ m_pc_reg_info.encoding = eEncodingUint;
+ m_pc_reg_info.format = eFormatPointer;
+ m_pc_reg_info.invalidate_regs = NULL;
+ m_pc_reg_info.value_regs = NULL;
+ m_pc_reg_info.kinds[eRegisterKindEHFrame] = LLDB_INVALID_REGNUM;
+ m_pc_reg_info.kinds[eRegisterKindDWARF] = LLDB_INVALID_REGNUM;
+ m_pc_reg_info.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_PC;
+ m_pc_reg_info.kinds[eRegisterKindProcessPlugin] = LLDB_INVALID_REGNUM;
+ m_pc_reg_info.kinds[eRegisterKindLLDB] = LLDB_INVALID_REGNUM;
}
-RegisterContextHistory::~RegisterContextHistory ()
-{
- delete m_reg_set0.registers;
- delete m_pc_reg_info.invalidate_regs;
- delete m_pc_reg_info.value_regs;
+RegisterContextHistory::~RegisterContextHistory() {
+ delete m_reg_set0.registers;
+ delete m_pc_reg_info.invalidate_regs;
+ delete m_pc_reg_info.value_regs;
}
-void
-RegisterContextHistory::InvalidateAllRegisters () {}
+void RegisterContextHistory::InvalidateAllRegisters() {}
-size_t
-RegisterContextHistory::GetRegisterCount ()
-{
- return 1;
-}
+size_t RegisterContextHistory::GetRegisterCount() { return 1; }
const lldb_private::RegisterInfo *
-RegisterContextHistory::GetRegisterInfoAtIndex (size_t reg)
-{
- if (reg)
- return NULL;
- return &m_pc_reg_info;
+RegisterContextHistory::GetRegisterInfoAtIndex(size_t reg) {
+ if (reg)
+ return NULL;
+ return &m_pc_reg_info;
}
-size_t
-RegisterContextHistory::GetRegisterSetCount ()
-{
- return 1;
-}
+size_t RegisterContextHistory::GetRegisterSetCount() { return 1; }
const lldb_private::RegisterSet *
-RegisterContextHistory::GetRegisterSet (size_t reg_set)
-{
- if (reg_set)
- return NULL;
- return &m_reg_set0;
+RegisterContextHistory::GetRegisterSet(size_t reg_set) {
+ if (reg_set)
+ return NULL;
+ return &m_reg_set0;
}
-bool
-RegisterContextHistory::ReadRegister (const lldb_private::RegisterInfo *reg_info, lldb_private::RegisterValue &value)
-{
- if (!reg_info)
- return false;
- uint32_t reg_number = reg_info->kinds[eRegisterKindGeneric];
- if (reg_number == LLDB_REGNUM_GENERIC_PC)
- {
- value.SetUInt(m_pc_value, reg_info->byte_size);
- return true;
- }
+bool RegisterContextHistory::ReadRegister(
+ const lldb_private::RegisterInfo *reg_info,
+ lldb_private::RegisterValue &value) {
+ if (!reg_info)
return false;
+ uint32_t reg_number = reg_info->kinds[eRegisterKindGeneric];
+ if (reg_number == LLDB_REGNUM_GENERIC_PC) {
+ value.SetUInt(m_pc_value, reg_info->byte_size);
+ return true;
+ }
+ return false;
}
-bool
-RegisterContextHistory::WriteRegister (const lldb_private::RegisterInfo *reg_info, const lldb_private::RegisterValue &value)
-{
- return false;
+bool RegisterContextHistory::WriteRegister(
+ const lldb_private::RegisterInfo *reg_info,
+ const lldb_private::RegisterValue &value) {
+ return false;
}
-bool
-RegisterContextHistory::ReadAllRegisterValues (lldb::DataBufferSP &data_sp)
-{
- return false;
+bool RegisterContextHistory::ReadAllRegisterValues(
+ lldb::DataBufferSP &data_sp) {
+ return false;
}
-bool
-RegisterContextHistory::WriteAllRegisterValues (const lldb::DataBufferSP &data_sp)
-{
- return false;
+bool RegisterContextHistory::WriteAllRegisterValues(
+ const lldb::DataBufferSP &data_sp) {
+ return false;
}
-uint32_t
-RegisterContextHistory::ConvertRegisterKindToRegisterNumber (lldb::RegisterKind kind, uint32_t num)
-{
- if (kind == eRegisterKindGeneric && num == LLDB_REGNUM_GENERIC_PC)
- return 0;
- return LLDB_INVALID_REGNUM;
+uint32_t RegisterContextHistory::ConvertRegisterKindToRegisterNumber(
+ lldb::RegisterKind kind, uint32_t num) {
+ if (kind == eRegisterKindGeneric && num == LLDB_REGNUM_GENERIC_PC)
+ return 0;
+ return LLDB_INVALID_REGNUM;
}
diff --git a/source/Plugins/Process/Utility/RegisterContextHistory.h b/source/Plugins/Process/Utility/RegisterContextHistory.h
index 3f44a1fde68b..acaf8fe5c04a 100644
--- a/source/Plugins/Process/Utility/RegisterContextHistory.h
+++ b/source/Plugins/Process/Utility/RegisterContextHistory.h
@@ -1,4 +1,5 @@
-//===-- RegisterContextHistory.h ----------------------------------------*- C++ -*-===//
+//===-- RegisterContextHistory.h ----------------------------------------*- C++
+//-*-===//
//
// The LLVM Compiler Infrastructure
//
@@ -16,64 +17,55 @@
// Other libraries and framework includes
// Project includes
-#include "lldb/lldb-private.h"
-#include "lldb/Target/RegisterContext.h"
#include "lldb/Symbol/SymbolContext.h"
+#include "lldb/Target/RegisterContext.h"
+#include "lldb/lldb-private.h"
namespace lldb_private {
-
-class RegisterContextHistory : public lldb_private::RegisterContext
-{
+
+class RegisterContextHistory : public lldb_private::RegisterContext {
public:
- typedef std::shared_ptr<RegisterContextHistory> SharedPtr;
-
- RegisterContextHistory (Thread &thread, uint32_t concrete_frame_idx, uint32_t address_byte_size, lldb::addr_t pc_value);
-
- ~RegisterContextHistory() override;
+ typedef std::shared_ptr<RegisterContextHistory> SharedPtr;
+
+ RegisterContextHistory(Thread &thread, uint32_t concrete_frame_idx,
+ uint32_t address_byte_size, lldb::addr_t pc_value);
- void
- InvalidateAllRegisters() override;
+ ~RegisterContextHistory() override;
- size_t
- GetRegisterCount() override;
+ void InvalidateAllRegisters() override;
- const lldb_private::RegisterInfo *
- GetRegisterInfoAtIndex(size_t reg) override;
+ size_t GetRegisterCount() override;
- size_t
- GetRegisterSetCount() override;
+ const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
- const lldb_private::RegisterSet *
- GetRegisterSet(size_t reg_set) override;
+ size_t GetRegisterSetCount() override;
- bool
- ReadRegister(const lldb_private::RegisterInfo *reg_info,
- lldb_private::RegisterValue &value) override;
+ const lldb_private::RegisterSet *GetRegisterSet(size_t reg_set) override;
- bool
- WriteRegister(const lldb_private::RegisterInfo *reg_info,
- const lldb_private::RegisterValue &value) override;
+ bool ReadRegister(const lldb_private::RegisterInfo *reg_info,
+ lldb_private::RegisterValue &value) override;
- bool
- ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
+ bool WriteRegister(const lldb_private::RegisterInfo *reg_info,
+ const lldb_private::RegisterValue &value) override;
- bool
- WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
+ bool ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
+
+ bool WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
+
+ uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
+ uint32_t num) override;
- uint32_t
- ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override;
-
private:
- //------------------------------------------------------------------
- // For RegisterContextLLDB only
- //------------------------------------------------------------------
-
- lldb_private::RegisterSet m_reg_set0; // register set 0 (PC only)
- lldb_private::RegisterInfo m_pc_reg_info;
-
- lldb::addr_t m_pc_value;
-
- DISALLOW_COPY_AND_ASSIGN (RegisterContextHistory);
+ //------------------------------------------------------------------
+ // For RegisterContextLLDB only
+ //------------------------------------------------------------------
+
+ lldb_private::RegisterSet m_reg_set0; // register set 0 (PC only)
+ lldb_private::RegisterInfo m_pc_reg_info;
+
+ lldb::addr_t m_pc_value;
+
+ DISALLOW_COPY_AND_ASSIGN(RegisterContextHistory);
};
} // namespace lldb_private
diff --git a/source/Plugins/Process/Utility/RegisterContextLLDB.cpp b/source/Plugins/Process/Utility/RegisterContextLLDB.cpp
index 8bbaeb8e9a59..3c33ddb335d6 100644
--- a/source/Plugins/Process/Utility/RegisterContextLLDB.cpp
+++ b/source/Plugins/Process/Utility/RegisterContextLLDB.cpp
@@ -7,8 +7,6 @@
//
//===----------------------------------------------------------------------===//
-
-#include "lldb/lldb-private.h"
#include "lldb/Core/Address.h"
#include "lldb/Core/AddressRange.h"
#include "lldb/Core/DataBufferHeap.h"
@@ -33,1829 +31,1824 @@
#include "lldb/Target/StackFrame.h"
#include "lldb/Target/Target.h"
#include "lldb/Target/Thread.h"
+#include "lldb/lldb-private.h"
#include "RegisterContextLLDB.h"
using namespace lldb;
using namespace lldb_private;
-static ConstString GetSymbolOrFunctionName(const SymbolContext &sym_ctx)
-{
- if (sym_ctx.symbol)
- return sym_ctx.symbol->GetName();
- else if (sym_ctx.function)
- return sym_ctx.function->GetName();
- return ConstString();
+static ConstString GetSymbolOrFunctionName(const SymbolContext &sym_ctx) {
+ if (sym_ctx.symbol)
+ return sym_ctx.symbol->GetName();
+ else if (sym_ctx.function)
+ return sym_ctx.function->GetName();
+ return ConstString();
}
-RegisterContextLLDB::RegisterContextLLDB
-(
- Thread& thread,
- const SharedPtr &next_frame,
- SymbolContext& sym_ctx,
- uint32_t frame_number,
- UnwindLLDB& unwind_lldb
-) :
- RegisterContext (thread, frame_number),
- m_thread(thread),
- m_fast_unwind_plan_sp (),
- m_full_unwind_plan_sp (),
- m_fallback_unwind_plan_sp (),
- m_all_registers_available(false),
- m_frame_type (-1),
- m_cfa (LLDB_INVALID_ADDRESS),
- m_start_pc (),
- m_current_pc (),
- m_current_offset (0),
- m_current_offset_backed_up_one (0),
- m_sym_ctx(sym_ctx),
- m_sym_ctx_valid (false),
- m_frame_number (frame_number),
- m_registers(),
- m_parent_unwind (unwind_lldb)
-{
- m_sym_ctx.Clear(false);
- m_sym_ctx_valid = false;
-
- if (IsFrameZero ())
- {
- InitializeZerothFrame ();
- }
- else
- {
- InitializeNonZerothFrame ();
- }
-
- // This same code exists over in the GetFullUnwindPlanForFrame() but it may not have been executed yet
- if (IsFrameZero()
- || next_frame->m_frame_type == eTrapHandlerFrame
- || next_frame->m_frame_type == eDebuggerFrame)
- {
- m_all_registers_available = true;
- }
+RegisterContextLLDB::RegisterContextLLDB(Thread &thread,
+ const SharedPtr &next_frame,
+ SymbolContext &sym_ctx,
+ uint32_t frame_number,
+ UnwindLLDB &unwind_lldb)
+ : RegisterContext(thread, frame_number), m_thread(thread),
+ m_fast_unwind_plan_sp(), m_full_unwind_plan_sp(),
+ m_fallback_unwind_plan_sp(), m_all_registers_available(false),
+ m_frame_type(-1), m_cfa(LLDB_INVALID_ADDRESS), m_start_pc(),
+ m_current_pc(), m_current_offset(0), m_current_offset_backed_up_one(0),
+ m_sym_ctx(sym_ctx), m_sym_ctx_valid(false), m_frame_number(frame_number),
+ m_registers(), m_parent_unwind(unwind_lldb) {
+ m_sym_ctx.Clear(false);
+ m_sym_ctx_valid = false;
+
+ if (IsFrameZero()) {
+ InitializeZerothFrame();
+ } else {
+ InitializeNonZerothFrame();
+ }
+
+ // This same code exists over in the GetFullUnwindPlanForFrame() but it may
+ // not have been executed yet
+ if (IsFrameZero() || next_frame->m_frame_type == eTrapHandlerFrame ||
+ next_frame->m_frame_type == eDebuggerFrame) {
+ m_all_registers_available = true;
+ }
}
-bool
-RegisterContextLLDB::IsUnwindPlanValidForCurrentPC(lldb::UnwindPlanSP unwind_plan_sp, int &valid_pc_offset)
-{
- if (!unwind_plan_sp)
- return false;
+bool RegisterContextLLDB::IsUnwindPlanValidForCurrentPC(
+ lldb::UnwindPlanSP unwind_plan_sp, int &valid_pc_offset) {
+ if (!unwind_plan_sp)
+ return false;
- // check if m_current_pc is valid
- if (unwind_plan_sp->PlanValidAtAddress(m_current_pc))
- {
- // yes - current offset can be used as is
- valid_pc_offset = m_current_offset;
- return true;
- }
+ // check if m_current_pc is valid
+ if (unwind_plan_sp->PlanValidAtAddress(m_current_pc)) {
+ // yes - current offset can be used as is
+ valid_pc_offset = m_current_offset;
+ return true;
+ }
- // if m_current_offset <= 0, we've got nothing else to try
- if (m_current_offset <= 0)
- return false;
+ // if m_current_offset <= 0, we've got nothing else to try
+ if (m_current_offset <= 0)
+ return false;
- // check pc - 1 to see if it's valid
- Address pc_minus_one (m_current_pc);
- pc_minus_one.SetOffset(m_current_pc.GetOffset() - 1);
- if (unwind_plan_sp->PlanValidAtAddress(pc_minus_one))
- {
- // *valid_pc_offset = m_current_offset - 1;
- valid_pc_offset = m_current_pc.GetOffset() - 1;
- return true;
- }
+ // check pc - 1 to see if it's valid
+ Address pc_minus_one(m_current_pc);
+ pc_minus_one.SetOffset(m_current_pc.GetOffset() - 1);
+ if (unwind_plan_sp->PlanValidAtAddress(pc_minus_one)) {
+ // *valid_pc_offset = m_current_offset - 1;
+ valid_pc_offset = m_current_pc.GetOffset() - 1;
+ return true;
+ }
- return false;
+ return false;
}
-// Initialize a RegisterContextLLDB which is the first frame of a stack -- the zeroth frame or currently
+// Initialize a RegisterContextLLDB which is the first frame of a stack -- the
+// zeroth frame or currently
// executing frame.
-void
-RegisterContextLLDB::InitializeZerothFrame()
-{
- Log *log(GetLogIfAllCategoriesSet (LIBLLDB_LOG_UNWIND));
- ExecutionContext exe_ctx(m_thread.shared_from_this());
- RegisterContextSP reg_ctx_sp = m_thread.GetRegisterContext();
-
- if (reg_ctx_sp.get() == NULL)
- {
- m_frame_type = eNotAValidFrame;
- UnwindLogMsg ("frame does not have a register context");
- return;
- }
-
- addr_t current_pc = reg_ctx_sp->GetPC();
+void RegisterContextLLDB::InitializeZerothFrame() {
+ Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_UNWIND));
+ ExecutionContext exe_ctx(m_thread.shared_from_this());
+ RegisterContextSP reg_ctx_sp = m_thread.GetRegisterContext();
- if (current_pc == LLDB_INVALID_ADDRESS)
- {
- m_frame_type = eNotAValidFrame;
- UnwindLogMsg ("frame does not have a pc");
- return;
- }
-
- Process *process = exe_ctx.GetProcessPtr();
-
- // Let ABIs fixup code addresses to make sure they are valid. In ARM ABIs
- // this will strip bit zero in case we read a PC from memory or from the LR.
- // (which would be a no-op in frame 0 where we get it from the register set,
- // but still a good idea to make the call here for other ABIs that may exist.)
- ABI *abi = process->GetABI().get();
- if (abi)
- current_pc = abi->FixCodeAddress(current_pc);
-
- // Initialize m_current_pc, an Address object, based on current_pc, an addr_t.
- m_current_pc.SetLoadAddress (current_pc, &process->GetTarget());
-
- // If we don't have a Module for some reason, we're not going to find symbol/function information - just
- // stick in some reasonable defaults and hope we can unwind past this frame.
- ModuleSP pc_module_sp (m_current_pc.GetModule());
- if (!m_current_pc.IsValid() || !pc_module_sp)
- {
- UnwindLogMsg ("using architectural default unwind method");
- }
+ if (reg_ctx_sp.get() == NULL) {
+ m_frame_type = eNotAValidFrame;
+ UnwindLogMsg("frame does not have a register context");
+ return;
+ }
- // We require either a symbol or function in the symbols context to be successfully
- // filled in or this context is of no use to us.
- const uint32_t resolve_scope = eSymbolContextFunction | eSymbolContextSymbol;
- if (pc_module_sp.get()
- && (pc_module_sp->ResolveSymbolContextForAddress (m_current_pc, resolve_scope, m_sym_ctx) & resolve_scope))
- {
- m_sym_ctx_valid = true;
- }
+ addr_t current_pc = reg_ctx_sp->GetPC();
- if (m_sym_ctx.symbol)
- {
- UnwindLogMsg ("with pc value of 0x%" PRIx64 ", symbol name is '%s'",
- current_pc, GetSymbolOrFunctionName(m_sym_ctx).AsCString(""));
- }
- else if (m_sym_ctx.function)
- {
- UnwindLogMsg ("with pc value of 0x%" PRIx64 ", function name is '%s'",
- current_pc, GetSymbolOrFunctionName(m_sym_ctx).AsCString(""));
- }
- else
- {
- UnwindLogMsg ("with pc value of 0x%" PRIx64 ", no symbol/function name is known.", current_pc);
- }
-
- AddressRange addr_range;
- m_sym_ctx.GetAddressRange (resolve_scope, 0, false, addr_range);
+ if (current_pc == LLDB_INVALID_ADDRESS) {
+ m_frame_type = eNotAValidFrame;
+ UnwindLogMsg("frame does not have a pc");
+ return;
+ }
+
+ Process *process = exe_ctx.GetProcessPtr();
+
+ // Let ABIs fixup code addresses to make sure they are valid. In ARM ABIs
+ // this will strip bit zero in case we read a PC from memory or from the LR.
+ // (which would be a no-op in frame 0 where we get it from the register set,
+ // but still a good idea to make the call here for other ABIs that may exist.)
+ ABI *abi = process->GetABI().get();
+ if (abi)
+ current_pc = abi->FixCodeAddress(current_pc);
+
+ // Initialize m_current_pc, an Address object, based on current_pc, an addr_t.
+ m_current_pc.SetLoadAddress(current_pc, &process->GetTarget());
+
+ // If we don't have a Module for some reason, we're not going to find
+ // symbol/function information - just
+ // stick in some reasonable defaults and hope we can unwind past this frame.
+ ModuleSP pc_module_sp(m_current_pc.GetModule());
+ if (!m_current_pc.IsValid() || !pc_module_sp) {
+ UnwindLogMsg("using architectural default unwind method");
+ }
+
+ // We require either a symbol or function in the symbols context to be
+ // successfully
+ // filled in or this context is of no use to us.
+ const uint32_t resolve_scope = eSymbolContextFunction | eSymbolContextSymbol;
+ if (pc_module_sp.get() && (pc_module_sp->ResolveSymbolContextForAddress(
+ m_current_pc, resolve_scope, m_sym_ctx) &
+ resolve_scope)) {
+ m_sym_ctx_valid = true;
+ }
+
+ if (m_sym_ctx.symbol) {
+ UnwindLogMsg("with pc value of 0x%" PRIx64 ", symbol name is '%s'",
+ current_pc, GetSymbolOrFunctionName(m_sym_ctx).AsCString(""));
+ } else if (m_sym_ctx.function) {
+ UnwindLogMsg("with pc value of 0x%" PRIx64 ", function name is '%s'",
+ current_pc, GetSymbolOrFunctionName(m_sym_ctx).AsCString(""));
+ } else {
+ UnwindLogMsg("with pc value of 0x%" PRIx64
+ ", no symbol/function name is known.",
+ current_pc);
+ }
+
+ AddressRange addr_range;
+ m_sym_ctx.GetAddressRange(resolve_scope, 0, false, addr_range);
+
+ if (IsTrapHandlerSymbol(process, m_sym_ctx)) {
+ m_frame_type = eTrapHandlerFrame;
+ } else {
+ // FIXME: Detect eDebuggerFrame here.
+ m_frame_type = eNormalFrame;
+ }
+
+ // If we were able to find a symbol/function, set addr_range to the bounds of
+ // that symbol/function.
+ // else treat the current pc value as the start_pc and record no offset.
+ if (addr_range.GetBaseAddress().IsValid()) {
+ m_start_pc = addr_range.GetBaseAddress();
+ if (m_current_pc.GetSection() == m_start_pc.GetSection()) {
+ m_current_offset = m_current_pc.GetOffset() - m_start_pc.GetOffset();
+ } else if (m_current_pc.GetModule() == m_start_pc.GetModule()) {
+ // This means that whatever symbol we kicked up isn't really correct
+ // --- we should not cross section boundaries ... We really should NULL
+ // out
+ // the function/symbol in this case unless there is a bad assumption
+ // here due to inlined functions?
+ m_current_offset =
+ m_current_pc.GetFileAddress() - m_start_pc.GetFileAddress();
+ }
+ m_current_offset_backed_up_one = m_current_offset;
+ } else {
+ m_start_pc = m_current_pc;
+ m_current_offset = -1;
+ m_current_offset_backed_up_one = -1;
+ }
+
+ // We've set m_frame_type and m_sym_ctx before these calls.
+
+ m_fast_unwind_plan_sp = GetFastUnwindPlanForFrame();
+ m_full_unwind_plan_sp = GetFullUnwindPlanForFrame();
+
+ UnwindPlan::RowSP active_row;
+ lldb::RegisterKind row_register_kind = eRegisterKindGeneric;
+ if (m_full_unwind_plan_sp &&
+ m_full_unwind_plan_sp->PlanValidAtAddress(m_current_pc)) {
+ active_row =
+ m_full_unwind_plan_sp->GetRowForFunctionOffset(m_current_offset);
+ row_register_kind = m_full_unwind_plan_sp->GetRegisterKind();
+ if (active_row.get() && log) {
+ StreamString active_row_strm;
+ active_row->Dump(active_row_strm, m_full_unwind_plan_sp.get(), &m_thread,
+ m_start_pc.GetLoadAddress(exe_ctx.GetTargetPtr()));
+ UnwindLogMsg("%s", active_row_strm.GetData());
+ }
+ }
+
+ if (!active_row.get()) {
+ UnwindLogMsg("could not find an unwindplan row for this frame's pc");
+ m_frame_type = eNotAValidFrame;
+ return;
+ }
- if (IsTrapHandlerSymbol (process, m_sym_ctx))
- {
- m_frame_type = eTrapHandlerFrame;
- }
- else
- {
- // FIXME: Detect eDebuggerFrame here.
- m_frame_type = eNormalFrame;
- }
+ if (!ReadCFAValueForRow(row_register_kind, active_row, m_cfa)) {
+ // Try the fall back unwind plan since the
+ // full unwind plan failed.
+ FuncUnwindersSP func_unwinders_sp;
+ UnwindPlanSP call_site_unwind_plan;
+ bool cfa_status = false;
- // If we were able to find a symbol/function, set addr_range to the bounds of that symbol/function.
- // else treat the current pc value as the start_pc and record no offset.
- if (addr_range.GetBaseAddress().IsValid())
- {
- m_start_pc = addr_range.GetBaseAddress();
- if (m_current_pc.GetSection() == m_start_pc.GetSection())
- {
- m_current_offset = m_current_pc.GetOffset() - m_start_pc.GetOffset();
- }
- else if (m_current_pc.GetModule() == m_start_pc.GetModule())
- {
- // This means that whatever symbol we kicked up isn't really correct
- // --- we should not cross section boundaries ... We really should NULL out
- // the function/symbol in this case unless there is a bad assumption
- // here due to inlined functions?
- m_current_offset = m_current_pc.GetFileAddress() - m_start_pc.GetFileAddress();
- }
- m_current_offset_backed_up_one = m_current_offset;
- }
- else
- {
- m_start_pc = m_current_pc;
- m_current_offset = -1;
- m_current_offset_backed_up_one = -1;
+ if (m_sym_ctx_valid) {
+ func_unwinders_sp =
+ pc_module_sp->GetObjectFile()
+ ->GetUnwindTable()
+ .GetFuncUnwindersContainingAddress(m_current_pc, m_sym_ctx);
}
- // We've set m_frame_type and m_sym_ctx before these calls.
+ if (func_unwinders_sp.get() != nullptr)
+ call_site_unwind_plan = func_unwinders_sp->GetUnwindPlanAtCallSite(
+ process->GetTarget(), m_current_offset_backed_up_one);
- m_fast_unwind_plan_sp = GetFastUnwindPlanForFrame ();
- m_full_unwind_plan_sp = GetFullUnwindPlanForFrame ();
-
- UnwindPlan::RowSP active_row;
- lldb::RegisterKind row_register_kind = eRegisterKindGeneric;
- if (m_full_unwind_plan_sp && m_full_unwind_plan_sp->PlanValidAtAddress (m_current_pc))
- {
- active_row = m_full_unwind_plan_sp->GetRowForFunctionOffset (m_current_offset);
- row_register_kind = m_full_unwind_plan_sp->GetRegisterKind ();
- if (active_row.get() && log)
- {
- StreamString active_row_strm;
- active_row->Dump(active_row_strm, m_full_unwind_plan_sp.get(), &m_thread, m_start_pc.GetLoadAddress(exe_ctx.GetTargetPtr()));
- UnwindLogMsg ("%s", active_row_strm.GetString().c_str());
- }
+ if (call_site_unwind_plan.get() != nullptr) {
+ m_fallback_unwind_plan_sp = call_site_unwind_plan;
+ if (TryFallbackUnwindPlan())
+ cfa_status = true;
}
-
- if (!active_row.get())
- {
- UnwindLogMsg ("could not find an unwindplan row for this frame's pc");
- m_frame_type = eNotAValidFrame;
- return;
- }
-
-
- if (!ReadCFAValueForRow (row_register_kind, active_row, m_cfa))
- {
- // Try the fall back unwind plan since the
- // full unwind plan failed.
- FuncUnwindersSP func_unwinders_sp;
- UnwindPlanSP call_site_unwind_plan;
- bool cfa_status = false;
-
- if (m_sym_ctx_valid)
- {
- func_unwinders_sp = pc_module_sp->GetObjectFile()->GetUnwindTable().GetFuncUnwindersContainingAddress (m_current_pc, m_sym_ctx);
- }
-
- if(func_unwinders_sp.get() != nullptr)
- call_site_unwind_plan = func_unwinders_sp->GetUnwindPlanAtCallSite(process->GetTarget(), m_current_offset_backed_up_one);
-
- if (call_site_unwind_plan.get() != nullptr)
- {
- m_fallback_unwind_plan_sp = call_site_unwind_plan;
- if(TryFallbackUnwindPlan())
- cfa_status = true;
- }
- if (!cfa_status)
- {
- UnwindLogMsg ("could not read CFA value for first frame.");
- m_frame_type = eNotAValidFrame;
- return;
- }
+ if (!cfa_status) {
+ UnwindLogMsg("could not read CFA value for first frame.");
+ m_frame_type = eNotAValidFrame;
+ return;
}
+ }
- UnwindLogMsg ("initialized frame current pc is 0x%" PRIx64 " cfa is 0x%" PRIx64 " using %s UnwindPlan",
- (uint64_t) m_current_pc.GetLoadAddress (exe_ctx.GetTargetPtr()),
- (uint64_t) m_cfa,
- m_full_unwind_plan_sp->GetSourceName().GetCString());
+ UnwindLogMsg("initialized frame current pc is 0x%" PRIx64 " cfa is 0x%" PRIx64
+ " using %s UnwindPlan",
+ (uint64_t)m_current_pc.GetLoadAddress(exe_ctx.GetTargetPtr()),
+ (uint64_t)m_cfa,
+ m_full_unwind_plan_sp->GetSourceName().GetCString());
}
-// Initialize a RegisterContextLLDB for the non-zeroth frame -- rely on the RegisterContextLLDB "below" it
+// Initialize a RegisterContextLLDB for the non-zeroth frame -- rely on the
+// RegisterContextLLDB "below" it
// to provide things like its current pc value.
-void
-RegisterContextLLDB::InitializeNonZerothFrame()
-{
- Log *log(GetLogIfAllCategoriesSet (LIBLLDB_LOG_UNWIND));
- if (IsFrameZero ())
- {
- m_frame_type = eNotAValidFrame;
- UnwindLogMsg ("non-zeroth frame tests positive for IsFrameZero -- that shouldn't happen.");
- return;
- }
-
- if (!GetNextFrame().get() || !GetNextFrame()->IsValid())
- {
- m_frame_type = eNotAValidFrame;
- UnwindLogMsg ("Could not get next frame, marking this frame as invalid.");
- return;
- }
- if (!m_thread.GetRegisterContext())
- {
- m_frame_type = eNotAValidFrame;
- UnwindLogMsg ("Could not get register context for this thread, marking this frame as invalid.");
- return;
- }
+void RegisterContextLLDB::InitializeNonZerothFrame() {
+ Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_UNWIND));
+ if (IsFrameZero()) {
+ m_frame_type = eNotAValidFrame;
+ UnwindLogMsg("non-zeroth frame tests positive for IsFrameZero -- that "
+ "shouldn't happen.");
+ return;
+ }
- addr_t pc;
- if (!ReadGPRValue (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC, pc))
- {
- UnwindLogMsg ("could not get pc value");
+ if (!GetNextFrame().get() || !GetNextFrame()->IsValid()) {
+ m_frame_type = eNotAValidFrame;
+ UnwindLogMsg("Could not get next frame, marking this frame as invalid.");
+ return;
+ }
+ if (!m_thread.GetRegisterContext()) {
+ m_frame_type = eNotAValidFrame;
+ UnwindLogMsg("Could not get register context for this thread, marking this "
+ "frame as invalid.");
+ return;
+ }
+
+ addr_t pc;
+ if (!ReadGPRValue(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC, pc)) {
+ UnwindLogMsg("could not get pc value");
+ m_frame_type = eNotAValidFrame;
+ return;
+ }
+
+ if (log) {
+ UnwindLogMsg("pc = 0x%" PRIx64, pc);
+ addr_t reg_val;
+ if (ReadGPRValue(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_FP, reg_val))
+ UnwindLogMsg("fp = 0x%" PRIx64, reg_val);
+ if (ReadGPRValue(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, reg_val))
+ UnwindLogMsg("sp = 0x%" PRIx64, reg_val);
+ }
+
+ // A pc of 0x0 means it's the end of the stack crawl unless we're above a trap
+ // handler function
+ bool above_trap_handler = false;
+ if (GetNextFrame().get() && GetNextFrame()->IsValid() &&
+ GetNextFrame()->IsTrapHandlerFrame())
+ above_trap_handler = true;
+
+ if (pc == 0 || pc == 0x1) {
+ if (above_trap_handler == false) {
+ m_frame_type = eNotAValidFrame;
+ UnwindLogMsg("this frame has a pc of 0x0");
+ return;
+ }
+ }
+
+ ExecutionContext exe_ctx(m_thread.shared_from_this());
+ Process *process = exe_ctx.GetProcessPtr();
+ // Let ABIs fixup code addresses to make sure they are valid. In ARM ABIs
+ // this will strip bit zero in case we read a PC from memory or from the LR.
+ ABI *abi = process->GetABI().get();
+ if (abi)
+ pc = abi->FixCodeAddress(pc);
+
+ m_current_pc.SetLoadAddress(pc, &process->GetTarget());
+
+ // If we don't have a Module for some reason, we're not going to find
+ // symbol/function information - just
+ // stick in some reasonable defaults and hope we can unwind past this frame.
+ ModuleSP pc_module_sp(m_current_pc.GetModule());
+ if (!m_current_pc.IsValid() || !pc_module_sp) {
+ UnwindLogMsg("using architectural default unwind method");
+
+ // Test the pc value to see if we know it's in an unmapped/non-executable
+ // region of memory.
+ uint32_t permissions;
+ if (process->GetLoadAddressPermissions(pc, permissions) &&
+ (permissions & ePermissionsExecutable) == 0) {
+ // If this is the second frame off the stack, we may have unwound the
+ // first frame
+ // incorrectly. But using the architecture default unwind plan may get us
+ // back on
+ // track -- albeit possibly skipping a real frame. Give this frame a
+ // clearly-invalid
+ // pc and see if we can get any further.
+ if (GetNextFrame().get() && GetNextFrame()->IsValid() &&
+ GetNextFrame