aboutsummaryrefslogtreecommitdiffstats
path: root/MdePkg/Library
diff options
context:
space:
mode:
authorMitchell Horne <mhorne@FreeBSD.org>2020-06-03 18:44:51 +0000
committerMitchell Horne <mhorne@FreeBSD.org>2020-06-03 18:44:51 +0000
commit4a14dfcc1110b35118d5be8054fecf59ffb83032 (patch)
tree8bf1574ccba91c926acbe0a05d32482ba8825e26 /MdePkg/Library
parent0499b37cea9ca98acfe36368e521ad36b7783f2d (diff)
downloadsrc-vendor/edk2.tar.gz
src-vendor/edk2.zip
As with the previous import, only the MdePkg subdirectory has been brought in. The line-endings were also converted using: % find . -type f | xargs -n 1 sed -I.BAK -e `printf "s/\r//g"` % find . -name \*.BAK | xargs rm
Notes
Notes: svn path=/vendor/edk2/dist/; revision=361765 svn path=/vendor/edk2/ca407c7246bf405da6d9b1b9d93e5e7f17b4b1f9/; revision=361766; tag=vendor/edk2/ca407c7246bf405da6d9b1b9d93e5e7f17b4b1f9
Diffstat (limited to 'MdePkg/Library')
-rw-r--r--MdePkg/Library/BaseCacheMaintenanceLib/ArmCache.c14
-rw-r--r--MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf23
-rw-r--r--MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.uni7
-rw-r--r--MdePkg/Library/BaseCacheMaintenanceLib/EbcCache.c8
-rw-r--r--MdePkg/Library/BaseCacheMaintenanceLib/RiscVCache.c (renamed from MdePkg/Library/BaseCacheMaintenanceLib/IpfCache.c)74
-rw-r--r--MdePkg/Library/BaseCacheMaintenanceLib/X86Cache.c12
-rw-r--r--MdePkg/Library/BaseCpuLib/AArch64/CpuFlushTlb.S8
-rw-r--r--MdePkg/Library/BaseCpuLib/AArch64/CpuFlushTlb.asm33
-rw-r--r--MdePkg/Library/BaseCpuLib/AArch64/CpuSleep.S8
-rw-r--r--MdePkg/Library/BaseCpuLib/AArch64/CpuSleep.asm34
-rw-r--r--MdePkg/Library/BaseCpuLib/Arm/CpuFlushTlb.S12
-rw-r--r--MdePkg/Library/BaseCpuLib/Arm/CpuFlushTlb.asm14
-rw-r--r--MdePkg/Library/BaseCpuLib/Arm/CpuSleep.S12
-rw-r--r--MdePkg/Library/BaseCpuLib/Arm/CpuSleep.asm12
-rw-r--r--MdePkg/Library/BaseCpuLib/BaseCpuLib.inf55
-rw-r--r--MdePkg/Library/BaseCpuLib/BaseCpuLib.uni12
-rw-r--r--MdePkg/Library/BaseCpuLib/Ebc/CpuSleepFlushTlb.c8
-rw-r--r--MdePkg/Library/BaseCpuLib/Ia32/CpuFlushTlb.asm40
-rw-r--r--MdePkg/Library/BaseCpuLib/Ia32/CpuFlushTlb.c8
-rw-r--r--MdePkg/Library/BaseCpuLib/Ia32/CpuFlushTlb.nasm8
-rw-r--r--MdePkg/Library/BaseCpuLib/Ia32/CpuFlushTlbGcc.c8
-rw-r--r--MdePkg/Library/BaseCpuLib/Ia32/CpuSleep.asm39
-rw-r--r--MdePkg/Library/BaseCpuLib/Ia32/CpuSleep.c8
-rw-r--r--MdePkg/Library/BaseCpuLib/Ia32/CpuSleep.nasm8
-rw-r--r--MdePkg/Library/BaseCpuLib/Ia32/CpuSleepGcc.c8
-rw-r--r--MdePkg/Library/BaseCpuLib/Ipf/CpuFlushTlb.s58
-rw-r--r--MdePkg/Library/BaseCpuLib/Ipf/CpuSleep.c66
-rw-r--r--MdePkg/Library/BaseCpuLib/RiscV/Cpu.S19
-rw-r--r--MdePkg/Library/BaseCpuLib/X64/CpuFlushTlb.S35
-rw-r--r--MdePkg/Library/BaseCpuLib/X64/CpuFlushTlb.asm38
-rw-r--r--MdePkg/Library/BaseCpuLib/X64/CpuFlushTlb.nasm8
-rw-r--r--MdePkg/Library/BaseCpuLib/X64/CpuSleep.S34
-rw-r--r--MdePkg/Library/BaseCpuLib/X64/CpuSleep.asm37
-rw-r--r--MdePkg/Library/BaseCpuLib/X64/CpuSleep.nasm8
-rw-r--r--MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf13
-rw-r--r--MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.uni7
-rw-r--r--MdePkg/Library/BaseDebugLibNull/DebugLib.c100
-rw-r--r--MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf13
-rw-r--r--MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.uni7
-rw-r--r--MdePkg/Library/BaseDebugLibSerialPort/DebugLib.c162
-rw-r--r--MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.c18
-rw-r--r--MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf15
-rw-r--r--MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.uni7
-rw-r--r--MdePkg/Library/BaseExtractGuidedSectionLib/BaseExtractGuidedSectionLib.c88
-rw-r--r--MdePkg/Library/BaseExtractGuidedSectionLib/BaseExtractGuidedSectionLib.inf11
-rw-r--r--MdePkg/Library/BaseExtractGuidedSectionLib/BaseExtractGuidedSectionLib.uni7
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/AArch64/ArmVirtMmio.S142
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/AArch64/ArmVirtMmio.asm143
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.S141
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.asm145
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf37
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.uni7
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.inf46
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.uni17
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicInternal.h7
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicSev.inf52
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.asm141
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm8
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifoSev.nasm293
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/IoHighLevel.c48
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/IoLib.c32
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/IoLibArmVirt.c (renamed from MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c)607
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c8
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c22
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/IoLibIcc.c214
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/IoLibMmioBuffer.c120
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/IoLibMsc.c16
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c (renamed from MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c)14
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.asm127
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm8
-rw-r--r--MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifoSev.nasm282
-rw-r--r--MdePkg/Library/BaseLib/AArch64/CpuBreakpoint.S8
-rw-r--r--MdePkg/Library/BaseLib/AArch64/CpuBreakpoint.asm33
-rw-r--r--MdePkg/Library/BaseLib/AArch64/DisableInterrupts.S8
-rw-r--r--MdePkg/Library/BaseLib/AArch64/DisableInterrupts.asm31
-rw-r--r--MdePkg/Library/BaseLib/AArch64/EnableInterrupts.S8
-rw-r--r--MdePkg/Library/BaseLib/AArch64/EnableInterrupts.asm31
-rw-r--r--MdePkg/Library/BaseLib/AArch64/GetInterruptsState.S8
-rw-r--r--MdePkg/Library/BaseLib/AArch64/GetInterruptsState.asm43
-rw-r--r--MdePkg/Library/BaseLib/AArch64/MemoryFence.S8
-rw-r--r--MdePkg/Library/BaseLib/AArch64/MemoryFence.asm32
-rw-r--r--MdePkg/Library/BaseLib/AArch64/SetJumpLongJump.S8
-rw-r--r--MdePkg/Library/BaseLib/AArch64/SetJumpLongJump.asm95
-rw-r--r--MdePkg/Library/BaseLib/AArch64/SpeculationBarrier.S33
-rw-r--r--MdePkg/Library/BaseLib/AArch64/SpeculationBarrier.asm32
-rw-r--r--MdePkg/Library/BaseLib/AArch64/SwitchStack.S90
-rw-r--r--MdePkg/Library/BaseLib/AArch64/SwitchStack.asm65
-rw-r--r--MdePkg/Library/BaseLib/ARShiftU64.c8
-rw-r--r--MdePkg/Library/BaseLib/Arm/CpuBreakpoint.S14
-rw-r--r--MdePkg/Library/BaseLib/Arm/CpuBreakpoint.asm19
-rw-r--r--MdePkg/Library/BaseLib/Arm/CpuPause.asm12
-rw-r--r--MdePkg/Library/BaseLib/Arm/DisableInterrupts.S12
-rw-r--r--MdePkg/Library/BaseLib/Arm/DisableInterrupts.asm14
-rw-r--r--MdePkg/Library/BaseLib/Arm/EnableInterrupts.S12
-rw-r--r--MdePkg/Library/BaseLib/Arm/EnableInterrupts.asm14
-rw-r--r--MdePkg/Library/BaseLib/Arm/GetInterruptsState.S12
-rw-r--r--MdePkg/Library/BaseLib/Arm/GetInterruptsState.asm14
-rw-r--r--MdePkg/Library/BaseLib/Arm/InternalSwitchStack.c12
-rwxr-xr-xMdePkg/Library/BaseLib/Arm/Math64.S452
-rw-r--r--MdePkg/Library/BaseLib/Arm/MemoryFence.S8
-rw-r--r--MdePkg/Library/BaseLib/Arm/MemoryFence.asm8
-rw-r--r--MdePkg/Library/BaseLib/Arm/SetJumpLongJump.S12
-rw-r--r--MdePkg/Library/BaseLib/Arm/SetJumpLongJump.asm12
-rw-r--r--MdePkg/Library/BaseLib/Arm/SpeculationBarrier.S33
-rw-r--r--MdePkg/Library/BaseLib/Arm/SpeculationBarrier.asm33
-rw-r--r--MdePkg/Library/BaseLib/Arm/SwitchStack.S18
-rw-r--r--MdePkg/Library/BaseLib/Arm/SwitchStack.asm18
-rw-r--r--MdePkg/Library/BaseLib/Arm/Unaligned.c12
-rw-r--r--MdePkg/Library/BaseLib/BaseLib.inf768
-rw-r--r--MdePkg/Library/BaseLib/BaseLib.uni7
-rw-r--r--MdePkg/Library/BaseLib/BaseLibInternals.h1000
-rw-r--r--MdePkg/Library/BaseLib/BitField.c116
-rw-r--r--MdePkg/Library/BaseLib/CheckSum.c313
-rw-r--r--MdePkg/Library/BaseLib/ChkStkGcc.c14
-rw-r--r--MdePkg/Library/BaseLib/Cpu.c8
-rw-r--r--MdePkg/Library/BaseLib/CpuDeadLoop.c8
-rw-r--r--MdePkg/Library/BaseLib/DivS64x64Remainder.c12
-rw-r--r--MdePkg/Library/BaseLib/DivU64x32.c8
-rw-r--r--MdePkg/Library/BaseLib/DivU64x32Remainder.c8
-rw-r--r--MdePkg/Library/BaseLib/DivU64x64Remainder.c8
-rw-r--r--MdePkg/Library/BaseLib/Ebc/CpuBreakpoint.c8
-rw-r--r--MdePkg/Library/BaseLib/Ebc/SetJumpLongJump.c9
-rw-r--r--MdePkg/Library/BaseLib/Ebc/SpeculationBarrier.c24
-rw-r--r--MdePkg/Library/BaseLib/Ebc/SwitchStack.c8
-rw-r--r--MdePkg/Library/BaseLib/FilePaths.c31
-rw-r--r--MdePkg/Library/BaseLib/GetPowerOfTwo32.c8
-rw-r--r--MdePkg/Library/BaseLib/GetPowerOfTwo64.c8
-rw-r--r--MdePkg/Library/BaseLib/HighBitSet32.c8
-rw-r--r--MdePkg/Library/BaseLib/HighBitSet64.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ARShiftU64.S43
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ARShiftU64.asm48
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ARShiftU64.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ARShiftU64.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/CpuBreakpoint.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/CpuBreakpoint.c10
-rw-r--r--MdePkg/Library/BaseLib/Ia32/CpuBreakpoint.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/CpuId.S63
-rw-r--r--MdePkg/Library/BaseLib/Ia32/CpuId.asm66
-rw-r--r--MdePkg/Library/BaseLib/Ia32/CpuId.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/CpuId.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/CpuIdEx.S67
-rw-r--r--MdePkg/Library/BaseLib/Ia32/CpuIdEx.asm68
-rw-r--r--MdePkg/Library/BaseLib/Ia32/CpuIdEx.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/CpuIdEx.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/CpuPause.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/CpuPause.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/CpuPause.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DisableCache.S39
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DisableCache.asm45
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DisableCache.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DisableCache.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DisableInterrupts.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DisableInterrupts.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DisableInterrupts.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DisablePaging32.S52
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DisablePaging32.asm57
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DisablePaging32.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DisablePaging32.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DivS64x64Remainder.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DivU64x32.S41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DivU64x32.asm46
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DivU64x32.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DivU64x32.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.S46
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.asm51
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.S89
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.asm92
-rw-r--r--MdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/EnableCache.S39
-rw-r--r--MdePkg/Library/BaseLib/Ia32/EnableCache.asm45
-rw-r--r--MdePkg/Library/BaseLib/Ia32/EnableCache.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/EnableCache.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.S36
-rw-r--r--MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/EnableInterrupts.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/EnableInterrupts.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/EnableInterrupts.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/EnablePaging32.S52
-rw-r--r--MdePkg/Library/BaseLib/Ia32/EnablePaging32.asm57
-rw-r--r--MdePkg/Library/BaseLib/Ia32/EnablePaging32.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/EnablePaging32.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/EnablePaging64.S63
-rw-r--r--MdePkg/Library/BaseLib/Ia32/EnablePaging64.asm68
-rw-r--r--MdePkg/Library/BaseLib/Ia32/EnablePaging64.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/FlushCacheLine.asm55
-rw-r--r--MdePkg/Library/BaseLib/Ia32/FlushCacheLine.c14
-rw-r--r--MdePkg/Library/BaseLib/Ia32/FlushCacheLine.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/FxRestore.asm42
-rw-r--r--MdePkg/Library/BaseLib/Ia32/FxRestore.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/FxRestore.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/FxSave.asm42
-rw-r--r--MdePkg/Library/BaseLib/Ia32/FxSave.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/FxSave.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/GccInline.c168
-rw-r--r--MdePkg/Library/BaseLib/Ia32/InternalSwitchStack.S48
-rw-r--r--MdePkg/Library/BaseLib/Ia32/InternalSwitchStack.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/InternalSwitchStack.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Invd.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Invd.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Invd.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/LRotU64.S48
-rw-r--r--MdePkg/Library/BaseLib/Ia32/LRotU64.asm51
-rw-r--r--MdePkg/Library/BaseLib/Ia32/LRotU64.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/LRotU64.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/LShiftU64.S43
-rw-r--r--MdePkg/Library/BaseLib/Ia32/LShiftU64.asm48
-rw-r--r--MdePkg/Library/BaseLib/Ia32/LShiftU64.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/LShiftU64.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Lfence.nasm30
-rw-r--r--MdePkg/Library/BaseLib/Ia32/LongJump.S41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/LongJump.asm46
-rw-r--r--MdePkg/Library/BaseLib/Ia32/LongJump.c50
-rw-r--r--MdePkg/Library/BaseLib/Ia32/LongJump.nasm33
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ModU64x32.S40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ModU64x32.asm45
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ModU64x32.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ModU64x32.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Monitor.S40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Monitor.asm45
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Monitor.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Monitor.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/MultU64x32.S41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/MultU64x32.asm43
-rw-r--r--MdePkg/Library/BaseLib/Ia32/MultU64x32.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/MultU64x32.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/MultU64x64.S44
-rw-r--r--MdePkg/Library/BaseLib/Ia32/MultU64x64.asm47
-rw-r--r--MdePkg/Library/BaseLib/Ia32/MultU64x64.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/MultU64x64.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Mwait.S38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Mwait.asm43
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Mwait.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Mwait.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Non-existing.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/RRotU64.S48
-rw-r--r--MdePkg/Library/BaseLib/Ia32/RRotU64.asm51
-rw-r--r--MdePkg/Library/BaseLib/Ia32/RRotU64.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/RRotU64.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/RShiftU64.S46
-rw-r--r--MdePkg/Library/BaseLib/Ia32/RShiftU64.asm48
-rw-r--r--MdePkg/Library/BaseLib/Ia32/RShiftU64.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/RShiftU64.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/RdRand.S80
-rw-r--r--MdePkg/Library/BaseLib/Ia32/RdRand.asm94
-rw-r--r--MdePkg/Library/BaseLib/Ia32/RdRand.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadCr0.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadCr0.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadCr0.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadCr2.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadCr2.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadCr2.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadCr3.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadCr3.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadCr3.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadCr4.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadCr4.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadCr4.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadCs.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadCs.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadCs.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr0.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr0.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr0.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr1.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr1.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr1.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr2.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr2.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr2.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr3.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr3.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr3.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr4.asm47
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr4.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr4.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr5.asm47
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr5.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr5.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr6.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr6.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr6.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr7.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr7.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDr7.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDs.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDs.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadDs.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadEflags.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadEflags.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadEflags.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadEs.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadEs.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadEs.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadFs.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadFs.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadFs.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadGdtr.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadGdtr.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadGdtr.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadGs.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadGs.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadGs.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadIdtr.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadIdtr.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadIdtr.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadLdtr.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadLdtr.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadLdtr.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm0.asm45
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm0.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm0.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm1.asm45
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm1.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm1.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm2.asm45
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm2.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm2.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm3.asm45
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm3.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm3.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm4.asm45
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm4.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm4.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm5.asm45
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm5.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm5.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm6.asm45
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm6.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm6.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm7.asm45
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm7.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMm7.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMsr64.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMsr64.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadMsr64.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadPmc.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadPmc.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadPmc.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadSs.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadSs.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadSs.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadTr.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadTr.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadTr.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadTsc.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadTsc.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/ReadTsc.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/SetJump.S44
-rw-r--r--MdePkg/Library/BaseLib/Ia32/SetJump.asm51
-rw-r--r--MdePkg/Library/BaseLib/Ia32/SetJump.c74
-rw-r--r--MdePkg/Library/BaseLib/Ia32/SetJump.nasm31
-rw-r--r--MdePkg/Library/BaseLib/Ia32/SwapBytes64.S38
-rw-r--r--MdePkg/Library/BaseLib/Ia32/SwapBytes64.asm43
-rw-r--r--MdePkg/Library/BaseLib/Ia32/SwapBytes64.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/SwapBytes64.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Thunk16.S222
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Thunk16.asm260
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Thunk16.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Wbinvd.asm40
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Wbinvd.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Wbinvd.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteCr0.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteCr0.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteCr0.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteCr2.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteCr2.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteCr2.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteCr3.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteCr3.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteCr3.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteCr4.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteCr4.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteCr4.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr0.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr0.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr0.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr1.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr1.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr1.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr2.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr2.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr2.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr3.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr3.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr3.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr4.asm48
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr4.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr4.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr5.asm48
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr5.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr5.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr6.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr6.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr6.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr7.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr7.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteDr7.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteGdtr.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteGdtr.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteGdtr.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteIdtr.asm44
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteIdtr.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteIdtr.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteLdtr.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteLdtr.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteLdtr.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm0.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm0.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm0.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm1.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm1.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm1.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm2.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm2.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm2.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm3.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm3.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm3.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm4.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm4.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm4.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm5.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm5.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm5.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm6.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm6.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm6.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm7.asm41
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm7.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMm7.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMsr64.asm44
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMsr64.c8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteMsr64.nasm8
-rw-r--r--MdePkg/Library/BaseLib/Ia32/WriteTr.nasm30
-rw-r--r--MdePkg/Library/BaseLib/Ipf/AccessDbr.s118
-rw-r--r--MdePkg/Library/BaseLib/Ipf/AccessEicr.s512
-rw-r--r--MdePkg/Library/BaseLib/Ipf/AccessGcr.s274
-rw-r--r--MdePkg/Library/BaseLib/Ipf/AccessGp.s86
-rw-r--r--MdePkg/Library/BaseLib/Ipf/AccessKr.s360
-rw-r--r--MdePkg/Library/BaseLib/Ipf/AccessKr7.s63
-rw-r--r--MdePkg/Library/BaseLib/Ipf/AccessMsr.s79
-rw-r--r--MdePkg/Library/BaseLib/Ipf/AccessMsrDb.s121
-rw-r--r--MdePkg/Library/BaseLib/Ipf/AccessPmr.s124
-rw-r--r--MdePkg/Library/BaseLib/Ipf/AccessPsr.s111
-rw-r--r--MdePkg/Library/BaseLib/Ipf/Asm.h27
-rw-r--r--MdePkg/Library/BaseLib/Ipf/AsmCpuMisc.s79
-rw-r--r--MdePkg/Library/BaseLib/Ipf/AsmPalCall.s158
-rw-r--r--MdePkg/Library/BaseLib/Ipf/CpuBreakpoint.c96
-rw-r--r--MdePkg/Library/BaseLib/Ipf/CpuBreakpointMsc.c102
-rw-r--r--MdePkg/Library/BaseLib/Ipf/CpuPause.s25
-rw-r--r--MdePkg/Library/BaseLib/Ipf/ExecFc.s66
-rw-r--r--MdePkg/Library/BaseLib/Ipf/FlushCacheRange.c51
-rw-r--r--MdePkg/Library/BaseLib/Ipf/GetInterruptState.s27
-rw-r--r--MdePkg/Library/BaseLib/Ipf/Ia64gen.h205
-rw-r--r--MdePkg/Library/BaseLib/Ipf/InternalFlushCacheRange.s94
-rw-r--r--MdePkg/Library/BaseLib/Ipf/LongJmp.s121
-rw-r--r--MdePkg/Library/BaseLib/Ipf/ReadAr.s109
-rw-r--r--MdePkg/Library/BaseLib/Ipf/ReadCpuid.s40
-rw-r--r--MdePkg/Library/BaseLib/Ipf/ReadCr.s102
-rw-r--r--MdePkg/Library/BaseLib/Ipf/SetJmp.s108
-rw-r--r--MdePkg/Library/BaseLib/Ipf/SwitchStack.s52
-rw-r--r--MdePkg/Library/BaseLib/Ipf/Unaligned.c243
-rw-r--r--MdePkg/Library/BaseLib/LRotU32.c8
-rw-r--r--MdePkg/Library/BaseLib/LRotU64.c8
-rw-r--r--MdePkg/Library/BaseLib/LShiftU64.c8
-rw-r--r--MdePkg/Library/BaseLib/LinkedList.c237
-rw-r--r--MdePkg/Library/BaseLib/LongJump.c8
-rw-r--r--MdePkg/Library/BaseLib/LowBitSet32.c8
-rw-r--r--MdePkg/Library/BaseLib/LowBitSet64.c8
-rw-r--r--MdePkg/Library/BaseLib/Math64.c8
-rw-r--r--MdePkg/Library/BaseLib/ModU64x32.c8
-rw-r--r--MdePkg/Library/BaseLib/MultS64x64.c8
-rw-r--r--MdePkg/Library/BaseLib/MultU64x32.c8
-rw-r--r--MdePkg/Library/BaseLib/MultU64x64.c8
-rw-r--r--MdePkg/Library/BaseLib/RRotU32.c8
-rw-r--r--MdePkg/Library/BaseLib/RRotU64.c8
-rw-r--r--MdePkg/Library/BaseLib/RShiftU64.c8
-rw-r--r--MdePkg/Library/BaseLib/RiscV64/CpuBreakpoint.c27
-rw-r--r--MdePkg/Library/BaseLib/RiscV64/CpuPause.c29
-rw-r--r--MdePkg/Library/BaseLib/RiscV64/DisableInterrupts.c24
-rw-r--r--MdePkg/Library/BaseLib/RiscV64/EnableInterrupts.c25
-rw-r--r--MdePkg/Library/BaseLib/RiscV64/FlushCache.S21
-rw-r--r--MdePkg/Library/BaseLib/RiscV64/GetInterruptState.c35
-rw-r--r--MdePkg/Library/BaseLib/RiscV64/InternalSwitchStack.c (renamed from MdePkg/Library/BaseLib/Ipf/InternalSwitchStack.c)35
-rw-r--r--MdePkg/Library/BaseLib/RiscV64/RiscVCpuBreakpoint.S14
-rw-r--r--MdePkg/Library/BaseLib/RiscV64/RiscVCpuPause.S14
-rw-r--r--MdePkg/Library/BaseLib/RiscV64/RiscVInterrupt.S32
-rw-r--r--MdePkg/Library/BaseLib/RiscV64/RiscVSetJumpLongJump.S55
-rw-r--r--MdePkg/Library/BaseLib/SafeString.c190
-rw-r--r--MdePkg/Library/BaseLib/SetJump.c8
-rw-r--r--MdePkg/Library/BaseLib/String.c564
-rw-r--r--MdePkg/Library/BaseLib/SwapBytes16.c8
-rw-r--r--MdePkg/Library/BaseLib/SwapBytes32.c8
-rw-r--r--MdePkg/Library/BaseLib/SwapBytes64.c8
-rw-r--r--MdePkg/Library/BaseLib/SwitchStack.c16
-rw-r--r--MdePkg/Library/BaseLib/Unaligned.c8
-rw-r--r--MdePkg/Library/BaseLib/X64/CpuBreakpoint.asm37
-rw-r--r--MdePkg/Library/BaseLib/X64/CpuBreakpoint.c10
-rw-r--r--MdePkg/Library/BaseLib/X64/CpuBreakpoint.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/CpuId.S60
-rw-r--r--MdePkg/Library/BaseLib/X64/CpuId.asm62
-rw-r--r--MdePkg/Library/BaseLib/X64/CpuId.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/CpuIdEx.S62
-rw-r--r--MdePkg/Library/BaseLib/X64/CpuIdEx.asm64
-rw-r--r--MdePkg/Library/BaseLib/X64/CpuIdEx.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/CpuPause.asm37
-rw-r--r--MdePkg/Library/BaseLib/X64/CpuPause.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/DisableCache.S39
-rw-r--r--MdePkg/Library/BaseLib/X64/DisableCache.asm43
-rw-r--r--MdePkg/Library/BaseLib/X64/DisableCache.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/DisableInterrupts.asm38
-rw-r--r--MdePkg/Library/BaseLib/X64/DisableInterrupts.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/DisablePaging64.S82
-rw-r--r--MdePkg/Library/BaseLib/X64/DisablePaging64.asm84
-rw-r--r--MdePkg/Library/BaseLib/X64/DisablePaging64.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/EnableCache.S39
-rw-r--r--MdePkg/Library/BaseLib/X64/EnableCache.asm43
-rw-r--r--MdePkg/Library/BaseLib/X64/EnableCache.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/EnableDisableInterrupts.S36
-rw-r--r--MdePkg/Library/BaseLib/X64/EnableDisableInterrupts.asm39
-rw-r--r--MdePkg/Library/BaseLib/X64/EnableDisableInterrupts.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/EnableInterrupts.asm38
-rw-r--r--MdePkg/Library/BaseLib/X64/EnableInterrupts.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/FlushCacheLine.asm39
-rw-r--r--MdePkg/Library/BaseLib/X64/FlushCacheLine.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/FxRestore.asm38
-rw-r--r--MdePkg/Library/BaseLib/X64/FxRestore.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/FxSave.asm38
-rw-r--r--MdePkg/Library/BaseLib/X64/FxSave.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/GccInline.c178
-rw-r--r--MdePkg/Library/BaseLib/X64/Invd.asm38
-rw-r--r--MdePkg/Library/BaseLib/X64/Invd.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/Lfence.nasm31
-rw-r--r--MdePkg/Library/BaseLib/X64/LongJump.S54
-rw-r--r--MdePkg/Library/BaseLib/X64/LongJump.asm58
-rw-r--r--MdePkg/Library/BaseLib/X64/LongJump.nasm35
-rw-r--r--MdePkg/Library/BaseLib/X64/Monitor.asm43
-rw-r--r--MdePkg/Library/BaseLib/X64/Monitor.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/Mwait.asm41
-rw-r--r--MdePkg/Library/BaseLib/X64/Mwait.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/Non-existing.c8
-rw-r--r--MdePkg/Library/BaseLib/X64/RdRand.S72
-rw-r--r--MdePkg/Library/BaseLib/X64/RdRand.asm83
-rw-r--r--MdePkg/Library/BaseLib/X64/RdRand.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadCr0.asm38
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadCr0.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadCr2.asm38
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadCr2.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadCr3.asm38
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadCr3.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadCr4.asm38
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadCr4.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadCs.asm38
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadCs.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadDr0.asm38
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadDr0.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadDr1.asm38
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadDr1.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadDr2.asm38
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadDr2.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadDr3.asm38
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadDr3.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadDr4.asm42
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadDr4.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadDr5.asm42
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadDr5.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadDr6.asm38
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadDr6.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadDr7.asm38
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadDr7.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadDs.asm38
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadDs.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadEflags.asm39
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadEflags.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadEs.asm38
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadEs.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadFs.asm38
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadFs.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadGdtr.asm38
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadGdtr.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadGs.asm38
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadGs.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadIdtr.asm38
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadIdtr.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadLdtr.asm38
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadLdtr.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadMm0.asm41
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadMm0.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadMm1.asm41
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadMm1.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadMm2.asm41
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadMm2.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadMm3.asm41
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadMm3.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadMm4.asm41
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadMm4.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadMm5.asm41
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadMm5.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadMm6.asm41
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadMm6.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadMm7.asm41
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadMm7.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadMsr64.asm40
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadMsr64.c8
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadMsr64.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadPmc.asm40
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadPmc.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadSs.asm38
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadSs.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadTr.asm38
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadTr.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadTsc.asm40
-rw-r--r--MdePkg/Library/BaseLib/X64/ReadTsc.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/SetJump.S53
-rw-r--r--MdePkg/Library/BaseLib/X64/SetJump.asm66
-rw-r--r--MdePkg/Library/BaseLib/X64/SetJump.nasm31
-rw-r--r--MdePkg/Library/BaseLib/X64/SwitchStack.S52
-rw-r--r--MdePkg/Library/BaseLib/X64/SwitchStack.asm51
-rw-r--r--MdePkg/Library/BaseLib/X64/SwitchStack.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/Thunk16.S334
-rw-r--r--MdePkg/Library/BaseLib/X64/Thunk16.asm315
-rw-r--r--MdePkg/Library/BaseLib/X64/Thunk16.nasm24
-rw-r--r--MdePkg/Library/BaseLib/X64/Wbinvd.asm38
-rw-r--r--MdePkg/Library/BaseLib/X64/Wbinvd.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteCr0.asm39
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteCr0.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteCr2.asm39
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteCr2.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteCr3.asm39
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteCr3.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteCr4.asm39
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteCr4.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteDr0.asm39
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteDr0.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteDr1.asm39
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteDr1.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteDr2.asm39
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteDr2.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteDr3.asm39
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteDr3.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteDr4.asm43
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteDr4.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteDr5.asm43
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteDr5.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteDr6.asm39
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteDr6.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteDr7.asm39
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteDr7.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteGdtr.asm38
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteGdtr.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteIdtr.asm41
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteIdtr.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteLdtr.asm38
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteLdtr.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteMm0.asm41
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteMm0.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteMm1.asm41
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteMm1.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteMm2.asm41
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteMm2.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteMm3.asm41
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteMm3.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteMm4.asm41
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteMm4.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteMm5.asm41
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteMm5.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteMm6.asm41
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteMm6.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteMm7.asm41
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteMm7.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteMsr64.asm41
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteMsr64.c8
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteMsr64.nasm8
-rw-r--r--MdePkg/Library/BaseLib/X64/WriteTr.nasm31
-rw-r--r--MdePkg/Library/BaseLib/X86DisablePaging32.c8
-rw-r--r--MdePkg/Library/BaseLib/X86DisablePaging64.c8
-rw-r--r--MdePkg/Library/BaseLib/X86EnablePaging32.c8
-rw-r--r--MdePkg/Library/BaseLib/X86EnablePaging64.c8
-rw-r--r--MdePkg/Library/BaseLib/X86FxRestore.c8
-rw-r--r--MdePkg/Library/BaseLib/X86FxSave.c8
-rw-r--r--MdePkg/Library/BaseLib/X86GetInterruptState.c8
-rw-r--r--MdePkg/Library/BaseLib/X86MemoryFence.c8
-rw-r--r--MdePkg/Library/BaseLib/X86Msr.c20
-rw-r--r--MdePkg/Library/BaseLib/X86PatchInstruction.c83
-rw-r--r--MdePkg/Library/BaseLib/X86RdRand.c8
-rw-r--r--MdePkg/Library/BaseLib/X86ReadGdtr.c8
-rw-r--r--MdePkg/Library/BaseLib/X86ReadIdtr.c8
-rw-r--r--MdePkg/Library/BaseLib/X86SpeculationBarrier.c30
-rw-r--r--MdePkg/Library/BaseLib/X86Thunk.c70
-rw-r--r--MdePkg/Library/BaseLib/X86WriteGdtr.c8
-rw-r--r--MdePkg/Library/BaseLib/X86WriteIdtr.c8
-rw-r--r--MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf13
-rw-r--r--MdePkg/Library/BaseMemoryLib/BaseMemoryLib.uni7
-rw-r--r--MdePkg/Library/BaseMemoryLib/CompareMemWrapper.c14
-rw-r--r--MdePkg/Library/BaseMemoryLib/CopyMem.c8
-rw-r--r--MdePkg/Library/BaseMemoryLib/CopyMemWrapper.c14
-rw-r--r--MdePkg/Library/BaseMemoryLib/IsZeroBufferWrapper.c8
-rw-r--r--MdePkg/Library/BaseMemoryLib/MemLibGeneric.c8
-rw-r--r--MdePkg/Library/BaseMemoryLib/MemLibGuid.c18
-rw-r--r--MdePkg/Library/BaseMemoryLib/MemLibInternals.h8
-rw-r--r--MdePkg/Library/BaseMemoryLib/ScanMem16Wrapper.c12
-rw-r--r--MdePkg/Library/BaseMemoryLib/ScanMem32Wrapper.c12
-rw-r--r--MdePkg/Library/BaseMemoryLib/ScanMem64Wrapper.c12
-rw-r--r--MdePkg/Library/BaseMemoryLib/ScanMem8Wrapper.c18
-rw-r--r--MdePkg/Library/BaseMemoryLib/SetMem.c8
-rw-r--r--MdePkg/Library/BaseMemoryLib/SetMem16Wrapper.c8
-rw-r--r--MdePkg/Library/BaseMemoryLib/SetMem32Wrapper.c8
-rw-r--r--MdePkg/Library/BaseMemoryLib/SetMem64Wrapper.c8
-rw-r--r--MdePkg/Library/BaseMemoryLib/SetMemWrapper.c12
-rw-r--r--MdePkg/Library/BaseMemoryLib/ZeroMemWrapper.c12
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/BaseMemoryLibMmx.inf55
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/BaseMemoryLibMmx.uni7
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/CompareMemWrapper.c14
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/CopyMemWrapper.c14
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/Ia32/CompareMem.S55
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/Ia32/CompareMem.asm56
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/Ia32/CompareMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/Ia32/CopyMem.S86
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/Ia32/CopyMem.asm77
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/Ia32/CopyMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/Ia32/IsZeroBuffer.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/Ia32/ScanMem16.S52
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/Ia32/ScanMem16.asm55
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/Ia32/ScanMem16.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/Ia32/ScanMem32.S52
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/Ia32/ScanMem32.asm55
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/Ia32/ScanMem32.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/Ia32/ScanMem64.S61
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/Ia32/ScanMem64.asm64
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/Ia32/ScanMem64.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/Ia32/ScanMem8.S52
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/Ia32/ScanMem8.asm55
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/Ia32/ScanMem8.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/Ia32/SetMem.S66
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/Ia32/SetMem.asm70
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/Ia32/SetMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/Ia32/SetMem16.S59
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/Ia32/SetMem16.asm63
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/Ia32/SetMem16.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/Ia32/SetMem32.S52
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/Ia32/SetMem32.asm59
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/Ia32/SetMem32.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/Ia32/SetMem64.S43
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/Ia32/SetMem64.asm50
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/Ia32/SetMem64.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/Ia32/ZeroMem.S54
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/Ia32/ZeroMem.asm56
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/Ia32/ZeroMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/IsZeroBufferWrapper.c8
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/MemLibGuid.c18
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/MemLibInternals.h8
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/ScanMem16Wrapper.c12
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/ScanMem32Wrapper.c12
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/ScanMem64Wrapper.c12
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/ScanMem8Wrapper.c18
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/SetMem16Wrapper.c8
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/SetMem32Wrapper.c8
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/SetMem64Wrapper.c8
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/SetMemWrapper.c12
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/X64/CompareMem.S59
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/X64/CompareMem.asm54
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/X64/CompareMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/X64/CopyMem.S74
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/X64/CopyMem.asm70
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/X64/CopyMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/X64/IsZeroBuffer.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/X64/ScanMem16.S56
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/X64/ScanMem16.asm53
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/X64/ScanMem16.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/X64/ScanMem32.S56
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/X64/ScanMem32.asm53
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/X64/ScanMem32.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/X64/ScanMem64.S55
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/X64/ScanMem64.asm53
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/X64/ScanMem64.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/X64/ScanMem8.S56
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/X64/ScanMem8.asm53
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/X64/ScanMem8.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/X64/SetMem.S61
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/X64/SetMem.asm58
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/X64/SetMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/X64/SetMem16.S60
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/X64/SetMem16.asm57
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/X64/SetMem16.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/X64/SetMem32.S55
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/X64/SetMem32.asm53
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/X64/SetMem32.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/X64/SetMem64.S47
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/X64/SetMem64.asm46
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/X64/SetMem64.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/X64/ZeroMem.S57
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/X64/ZeroMem.asm54
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/X64/ZeroMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibMmx/ZeroMemWrapper.c12
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/AArch64/CopyMem.S4
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/AArch64/ScanMem.S4
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Arm/CompareGuid.S1
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Arm/CompareMem.S1
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Arm/CopyMem.S9
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Arm/CopyMem.asm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Arm/MemLibGuid.c8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Arm/ScanMemGeneric.c8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Arm/SetMem.S13
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Arm/SetMem.asm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/BaseMemoryLibOptDxe.inf57
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/BaseMemoryLibOptDxe.uni7
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/CompareMemWrapper.c14
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/CopyMemWrapper.c14
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Ia32/CompareMem.S55
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Ia32/CompareMem.asm56
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Ia32/CompareMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Ia32/CopyMem.S85
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Ia32/CopyMem.asm84
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Ia32/CopyMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Ia32/IsZeroBuffer.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Ia32/ScanMem16.S52
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Ia32/ScanMem16.asm55
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Ia32/ScanMem16.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Ia32/ScanMem32.S52
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Ia32/ScanMem32.asm55
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Ia32/ScanMem32.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Ia32/ScanMem64.S61
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Ia32/ScanMem64.asm64
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Ia32/ScanMem64.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Ia32/ScanMem8.S52
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Ia32/ScanMem8.asm55
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Ia32/ScanMem8.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Ia32/SetMem.S50
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Ia32/SetMem.asm53
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Ia32/SetMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Ia32/SetMem16.S43
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Ia32/SetMem16.asm45
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Ia32/SetMem16.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Ia32/SetMem32.S43
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Ia32/SetMem32.asm45
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Ia32/SetMem32.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Ia32/SetMem64.S46
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Ia32/SetMem64.asm49
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Ia32/SetMem64.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Ia32/ZeroMem.S49
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Ia32/ZeroMem.asm50
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/Ia32/ZeroMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/IsZeroBufferWrapper.c8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/MemLibGuid.c18
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/MemLibInternals.h8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/ScanMem16Wrapper.c12
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/ScanMem32Wrapper.c12
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/ScanMem64Wrapper.c12
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/ScanMem8Wrapper.c20
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/SetMem16Wrapper.c8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/SetMem32Wrapper.c8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/SetMem64Wrapper.c8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/SetMemWrapper.c12
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/X64/CompareMem.S59
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/X64/CompareMem.asm54
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/X64/CompareMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/X64/CopyMem.S82
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/X64/CopyMem.asm79
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/X64/CopyMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/X64/IsZeroBuffer.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/X64/ScanMem16.S56
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/X64/ScanMem16.asm53
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/X64/ScanMem16.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/X64/ScanMem32.S56
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/X64/ScanMem32.asm53
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/X64/ScanMem32.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/X64/ScanMem64.S55
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/X64/ScanMem64.asm53
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/X64/ScanMem64.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/X64/ScanMem8.S56
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/X64/ScanMem8.asm53
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/X64/ScanMem8.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/X64/SetMem.S57
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/X64/SetMem.asm58
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/X64/SetMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/X64/SetMem16.S47
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/X64/SetMem16.asm45
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/X64/SetMem16.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/X64/SetMem32.S47
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/X64/SetMem32.asm45
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/X64/SetMem32.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/X64/SetMem64.S46
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/X64/SetMem64.asm44
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/X64/SetMem64.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/X64/ZeroMem.S51
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/X64/ZeroMem.asm48
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/X64/ZeroMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/ZeroMemWrapper.c12
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/BaseMemoryLibOptPei.inf57
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/BaseMemoryLibOptPei.uni7
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/CompareMemWrapper.c14
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/CopyMemWrapper.c14
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/Ia32/CompareMem.S55
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/Ia32/CompareMem.asm56
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/Ia32/CompareMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/Ia32/CopyMem.S62
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/Ia32/CopyMem.asm61
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/Ia32/CopyMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/Ia32/IsZeroBuffer.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/Ia32/ScanMem16.S52
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/Ia32/ScanMem16.asm55
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/Ia32/ScanMem16.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/Ia32/ScanMem32.S52
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/Ia32/ScanMem32.asm55
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/Ia32/ScanMem32.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/Ia32/ScanMem64.S61
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/Ia32/ScanMem64.asm64
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/Ia32/ScanMem64.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/Ia32/ScanMem8.S52
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/Ia32/ScanMem8.asm55
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/Ia32/ScanMem8.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/Ia32/SetMem.S50
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/Ia32/SetMem.asm53
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/Ia32/SetMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/Ia32/SetMem16.S43
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/Ia32/SetMem16.asm45
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/Ia32/SetMem16.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/Ia32/SetMem32.S43
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/Ia32/SetMem32.asm45
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/Ia32/SetMem32.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/Ia32/SetMem64.S46
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/Ia32/SetMem64.asm49
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/Ia32/SetMem64.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/Ia32/ZeroMem.S49
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/Ia32/ZeroMem.asm50
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/Ia32/ZeroMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/IsZeroBufferWrapper.c8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/MemLibGuid.c18
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/MemLibInternals.h8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/ScanMem16Wrapper.c12
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/ScanMem32Wrapper.c12
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/ScanMem64Wrapper.c12
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/ScanMem8Wrapper.c18
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/SetMem16Wrapper.c8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/SetMem32Wrapper.c8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/SetMem64Wrapper.c8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/SetMemWrapper.c12
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/X64/CompareMem.S59
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/X64/CompareMem.asm54
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/X64/CompareMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/X64/CopyMem.S66
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/X64/CopyMem.asm61
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/X64/CopyMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/X64/IsZeroBuffer.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/X64/ScanMem16.S56
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/X64/ScanMem16.asm53
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/X64/ScanMem16.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/X64/ScanMem32.S56
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/X64/ScanMem32.asm53
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/X64/ScanMem32.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/X64/ScanMem64.S56
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/X64/ScanMem64.asm53
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/X64/ScanMem64.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/X64/ScanMem8.S56
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/X64/ScanMem8.asm53
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/X64/ScanMem8.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/X64/SetMem.S47
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/X64/SetMem.asm45
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/X64/SetMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/X64/SetMem16.S47
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/X64/SetMem16.asm44
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/X64/SetMem16.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/X64/SetMem32.S47
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/X64/SetMem32.asm44
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/X64/SetMem32.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/X64/SetMem64.S46
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/X64/SetMem64.asm43
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/X64/SetMem64.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/X64/ZeroMem.S50
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/X64/ZeroMem.asm47
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/X64/ZeroMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibOptPei/ZeroMemWrapper.c12
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRepStr.inf55
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRepStr.uni7
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/CompareMemWrapper.c14
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/CopyMemWrapper.c14
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/Ia32/CompareMem.S55
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/Ia32/CompareMem.asm56
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/Ia32/CompareMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/Ia32/CopyMem.S65
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/Ia32/CopyMem.asm63
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/Ia32/CopyMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/Ia32/IsZeroBuffer.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem16.S54
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem16.asm57
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem16.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem32.S54
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem32.asm57
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem32.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem64.S63
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem64.asm66
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem64.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem8.S54
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem8.asm57
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem8.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem.S46
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem.asm45
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem16.S43
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem16.asm45
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem16.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem32.S43
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem32.asm45
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem32.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem64.S46
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem64.asm49
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem64.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/Ia32/ZeroMem.S49
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/Ia32/ZeroMem.asm50
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/Ia32/ZeroMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/IsZeroBufferWrapper.c8
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/MemLibGuid.c18
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/MemLibInternals.h8
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/ScanMem16Wrapper.c12
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/ScanMem32Wrapper.c12
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/ScanMem64Wrapper.c12
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/ScanMem8Wrapper.c18
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/SetMem16Wrapper.c8
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/SetMem32Wrapper.c8
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/SetMem64Wrapper.c8
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/SetMemWrapper.c12
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/X64/CompareMem.S59
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/X64/CompareMem.asm54
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/X64/CompareMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/X64/CopyMem.S66
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/X64/CopyMem.asm61
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/X64/CopyMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/X64/IsZeroBuffer.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/X64/ScanMem16.S56
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/X64/ScanMem16.asm53
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/X64/ScanMem16.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/X64/ScanMem32.S56
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/X64/ScanMem32.asm53
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/X64/ScanMem32.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/X64/ScanMem64.S56
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/X64/ScanMem64.asm53
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/X64/ScanMem64.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/X64/ScanMem8.S56
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/X64/ScanMem8.asm53
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/X64/ScanMem8.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/X64/SetMem.S47
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/X64/SetMem.asm44
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/X64/SetMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/X64/SetMem16.S47
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/X64/SetMem16.asm44
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/X64/SetMem16.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/X64/SetMem32.S47
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/X64/SetMem32.asm44
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/X64/SetMem32.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/X64/SetMem64.S46
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/X64/SetMem64.asm43
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/X64/SetMem64.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/X64/ZeroMem.S50
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/X64/ZeroMem.asm47
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/X64/ZeroMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibRepStr/ZeroMemWrapper.c12
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/BaseMemoryLibSse2.inf55
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/BaseMemoryLibSse2.uni7
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/CompareMemWrapper.c14
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/CopyMemWrapper.c14
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/Ia32/CompareMem.S55
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/Ia32/CompareMem.asm56
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/Ia32/CompareMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/Ia32/CopyMem.S85
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/Ia32/CopyMem.asm84
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/Ia32/CopyMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/Ia32/IsZeroBuffer.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem16.S52
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem16.asm55
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem16.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem32.S52
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem32.asm55
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem32.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem64.S61
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem64.asm64
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem64.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem8.S52
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem8.asm55
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem8.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem.S76
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem.asm75
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem16.S69
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem16.asm71
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem16.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem32.S68
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem32.asm70
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem32.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem64.S58
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem64.asm64
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem64.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/Ia32/ZeroMem.S65
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/Ia32/ZeroMem.asm67
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/Ia32/ZeroMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/IsZeroBufferWrapper.c8
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/MemLibGuid.c18
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/MemLibInternals.h8
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/ScanMem16Wrapper.c12
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/ScanMem32Wrapper.c12
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/ScanMem64Wrapper.c12
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/ScanMem8Wrapper.c18
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/SetMem16Wrapper.c8
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/SetMem32Wrapper.c8
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/SetMem64Wrapper.c8
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/SetMemWrapper.c12
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/X64/CompareMem.S59
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/X64/CompareMem.asm54
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/X64/CompareMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/X64/CopyMem.S83
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/X64/CopyMem.asm79
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/X64/CopyMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/X64/IsZeroBuffer.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/X64/ScanMem16.S56
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/X64/ScanMem16.asm53
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/X64/ScanMem16.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/X64/ScanMem32.S56
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/X64/ScanMem32.asm53
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/X64/ScanMem32.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/X64/ScanMem64.S56
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/X64/ScanMem64.asm53
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/X64/ScanMem64.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/X64/ScanMem8.S56
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/X64/ScanMem8.asm53
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/X64/ScanMem8.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/X64/SetMem.S72
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/X64/SetMem.asm69
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/X64/SetMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/X64/SetMem16.S70
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/X64/SetMem16.asm67
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/X64/SetMem16.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/X64/SetMem32.S69
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/X64/SetMem32.asm66
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/X64/SetMem32.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/X64/SetMem64.S60
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/X64/SetMem64.asm59
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/X64/SetMem64.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/X64/ZeroMem.S65
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/X64/ZeroMem.asm63
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/X64/ZeroMem.nasm8
-rw-r--r--MdePkg/Library/BaseMemoryLibSse2/ZeroMemWrapper.c12
-rw-r--r--MdePkg/Library/BaseOrderedCollectionRedBlackTreeLib/BaseOrderedCollectionRedBlackTreeLib.c8
-rw-r--r--MdePkg/Library/BaseOrderedCollectionRedBlackTreeLib/BaseOrderedCollectionRedBlackTreeLib.inf12
-rw-r--r--MdePkg/Library/BaseOrderedCollectionRedBlackTreeLib/BaseOrderedCollectionRedBlackTreeLib.uni13
-rw-r--r--MdePkg/Library/BasePalLibNull/BasePalLibNull.inf40
-rw-r--r--MdePkg/Library/BasePalLibNull/BasePalLibNull.uni21
-rw-r--r--MdePkg/Library/BasePalLibNull/PalCall.c59
-rw-r--r--MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf13
-rw-r--r--MdePkg/Library/BasePcdLibNull/BasePcdLibNull.uni7
-rw-r--r--MdePkg/Library/BasePcdLibNull/PcdLib.c286
-rw-r--r--MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf13
-rw-r--r--MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.uni7
-rw-r--r--MdePkg/Library/BasePciCf8Lib/PciCf8Lib.c82
-rw-r--r--MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf13
-rw-r--r--MdePkg/Library/BasePciExpressLib/BasePciExpressLib.uni7
-rw-r--r--MdePkg/Library/BasePciExpressLib/PciExpressLib.c28
-rw-r--r--MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf13
-rw-r--r--MdePkg/Library/BasePciLibCf8/BasePciLibCf8.uni7
-rw-r--r--MdePkg/Library/BasePciLibCf8/PciLib.c22
-rw-r--r--MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf13
-rw-r--r--MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.uni7
-rw-r--r--MdePkg/Library/BasePciLibPciExpress/PciLib.c22
-rw-r--r--MdePkg/Library/BasePciSegmentInfoLibNull/BasePciSegmentInfoLibNull.inf36
-rw-r--r--MdePkg/Library/BasePciSegmentInfoLibNull/BasePciSegmentInfoLibNull.uni15
-rw-r--r--MdePkg/Library/BasePciSegmentInfoLibNull/PciSegmentInfoLib.c31
-rw-r--r--MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf11
-rw-r--r--MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.uni7
-rw-r--r--MdePkg/Library/BasePciSegmentLibPci/PciSegmentLib.c145
-rw-r--r--MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf13
-rw-r--r--MdePkg/Library/BasePeCoffExtraActionLibNull/PeCoffExtraActionLib.c16
-rw-r--r--MdePkg/Library/BasePeCoffExtraActionLibNull/PeCoffExtraActionLibNull.uni7
-rw-r--r--MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf13
-rw-r--r--MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.uni7
-rw-r--r--MdePkg/Library/BasePeCoffGetEntryPointLib/PeCoffGetEntryPoint.c88
-rw-r--r--MdePkg/Library/BasePeCoffLib/Arm/PeCoffLoaderEx.c44
-rw-r--r--MdePkg/Library/BasePeCoffLib/BasePeCoff.c389
-rw-r--r--MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf21
-rw-r--r--MdePkg/Library/BasePeCoffLib/BasePeCoffLib.uni13
-rw-r--r--MdePkg/Library/BasePeCoffLib/BasePeCoffLibInternals.h17
-rw-r--r--MdePkg/Library/BasePeCoffLib/Ipf/PeCoffLoaderEx.c422
-rw-r--r--MdePkg/Library/BasePeCoffLib/PeCoffLoaderEx.c16
-rw-r--r--MdePkg/Library/BasePeCoffLib/RiscV/PeCoffLoaderEx.c133
-rw-r--r--MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf13
-rw-r--r--MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.uni7
-rw-r--r--MdePkg/Library/BasePerformanceLibNull/PerformanceLib.c87
-rw-r--r--MdePkg/Library/BasePostCodeLibDebug/BasePostCodeLibDebug.inf13
-rw-r--r--MdePkg/Library/BasePostCodeLibDebug/BasePostCodeLibDebug.uni7
-rw-r--r--MdePkg/Library/BasePostCodeLibDebug/PostCode.c54
-rw-r--r--MdePkg/Library/BasePostCodeLibPort80/BasePostCodeLibPort80.inf13
-rw-r--r--MdePkg/Library/BasePostCodeLibPort80/BasePostCodeLibPort80.uni7
-rw-r--r--MdePkg/Library/BasePostCodeLibPort80/PostCode.c56
-rw-r--r--MdePkg/Library/BasePrintLib/BasePrintLib.inf13
-rw-r--r--MdePkg/Library/BasePrintLib/BasePrintLib.uni7
-rw-r--r--MdePkg/Library/BasePrintLib/PrintLib.c63
-rw-r--r--MdePkg/Library/BasePrintLib/PrintLibInternal.c151
-rw-r--r--MdePkg/Library/BasePrintLib/PrintLibInternal.h48
-rw-r--r--MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLib.c12
-rw-r--r--MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull.inf11
-rw-r--r--MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull.uni7
-rw-r--r--MdePkg/Library/BaseRngLib/BaseRng.c8
-rw-r--r--MdePkg/Library/BaseRngLib/BaseRngLib.inf7
-rw-r--r--MdePkg/Library/BaseRngLib/BaseRngLib.uni7
-rw-r--r--MdePkg/Library/BaseRngLibNull/BaseRngLibNull.c94
-rw-r--r--MdePkg/Library/BaseRngLibNull/BaseRngLibNull.inf30
-rw-r--r--MdePkg/Library/BaseRngLibNull/BaseRngLibNull.uni14
-rw-r--r--MdePkg/Library/BaseS3BootScriptLibNull/BaseS3BootScriptLibNull.inf12
-rw-r--r--MdePkg/Library/BaseS3BootScriptLibNull/BaseS3BootScriptLibNull.uni10
-rw-r--r--MdePkg/Library/BaseS3BootScriptLibNull/BootScriptLib.c133
-rw-r--r--MdePkg/Library/BaseS3IoLib/BaseS3IoLib.inf16
-rw-r--r--MdePkg/Library/BaseS3IoLib/BaseS3IoLib.uni10
-rw-r--r--MdePkg/Library/BaseS3IoLib/S3IoLib.c191
-rw-r--r--MdePkg/Library/BaseS3PciLib/BaseS3PciLib.inf16
-rw-r--r--MdePkg/Library/BaseS3PciLib/BaseS3PciLib.uni10
-rw-r--r--MdePkg/Library/BaseS3PciLib/S3PciLib.c23
-rw-r--r--MdePkg/Library/BaseS3PciSegmentLib/BaseS3PciSegmentLib.inf39
-rw-r--r--MdePkg/Library/BaseS3PciSegmentLib/BaseS3PciSegmentLib.uni17
-rw-r--r--MdePkg/Library/BaseS3PciSegmentLib/S3PciSegmentLib.c1243
-rw-r--r--MdePkg/Library/BaseS3SmbusLib/BaseS3SmbusLib.inf16
-rw-r--r--MdePkg/Library/BaseS3SmbusLib/BaseS3SmbusLib.uni10
-rw-r--r--MdePkg/Library/BaseS3SmbusLib/S3SmbusLib.c33
-rw-r--r--MdePkg/Library/BaseS3StallLib/BaseS3StallLib.inf16
-rw-r--r--MdePkg/Library/BaseS3StallLib/BaseS3StallLib.uni10
-rw-r--r--MdePkg/Library/BaseS3StallLib/S3StallLib.c17
-rw-r--r--MdePkg/Library/BaseSafeIntLib/BaseSafeIntLib.inf47
-rw-r--r--MdePkg/Library/BaseSafeIntLib/SafeIntLib.c4148
-rw-r--r--MdePkg/Library/BaseSafeIntLib/SafeIntLib32.c538
-rw-r--r--MdePkg/Library/BaseSafeIntLib/SafeIntLib64.c491
-rw-r--r--MdePkg/Library/BaseSafeIntLib/SafeIntLibEbc.c597
-rw-r--r--MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.c30
-rw-r--r--MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf11
-rw-r--r--MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.uni7
-rw-r--r--MdePkg/Library/BaseSmbusLibNull/BaseSmbusLibNull.c14
-rw-r--r--MdePkg/Library/BaseSmbusLibNull/BaseSmbusLibNull.inf11
-rw-r--r--MdePkg/Library/BaseSmbusLibNull/BaseSmbusLibNull.uni7
-rw-r--r--MdePkg/Library/BaseStackCheckLib/BaseStackCheckGcc.c8
-rw-r--r--MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf12
-rw-r--r--MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.uni7
-rw-r--r--MdePkg/Library/BaseStackCheckLib/BaseStackCheckNull.c9
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/AArch64/Synchronization.S8
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/AArch64/Synchronization.asm199
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/Arm/Synchronization.S8
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/Arm/Synchronization.asm8
-rwxr-xr-xMdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf70
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.uni7
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLibInternals.h18
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/Ebc/Synchronization.c16
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/Ia32/GccInline.c82
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedCompareExchange16.asm46
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedCompareExchange16.c8
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedCompareExchange16.nasm8
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedCompareExchange32.asm45
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedCompareExchange32.c8
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedCompareExchange32.nasm8
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedCompareExchange64.asm47
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedCompareExchange64.c8
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedCompareExchange64.nasm8
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedDecrement.asm42
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedDecrement.c42
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedDecrement.nasm18
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedIncrement.asm42
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedIncrement.c43
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedIncrement.nasm15
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/Ia32/InternalGetSpinLockProperties.c14
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/InterlockedDecrementMsc.c (renamed from MdePkg/Library/BaseSynchronizationLib/X64/InterlockedDecrement.c)12
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/InterlockedIncrementMsc.c (renamed from MdePkg/Library/BaseSynchronizationLib/X64/InterlockedIncrement.c)12
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/Ipf/InterlockedCompareExchange16.s30
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/Ipf/InterlockedCompareExchange32.s29
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/Ipf/InterlockedCompareExchange64.s28
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/Ipf/InternalGetSpinLockProperties.c29
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/Ipf/Synchronization.c77
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/RiscV64/Synchronization.S78
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/Synchronization.c18
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/SynchronizationGcc.c22
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/SynchronizationMsc.c20
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/X64/GccInline.c92
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/X64/InterlockedCompareExchange16.asm42
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/X64/InterlockedCompareExchange16.c8
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/X64/InterlockedCompareExchange16.nasm8
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/X64/InterlockedCompareExchange32.asm41
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/X64/InterlockedCompareExchange32.c8
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/X64/InterlockedCompareExchange32.nasm8
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/X64/InterlockedCompareExchange64.asm41
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/X64/InterlockedCompareExchange64.c8
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/X64/InterlockedCompareExchange64.nasm8
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/X64/InterlockedDecrement.asm39
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/X64/InterlockedDecrement.nasm16
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/X64/InterlockedIncrement.asm39
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/X64/InterlockedIncrement.nasm13
-rw-r--r--MdePkg/Library/BaseTimerLibNullTemplate/BaseTimerLibNullTemplate.inf13
-rw-r--r--MdePkg/Library/BaseTimerLibNullTemplate/BaseTimerLibNullTemplate.uni7
-rw-r--r--MdePkg/Library/BaseTimerLibNullTemplate/TimerLibNull.c8
-rw-r--r--MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.c182
-rw-r--r--MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf13
-rw-r--r--MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.uni13
-rw-r--r--MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLibInternals.h53
-rw-r--r--MdePkg/Library/BaseUefiDecompressLib/BaseUefiTianoCustomDecompressLib.c213
-rw-r--r--MdePkg/Library/BaseUefiDecompressLib/BaseUefiTianoCustomDecompressLib.inf42
-rw-r--r--MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.c20
-rw-r--r--MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf13
-rw-r--r--MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.uni7
-rw-r--r--MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf13
-rw-r--r--MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.uni7
-rw-r--r--MdePkg/Library/DxeCoreHobLib/HobLib.c125
-rw-r--r--MdePkg/Library/DxeExtendedSalLib/DxeExtendedSalLib.inf46
-rw-r--r--MdePkg/Library/DxeExtendedSalLib/DxeExtendedSalLib.uni21
-rw-r--r--MdePkg/Library/DxeExtendedSalLib/ExtendedSalLib.c1001
-rw-r--r--MdePkg/Library/DxeExtendedSalLib/Ipf/AsmExtendedSalLib.s97
-rw-r--r--MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.c107
-rw-r--r--MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf13
-rw-r--r--MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.uni7
-rw-r--r--MdePkg/Library/DxeHobLib/DxeHobLib.inf15
-rw-r--r--MdePkg/Library/DxeHobLib/DxeHobLib.uni7
-rw-r--r--MdePkg/Library/DxeHobLib/HobLib.c126
-rw-r--r--MdePkg/Library/DxeHstiLib/DxeHstiLib.inf11
-rw-r--r--MdePkg/Library/DxeHstiLib/DxeHstiLib.uni7
-rw-r--r--MdePkg/Library/DxeHstiLib/HstiAip.c16
-rw-r--r--MdePkg/Library/DxeHstiLib/HstiDxe.c23
-rw-r--r--MdePkg/Library/DxeHstiLib/HstiDxe.h12
-rw-r--r--MdePkg/Library/DxeIoLibCpuIo2/DxeCpuIo2LibInternal.h14
-rw-r--r--MdePkg/Library/DxeIoLibCpuIo2/DxeIoLibCpuIo2.inf14
-rw-r--r--MdePkg/Library/DxeIoLibCpuIo2/DxeIoLibCpuIo2.uni10
-rw-r--r--MdePkg/Library/DxeIoLibCpuIo2/IoHighLevel.c8
-rw-r--r--MdePkg/Library/DxeIoLibCpuIo2/IoLib.c34
-rw-r--r--MdePkg/Library/DxeIoLibCpuIo2/IoLibMmioBuffer.c14
-rw-r--r--MdePkg/Library/DxeIoLibEsal/DxeIoLibEsal.inf49
-rw-r--r--MdePkg/Library/DxeIoLibEsal/DxeIoLibEsal.uni23
-rw-r--r--MdePkg/Library/DxeIoLibEsal/DxeIoLibEsalInternal.h28
-rw-r--r--MdePkg/Library/DxeIoLibEsal/IoHighLevel.c2303
-rw-r--r--MdePkg/Library/DxeIoLibEsal/IoLib.c879
-rw-r--r--MdePkg/Library/DxeIoLibEsal/IoLibMmioBuffer.c411
-rw-r--r--MdePkg/Library/DxePalLibEsal/DxePalLibEsal.c73
-rw-r--r--MdePkg/Library/DxePalLibEsal/DxePalLibEsal.inf41
-rw-r--r--MdePkg/Library/DxePalLibEsal/DxePalLibEsal.uni21
-rw-r--r--MdePkg/Library/DxePcdLib/DxePcdLib.c292
-rw-r--r--MdePkg/Library/DxePcdLib/DxePcdLib.inf21
-rw-r--r--MdePkg/Library/DxePcdLib/DxePcdLib.uni15
-rw-r--r--MdePkg/Library/DxePciLibEsal/DxePciLibEsal.inf40
-rw-r--r--MdePkg/Library/DxePciLibEsal/DxePciLibEsal.uni21
-rw-r--r--MdePkg/Library/DxePciLibEsal/PciLib.c1464
-rw-r--r--MdePkg/Library/DxePciSegmentLibEsal/DxePciSegementLibEsal.uni21
-rw-r--r--MdePkg/Library/DxePciSegmentLibEsal/DxePciSegmentLibEsal.inf40
-rw-r--r--MdePkg/Library/DxeRuntimeDebugLibSerialPort/DebugLib.c435
-rw-r--r--MdePkg/Library/DxeRuntimeDebugLibSerialPort/DxeRuntimeDebugLibSerialPort.inf47
-rw-r--r--MdePkg/Library/DxeRuntimeDebugLibSerialPort/DxeRuntimeDebugLibSerialPort.uni16
-rw-r--r--MdePkg/Library/DxeRuntimeExtendedSalLib/DxeRuntimeExtendedSalLib.inf52
-rw-r--r--MdePkg/Library/DxeRuntimeExtendedSalLib/DxeRuntimeExtendedSalLib.uni21
-rw-r--r--MdePkg/Library/DxeRuntimeExtendedSalLib/ExtendedSalLib.c1124
-rw-r--r--MdePkg/Library/DxeRuntimeExtendedSalLib/Ipf/AsmExtendedSalLib.s131
-rw-r--r--MdePkg/Library/DxeRuntimePciExpressLib/DxeRuntimePciExpressLib.inf23
-rw-r--r--MdePkg/Library/DxeRuntimePciExpressLib/DxeRuntimePciExpressLib.uni11
-rw-r--r--MdePkg/Library/DxeRuntimePciExpressLib/PciExpressLib.c59
-rw-r--r--MdePkg/Library/DxeSalLibEsal/DxeSalLibEsal.c286
-rw-r--r--MdePkg/Library/DxeSalLibEsal/DxeSalLibEsal.inf38
-rw-r--r--MdePkg/Library/DxeSalLibEsal/DxeSalLibEsal.uni21
-rw-r--r--MdePkg/Library/DxeServicesLib/Allocate.c48
-rw-r--r--MdePkg/Library/DxeServicesLib/DxeServicesLib.c311
-rw-r--r--MdePkg/Library/DxeServicesLib/DxeServicesLib.inf28
-rw-r--r--MdePkg/Library/DxeServicesLib/DxeServicesLib.uni7
-rw-r--r--MdePkg/Library/DxeServicesLib/X64/Allocate.c63
-rw-r--r--MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.c20
-rw-r--r--MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf13
-rw-r--r--MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.uni7
-rw-r--r--MdePkg/Library/DxeSmbusLib/DxeSmbusLib.c22
-rw-r--r--MdePkg/Library/DxeSmbusLib/DxeSmbusLib.inf13
-rw-r--r--MdePkg/Library/DxeSmbusLib/DxeSmbusLib.uni7
-rw-r--r--MdePkg/Library/DxeSmbusLib/InternalSmbusLib.h18
-rw-r--r--MdePkg/Library/DxeSmbusLib/SmbusLib.c150
-rw-r--r--MdePkg/Library/DxeTimerLibEsal/DxeTimerLibEsal.c223
-rw-r--r--MdePkg/Library/DxeTimerLibEsal/DxeTimerLibEsal.inf41
-rw-r--r--MdePkg/Library/DxeTimerLibEsal/DxeTimerLibEsal.uni21
-rw-r--r--MdePkg/Library/MmServicesTableLib/MmServicesTableLib.c57
-rw-r--r--MdePkg/Library/MmServicesTableLib/MmServicesTableLib.inf40
-rw-r--r--MdePkg/Library/MmServicesTableLib/MmServicesTableLib.uni18
-rw-r--r--MdePkg/Library/PciSegmentLibSegmentInfo/BasePciSegmentLib.c64
-rw-r--r--MdePkg/Library/PciSegmentLibSegmentInfo/BasePciSegmentLibSegmentInfo.inf41
-rw-r--r--MdePkg/Library/PciSegmentLibSegmentInfo/BasePciSegmentLibSegmentInfo.uni16
-rw-r--r--MdePkg/Library/PciSegmentLibSegmentInfo/DxeRuntimePciSegmentLib.c313
-rw-r--r--MdePkg/Library/PciSegmentLibSegmentInfo/DxeRuntimePciSegmentLibSegmentInfo.inf47
-rw-r--r--MdePkg/Library/PciSegmentLibSegmentInfo/DxeRuntimePciSegmentLibSegmentInfo.uni16
-rw-r--r--MdePkg/Library/PciSegmentLibSegmentInfo/PciSegmentLibCommon.c (renamed from MdePkg/Library/DxePciSegmentLibEsal/PciLib.c)982
-rw-r--r--MdePkg/Library/PciSegmentLibSegmentInfo/PciSegmentLibCommon.h51
-rw-r--r--MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.c46
-rw-r--r--MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf11
-rw-r--r--MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.uni7
-rw-r--r--MdePkg/Library/PeiDxePostCodeLibReportStatusCode/PeiDxePostCodeLibReportStatusCode.inf13
-rw-r--r--MdePkg/Library/PeiDxePostCodeLibReportStatusCode/PeiDxePostCodeLibReportStatusCode.uni7
-rw-r--r--MdePkg/Library/PeiDxePostCodeLibReportStatusCode/PostCode.c54
-rw-r--r--MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.c96
-rw-r--r--MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf11
-rw-r--r--MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.uni7
-rw-r--r--MdePkg/Library/PeiHobLib/HobLib.c156
-rw-r--r--MdePkg/Library/PeiHobLib/PeiHobLib.inf13
-rw-r--r--MdePkg/Library/PeiHobLib/PeiHobLib.uni7
-rw-r--r--MdePkg/Library/PeiIoLibCpuIo/IoHighLevel.c48
-rw-r--r--MdePkg/Library/PeiIoLibCpuIo/IoLib.c22
-rw-r--r--MdePkg/Library/PeiIoLibCpuIo/IoLibMmioBuffer.c120
-rw-r--r--MdePkg/Library/PeiIoLibCpuIo/PeiIoLibCpuIo.inf13
-rw-r--r--MdePkg/Library/PeiIoLibCpuIo/PeiIoLibCpuIo.uni7
-rw-r--r--MdePkg/Library/PeiMemoryAllocationLib/MemoryAllocationLib.c310
-rw-r--r--MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf11
-rw-r--r--MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.uni7
-rw-r--r--MdePkg/Library/PeiMemoryLib/CompareMemWrapper.c14
-rw-r--r--MdePkg/Library/PeiMemoryLib/CopyMemWrapper.c14
-rw-r--r--MdePkg/Library/PeiMemoryLib/IsZeroBufferWrapper.c8
-rw-r--r--MdePkg/Library/PeiMemoryLib/MemLib.c14
-rw-r--r--MdePkg/Library/PeiMemoryLib/MemLibGeneric.c8
-rw-r--r--MdePkg/Library/PeiMemoryLib/MemLibGuid.c18
-rw-r--r--MdePkg/Library/PeiMemoryLib/MemLibInternals.h14
-rw-r--r--MdePkg/Library/PeiMemoryLib/PeiMemoryLib.inf11
-rw-r--r--MdePkg/Library/PeiMemoryLib/PeiMemoryLib.uni7
-rw-r--r--MdePkg/Library/PeiMemoryLib/ScanMem16Wrapper.c12
-rw-r--r--MdePkg/Library/PeiMemoryLib/ScanMem32Wrapper.c12
-rw-r--r--MdePkg/Library/PeiMemoryLib/ScanMem64Wrapper.c12
-rw-r--r--MdePkg/Library/PeiMemoryLib/ScanMem8Wrapper.c18
-rw-r--r--MdePkg/Library/PeiMemoryLib/SetMem16Wrapper.c8
-rw-r--r--MdePkg/Library/PeiMemoryLib/SetMem32Wrapper.c8
-rw-r--r--MdePkg/Library/PeiMemoryLib/SetMem64Wrapper.c8
-rw-r--r--MdePkg/Library/PeiMemoryLib/SetMemWrapper.c12
-rw-r--r--MdePkg/Library/PeiMemoryLib/ZeroMemWrapper.c12
-rw-r--r--MdePkg/Library/PeiPalLib/PeiPalLib.c99
-rw-r--r--MdePkg/Library/PeiPalLib/PeiPalLib.inf51
-rw-r--r--MdePkg/Library/PeiPalLib/PeiPalLib.uni22
-rw-r--r--MdePkg/Library/PeiPcdLib/PeiPcdLib.c314
-rw-r--r--MdePkg/Library/PeiPcdLib/PeiPcdLib.inf15
-rw-r--r--MdePkg/Library/PeiPcdLib/PeiPcdLib.uni13
-rw-r--r--MdePkg/Library/PeiPciLibPciCfg2/PciLib.c23
-rw-r--r--MdePkg/Library/PeiPciLibPciCfg2/PeiPciLibPciCfg2.inf11
-rw-r--r--MdePkg/Library/PeiPciLibPciCfg2/PeiPciLibPciCfg2.uni7
-rw-r--r--MdePkg/Library/PeiPciSegmentLibPciCfg2/PciSegmentLib.c206
-rw-r--r--MdePkg/Library/PeiPciSegmentLibPciCfg2/PeiPciSegmentLibPciCfg2.inf11
-rw-r--r--MdePkg/Library/PeiPciSegmentLibPciCfg2/PeiPciSegmentLibPciCfg2.uni7
-rw-r--r--MdePkg/Library/PeiResourcePublicationLib/PeiResourcePublicationLib.c16
-rw-r--r--MdePkg/Library/PeiResourcePublicationLib/PeiResourcePublicationLib.inf11
-rw-r--r--MdePkg/Library/PeiResourcePublicationLib/PeiResourcePublicationLib.uni7
-rw-r--r--MdePkg/Library/PeiServicesLib/PeiServicesLib.c133
-rw-r--r--MdePkg/Library/PeiServicesLib/PeiServicesLib.inf13
-rw-r--r--MdePkg/Library/PeiServicesLib/PeiServicesLib.uni7
-rw-r--r--MdePkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c46
-rw-r--r--MdePkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf11
-rw-r--r--MdePkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.uni7
-rw-r--r--MdePkg/Library/PeiServicesTablePointerLibIdt/PeiServicesTablePointer.c48
-rw-r--r--MdePkg/Library/PeiServicesTablePointerLibIdt/PeiServicesTablePointerLibIdt.inf7
-rw-r--r--MdePkg/Library/PeiServicesTablePointerLibIdt/PeiServicesTablePointerLibIdt.uni7
-rw-r--r--MdePkg/Library/PeiServicesTablePointerLibKr7/PeiServicesTablePointer.c91
-rw-r--r--MdePkg/Library/PeiServicesTablePointerLibKr7/PeiServicesTablePointerLibKr7.inf42
-rw-r--r--MdePkg/Library/PeiServicesTablePointerLibKr7/PeiServicesTablePointerLibKr7.uni22
-rw-r--r--MdePkg/Library/PeiSmbusLibSmbus2Ppi/InternalSmbusLib.h20
-rw-r--r--MdePkg/Library/PeiSmbusLibSmbus2Ppi/PeiSmbusLib.c20
-rw-r--r--MdePkg/Library/PeiSmbusLibSmbus2Ppi/PeiSmbusLibSmbus2Ppi.inf13
-rw-r--r--MdePkg/Library/PeiSmbusLibSmbus2Ppi/PeiSmbusLibSmbus2Ppi.uni7
-rw-r--r--MdePkg/Library/PeiSmbusLibSmbus2Ppi/SmbusLib.c120
-rw-r--r--MdePkg/Library/PeimEntryPoint/PeimEntryPoint.c18
-rw-r--r--MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf13
-rw-r--r--MdePkg/Library/PeimEntryPoint/PeimEntryPoint.uni7
-rw-r--r--MdePkg/Library/SecPeiDxeTimerLibCpu/IpfTimerLib.c216
-rw-r--r--MdePkg/Library/SecPeiDxeTimerLibCpu/SecPeiDxeTimerLibCpu.inf25
-rw-r--r--MdePkg/Library/SecPeiDxeTimerLibCpu/SecPeiDxeTimerLibCpu.uni11
-rw-r--r--MdePkg/Library/SecPeiDxeTimerLibCpu/X86TimerLib.c8
-rw-r--r--MdePkg/Library/SmiHandlerProfileLibNull/SmiHandlerProfileLibNull.c16
-rw-r--r--MdePkg/Library/SmiHandlerProfileLibNull/SmiHandlerProfileLibNull.inf11
-rw-r--r--MdePkg/Library/SmiHandlerProfileLibNull/SmiHandlerProfileLibNull.uni7
-rw-r--r--MdePkg/Library/SmmIoLib/SmmIoLib.c325
-rw-r--r--MdePkg/Library/SmmIoLib/SmmIoLib.inf47
-rw-r--r--MdePkg/Library/SmmIoLib/SmmIoLib.uni18
-rw-r--r--MdePkg/Library/SmmIoLibSmmCpuIo2/IoHighLevel.c8
-rw-r--r--MdePkg/Library/SmmIoLibSmmCpuIo2/IoLib.c34
-rw-r--r--MdePkg/Library/SmmIoLibSmmCpuIo2/IoLibMmioBuffer.c22
-rw-r--r--MdePkg/Library/SmmIoLibSmmCpuIo2/SmmCpuIoLibInternal.h14
-rw-r--r--MdePkg/Library/SmmIoLibSmmCpuIo2/SmmIoLibSmmCpuIo2.inf7
-rw-r--r--MdePkg/Library/SmmIoLibSmmCpuIo2/SmmIoLibSmmCpuIo2.uni7
-rw-r--r--MdePkg/Library/SmmLibNull/SmmLibNull.c30
-rw-r--r--MdePkg/Library/SmmLibNull/SmmLibNull.inf13
-rw-r--r--MdePkg/Library/SmmLibNull/SmmLibNull.uni7
-rw-r--r--MdePkg/Library/SmmMemLib/SmmMemLib.c193
-rw-r--r--MdePkg/Library/SmmMemLib/SmmMemLib.inf25
-rw-r--r--MdePkg/Library/SmmMemLib/SmmMemLib.uni7
-rw-r--r--MdePkg/Library/SmmMemoryAllocationLib/MemoryAllocationLib.c306
-rw-r--r--MdePkg/Library/SmmMemoryAllocationLib/SmmMemoryAllocationLib.inf15
-rw-r--r--MdePkg/Library/SmmMemoryAllocationLib/SmmMemoryAllocationLib.uni7
-rw-r--r--MdePkg/Library/SmmPciExpressLib/PciExpressLib.c12
-rw-r--r--MdePkg/Library/SmmPciExpressLib/SmmPciExpressLib.inf7
-rw-r--r--MdePkg/Library/SmmPciLibPciRootBridgeIo/PciLib.c39
-rw-r--r--MdePkg/Library/SmmPciLibPciRootBridgeIo/SmmPciLibPciRootBridgeIo.inf11
-rw-r--r--MdePkg/Library/SmmPciLibPciRootBridgeIo/SmmPciLibPciRootBridgeIo.uni7
-rw-r--r--MdePkg/Library/SmmPeriodicSmiLib/SmmPeriodicSmiLib.c430
-rw-r--r--MdePkg/Library/SmmPeriodicSmiLib/SmmPeriodicSmiLib.inf15
-rw-r--r--MdePkg/Library/SmmPeriodicSmiLib/SmmPeriodicSmiLib.uni7
-rw-r--r--MdePkg/Library/SmmServicesTableLib/SmmServicesTableLib.c20
-rw-r--r--MdePkg/Library/SmmServicesTableLib/SmmServicesTableLib.inf7
-rw-r--r--MdePkg/Library/SmmServicesTableLib/SmmServicesTableLib.uni7
-rw-r--r--MdePkg/Library/StandaloneMmDriverEntryPoint/StandaloneMmDriverEntryPoint.c81
-rw-r--r--MdePkg/Library/StandaloneMmDriverEntryPoint/StandaloneMmDriverEntryPoint.inf38
-rw-r--r--MdePkg/Library/StandaloneMmDriverEntryPoint/StandaloneMmDriverEntryPoint.uni17
-rw-r--r--MdePkg/Library/StandaloneMmServicesTableLib/StandaloneMmServicesTableLib.c35
-rw-r--r--MdePkg/Library/StandaloneMmServicesTableLib/StandaloneMmServicesTableLib.inf34
-rw-r--r--MdePkg/Library/StandaloneMmServicesTableLib/StandaloneMmServicesTableLib.uni15
-rw-r--r--MdePkg/Library/UefiApplicationEntryPoint/ApplicationEntryPoint.c16
-rw-r--r--MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.inf11
-rw-r--r--MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.uni7
-rw-r--r--MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.c14
-rw-r--r--MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf15
-rw-r--r--MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.uni7
-rw-r--r--MdePkg/Library/UefiDebugLibConOut/DebugLib.c254
-rw-r--r--MdePkg/Library/UefiDebugLibConOut/DebugLibConstructor.c99
-rw-r--r--MdePkg/Library/UefiDebugLibConOut/UefiDebugLibConOut.inf19
-rw-r--r--MdePkg/Library/UefiDebugLibConOut/UefiDebugLibConOut.uni7
-rw-r--r--MdePkg/Library/UefiDebugLibDebugPortProtocol/DebugLib.c292
-rw-r--r--MdePkg/Library/UefiDebugLibDebugPortProtocol/DebugLibConstructor.c99
-rw-r--r--MdePkg/Library/UefiDebugLibDebugPortProtocol/UefiDebugLibDebugPortProtocol.inf19
-rw-r--r--MdePkg/Library/UefiDebugLibDebugPortProtocol/UefiDebugLibDebugPortProtocol.uni7
-rw-r--r--MdePkg/Library/UefiDebugLibStdErr/DebugLib.c256
-rw-r--r--MdePkg/Library/UefiDebugLibStdErr/DebugLibConstructor.c99
-rw-r--r--MdePkg/Library/UefiDebugLibStdErr/UefiDebugLibStdErr.inf19
-rw-r--r--MdePkg/Library/UefiDebugLibStdErr/UefiDebugLibStdErr.uni7
-rw-r--r--MdePkg/Library/UefiDevicePathLib/DevicePathFromText.c253
-rw-r--r--MdePkg/Library/UefiDevicePathLib/DevicePathToText.c190
-rw-r--r--MdePkg/Library/UefiDevicePathLib/DevicePathUtilities.c230
-rw-r--r--MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.c124
-rw-r--r--MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.h124
-rw-r--r--MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf13
-rw-r--r--MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.uni7
-rw-r--r--MdePkg/Library/UefiDevicePathLib/UefiDevicePathLibOptionalDevicePathProtocol.c130
-rw-r--r--MdePkg/Library/UefiDevicePathLib/UefiDevicePathLibOptionalDevicePathProtocol.inf15
-rw-r--r--MdePkg/Library/UefiDevicePathLib/UefiDevicePathLibOptionalDevicePathProtocol.uni7
-rw-r--r--MdePkg/Library/UefiDevicePathLibDevicePathProtocol/UefiDevicePathLib.c207
-rw-r--r--MdePkg/Library/UefiDevicePathLibDevicePathProtocol/UefiDevicePathLibDevicePathProtocol.inf13
-rw-r--r--MdePkg/Library/UefiDevicePathLibDevicePathProtocol/UefiDevicePathLibDevicePathProtocol.uni7
-rw-r--r--MdePkg/Library/UefiDriverEntryPoint/DriverEntryPoint.c38
-rw-r--r--MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf13
-rw-r--r--MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.uni7
-rw-r--r--MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.c113
-rw-r--r--MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf12
-rw-r--r--MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.uni8
-rw-r--r--MdePkg/Library/UefiLib/Acpi.c422
-rw-r--r--MdePkg/Library/UefiLib/Console.c56
-rw-r--r--MdePkg/Library/UefiLib/UefiDriverModel.c1010
-rw-r--r--MdePkg/Library/UefiLib/UefiLib.c676
-rw-r--r--MdePkg/Library/UefiLib/UefiLib.inf27
-rw-r--r--MdePkg/Library/UefiLib/UefiLib.uni7
-rw-r--r--MdePkg/Library/UefiLib/UefiLibInternal.h7
-rw-r--r--MdePkg/Library/UefiLib/UefiLibPrint.c173
-rw-r--r--MdePkg/Library/UefiLib/UefiNotTiano.c56
-rw-r--r--MdePkg/Library/UefiMemoryAllocationLib/MemoryAllocationLib.c112
-rw-r--r--MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf13
-rw-r--r--MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.uni7
-rw-r--r--MdePkg/Library/UefiMemoryLib/CompareMemWrapper.c14
-rw-r--r--MdePkg/Library/UefiMemoryLib/CopyMemWrapper.c14
-rw-r--r--MdePkg/Library/UefiMemoryLib/IsZeroBufferWrapper.c8
-rw-r--r--MdePkg/Library/UefiMemoryLib/MemLib.c8
-rw-r--r--MdePkg/Library/UefiMemoryLib/MemLibGeneric.c8
-rw-r--r--MdePkg/Library/UefiMemoryLib/MemLibGuid.c18
-rw-r--r--MdePkg/Library/UefiMemoryLib/MemLibInternals.h8
-rw-r--r--MdePkg/Library/UefiMemoryLib/ScanMem16Wrapper.c12
-rw-r--r--MdePkg/Library/UefiMemoryLib/ScanMem32Wrapper.c12
-rw-r--r--MdePkg/Library/UefiMemoryLib/ScanMem64Wrapper.c12
-rw-r--r--MdePkg/Library/UefiMemoryLib/ScanMem8Wrapper.c18
-rw-r--r--MdePkg/Library/UefiMemoryLib/SetMem16Wrapper.c8
-rw-r--r--MdePkg/Library/UefiMemoryLib/SetMem32Wrapper.c8
-rw-r--r--MdePkg/Library/UefiMemoryLib/SetMem64Wrapper.c8
-rw-r--r--MdePkg/Library/UefiMemoryLib/SetMemWrapper.c12
-rw-r--r--MdePkg/Library/UefiMemoryLib/UefiMemoryLib.inf13
-rw-r--r--MdePkg/Library/UefiMemoryLib/UefiMemoryLib.uni7
-rw-r--r--MdePkg/Library/UefiMemoryLib/ZeroMemWrapper.c12
-rw-r--r--MdePkg/Library/UefiPalLib/UefiPalLib.c127
-rw-r--r--MdePkg/Library/UefiPalLib/UefiPalLib.inf49
-rw-r--r--MdePkg/Library/UefiPalLib/UefiPalLib.uni22
-rw-r--r--MdePkg/Library/UefiPciLibPciRootBridgeIo/PciLib.c35
-rw-r--r--MdePkg/Library/UefiPciLibPciRootBridgeIo/UefiPciLibPciRootBridgeIo.inf13
-rw-r--r--MdePkg/Library/UefiPciLibPciRootBridgeIo/UefiPciLibPciRootBridgeIo.uni7
-rw-r--r--MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.c217
-rw-r--r--MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.h12
-rw-r--r--MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/UefiPciSegmentLibPciRootBridgeIo.inf13
-rw-r--r--MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/UefiPciSegmentLibPciRootBridgeIo.uni7
-rw-r--r--MdePkg/Library/UefiRuntimeLib/RuntimeLib.c36
-rw-r--r--MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf18
-rw-r--r--MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.uni7
-rw-r--r--MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.c8
-rw-r--r--MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf13
-rw-r--r--MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.uni7
-rw-r--r--MdePkg/Library/UefiSalLib/UefiSalLib.c139
-rw-r--r--MdePkg/Library/UefiSalLib/UefiSalLib.inf47
-rw-r--r--MdePkg/Library/UefiSalLib/UefiSalLib.uni22
-rw-r--r--MdePkg/Library/UefiScsiLib/UefiScsiLib.c283
-rw-r--r--MdePkg/Library/UefiScsiLib/UefiScsiLib.inf13
-rw-r--r--MdePkg/Library/UefiScsiLib/UefiScsiLib.uni7
-rw-r--r--MdePkg/Library/UefiUsbLib/Hid.c18
-rw-r--r--MdePkg/Library/UefiUsbLib/UefiUsbLib.inf13
-rw-r--r--MdePkg/Library/UefiUsbLib/UefiUsbLib.uni7
-rw-r--r--MdePkg/Library/UefiUsbLib/UefiUsbLibInternal.h11
-rw-r--r--MdePkg/Library/UefiUsbLib/UsbDxeLib.c15
1593 files changed, 24430 insertions, 53024 deletions
diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/ArmCache.c b/MdePkg/Library/BaseCacheMaintenanceLib/ArmCache.c
index 67a412e91fd3..f60da2b48c79 100644
--- a/MdePkg/Library/BaseCacheMaintenanceLib/ArmCache.c
+++ b/MdePkg/Library/BaseCacheMaintenanceLib/ArmCache.c
@@ -1,16 +1,10 @@
/** @file
- Cache Maintenance Functions. These functions vary by ARM architecture so the MdePkg
- versions are null functions used to make sure things will compile.
+ Cache Maintenance Functions. These functions vary by ARM architecture so the MdePkg
+ versions are null functions used to make sure things will compile.
- Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf b/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf
index 69418110f945..9475f5171a8b 100644
--- a/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf
+++ b/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf
@@ -4,15 +4,11 @@
# Cache Maintenance Library that uses Base Library services to maintain caches.
# This library assumes there are no chipset dependencies required to maintain caches.
#
-# Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+# SPDX-License-Identifier: BSD-2-Clause-Patent
#
#
##
@@ -24,11 +20,11 @@
FILE_GUID = 123dd843-57c9-4158-8418-ce68b3944ce7
MODULE_TYPE = BASE
VERSION_STRING = 1.1
- LIBRARY_CLASS = CacheMaintenanceLib
+ LIBRARY_CLASS = CacheMaintenanceLib
#
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC ARM AARCH64
+# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64
#
[Sources.IA32]
@@ -37,9 +33,6 @@
[Sources.X64]
X86Cache.c
-[Sources.IPF]
- IpfCache.c
-
[Sources.EBC]
EbcCache.c
@@ -49,6 +42,9 @@
[Sources.AARCH64]
ArmCache.c
+[Sources.RISCV64]
+ RiscVCache.c
+
[Packages]
MdePkg/MdePkg.dec
@@ -56,6 +52,3 @@
BaseLib
DebugLib
-[LibraryClasses.Ipf]
- PalLib
-
diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.uni b/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.uni
index 9df91beec3fe..99acc2263077 100644
--- a/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.uni
+++ b/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.uni
@@ -7,12 +7,7 @@
// Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
// Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php.
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+// SPDX-License-Identifier: BSD-2-Clause-Patent
//
// **/
diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/EbcCache.c b/MdePkg/Library/BaseCacheMaintenanceLib/EbcCache.c
index efbb03aa5cc6..e938bcb1a8b5 100644
--- a/MdePkg/Library/BaseCacheMaintenanceLib/EbcCache.c
+++ b/MdePkg/Library/BaseCacheMaintenanceLib/EbcCache.c
@@ -2,13 +2,7 @@
Cache Maintenance Functions.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/IpfCache.c b/MdePkg/Library/BaseCacheMaintenanceLib/RiscVCache.c
index 47153ac9a65f..402cecb9488c 100644
--- a/MdePkg/Library/BaseCacheMaintenanceLib/IpfCache.c
+++ b/MdePkg/Library/BaseCacheMaintenanceLib/RiscVCache.c
@@ -1,22 +1,34 @@
/** @file
- Cache Maintenance Functions.
+ RISC-V specific functionality for cache.
- Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include <Base.h>
-#include <Library/CacheMaintenanceLib.h>
#include <Library/BaseLib.h>
#include <Library/DebugLib.h>
-#include <Library/PalLib.h>
+
+/**
+ RISC-V invalidate instruction cache.
+
+**/
+VOID
+EFIAPI
+RiscVInvalidateInstCacheAsm (
+ VOID
+ );
+
+/**
+ RISC-V invalidate data cache.
+
+**/
+VOID
+EFIAPI
+RiscVInvalidateDataCacheAsm (
+ VOID
+ );
/**
Invalidates the entire instruction cache in cache coherency domain of the
@@ -29,7 +41,7 @@ InvalidateInstructionCache (
VOID
)
{
- PalCall (PAL_CACHE_FLUSH, PAL_CACHE_FLUSH_INSTRUCTION_ALL, PAL_CACHE_FLUSH_INVALIDATE_LINES | PAL_CACHE_FLUSH_NO_INTERRUPT, 0);
+ RiscVInvalidateInstCacheAsm ();
}
/**
@@ -60,11 +72,12 @@ InvalidateInstructionCache (
VOID *
EFIAPI
InvalidateInstructionCacheRange (
- IN VOID *Address,
- IN UINTN Length
+ IN VOID *Address,
+ IN UINTN Length
)
{
- return AsmFlushCacheRange (Address, Length);
+ DEBUG((DEBUG_ERROR, "%a:RISC-V unsupported function.\n", __FUNCTION__));
+ return Address;
}
/**
@@ -83,7 +96,7 @@ WriteBackInvalidateDataCache (
VOID
)
{
- PalCall (PAL_CACHE_FLUSH, PAL_CACHE_FLUSH_DATA_ALL, PAL_CACHE_FLUSH_INVALIDATE_LINES | PAL_CACHE_FLUSH_NO_INTERRUPT, 0);
+ DEBUG((DEBUG_ERROR, "%a:RISC-V unsupported function.\n", __FUNCTION__));
}
/**
@@ -119,14 +132,15 @@ WriteBackInvalidateDataCacheRange (
IN UINTN Length
)
{
- return AsmFlushCacheRange (Address, Length);
+ DEBUG((DEBUG_ERROR, "%a:RISC-V unsupported function.\n", __FUNCTION__));
+ return Address;
}
/**
- Writes Back the entire data cache in cache coherency domain of the calling
+ Writes back the entire data cache in cache coherency domain of the calling
CPU.
- Writes Back the entire data cache in cache coherency domain of the calling
+ Writes back the entire data cache in cache coherency domain of the calling
CPU. This function guarantees that all dirty cache lines are written back to
system memory. This function may also invalidate all the data cache lines in
the cache coherency domain of the calling CPU.
@@ -138,14 +152,14 @@ WriteBackDataCache (
VOID
)
{
- PalCall (PAL_CACHE_FLUSH, PAL_CACHE_FLUSH_DATA_ALL, PAL_CACHE_FLUSH_NO_INVALIDATE_LINES | PAL_CACHE_FLUSH_NO_INTERRUPT, 0);
+ DEBUG((DEBUG_ERROR, "%a:RISC-V unsupported function.\n", __FUNCTION__));
}
/**
- Writes Back a range of data cache lines in the cache coherency domain of the
+ Writes back a range of data cache lines in the cache coherency domain of the
calling CPU.
- Writes Back the data cache lines specified by Address and Length. If Address
+ Writes back the data cache lines specified by Address and Length. If Address
is not aligned on a cache line boundary, then entire data cache line
containing Address is written back. If Address + Length is not aligned on a
cache line boundary, then the entire data cache line containing Address +
@@ -173,7 +187,8 @@ WriteBackDataCacheRange (
IN UINTN Length
)
{
- return AsmFlushCacheRange (Address, Length);
+ DEBUG((DEBUG_ERROR, "%a:RISC-V unsupported function.\n", __FUNCTION__));
+ return Address;
}
/**
@@ -193,11 +208,7 @@ InvalidateDataCache (
VOID
)
{
- //
- // Invalidation of the entire data cache without writing back is not supported
- // on IPF architecture, so a write back and invalidate operation is performed.
- //
- WriteBackInvalidateDataCache ();
+ RiscVInvalidateDataCacheAsm ();
}
/**
@@ -234,9 +245,6 @@ InvalidateDataCacheRange (
IN UINTN Length
)
{
- //
- // Invalidation of a data cache range without writing back is not supported on
- // IPF architecture, so write back and invalidate operation is performed.
- //
- return AsmFlushCacheRange (Address, Length);
+ DEBUG((DEBUG_ERROR, "%a:RISC-V unsupported function.\n", __FUNCTION__));
+ return Address;
}
diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/X86Cache.c b/MdePkg/Library/BaseCacheMaintenanceLib/X86Cache.c
index 66b839e72489..c909f8d53b9f 100644
--- a/MdePkg/Library/BaseCacheMaintenanceLib/X86Cache.c
+++ b/MdePkg/Library/BaseCacheMaintenanceLib/X86Cache.c
@@ -1,14 +1,8 @@
/** @file
Cache Maintenance Functions.
- Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -135,7 +129,7 @@ WriteBackInvalidateDataCacheRange (
ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Address));
//
- // If the CPU does not support CLFLUSH instruction,
+ // If the CPU does not support CLFLUSH instruction,
// then promote flush range to flush entire cache.
//
AsmCpuid (0x01, NULL, &RegEbx, NULL, &RegEdx);
diff --git a/MdePkg/Library/BaseCpuLib/AArch64/CpuFlushTlb.S b/MdePkg/Library/BaseCpuLib/AArch64/CpuFlushTlb.S
index 4b9a326f608f..0280d56a8fa7 100644
--- a/MdePkg/Library/BaseCpuLib/AArch64/CpuFlushTlb.S
+++ b/MdePkg/Library/BaseCpuLib/AArch64/CpuFlushTlb.S
@@ -5,13 +5,7 @@
# Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+# SPDX-License-Identifier: BSD-2-Clause-Patent
#
#------------------------------------------------------------------------------
diff --git a/MdePkg/Library/BaseCpuLib/AArch64/CpuFlushTlb.asm b/MdePkg/Library/BaseCpuLib/AArch64/CpuFlushTlb.asm
new file mode 100644
index 000000000000..6d5fbcbb3803
--- /dev/null
+++ b/MdePkg/Library/BaseCpuLib/AArch64/CpuFlushTlb.asm
@@ -0,0 +1,33 @@
+;------------------------------------------------------------------------------
+;
+; CpuFlushTlb() for ARM
+;
+; Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+; Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+; Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+;------------------------------------------------------------------------------
+
+ EXPORT CpuFlushTlb
+ AREA BaseCpuLib_LowLevel, CODE, READONLY
+
+;/**
+; Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.
+;
+; Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.
+;
+;**/
+;VOID
+;EFIAPI
+;CpuFlushTlb (
+; VOID
+; );
+;
+CpuFlushTlb
+ tlbi vmalle1 // Invalidate Inst TLB and Data TLB
+ dsb sy
+ isb
+ ret
+
+ END
diff --git a/MdePkg/Library/BaseCpuLib/AArch64/CpuSleep.S b/MdePkg/Library/BaseCpuLib/AArch64/CpuSleep.S
index b08bdfb8f39d..4d55abde0d20 100644
--- a/MdePkg/Library/BaseCpuLib/AArch64/CpuSleep.S
+++ b/MdePkg/Library/BaseCpuLib/AArch64/CpuSleep.S
@@ -5,13 +5,7 @@
# Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
# Portions copyright (c) 2011 - 2013, ARM LTD. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+# SPDX-License-Identifier: BSD-2-Clause-Patent
#
#------------------------------------------------------------------------------
diff --git a/MdePkg/Library/BaseCpuLib/AArch64/CpuSleep.asm b/MdePkg/Library/BaseCpuLib/AArch64/CpuSleep.asm
new file mode 100644
index 000000000000..f7bbf8568a89
--- /dev/null
+++ b/MdePkg/Library/BaseCpuLib/AArch64/CpuSleep.asm
@@ -0,0 +1,34 @@
+;------------------------------------------------------------------------------
+;
+; CpuSleep() for AArch64
+;
+; Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+; Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+; Portions copyright (c) 2011 - 2013, ARM LTD. All rights reserved.<BR>
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+;------------------------------------------------------------------------------
+
+ EXPORT CpuSleep
+ AREA BaseCpuLib_LowLevel, CODE, READONLY
+
+;/**
+; Places the CPU in a sleep state until an interrupt is received.
+;
+; Places the CPU in a sleep state until an interrupt is received. If interrupts
+; are disabled prior to calling this function, then the CPU will be placed in a
+; sleep state indefinitely.
+;
+;**/
+;VOID
+;EFIAPI
+;CpuSleep (
+; VOID
+; );
+;
+
+CpuSleep
+ wfi
+ ret
+
+ END
diff --git a/MdePkg/Library/BaseCpuLib/Arm/CpuFlushTlb.S b/MdePkg/Library/BaseCpuLib/Arm/CpuFlushTlb.S
index 738f73356a3f..275c3ccee773 100644
--- a/MdePkg/Library/BaseCpuLib/Arm/CpuFlushTlb.S
+++ b/MdePkg/Library/BaseCpuLib/Arm/CpuFlushTlb.S
@@ -1,16 +1,10 @@
-#------------------------------------------------------------------------------
+#------------------------------------------------------------------------------
#
# CpuFlushTlb() for ARM
#
-# Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+# SPDX-License-Identifier: BSD-2-Clause-Patent
#
#------------------------------------------------------------------------------
diff --git a/MdePkg/Library/BaseCpuLib/Arm/CpuFlushTlb.asm b/MdePkg/Library/BaseCpuLib/Arm/CpuFlushTlb.asm
index 037d221a794d..2d996bcf03cc 100644
--- a/MdePkg/Library/BaseCpuLib/Arm/CpuFlushTlb.asm
+++ b/MdePkg/Library/BaseCpuLib/Arm/CpuFlushTlb.asm
@@ -1,16 +1,10 @@
-;------------------------------------------------------------------------------
+;------------------------------------------------------------------------------
;
; CpuFlushTlb() for ARM
;
-; Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
; Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+; SPDX-License-Identifier: BSD-2-Clause-Patent
;
;------------------------------------------------------------------------------
@@ -29,7 +23,7 @@
; VOID
; );
;
-CpuFlushTlb
+CpuFlushTlb
MOV r0,#0
MCR p15,0,r0,c8,c5,0 ;Invalidate all the unlocked entried in TLB
BX LR
diff --git a/MdePkg/Library/BaseCpuLib/Arm/CpuSleep.S b/MdePkg/Library/BaseCpuLib/Arm/CpuSleep.S
index b84c80862350..87b2d4f9b070 100644
--- a/MdePkg/Library/BaseCpuLib/Arm/CpuSleep.S
+++ b/MdePkg/Library/BaseCpuLib/Arm/CpuSleep.S
@@ -1,4 +1,4 @@
-#------------------------------------------------------------------------------
+#------------------------------------------------------------------------------
#
# CpuSleep() for ARMv7
#
@@ -8,15 +8,9 @@
#
# But this is a no-op on ARMv7
#
-# Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+# SPDX-License-Identifier: BSD-2-Clause-Patent
#
#------------------------------------------------------------------------------
diff --git a/MdePkg/Library/BaseCpuLib/Arm/CpuSleep.asm b/MdePkg/Library/BaseCpuLib/Arm/CpuSleep.asm
index 399b80f720fb..ab17fc3f03c8 100644
--- a/MdePkg/Library/BaseCpuLib/Arm/CpuSleep.asm
+++ b/MdePkg/Library/BaseCpuLib/Arm/CpuSleep.asm
@@ -1,4 +1,4 @@
-;------------------------------------------------------------------------------
+;------------------------------------------------------------------------------
;
; CpuSleep() for ARMv7
;
@@ -8,15 +8,9 @@
;
; But this is a no-op on ARMv7
;
-; Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
; Portions copyright (c) 2008 - 2011, Apple Inc. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+; SPDX-License-Identifier: BSD-2-Clause-Patent
;
;------------------------------------------------------------------------------
diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
index 7237b8ff118e..258830bf30ad 100644
--- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
+++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
@@ -1,19 +1,15 @@
## @file
# Instance of CPU Library for various architecture.
#
-# CPU Library implemented using ASM functions for IA-32 and X64,
+# CPU Library implemented using ASM functions for IA32, X64, ARM, AARCH64,
# PAL CALLs for IPF, and empty functions for EBC.
#
-# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+# SPDX-License-Identifier: BSD-2-Clause-Patent
#
#
##
@@ -25,58 +21,49 @@
FILE_GUID = 4FBD2538-249C-4b50-8F4A-A9E66609CBF6
MODULE_TYPE = BASE
VERSION_STRING = 1.0
- LIBRARY_CLASS = CpuLib
+ LIBRARY_CLASS = CpuLib
#
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC ARM AARCH64
+# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64
#
[Sources.IA32]
- Ia32/CpuSleep.c | MSFT
- Ia32/CpuFlushTlb.c | MSFT
+ Ia32/CpuSleep.c | MSFT
+ Ia32/CpuFlushTlb.c | MSFT
Ia32/CpuSleep.nasm| INTEL
- Ia32/CpuSleep.asm | INTEL
Ia32/CpuFlushTlb.nasm| INTEL
- Ia32/CpuFlushTlb.asm | INTEL
- Ia32/CpuSleepGcc.c | GCC
- Ia32/CpuFlushTlbGcc.c | GCC
+ Ia32/CpuSleepGcc.c | GCC
+ Ia32/CpuFlushTlbGcc.c | GCC
[Sources.X64]
X64/CpuFlushTlb.nasm
- X64/CpuFlushTlb.asm
X64/CpuSleep.nasm
- X64/CpuSleep.asm
- X64/CpuSleep.nasm| GCC
- X64/CpuSleep.S | GCC
- X64/CpuFlushTlb.nasm| GCC
- X64/CpuFlushTlb.S | GCC
-
-[Sources.IPF]
- Ipf/CpuFlushTlb.s
- Ipf/CpuSleep.c
[Sources.EBC]
Ebc/CpuSleepFlushTlb.c
[Sources.ARM]
Arm/CpuFlushTlb.asm | RVCT
- Arm/CpuSleep.asm | RVCT
+ Arm/CpuSleep.asm | RVCT
+ Arm/CpuFlushTlb.asm | MSFT
+ Arm/CpuSleep.asm | MSFT
Arm/CpuFlushTlb.S | GCC
- Arm/CpuSleep.S | GCC
+ Arm/CpuSleep.S | GCC
[Sources.AARCH64]
- AArch64/CpuFlushTlb.S | GCC
- AArch64/CpuSleep.S | GCC
+ AArch64/CpuFlushTlb.S | GCC
+ AArch64/CpuSleep.S | GCC
+ AArch64/CpuFlushTlb.asm | MSFT
+ AArch64/CpuSleep.asm | MSFT
+
+[Sources.RISCV64]
+ RiscV/Cpu.S
[Packages]
MdePkg/MdePkg.dec
-[LibraryClasses.IPF]
- PalLib
- BaseLib
-
diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
index 19510f427583..c9d64e952983 100644
--- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
+++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
@@ -1,24 +1,20 @@
// /** @file
// Instance of CPU Library for various architecture.
//
-// CPU Library implemented using ASM functions for IA-32 and X64,
+// CPU Library implemented using ASM functions for IA-32, X64 and RISCV64,
// PAL CALLs for IPF, and empty functions for EBC.
//
// Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
// Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
// Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
+// Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php.
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+// SPDX-License-Identifier: BSD-2-Clause-Patent
//
// **/
#string STR_MODULE_ABSTRACT #language en-US "Instance of CPU Library for various architectures"
-#string STR_MODULE_DESCRIPTION #language en-US "CPU Library implemented using ASM functions for IA-32 and X64, PAL CALLs for IPF, and empty functions for EBC."
+#string STR_MODULE_DESCRIPTION #language en-US "CPU Library implemented using ASM functions for IA-32, X64 and RISCV64, PAL CALLs for IPF, and empty functions for EBC."
diff --git a/MdePkg/Library/BaseCpuLib/Ebc/CpuSleepFlushTlb.c b/MdePkg/Library/BaseCpuLib/Ebc/CpuSleepFlushTlb.c
index 81ae029c59e4..86b20c34d1ef 100644
--- a/MdePkg/Library/BaseCpuLib/Ebc/CpuSleepFlushTlb.c
+++ b/MdePkg/Library/BaseCpuLib/Ebc/CpuSleepFlushTlb.c
@@ -2,13 +2,7 @@
Base Library CPU Functions for EBC
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include <Base.h>
diff --git a/MdePkg/Library/BaseCpuLib/Ia32/CpuFlushTlb.asm b/MdePkg/Library/BaseCpuLib/Ia32/CpuFlushTlb.asm
deleted file mode 100644
index 2b54d35a6ffc..000000000000
--- a/MdePkg/Library/BaseCpuLib/Ia32/CpuFlushTlb.asm
+++ /dev/null
@@ -1,40 +0,0 @@
-;------------------------------------------------------------------------------ ;
-; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-; Module Name:
-;
-; CpuFlushTlb.Asm
-;
-; Abstract:
-;
-; CpuFlushTlb function
-;
-; Notes:
-;
-;------------------------------------------------------------------------------
-
- .386p
- .model flat,C
- .code
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; CpuFlushTlb (
-; VOID
-; );
-;------------------------------------------------------------------------------
-CpuFlushTlb PROC
- mov eax, cr3
- mov cr3, eax ; moving to CR3 flushes TLB
- ret
-CpuFlushTlb ENDP
-
- END
diff --git a/MdePkg/Library/BaseCpuLib/Ia32/CpuFlushTlb.c b/MdePkg/Library/BaseCpuLib/Ia32/CpuFlushTlb.c
index 25b16c52f632..80759c246c6b 100644
--- a/MdePkg/Library/BaseCpuLib/Ia32/CpuFlushTlb.c
+++ b/MdePkg/Library/BaseCpuLib/Ia32/CpuFlushTlb.c
@@ -2,13 +2,7 @@
CpuFlushTlb function.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
diff --git a/MdePkg/Library/BaseCpuLib/Ia32/CpuFlushTlb.nasm b/MdePkg/Library/BaseCpuLib/Ia32/CpuFlushTlb.nasm
index aa343459f3f2..97c60ca71bce 100644
--- a/MdePkg/Library/BaseCpuLib/Ia32/CpuFlushTlb.nasm
+++ b/MdePkg/Library/BaseCpuLib/Ia32/CpuFlushTlb.nasm
@@ -1,12 +1,6 @@
;------------------------------------------------------------------------------ ;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
;
diff --git a/MdePkg/Library/BaseCpuLib/Ia32/CpuFlushTlbGcc.c b/MdePkg/Library/BaseCpuLib/Ia32/CpuFlushTlbGcc.c
index 4cff85122f9c..4513652a4401 100644
--- a/MdePkg/Library/BaseCpuLib/Ia32/CpuFlushTlbGcc.c
+++ b/MdePkg/Library/BaseCpuLib/Ia32/CpuFlushTlbGcc.c
@@ -3,13 +3,7 @@
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
diff --git a/MdePkg/Library/BaseCpuLib/Ia32/CpuSleep.asm b/MdePkg/Library/BaseCpuLib/Ia32/CpuSleep.asm
deleted file mode 100644
index 592d36d377e4..000000000000
--- a/MdePkg/Library/BaseCpuLib/Ia32/CpuSleep.asm
+++ /dev/null
@@ -1,39 +0,0 @@
-;------------------------------------------------------------------------------ ;
-; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-; Module Name:
-;
-; CpuSleep.Asm
-;
-; Abstract:
-;
-; CpuSleep function
-;
-; Notes:
-;
-;------------------------------------------------------------------------------
-
- .386
- .model flat,C
- .code
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; CpuSleep (
-; VOID
-; );
-;------------------------------------------------------------------------------
-CpuSleep PROC
- hlt
- ret
-CpuSleep ENDP
-
- END
diff --git a/MdePkg/Library/BaseCpuLib/Ia32/CpuSleep.c b/MdePkg/Library/BaseCpuLib/Ia32/CpuSleep.c
index 40b0453967d6..e629b59f1ba3 100644
--- a/MdePkg/Library/BaseCpuLib/Ia32/CpuSleep.c
+++ b/MdePkg/Library/BaseCpuLib/Ia32/CpuSleep.c
@@ -2,13 +2,7 @@
CpuSleep function.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
diff --git a/MdePkg/Library/BaseCpuLib/Ia32/CpuSleep.nasm b/MdePkg/Library/BaseCpuLib/Ia32/CpuSleep.nasm
index c808f9630170..5543f0796e50 100644
--- a/MdePkg/Library/BaseCpuLib/Ia32/CpuSleep.nasm
+++ b/MdePkg/Library/BaseCpuLib/Ia32/CpuSleep.nasm
@@ -1,12 +1,6 @@
;------------------------------------------------------------------------------ ;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
;
diff --git a/MdePkg/Library/BaseCpuLib/Ia32/CpuSleepGcc.c b/MdePkg/Library/BaseCpuLib/Ia32/CpuSleepGcc.c
index b61a61fcc9ae..f520801580ff 100644
--- a/MdePkg/Library/BaseCpuLib/Ia32/CpuSleepGcc.c
+++ b/MdePkg/Library/BaseCpuLib/Ia32/CpuSleepGcc.c
@@ -3,13 +3,7 @@
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
diff --git a/MdePkg/Library/BaseCpuLib/Ipf/CpuFlushTlb.s b/MdePkg/Library/BaseCpuLib/Ipf/CpuFlushTlb.s
deleted file mode 100644
index e0d40163181e..000000000000
--- a/MdePkg/Library/BaseCpuLib/Ipf/CpuFlushTlb.s
+++ /dev/null
@@ -1,58 +0,0 @@
-/// @file
-/// CpuFlushTlb() function for Itanium-based architecture.
-///
-/// Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
-/// This program and the accompanying materials
-/// are licensed and made available under the terms and conditions of the BSD License
-/// which accompanies this distribution. The full text of the license may be found at
-/// http://opensource.org/licenses/bsd-license.php.
-///
-/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-///
-/// Module Name: CpuFlushTlb.s
-///
-///
-
-.auto
-.text
-
-ASM_GLOBAL PalCall
-.type PalCall, @function
-
-.proc CpuFlushTlb
-.type CpuFlushTlb, @function
-CpuFlushTlb::
- alloc loc0 = ar.pfs, 0, 3, 5, 0
- mov out0 = 0
- mov out1 = 6
- mov out2 = 0
- mov out3 = 0
- mov loc1 = b0
- mov out4 = 0
- brl.call.sptk b0 = PalCall
- mov loc2 = psr // save PSR
- mov ar.pfs = loc0
- extr.u r14 = r10, 32, 32 // r14 <- count1
- rsm 1 << 14 // Disable interrupts
- extr.u r15 = r11, 32, 32 // r15 <- stride1
- extr.u r10 = r10, 0, 32 // r10 <- count2
- add r10 = -1, r10
- extr.u r11 = r11, 0, 32 // r11 <- stride2
- br.cond.sptk LoopPredicate
-LoopOuter:
- mov ar.lc = r10 // LC <- count2
- mov ar.ec = r0 // EC <- 0
-Loop:
- ptc.e r9
- add r9 = r11, r9 // r9 += stride2
- br.ctop.sptk Loop
- add r9 = r15, r9 // r9 += stride1
-LoopPredicate:
- cmp.ne p6 = r0, r14 // count1 == 0?
- add r14 = -1, r14
-(p6) br.cond.sptk LoopOuter
- mov psr.l = loc2
- mov b0 = loc1
- br.ret.sptk.many b0
-.endp
diff --git a/MdePkg/Library/BaseCpuLib/Ipf/CpuSleep.c b/MdePkg/Library/BaseCpuLib/Ipf/CpuSleep.c
deleted file mode 100644
index 86d2c184772b..000000000000
--- a/MdePkg/Library/BaseCpuLib/Ipf/CpuSleep.c
+++ /dev/null
@@ -1,66 +0,0 @@
-/** @file
- Base Library CPU functions for Itanium
-
- Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Library/PalLib.h>
-#include <Library/BaseLib.h>
-
-/**
- Places the CPU in a sleep state until an interrupt is received.
-
- Places the CPU in a sleep state until an interrupt is received. If interrupts
- are disabled prior to calling this function, then the CPU will be placed in a
- sleep state indefinitely.
-
-**/
-VOID
-EFIAPI
-CpuSleep (
- VOID
- )
-{
- UINT64 Tpr;
-
- //
- // It is the TPR register that controls if external interrupt would bring processor in LIGHT HALT low-power state
- // back to normal state. PAL_HALT_LIGHT does not depend on PSR setting.
- // So here if interrupts are disabled (via PSR.i), TRP.mmi needs to be set to prevent processor being interrupted by external interrupts.
- // If interrupts are enabled, then just use current TRP setting.
- //
- if (GetInterruptState ()) {
- //
- // If interrupts are enabled, then call PAL_HALT_LIGHT with the current TPR setting.
- //
- PalCall (PAL_HALT_LIGHT, 0, 0, 0);
- } else {
- //
- // If interrupts are disabled on entry, then mask all interrupts in TPR before calling PAL_HALT_LIGHT.
- //
-
- //
- // Save TPR
- //
- Tpr = AsmReadTpr();
- //
- // Set TPR.mmi to mask all external interrupts
- //
- AsmWriteTpr (BIT16 | Tpr);
-
- PalCall (PAL_HALT_LIGHT, 0, 0, 0);
-
- //
- // Restore TPR
- //
- AsmWriteTpr (Tpr);
- }
-}
diff --git a/MdePkg/Library/BaseCpuLib/RiscV/Cpu.S b/MdePkg/Library/BaseCpuLib/RiscV/Cpu.S
new file mode 100644
index 000000000000..528fd3ad6f56
--- /dev/null
+++ b/MdePkg/Library/BaseCpuLib/RiscV/Cpu.S
@@ -0,0 +1,19 @@
+//------------------------------------------------------------------------------
+//
+// CpuSleep for RISC-V
+//
+// Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//------------------------------------------------------------------------------
+.data
+.align 3
+.section .text
+
+.global ASM_PFX(_CpuSleep)
+
+ASM_PFX(_CpuSleep):
+ wfi
+ ret
+
+
diff --git a/MdePkg/Library/BaseCpuLib/X64/CpuFlushTlb.S b/MdePkg/Library/BaseCpuLib/X64/CpuFlushTlb.S
deleted file mode 100644
index 7820f5a0e334..000000000000
--- a/MdePkg/Library/BaseCpuLib/X64/CpuFlushTlb.S
+++ /dev/null
@@ -1,35 +0,0 @@
-#------------------------------------------------------------------------------
-# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-# CpuFlushTlb.Asm
-#
-# Abstract:
-#
-# CpuFlushTlb function
-#
-# Notes:
-#
-#------------------------------------------------------------------------------
-
-ASM_GLOBAL ASM_PFX(CpuFlushTlb)
-
-#------------------------------------------------------------------------------
-# VOID
-# EFIAPI
-# CpuFlushTlb (
-# VOID
-# );
-#------------------------------------------------------------------------------
-ASM_PFX(CpuFlushTlb):
- mov %cr3, %rax
- mov %rax, %cr3
- ret
diff --git a/MdePkg/Library/BaseCpuLib/X64/CpuFlushTlb.asm b/MdePkg/Library/BaseCpuLib/X64/CpuFlushTlb.asm
deleted file mode 100644
index 9df888210381..000000000000
--- a/MdePkg/Library/BaseCpuLib/X64/CpuFlushTlb.asm
+++ /dev/null
@@ -1,38 +0,0 @@
-;------------------------------------------------------------------------------ ;
-; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-; Module Name:
-;
-; CpuFlushTlb.Asm
-;
-; Abstract:
-;
-; CpuFlushTlb function
-;
-; Notes:
-;
-;------------------------------------------------------------------------------
-
- .code
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; CpuFlushTlb (
-; VOID
-; );
-;------------------------------------------------------------------------------
-CpuFlushTlb PROC
- mov rax, cr3
- mov cr3, rax
- ret
-CpuFlushTlb ENDP
-
- END
diff --git a/MdePkg/Library/BaseCpuLib/X64/CpuFlushTlb.nasm b/MdePkg/Library/BaseCpuLib/X64/CpuFlushTlb.nasm
index cdcbbca4ddb1..3143d0e0b4dc 100644
--- a/MdePkg/Library/BaseCpuLib/X64/CpuFlushTlb.nasm
+++ b/MdePkg/Library/BaseCpuLib/X64/CpuFlushTlb.nasm
@@ -1,12 +1,6 @@
;------------------------------------------------------------------------------ ;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
;
diff --git a/MdePkg/Library/BaseCpuLib/X64/CpuSleep.S b/MdePkg/Library/BaseCpuLib/X64/CpuSleep.S
deleted file mode 100644
index 44d58e912cc5..000000000000
--- a/MdePkg/Library/BaseCpuLib/X64/CpuSleep.S
+++ /dev/null
@@ -1,34 +0,0 @@
-#------------------------------------------------------------------------------ ;
-# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-# CpuSleep.S
-#
-# Abstract:
-#
-# CpuSleep function
-#
-# Notes:
-#
-#------------------------------------------------------------------------------
-
-
-#------------------------------------------------------------------------------
-# VOID
-# EFIAPI
-# CpuSleep (
-# VOID
-# );
-#------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(CpuSleep)
-ASM_PFX(CpuSleep):
- hlt
- ret
diff --git a/MdePkg/Library/BaseCpuLib/X64/CpuSleep.asm b/MdePkg/Library/BaseCpuLib/X64/CpuSleep.asm
deleted file mode 100644
index a0448b776641..000000000000
--- a/MdePkg/Library/BaseCpuLib/X64/CpuSleep.asm
+++ /dev/null
@@ -1,37 +0,0 @@
-;------------------------------------------------------------------------------ ;
-; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-; Module Name:
-;
-; CpuSleep.Asm
-;
-; Abstract:
-;
-; CpuSleep function
-;
-; Notes:
-;
-;------------------------------------------------------------------------------
-
- .code
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; CpuSleep (
-; VOID
-; );
-;------------------------------------------------------------------------------
-CpuSleep PROC
- hlt
- ret
-CpuSleep ENDP
-
- END
diff --git a/MdePkg/Library/BaseCpuLib/X64/CpuSleep.nasm b/MdePkg/Library/BaseCpuLib/X64/CpuSleep.nasm
index 0deed7f224e1..913f89ea8638 100644
--- a/MdePkg/Library/BaseCpuLib/X64/CpuSleep.nasm
+++ b/MdePkg/Library/BaseCpuLib/X64/CpuSleep.nasm
@@ -1,12 +1,6 @@
;------------------------------------------------------------------------------ ;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
;
diff --git a/MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf b/MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
index 5bb0a7808652..05b4c811af90 100644
--- a/MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+++ b/MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
@@ -1,14 +1,9 @@
## @file
# Debug Library with empty functions.
#
-# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+# SPDX-License-Identifier: BSD-2-Clause-Patent
#
#
##
@@ -20,11 +15,11 @@
FILE_GUID = 9ba1d976-0624-41a3-8650-28165e8d9ae8
MODULE_TYPE = BASE
VERSION_STRING = 1.0
- LIBRARY_CLASS = DebugLib
+ LIBRARY_CLASS = DebugLib
#
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC
+# VALID_ARCHITECTURES = IA32 X64 EBC
#
[Sources]
diff --git a/MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.uni b/MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.uni
index 3cf6a75b3161..4a4df20e4ae8 100644
--- a/MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.uni
+++ b/MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.uni
@@ -5,12 +5,7 @@
//
// Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php.
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+// SPDX-License-Identifier: BSD-2-Clause-Patent
//
// **/
diff --git a/MdePkg/Library/BaseDebugLibNull/DebugLib.c b/MdePkg/Library/BaseDebugLibNull/DebugLib.c
index f3fa4aa84fc4..f6b8faf56917 100644
--- a/MdePkg/Library/BaseDebugLibNull/DebugLib.c
+++ b/MdePkg/Library/BaseDebugLibNull/DebugLib.c
@@ -1,14 +1,8 @@
/** @file
Null Base Debug Library instance with empty functions.
- Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -18,15 +12,15 @@
/**
Prints a debug message to the debug output device if the specified error level is enabled.
- If any bit in ErrorLevel is also set in DebugPrintErrorLevelLib function
- GetDebugPrintErrorLevel (), then print the message specified by Format and the
+ If any bit in ErrorLevel is also set in DebugPrintErrorLevelLib function
+ GetDebugPrintErrorLevel (), then print the message specified by Format and the
associated variable argument list to the debug output device.
If Format is NULL, then ASSERT().
@param ErrorLevel The error level of the debug message.
@param Format Format string for the debug message to print.
- @param ... Variable argument list whose contents are accessed
+ @param ... Variable argument list whose contents are accessed
based on the format string specified by Format.
**/
@@ -42,14 +36,68 @@ DebugPrint (
/**
- Prints an assert message containing a filename, line number, and description.
+ Prints a debug message to the debug output device if the specified
+ error level is enabled.
+
+ If any bit in ErrorLevel is also set in DebugPrintErrorLevelLib function
+ GetDebugPrintErrorLevel (), then print the message specified by Format and
+ the associated variable argument list to the debug output device.
+
+ If Format is NULL, then ASSERT().
+
+ @param ErrorLevel The error level of the debug message.
+ @param Format Format string for the debug message to print.
+ @param VaListMarker VA_LIST marker for the variable argument list.
+
+**/
+VOID
+EFIAPI
+DebugVPrint (
+ IN UINTN ErrorLevel,
+ IN CONST CHAR8 *Format,
+ IN VA_LIST VaListMarker
+ )
+{
+}
+
+
+/**
+ Prints a debug message to the debug output device if the specified
+ error level is enabled.
+ This function use BASE_LIST which would provide a more compatible
+ service than VA_LIST.
+
+ If any bit in ErrorLevel is also set in DebugPrintErrorLevelLib function
+ GetDebugPrintErrorLevel (), then print the message specified by Format and
+ the associated variable argument list to the debug output device.
+
+ If Format is NULL, then ASSERT().
+
+ @param ErrorLevel The error level of the debug message.
+ @param Format Format string for the debug message to print.
+ @param BaseListMarker BASE_LIST marker for the variable argument list.
+
+**/
+VOID
+EFIAPI
+DebugBPrint (
+ IN UINTN ErrorLevel,
+ IN CONST CHAR8 *Format,
+ IN BASE_LIST BaseListMarker
+ )
+{
+}
+
+
+/**
+ Prints an assert message containing a filename, line number, and description.
This may be followed by a breakpoint or a dead loop.
Print a message of the form "ASSERT <FileName>(<LineNumber>): <Description>\n"
- to the debug output device. If DEBUG_PROPERTY_ASSERT_BREAKPOINT_ENABLED bit of
- PcdDebugProperyMask is set then CpuBreakpoint() is called. Otherwise, if
- DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED bit of PcdDebugProperyMask is set then
- CpuDeadLoop() is called. If neither of these bits are set, then this function
+ to the debug output device. If DEBUG_PROPERTY_ASSERT_BREAKPOINT_ENABLED bit of
+ PcdDebugProperyMask is set then CpuBreakpoint() is called. Otherwise, if
+ DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED bit of PcdDebugProperyMask is set then
+ CpuDeadLoop() is called. If neither of these bits are set, then this function
returns immediately after the message is printed to the debug output device.
DebugAssert() must actively prevent recursion. If DebugAssert() is called while
processing another DebugAssert(), then DebugAssert() must return immediately.
@@ -76,14 +124,14 @@ DebugAssert (
/**
Fills a target buffer with PcdDebugClearMemoryValue, and returns the target buffer.
- This function fills Length bytes of Buffer with the value specified by
+ This function fills Length bytes of Buffer with the value specified by
PcdDebugClearMemoryValue, and returns Buffer.
If Buffer is NULL, then ASSERT().
- If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
@param Buffer The pointer to the target buffer to be filled with PcdDebugClearMemoryValue.
- @param Length The number of bytes in Buffer to fill with zeros PcdDebugClearMemoryValue.
+ @param Length The number of bytes in Buffer to fill with zeros PcdDebugClearMemoryValue.
@return Buffer The pointer to the target buffer filled with PcdDebugClearMemoryValue.
@@ -102,7 +150,7 @@ DebugClearMemory (
/**
Returns TRUE if ASSERT() macros are enabled.
- This function returns TRUE if the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of
PcdDebugProperyMask is set. Otherwise FALSE is returned.
@retval TRUE The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is set.
@@ -119,10 +167,10 @@ DebugAssertEnabled (
}
-/**
+/**
Returns TRUE if DEBUG() macros are enabled.
- This function returns TRUE if the DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of
PcdDebugProperyMask is set. Otherwise FALSE is returned.
@retval TRUE The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugProperyMask is set.
@@ -139,10 +187,10 @@ DebugPrintEnabled (
}
-/**
+/**
Returns TRUE if DEBUG_CODE() macros are enabled.
- This function returns TRUE if the DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of
PcdDebugProperyMask is set. Otherwise FALSE is returned.
@retval TRUE The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugProperyMask is set.
@@ -159,10 +207,10 @@ DebugCodeEnabled (
}
-/**
+/**
Returns TRUE if DEBUG_CLEAR_MEMORY() macro is enabled.
- This function returns TRUE if the DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED bit of
+ This function returns TRUE if the DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED bit of
PcdDebugProperyMask is set. Otherwise FALSE is returned.
@retval TRUE The DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED bit of PcdDebugProperyMask is set.
diff --git a/MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf b/MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
index 7d588a0da870..5f4649ba000b 100644
--- a/MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+++ b/MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
@@ -2,14 +2,9 @@
# Instance of Debug Library based on Serial Port Library.
# It uses Print Library to produce formatted output strings to seiral port device.
#
-# Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+# SPDX-License-Identifier: BSD-2-Clause-Patent
#
#
##
@@ -21,11 +16,11 @@
FILE_GUID = BB83F95F-EDBC-4884-A520-CD42AF388FAE
MODULE_TYPE = BASE
VERSION_STRING = 1.0
- LIBRARY_CLASS = DebugLib
+ LIBRARY_CLASS = DebugLib
CONSTRUCTOR = BaseDebugLibSerialPortConstructor
#
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC
+# VALID_ARCHITECTURES = IA32 X64 EBC
#
[Sources]
diff --git a/MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.uni b/MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.uni
index 4b902078ca2f..7f36e2e89fa4 100644
--- a/MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.uni
+++ b/MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.uni
@@ -5,12 +5,7 @@
//
// Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php.
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+// SPDX-License-Identifier: BSD-2-Clause-Patent
//
// **/
diff --git a/MdePkg/Library/BaseDebugLibSerialPort/DebugLib.c b/MdePkg/Library/BaseDebugLibSerialPort/DebugLib.c
index 1bef983c908d..a4fe34d41f8e 100644
--- a/MdePkg/Library/BaseDebugLibSerialPort/DebugLib.c
+++ b/MdePkg/Library/BaseDebugLibSerialPort/DebugLib.c
@@ -1,20 +1,14 @@
/** @file
Base Debug library instance base on Serial Port library.
It uses PrintLib to send debug messages to serial port device.
-
- NOTE: If the Serial Port library enables hardware flow control, then a call
- to DebugPrint() or DebugAssert() may hang if writes to the serial port are
- being blocked. This may occur if a key(s) are pressed in a terminal emulator
- used to monitor the DEBUG() and ASSERT() messages.
- Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
+ NOTE: If the Serial Port library enables hardware flow control, then a call
+ to DebugPrint() or DebugAssert() may hang if writes to the serial port are
+ being blocked. This may occur if a key(s) are pressed in a terminal emulator
+ used to monitor the DEBUG() and ASSERT() messages.
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -28,10 +22,16 @@
#include <Library/DebugPrintErrorLevelLib.h>
//
-// Define the maximum debug and assert message length that this library supports
+// Define the maximum debug and assert message length that this library supports
//
#define MAX_DEBUG_MESSAGE_LENGTH 0x100
+//
+// VA_LIST can not initialize to NULL for all compiler, so we use this to
+// indicate a null VA_LIST
+//
+VA_LIST mVaListNull;
+
/**
The constructor function initialize the Serial Port Library
@@ -50,15 +50,15 @@ BaseDebugLibSerialPortConstructor (
/**
Prints a debug message to the debug output device if the specified error level is enabled.
- If any bit in ErrorLevel is also set in DebugPrintErrorLevelLib function
- GetDebugPrintErrorLevel (), then print the message specified by Format and the
+ If any bit in ErrorLevel is also set in DebugPrintErrorLevelLib function
+ GetDebugPrintErrorLevel (), then print the message specified by Format and the
associated variable argument list to the debug output device.
If Format is NULL, then ASSERT().
@param ErrorLevel The error level of the debug message.
@param Format Format string for the debug message to print.
- @param ... Variable argument list whose contents are accessed
+ @param ... Variable argument list whose contents are accessed
based on the format string specified by Format.
**/
@@ -70,9 +70,41 @@ DebugPrint (
...
)
{
- CHAR8 Buffer[MAX_DEBUG_MESSAGE_LENGTH];
VA_LIST Marker;
+ VA_START (Marker, Format);
+ DebugVPrint (ErrorLevel, Format, Marker);
+ VA_END (Marker);
+}
+
+
+/**
+ Prints a debug message to the debug output device if the specified
+ error level is enabled base on Null-terminated format string and a
+ VA_LIST argument list or a BASE_LIST argument list.
+
+ If any bit in ErrorLevel is also set in DebugPrintErrorLevelLib function
+ GetDebugPrintErrorLevel (), then print the message specified by Format and
+ the associated variable argument list to the debug output device.
+
+ If Format is NULL, then ASSERT().
+
+ @param ErrorLevel The error level of the debug message.
+ @param Format Format string for the debug message to print.
+ @param VaListMarker VA_LIST marker for the variable argument list.
+ @param BaseListMarker BASE_LIST marker for the variable argument list.
+
+**/
+VOID
+DebugPrintMarker (
+ IN UINTN ErrorLevel,
+ IN CONST CHAR8 *Format,
+ IN VA_LIST VaListMarker,
+ IN BASE_LIST BaseListMarker
+ )
+{
+ CHAR8 Buffer[MAX_DEBUG_MESSAGE_LENGTH];
+
//
// If Format is NULL, then ASSERT().
//
@@ -88,26 +120,84 @@ DebugPrint (
//
// Convert the DEBUG() message to an ASCII String
//
- VA_START (Marker, Format);
- AsciiVSPrint (Buffer, sizeof (Buffer), Format, Marker);
- VA_END (Marker);
+ if (BaseListMarker == NULL) {
+ AsciiVSPrint (Buffer, sizeof (Buffer), Format, VaListMarker);
+ } else {
+ AsciiBSPrint (Buffer, sizeof (Buffer), Format, BaseListMarker);
+ }
//
- // Send the print string to a Serial Port
+ // Send the print string to a Serial Port
//
SerialPortWrite ((UINT8 *)Buffer, AsciiStrLen (Buffer));
}
/**
- Prints an assert message containing a filename, line number, and description.
+ Prints a debug message to the debug output device if the specified
+ error level is enabled.
+
+ If any bit in ErrorLevel is also set in DebugPrintErrorLevelLib function
+ GetDebugPrintErrorLevel (), then print the message specified by Format and
+ the associated variable argument list to the debug output device.
+
+ If Format is NULL, then ASSERT().
+
+ @param ErrorLevel The error level of the debug message.
+ @param Format Format string for the debug message to print.
+ @param VaListMarker VA_LIST marker for the variable argument list.
+
+**/
+VOID
+EFIAPI
+DebugVPrint (
+ IN UINTN ErrorLevel,
+ IN CONST CHAR8 *Format,
+ IN VA_LIST VaListMarker
+ )
+{
+ DebugPrintMarker (ErrorLevel, Format, VaListMarker, NULL);
+}
+
+
+/**
+ Prints a debug message to the debug output device if the specified
+ error level is enabled.
+ This function use BASE_LIST which would provide a more compatible
+ service than VA_LIST.
+
+ If any bit in ErrorLevel is also set in DebugPrintErrorLevelLib function
+ GetDebugPrintErrorLevel (), then print the message specified by Format and
+ the associated variable argument list to the debug output device.
+
+ If Format is NULL, then ASSERT().
+
+ @param ErrorLevel The error level of the debug message.
+ @param Format Format string for the debug message to print.
+ @param BaseListMarker BASE_LIST marker for the variable argument list.
+
+**/
+VOID
+EFIAPI
+DebugBPrint (
+ IN UINTN ErrorLevel,
+ IN CONST CHAR8 *Format,
+ IN BASE_LIST BaseListMarker
+ )
+{
+ DebugPrintMarker (ErrorLevel, Format, mVaListNull, BaseListMarker);
+}
+
+
+/**
+ Prints an assert message containing a filename, line number, and description.
This may be followed by a breakpoint or a dead loop.
Print a message of the form "ASSERT <FileName>(<LineNumber>): <Description>\n"
- to the debug output device. If DEBUG_PROPERTY_ASSERT_BREAKPOINT_ENABLED bit of
- PcdDebugProperyMask is set then CpuBreakpoint() is called. Otherwise, if
- DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED bit of PcdDebugProperyMask is set then
- CpuDeadLoop() is called. If neither of these bits are set, then this function
+ to the debug output device. If DEBUG_PROPERTY_ASSERT_BREAKPOINT_ENABLED bit of
+ PcdDebugProperyMask is set then CpuBreakpoint() is called. Otherwise, if
+ DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED bit of PcdDebugProperyMask is set then
+ CpuDeadLoop() is called. If neither of these bits are set, then this function
returns immediately after the message is printed to the debug output device.
DebugAssert() must actively prevent recursion. If DebugAssert() is called while
processing another DebugAssert(), then DebugAssert() must return immediately.
@@ -154,14 +244,14 @@ DebugAssert (
/**
Fills a target buffer with PcdDebugClearMemoryValue, and returns the target buffer.
- This function fills Length bytes of Buffer with the value specified by
+ This function fills Length bytes of Buffer with the value specified by
PcdDebugClearMemoryValue, and returns Buffer.
If Buffer is NULL, then ASSERT().
- If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
@param Buffer The pointer to the target buffer to be filled with PcdDebugClearMemoryValue.
- @param Length The number of bytes in Buffer to fill with zeros PcdDebugClearMemoryValue.
+ @param Length The number of bytes in Buffer to fill with zeros PcdDebugClearMemoryValue.
@return Buffer The pointer to the target buffer filled with PcdDebugClearMemoryValue.
@@ -188,7 +278,7 @@ DebugClearMemory (
/**
Returns TRUE if ASSERT() macros are enabled.
- This function returns TRUE if the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of
PcdDebugProperyMask is set. Otherwise FALSE is returned.
@retval TRUE The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is set.
@@ -205,10 +295,10 @@ DebugAssertEnabled (
}
-/**
+/**
Returns TRUE if DEBUG() macros are enabled.
- This function returns TRUE if the DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of
PcdDebugProperyMask is set. Otherwise FALSE is returned.
@retval TRUE The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugProperyMask is set.
@@ -225,10 +315,10 @@ DebugPrintEnabled (
}
-/**
+/**
Returns TRUE if DEBUG_CODE() macros are enabled.
- This function returns TRUE if the DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of
PcdDebugProperyMask is set. Otherwise FALSE is returned.
@retval TRUE The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugProperyMask is set.
@@ -245,10 +335,10 @@ DebugCodeEnabled (
}
-/**
+/**
Returns TRUE if DEBUG_CLEAR_MEMORY() macro is enabled.
- This function returns TRUE if the DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED bit of
+ This function returns TRUE if the DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED bit of
PcdDebugProperyMask is set. Otherwise FALSE is returned.
@retval TRUE The DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED bit of PcdDebugProperyMask is set.
diff --git a/MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.c b/MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.c
index 3e159e5caf4f..860191ae6809 100644
--- a/MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.c
+++ b/MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.c
@@ -1,16 +1,10 @@
/** @file
- Debug Print Error Level library instance that retrieves the current error
- level from PcdDebugPrintErrorLevel. This generic library instance does not
+ Debug Print Error Level library instance that retrieves the current error
+ level from PcdDebugPrintErrorLevel. This generic library instance does not
support the setting of the global debug print error level mask for the platform.
- Copyright (c) 2011, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -38,9 +32,9 @@ GetDebugPrintErrorLevel (
/**
Sets the global debug print error level mask fpr the entire platform.
-
+
@param ErrorLevel Global debug print error level.
-
+
@retval TRUE The debug print error level mask was sucessfully set.
@retval FALSE The debug print error level mask could not be set.
diff --git a/MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf b/MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf
index f92edc20ee8a..88c9af6a4acd 100644
--- a/MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf
+++ b/MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf
@@ -1,15 +1,10 @@
## @file
# Debug Print Error Level library instance based on PcdDebugPrintErrorLevel.
-# It retrieves the current error level from PcdDebugPrintErrorLevel.
+# It retrieves the current error level from PcdDebugPrintErrorLevel.
#
-# Copyright (c) 2011 - 2014, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -23,7 +18,7 @@
LIBRARY_CLASS = DebugPrintErrorLevelLib
#
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC
+# VALID_ARCHITECTURES = IA32 X64 EBC
#
[Sources]
@@ -34,7 +29,7 @@
[LibraryClasses]
PcdLib
-
+
[Pcd]
gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel ## CONSUMES
diff --git a/MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.uni b/MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.uni
index 2b306d377f47..7f04fc35a287 100644
--- a/MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.uni
+++ b/MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.uni
@@ -5,12 +5,7 @@
//
// Copyright (c) 2011 - 2014, Intel Corporation. All rights reserved.<BR>
//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php.
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+// SPDX-License-Identifier: BSD-2-Clause-Patent
//
// **/
diff --git a/MdePkg/Library/BaseExtractGuidedSectionLib/BaseExtractGuidedSectionLib.c b/MdePkg/Library/BaseExtractGuidedSectionLib/BaseExtractGuidedSectionLib.c
index ddd464532046..70c1412f0a50 100644
--- a/MdePkg/Library/BaseExtractGuidedSectionLib/BaseExtractGuidedSectionLib.c
+++ b/MdePkg/Library/BaseExtractGuidedSectionLib/BaseExtractGuidedSectionLib.c
@@ -1,14 +1,8 @@
/** @file
Provide generic extract guided section functions.
- Copyright (c) 2007 - 2011, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -30,8 +24,8 @@ typedef struct {
} EXTRACT_GUIDED_SECTION_HANDLER_INFO;
/**
- HandlerInfo table address is set by PcdGuidedExtractHandlerTableAddress, which is used to store
- the registered guid and Handler list. When it is initialized, it will be directly returned.
+ HandlerInfo table address is set by PcdGuidedExtractHandlerTableAddress, which is used to store
+ the registered guid and Handler list. When it is initialized, it will be directly returned.
Or, HandlerInfo table will be initialized in this function.
@param[in, out] InfoPointer The pointer to the handler information structure.
@@ -45,7 +39,7 @@ GetExtractGuidedSectionHandlerInfo (
)
{
EXTRACT_GUIDED_SECTION_HANDLER_INFO *HandlerInfo;
-
+
//
// Set the available memory address to handler info.
//
@@ -84,12 +78,12 @@ GetExtractGuidedSectionHandlerInfo (
HandlerInfo->NumberOfExtractHandler = 0;
HandlerInfo->ExtractHandlerGuidTable = (GUID *) (HandlerInfo + 1);
HandlerInfo->ExtractDecodeHandlerTable = (EXTRACT_GUIDED_SECTION_DECODE_HANDLER *) (
- (UINT8 *)HandlerInfo->ExtractHandlerGuidTable +
+ (UINT8 *)HandlerInfo->ExtractHandlerGuidTable +
PcdGet32 (PcdMaximumGuidedExtractHandler) * sizeof (GUID)
);
HandlerInfo->ExtractGetInfoHandlerTable = (EXTRACT_GUIDED_SECTION_GET_INFO_HANDLER *) (
- (UINT8 *)HandlerInfo->ExtractDecodeHandlerTable +
- PcdGet32 (PcdMaximumGuidedExtractHandler) *
+ (UINT8 *)HandlerInfo->ExtractDecodeHandlerTable +
+ PcdGet32 (PcdMaximumGuidedExtractHandler) *
sizeof (EXTRACT_GUIDED_SECTION_DECODE_HANDLER)
);
*InfoPointer = HandlerInfo;
@@ -101,7 +95,7 @@ GetExtractGuidedSectionHandlerInfo (
Sets ExtractHandlerGuidTable so it points at a callee allocated array of registered GUIDs.
The total number of GUIDs in the array are returned. Since the array of GUIDs is callee allocated
- and caller must treat this array of GUIDs as read-only data.
+ and caller must treat this array of GUIDs as read-only data.
If ExtractHandlerGuidTable is NULL, then ASSERT().
@param[out] ExtractHandlerGuidTable A pointer to the array of GUIDs that have been registered through
@@ -145,7 +139,7 @@ ExtractGuidedSectionGetGuidList (
Registers the handlers specified by GetInfoHandler and DecodeHandler with the GUID specified by SectionGuid.
If the GUID value specified by SectionGuid has already been registered, then return RETURN_ALREADY_STARTED.
If there are not enough resources available to register the handlers then RETURN_OUT_OF_RESOURCES is returned.
-
+
If SectionGuid is NULL, then ASSERT().
If GetInfoHandler is NULL, then ASSERT().
If DecodeHandler is NULL, then ASSERT().
@@ -156,7 +150,7 @@ ExtractGuidedSectionGetGuidList (
size of the decoded buffer and the size of an optional scratch buffer
required to actually decode the data in a GUIDed section.
@param[in] DecodeHandler The pointer to a function that decodes a GUIDed section into a caller
- allocated output buffer.
+ allocated output buffer.
@retval RETURN_SUCCESS The handlers were registered.
@retval RETURN_OUT_OF_RESOURCES There are not enough resources available to register the handlers.
@@ -210,7 +204,7 @@ ExtractGuidedSectionRegisterHandlers (
if (HandlerInfo->NumberOfExtractHandler >= PcdGet32 (PcdMaximumGuidedExtractHandler)) {
return RETURN_OUT_OF_RESOURCES;
}
-
+
//
// Register new Handler and guid value.
//
@@ -227,14 +221,14 @@ ExtractGuidedSectionRegisterHandlers (
The selected handler is used to retrieve and return the size of the decoded buffer and the size of an
optional scratch buffer required to actually decode the data in a GUIDed section.
- Examines a GUIDed section specified by InputSection.
+ Examines a GUIDed section specified by InputSection.
If GUID for InputSection does not match any of the GUIDs registered through ExtractGuidedSectionRegisterHandlers(),
- then RETURN_UNSUPPORTED is returned.
- If the GUID of InputSection does match the GUID that this handler supports, then the the associated handler
+ then RETURN_UNSUPPORTED is returned.
+ If the GUID of InputSection does match the GUID that this handler supports, then the the associated handler
of type EXTRACT_GUIDED_SECTION_GET_INFO_HANDLER that was registered with ExtractGuidedSectionRegisterHandlers()
is used to retrieve the OututBufferSize, ScratchSize, and Attributes values. The return status from the handler of
type EXTRACT_GUIDED_SECTION_GET_INFO_HANDLER is returned.
-
+
If InputSection is NULL, then ASSERT().
If OutputBufferSize is NULL, then ASSERT().
If ScratchBufferSize is NULL, then ASSERT().
@@ -261,14 +255,14 @@ ExtractGuidedSectionGetInfo (
IN CONST VOID *InputSection,
OUT UINT32 *OutputBufferSize,
OUT UINT32 *ScratchBufferSize,
- OUT UINT16 *SectionAttribute
+ OUT UINT16 *SectionAttribute
)
{
UINT32 Index;
RETURN_STATUS Status;
EXTRACT_GUIDED_SECTION_HANDLER_INFO *HandlerInfo;
EFI_GUID *SectionDefinitionGuid;
-
+
//
// Check input parameter
//
@@ -310,7 +304,7 @@ ExtractGuidedSectionGetInfo (
}
//
- // Not found, the input guided section is not supported.
+ // Not found, the input guided section is not supported.
//
return RETURN_UNSUPPORTED;
}
@@ -321,26 +315,26 @@ ExtractGuidedSectionGetInfo (
The selected handler is used to decode the data in a GUIDed section and return the result in a caller
allocated output buffer.
- Decodes the GUIDed section specified by InputSection.
+ Decodes the GUIDed section specified by InputSection.
If GUID for InputSection does not match any of the GUIDs registered through ExtractGuidedSectionRegisterHandlers(),
- then RETURN_UNSUPPORTED is returned.
+ then RETURN_UNSUPPORTED is returned.
If the GUID of InputSection does match the GUID that this handler supports, then the the associated handler
of type EXTRACT_GUIDED_SECTION_DECODE_HANDLER that was registered with ExtractGuidedSectionRegisterHandlers()
is used to decode InputSection into the buffer specified by OutputBuffer and the authentication status of this
decode operation is returned in AuthenticationStatus. If the decoded buffer is identical to the data in InputSection,
then OutputBuffer is set to point at the data in InputSection. Otherwise, the decoded data will be placed in a caller
allocated buffer specified by OutputBuffer. This function is responsible for computing the EFI_AUTH_STATUS_PLATFORM_OVERRIDE
- bit of in AuthenticationStatus. The return status from the handler of type EXTRACT_GUIDED_SECTION_DECODE_HANDLER is returned.
-
+ bit of in AuthenticationStatus. The return status from the handler of type EXTRACT_GUIDED_SECTION_DECODE_HANDLER is returned.
+
If InputSection is NULL, then ASSERT().
If OutputBuffer is NULL, then ASSERT().
If ScratchBuffer is NULL and this decode operation requires a scratch buffer, then ASSERT().
- If AuthenticationStatus is NULL, then ASSERT().
+ If AuthenticationStatus is NULL, then ASSERT().
@param[in] InputSection A pointer to a GUIDed section of an FFS formatted file.
- @param[out] OutputBuffer A pointer to a buffer that contains the result of a decode operation.
- @param[in] ScratchBuffer A caller allocated buffer that may be required by this function as a scratch buffer to perform the decode operation.
- @param[out] AuthenticationStatus
+ @param[out] OutputBuffer A pointer to a buffer that contains the result of a decode operation.
+ @param[in] ScratchBuffer A caller allocated buffer that may be required by this function as a scratch buffer to perform the decode operation.
+ @param[out] AuthenticationStatus
A pointer to the authentication status of the decoded output buffer. See the definition
of authentication status in the EFI_PEI_GUIDED_SECTION_EXTRACTION_PPI section of the PI
Specification.
@@ -356,14 +350,14 @@ ExtractGuidedSectionDecode (
IN CONST VOID *InputSection,
OUT VOID **OutputBuffer,
IN VOID *ScratchBuffer, OPTIONAL
- OUT UINT32 *AuthenticationStatus
+ OUT UINT32 *AuthenticationStatus
)
{
UINT32 Index;
RETURN_STATUS Status;
EXTRACT_GUIDED_SECTION_HANDLER_INFO *HandlerInfo;
EFI_GUID *SectionDefinitionGuid;
-
+
//
// Check input parameter
//
@@ -373,7 +367,7 @@ ExtractGuidedSectionDecode (
//
// Get all registered handler information.
- //
+ //
Status = GetExtractGuidedSectionHandlerInfo (&HandlerInfo);
if (RETURN_ERROR (Status)) {
return Status;
@@ -404,29 +398,29 @@ ExtractGuidedSectionDecode (
}
//
- // Not found, the input guided section is not supported.
+ // Not found, the input guided section is not supported.
//
return RETURN_UNSUPPORTED;
}
/**
- Retrieves handlers of type EXTRACT_GUIDED_SECTION_GET_INFO_HANDLER and
+ Retrieves handlers of type EXTRACT_GUIDED_SECTION_GET_INFO_HANDLER and
EXTRACT_GUIDED_SECTION_DECODE_HANDLER for a specific GUID section type.
-
- Retrieves the handlers associated with SectionGuid and returns them in
+
+ Retrieves the handlers associated with SectionGuid and returns them in
GetInfoHandler and DecodeHandler.
- If the GUID value specified by SectionGuid has not been registered, then
+ If the GUID value specified by SectionGuid has not been registered, then
return RETURN_NOT_FOUND.
-
+
If SectionGuid is NULL, then ASSERT().
- @param[in] SectionGuid A pointer to the GUID associated with the handlersof the GUIDed
+ @param[in] SectionGuid A pointer to the GUID associated with the handlersof the GUIDed
section type being retrieved.
- @param[out] GetInfoHandler Pointer to a function that examines a GUIDed section and returns
- the size of the decoded buffer and the size of an optional scratch
- buffer required to actually decode the data in a GUIDed section.
- This is an optional parameter that may be NULL. If it is NULL, then
+ @param[out] GetInfoHandler Pointer to a function that examines a GUIDed section and returns
+ the size of the decoded buffer and the size of an optional scratch
+ buffer required to actually decode the data in a GUIDed section.
+ This is an optional parameter that may be NULL. If it is NULL, then
the previously registered handler is not returned.
@param[out] DecodeHandler Pointer to a function that decodes a GUIDed section into a caller
allocated output buffer. This is an optional parameter that may be NULL.
diff --git a/MdePkg/Library/BaseExtractGuidedSectionLib/BaseExtractGuidedSectionLib.inf b/MdePkg/Library/BaseExtractGuidedSectionLib/BaseExtractGuidedSectionLib.inf
index e82d7f085cfb..c7a07bf4d3a9 100644
--- a/MdePkg/Library/BaseExtractGuidedSectionLib/BaseExtractGuidedSectionLib.inf
+++ b/MdePkg/Library/BaseExtractGuidedSectionLib/BaseExtractGuidedSectionLib.inf
@@ -11,14 +11,9 @@
# this ExtractGuidedSectionLib couldn't be used for guided section extraction that is required
# by PEI and DXE core for recovery or capsule image processing, etc.
#
-# Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -34,7 +29,7 @@
#
# The following information is for reference only and not required by the build tools.
#
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC (EBC is for build only)
+# VALID_ARCHITECTURES = IA32 X64 EBC (EBC is for build only)
#
[Sources]
diff --git a/MdePkg/Library/BaseExtractGuidedSectionLib/BaseExtractGuidedSectionLib.uni b/MdePkg/Library/BaseExtractGuidedSectionLib/BaseExtractGuidedSectionLib.uni
index fcb7d658a711..339e0bb255c0 100644
--- a/MdePkg/Library/BaseExtractGuidedSectionLib/BaseExtractGuidedSectionLib.uni
+++ b/MdePkg/Library/BaseExtractGuidedSectionLib/BaseExtractGuidedSectionLib.uni
@@ -11,12 +11,7 @@
//
// Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php.
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+// SPDX-License-Identifier: BSD-2-Clause-Patent
//
// **/
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/AArch64/ArmVirtMmio.S b/MdePkg/Library/BaseIoLibIntrinsic/AArch64/ArmVirtMmio.S
new file mode 100644
index 000000000000..34aaba8e4f60
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/AArch64/ArmVirtMmio.S
@@ -0,0 +1,142 @@
+#
+# Copyright (c) 2014-2018, Linaro Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+
+.text
+.align 3
+
+GCC_ASM_EXPORT(MmioRead8Internal)
+GCC_ASM_EXPORT(MmioWrite8Internal)
+GCC_ASM_EXPORT(MmioRead16Internal)
+GCC_ASM_EXPORT(MmioWrite16Internal)
+GCC_ASM_EXPORT(MmioRead32Internal)
+GCC_ASM_EXPORT(MmioWrite32Internal)
+GCC_ASM_EXPORT(MmioRead64Internal)
+GCC_ASM_EXPORT(MmioWrite64Internal)
+
+//
+// Reads an 8-bit MMIO register.
+//
+// Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
+// returned. This function must guarantee that all MMIO read and write
+// operations are serialized.
+//
+// @param Address The MMIO register to read.
+//
+// @return The value read.
+//
+ASM_PFX(MmioRead8Internal):
+ ldrb w0, [x0]
+ dmb ld
+ ret
+
+//
+// Writes an 8-bit MMIO register.
+//
+// Writes the 8-bit MMIO register specified by Address with the value specified
+// by Value and returns Value. This function must guarantee that all MMIO read
+// and write operations are serialized.
+//
+// @param Address The MMIO register to write.
+// @param Value The value to write to the MMIO register.
+//
+ASM_PFX(MmioWrite8Internal):
+ dmb st
+ strb w1, [x0]
+ ret
+
+//
+// Reads a 16-bit MMIO register.
+//
+// Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
+// returned. This function must guarantee that all MMIO read and write
+// operations are serialized.
+//
+// @param Address The MMIO register to read.
+//
+// @return The value read.
+//
+ASM_PFX(MmioRead16Internal):
+ ldrh w0, [x0]
+ dmb ld
+ ret
+
+//
+// Writes a 16-bit MMIO register.
+//
+// Writes the 16-bit MMIO register specified by Address with the value specified
+// by Value and returns Value. This function must guarantee that all MMIO read
+// and write operations are serialized.
+//
+// @param Address The MMIO register to write.
+// @param Value The value to write to the MMIO register.
+//
+ASM_PFX(MmioWrite16Internal):
+ dmb st
+ strh w1, [x0]
+ ret
+
+//
+// Reads a 32-bit MMIO register.
+//
+// Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
+// returned. This function must guarantee that all MMIO read and write
+// operations are serialized.
+//
+// @param Address The MMIO register to read.
+//
+// @return The value read.
+//
+ASM_PFX(MmioRead32Internal):
+ ldr w0, [x0]
+ dmb ld
+ ret
+
+//
+// Writes a 32-bit MMIO register.
+//
+// Writes the 32-bit MMIO register specified by Address with the value specified
+// by Value and returns Value. This function must guarantee that all MMIO read
+// and write operations are serialized.
+//
+// @param Address The MMIO register to write.
+// @param Value The value to write to the MMIO register.
+//
+ASM_PFX(MmioWrite32Internal):
+ dmb st
+ str w1, [x0]
+ ret
+
+//
+// Reads a 64-bit MMIO register.
+//
+// Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
+// returned. This function must guarantee that all MMIO read and write
+// operations are serialized.
+//
+// @param Address The MMIO register to read.
+//
+// @return The value read.
+//
+ASM_PFX(MmioRead64Internal):
+ ldr x0, [x0]
+ dmb ld
+ ret
+
+//
+// Writes a 64-bit MMIO register.
+//
+// Writes the 64-bit MMIO register specified by Address with the value specified
+// by Value and returns Value. This function must guarantee that all MMIO read
+// and write operations are serialized.
+//
+// @param Address The MMIO register to write.
+// @param Value The value to write to the MMIO register.
+//
+ASM_PFX(MmioWrite64Internal):
+ dmb st
+ str x1, [x0]
+ ret
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/AArch64/ArmVirtMmio.asm b/MdePkg/Library/BaseIoLibIntrinsic/AArch64/ArmVirtMmio.asm
new file mode 100644
index 000000000000..32771ec63b96
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/AArch64/ArmVirtMmio.asm
@@ -0,0 +1,143 @@
+;
+; Copyright (c) 2014-2018, Linaro Limited. All rights reserved.
+;
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+
+
+AREA IoLibMmio, CODE, READONLY
+
+EXPORT MmioRead8Internal
+EXPORT MmioWrite8Internal
+EXPORT MmioRead16Internal
+EXPORT MmioWrite16Internal
+EXPORT MmioRead32Internal
+EXPORT MmioWrite32Internal
+EXPORT MmioRead64Internal
+EXPORT MmioWrite64Internal
+
+;
+; Reads an 8-bit MMIO register.
+;
+; Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
+; returned. This function must guarantee that all MMIO read and write
+; operations are serialized.
+;
+; @param Address The MMIO register to read.
+;
+; @return The value read.
+;
+MmioRead8Internal
+ ldrb w0, [x0]
+ dmb ld
+ ret
+
+;
+; Writes an 8-bit MMIO register.
+;
+; Writes the 8-bit MMIO register specified by Address with the value specified
+; by Value and returns Value. This function must guarantee that all MMIO read
+; and write operations are serialized.
+;
+; @param Address The MMIO register to write.
+; @param Value The value to write to the MMIO register.
+;
+MmioWrite8Internal
+ dmb st
+ strb w1, [x0]
+ ret
+
+;
+; Reads a 16-bit MMIO register.
+;
+; Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
+; returned. This function must guarantee that all MMIO read and write
+; operations are serialized.
+;
+; @param Address The MMIO register to read.
+;
+; @return The value read.
+;
+MmioRead16Internal
+ ldrh w0, [x0]
+ dmb ld
+ ret
+
+;
+; Writes a 16-bit MMIO register.
+;
+; Writes the 16-bit MMIO register specified by Address with the value specified
+; by Value and returns Value. This function must guarantee that all MMIO read
+; and write operations are serialized.
+;
+; @param Address The MMIO register to write.
+; @param Value The value to write to the MMIO register.
+;
+MmioWrite16Internal
+ dmb st
+ strh w1, [x0]
+ ret
+
+;
+; Reads a 32-bit MMIO register.
+;
+; Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
+; returned. This function must guarantee that all MMIO read and write
+; operations are serialized.
+;
+; @param Address The MMIO register to read.
+;
+; @return The value read.
+;
+MmioRead32Internal
+ ldr w0, [x0]
+ dmb ld
+ ret
+
+;
+; Writes a 32-bit MMIO register.
+;
+; Writes the 32-bit MMIO register specified by Address with the value specified
+; by Value and returns Value. This function must guarantee that all MMIO read
+; and write operations are serialized.
+;
+; @param Address The MMIO register to write.
+; @param Value The value to write to the MMIO register.
+;
+MmioWrite32Internal
+ dmb st
+ str w1, [x0]
+ ret
+
+;
+; Reads a 64-bit MMIO register.
+;
+; Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
+; returned. This function must guarantee that all MMIO read and write
+; operations are serialized.
+;
+; @param Address The MMIO register to read.
+;
+; @return The value read.
+;
+MmioRead64Internal
+ ldr x0, [x0]
+ dmb ld
+ ret
+
+;
+; Writes a 64-bit MMIO register.
+;
+; Writes the 64-bit MMIO register specified by Address with the value specified
+; by Value and returns Value. This function must guarantee that all MMIO read
+; and write operations are serialized.
+;
+; @param Address The MMIO register to write.
+; @param Value The value to write to the MMIO register.
+;
+MmioWrite64Internal
+ dmb st
+ str x1, [x0]
+ ret
+
+ END
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.S b/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.S
new file mode 100644
index 000000000000..0bc606285171
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.S
@@ -0,0 +1,141 @@
+#
+# Copyright (c) 2014-2018, Linaro Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+
+GCC_ASM_EXPORT(MmioRead8Internal)
+GCC_ASM_EXPORT(MmioWrite8Internal)
+GCC_ASM_EXPORT(MmioRead16Internal)
+GCC_ASM_EXPORT(MmioWrite16Internal)
+GCC_ASM_EXPORT(MmioRead32Internal)
+GCC_ASM_EXPORT(MmioWrite32Internal)
+GCC_ASM_EXPORT(MmioRead64Internal)
+GCC_ASM_EXPORT(MmioWrite64Internal)
+
+//
+// Reads an 8-bit MMIO register.
+//
+// Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
+// returned. This function must guarantee that all MMIO read and write
+// operations are serialized.
+//
+// @param Address The MMIO register to read.
+//
+// @return The value read.
+//
+ASM_PFX(MmioRead8Internal):
+ ldrb r0, [r0]
+ dmb
+ bx lr
+
+//
+// Writes an 8-bit MMIO register.
+//
+// Writes the 8-bit MMIO register specified by Address with the value specified
+// by Value and returns Value. This function must guarantee that all MMIO read
+// and write operations are serialized.
+//
+// @param Address The MMIO register to write.
+// @param Value The value to write to the MMIO register.
+//
+ASM_PFX(MmioWrite8Internal):
+ dmb st
+ strb r1, [r0]
+ bx lr
+
+//
+// Reads a 16-bit MMIO register.
+//
+// Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
+// returned. This function must guarantee that all MMIO read and write
+// operations are serialized.
+//
+// @param Address The MMIO register to read.
+//
+// @return The value read.
+//
+ASM_PFX(MmioRead16Internal):
+ ldrh r0, [r0]
+ dmb
+ bx lr
+
+//
+// Writes a 16-bit MMIO register.
+//
+// Writes the 16-bit MMIO register specified by Address with the value specified
+// by Value and returns Value. This function must guarantee that all MMIO read
+// and write operations are serialized.
+//
+// @param Address The MMIO register to write.
+// @param Value The value to write to the MMIO register.
+//
+ASM_PFX(MmioWrite16Internal):
+ dmb st
+ strh r1, [r0]
+ bx lr
+
+//
+// Reads a 32-bit MMIO register.
+//
+// Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
+// returned. This function must guarantee that all MMIO read and write
+// operations are serialized.
+//
+// @param Address The MMIO register to read.
+//
+// @return The value read.
+//
+ASM_PFX(MmioRead32Internal):
+ ldr r0, [r0]
+ dmb
+ bx lr
+
+//
+// Writes a 32-bit MMIO register.
+//
+// Writes the 32-bit MMIO register specified by Address with the value specified
+// by Value and returns Value. This function must guarantee that all MMIO read
+// and write operations are serialized.
+//
+// @param Address The MMIO register to write.
+// @param Value The value to write to the MMIO register.
+//
+ASM_PFX(MmioWrite32Internal):
+ dmb st
+ str r1, [r0]
+ bx lr
+
+//
+// Reads a 64-bit MMIO register.
+//
+// Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
+// returned. This function must guarantee that all MMIO read and write
+// operations are serialized.
+//
+// @param Address The MMIO register to read.
+//
+// @return The value read.
+//
+ASM_PFX(MmioRead64Internal):
+ ldr r1, [r0, #4]
+ ldr r0, [r0]
+ dmb
+ bx lr
+
+//
+// Writes a 64-bit MMIO register.
+//
+// Writes the 64-bit MMIO register specified by Address with the value specified
+// by Value and returns Value. This function must guarantee that all MMIO read
+// and write operations are serialized.
+//
+// @param Address The MMIO register to write.
+// @param Value The value to write to the MMIO register.
+//
+ASM_PFX(MmioWrite64Internal):
+ dmb st
+ str r2, [r0]
+ str r3, [r0, #4]
+ bx lr
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.asm b/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.asm
new file mode 100644
index 000000000000..93fe59b3cd46
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.asm
@@ -0,0 +1,145 @@
+;
+; Copyright (c) 2014-2018, Linaro Limited. All rights reserved.
+;
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+
+
+AREA IoLibMmio, CODE, READONLY
+
+EXPORT MmioRead8Internal
+EXPORT MmioWrite8Internal
+EXPORT MmioRead16Internal
+EXPORT MmioWrite16Internal
+EXPORT MmioRead32Internal
+EXPORT MmioWrite32Internal
+EXPORT MmioRead64Internal
+EXPORT MmioWrite64Internal
+
+;
+; Reads an 8-bit MMIO register.
+;
+; Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
+; returned. This function must guarantee that all MMIO read and write
+; operations are serialized.
+;
+; @param Address The MMIO register to read.
+;
+; @return The value read.
+;
+MmioRead8Internal
+ ldrb r0, [r0]
+ dmb
+ bx lr
+
+;
+; Writes an 8-bit MMIO register.
+;
+; Writes the 8-bit MMIO register specified by Address with the value specified
+; by Value and returns Value. This function must guarantee that all MMIO read
+; and write operations are serialized.
+;
+; @param Address The MMIO register to write.
+; @param Value The value to write to the MMIO register.
+;
+MmioWrite8Internal
+ dmb st
+ strb r1, [r0]
+ bx lr
+
+;
+; Reads a 16-bit MMIO register.
+;
+; Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
+; returned. This function must guarantee that all MMIO read and write
+; operations are serialized.
+;
+; @param Address The MMIO register to read.
+;
+; @return The value read.
+;
+MmioRead16Internal
+ ldrh r0, [r0]
+ dmb
+ bx lr
+
+;
+; Writes a 16-bit MMIO register.
+;
+; Writes the 16-bit MMIO register specified by Address with the value specified
+; by Value and returns Value. This function must guarantee that all MMIO read
+; and write operations are serialized.
+;
+; @param Address The MMIO register to write.
+; @param Value The value to write to the MMIO register.
+;
+MmioWrite16Internal
+ dmb st
+ strh r1, [r0]
+ bx lr
+
+;
+; Reads a 32-bit MMIO register.
+;
+; Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
+; returned. This function must guarantee that all MMIO read and write
+; operations are serialized.
+;
+; @param Address The MMIO register to read.
+;
+; @return The value read.
+;
+MmioRead32Internal
+ ldr r0, [r0]
+ dmb
+ bx lr
+
+;
+; Writes a 32-bit MMIO register.
+;
+; Writes the 32-bit MMIO register specified by Address with the value specified
+; by Value and returns Value. This function must guarantee that all MMIO read
+; and write operations are serialized.
+;
+; @param Address The MMIO register to write.
+; @param Value The value to write to the MMIO register.
+;
+MmioWrite32Internal
+ dmb st
+ str r1, [r0]
+ bx lr
+
+;
+; Reads a 64-bit MMIO register.
+;
+; Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
+; returned. This function must guarantee that all MMIO read and write
+; operations are serialized.
+;
+; @param Address The MMIO register to read.
+;
+; @return The value read.
+;
+MmioRead64Internal
+ ldr r1, [r0, #4]
+ ldr r0, [r0]
+ dmb
+ bx lr
+
+;
+; Writes a 64-bit MMIO register.
+;
+; Writes the 64-bit MMIO register specified by Address with the value specified
+; by Value and returns Value. This function must guarantee that all MMIO read
+; and write operations are serialized.
+;
+; @param Address The MMIO register to write.
+; @param Value The value to write to the MMIO register.
+;
+MmioWrite64Internal
+ dmb st
+ str r2, [r0]
+ str r3, [r0, #4]
+ bx lr
+
+ END
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
index f41c4a4c715f..ede0e8e6ae0f 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
+++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
@@ -4,18 +4,15 @@
# I/O Library that uses compiler intrinsics to perform IN and OUT instructions
# for IA-32 and x64. On IPF, I/O port requests are translated into MMIO requests.
# MMIO requests are forwarded directly to memory. For EBC, I/O port requests
-# ASSERT().
+# ASSERT(). For ARM, AARCH64 and RISCV64, this I/O library only provides non I/O
+# read and write.
#
-# Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
# Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+# Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -26,11 +23,11 @@
FILE_GUID = 926c9cd0-4bb8-479b-9ac4-8a2a23f85307
MODULE_TYPE = BASE
VERSION_STRING = 1.0
- LIBRARY_CLASS = IoLib
+ LIBRARY_CLASS = IoLib
#
-# VALID_ARCHITECTURES = IA32 X64 EBC IPF ARM AARCH64
+# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64
#
[Sources]
@@ -41,31 +38,27 @@
[Sources.IA32]
IoLibGcc.c | GCC
IoLibMsc.c | MSFT
- IoLibIcc.c | INTEL
IoLib.c
Ia32/IoFifo.nasm
- Ia32/IoFifo.asm
[Sources.X64]
IoLibGcc.c | GCC
IoLibMsc.c | MSFT
- IoLibIcc.c | INTEL
IoLib.c
X64/IoFifo.nasm
- X64/IoFifo.asm
[Sources.EBC]
IoLibEbc.c
IoLib.c
-[Sources.IPF]
- IoLibIpf.c
-
[Sources.ARM]
- IoLibArm.c
+ IoLibNoIo.c
[Sources.AARCH64]
- IoLibArm.c
+ IoLibNoIo.c
+
+[Sources.RISCV64]
+ IoLibNoIo.c
[Packages]
MdePkg/MdePkg.dec
@@ -74,9 +67,3 @@
DebugLib
BaseLib
-[LibraryClasses.IPF]
- PcdLib
-
-[Pcd.IPF]
- gEfiMdePkgTokenSpaceGuid.PcdIoBlockBaseAddressForIpf ## SOMETIMES_CONSUMES
-
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.uni b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.uni
index 3696eda9b6af..955e21633d0d 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.uni
+++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.uni
@@ -8,12 +8,7 @@
// Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
// Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php.
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+// SPDX-License-Identifier: BSD-2-Clause-Patent
//
// **/
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.inf b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.inf
new file mode 100644
index 000000000000..d97050df163a
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.inf
@@ -0,0 +1,46 @@
+## @file
+# Instance of I/O Library using KVM/ARM safe assembler routines
+#
+# Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>
+# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+# Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+# Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001A
+ BASE_NAME = BaseIoLibIntrinsicArmVirt
+ MODULE_UNI_FILE = BaseIoLibIntrinsicArmVirt.uni
+ FILE_GUID = 217102b4-b465-4a1d-a2de-93dd385ec480
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = IoLib
+
+#
+# VALID_ARCHITECTURES = ARM AARCH64
+#
+
+[Sources]
+ IoLibMmioBuffer.c
+ BaseIoLibIntrinsicInternal.h
+ IoHighLevel.c
+
+[Sources.ARM]
+ IoLibArmVirt.c
+ Arm/ArmVirtMmio.S | GCC
+ Arm/ArmVirtMmio.asm | RVCT
+
+[Sources.AARCH64]
+ IoLibArmVirt.c
+ AArch64/ArmVirtMmio.S | GCC
+ AArch64/ArmVirtMmio.asm | MSFT
+
+[Packages]
+ MdePkg/MdePkg.dec
+
+[LibraryClasses]
+ DebugLib
+ BaseLib
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.uni b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.uni
new file mode 100644
index 000000000000..1104094d659c
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.uni
@@ -0,0 +1,17 @@
+// /** @file
+// Instance of I/O Library using KVM/ARM safe assembler routines
+//
+// Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>
+// Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+// Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+// Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+
+#string STR_MODULE_ABSTRACT #language en-US "Instance of I/O Library using KVM/ARM safe assembler routines"
+
+#string STR_MODULE_DESCRIPTION #language en-US "I/O Library that uses assembler routines to perform MMIO accesses, to prevent link time code generation under LTO from emitting instructions that KVM on ARM cannot deal with."
+
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicInternal.h b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicInternal.h
index 9b20df0b6926..1e709ce3e9ce 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicInternal.h
+++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicInternal.h
@@ -4,12 +4,7 @@
This file includes package header files, dependent library classes.
Copyright (c) 2007 - 2008, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __BASEIOLIB_INTRINSIC_INTERNAL_H_
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicSev.inf b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicSev.inf
new file mode 100644
index 000000000000..84fdf6adb79c
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicSev.inf
@@ -0,0 +1,52 @@
+## @file
+# Instance of I/O Library using compiler intrinsics.
+#
+# I/O Library that uses compiler intrinsics to perform IN and OUT instructions
+# for IA-32 and x64.
+#
+# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
+# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+# Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = BaseIoLibIntrinsicSev
+ MODULE_UNI_FILE = BaseIoLibIntrinsic.uni
+ FILE_GUID = 93742f95-6e71-4581-b600-8e1da443f95a
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = IoLib
+
+
+#
+# VALID_ARCHITECTURES = IA32 X64
+#
+
+[Sources]
+ IoLibMmioBuffer.c
+ BaseIoLibIntrinsicInternal.h
+ IoHighLevel.c
+
+[Sources.IA32]
+ IoLibGcc.c | GCC
+ IoLibMsc.c | MSFT
+ IoLib.c
+ Ia32/IoFifoSev.nasm
+
+[Sources.X64]
+ IoLibGcc.c | GCC
+ IoLibMsc.c | MSFT
+ IoLib.c
+ X64/IoFifoSev.nasm
+
+[Packages]
+ MdePkg/MdePkg.dec
+
+[LibraryClasses]
+ DebugLib
+ BaseLib
+
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.asm b/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.asm
deleted file mode 100644
index 729880d62914..000000000000
--- a/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.asm
+++ /dev/null
@@ -1,141 +0,0 @@
-;------------------------------------------------------------------------------
-;
-; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
-; Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
-;
-; This program and the accompanying materials are licensed and made available
-; under the terms and conditions of the BSD License which accompanies this
-; distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
- .586P
- .model flat,C
- .code
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo8 (
-; IN UINTN Port,
-; IN UINTN Size,
-; OUT VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-IoReadFifo8 PROC
- push edi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov edi, [esp + 16]
-rep insb
- pop edi
- ret
-IoReadFifo8 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo16 (
-; IN UINTN Port,
-; IN UINTN Size,
-; OUT VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-IoReadFifo16 PROC
- push edi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov edi, [esp + 16]
-rep insw
- pop edi
- ret
-IoReadFifo16 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo32 (
-; IN UINTN Port,
-; IN UINTN Size,
-; OUT VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-IoReadFifo32 PROC
- push edi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov edi, [esp + 16]
-rep insd
- pop edi
- ret
-IoReadFifo32 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo8 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-IoWriteFifo8 PROC
- push esi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov esi, [esp + 16]
-rep outsb
- pop esi
- ret
-IoWriteFifo8 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo16 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-IoWriteFifo16 PROC
- push esi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov esi, [esp + 16]
-rep outsw
- pop esi
- ret
-IoWriteFifo16 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo32 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-IoWriteFifo32 PROC
- push esi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov esi, [esp + 16]
-rep outsd
- pop esi
- ret
-IoWriteFifo32 ENDP
-
- END
-
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm b/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm
index 102bbb865448..554585733049 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm
+++ b/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm
@@ -3,13 +3,7 @@
; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
;
-; This program and the accompanying materials are licensed and made available
-; under the terms and conditions of the BSD License which accompanies this
-; distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+; SPDX-License-Identifier: BSD-2-Clause-Patent
;
;------------------------------------------------------------------------------
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifoSev.nasm b/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifoSev.nasm
new file mode 100644
index 000000000000..3a7a25bb2716
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifoSev.nasm
@@ -0,0 +1,293 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+;
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; Check whether we need to unroll the String I/O under SEV guest
+;
+; Return // eax (1 - unroll, 0 - no unroll)
+;------------------------------------------------------------------------------
+global ASM_PFX(SevNoRepIo)
+ASM_PFX(SevNoRepIo):
+
+ ; CPUID clobbers ebx, ecx and edx
+ push ebx
+ push ecx
+ push edx
+
+ ; Check if we are running under hypervisor
+ ; CPUID(1).ECX Bit 31
+ mov eax, 1
+ cpuid
+ bt ecx, 31
+ jnc @UseRepIo
+
+ ; Check if we have Memory encryption CPUID leaf
+ mov eax, 0x80000000
+ cpuid
+ cmp eax, 0x8000001f
+ jl @UseRepIo
+
+ ; Check for memory encryption feature:
+ ; CPUID Fn8000_001F[EAX] - Bit 1
+ ;
+ mov eax, 0x8000001f
+ cpuid
+ bt eax, 1
+ jnc @UseRepIo
+
+ ; Check if memory encryption is enabled
+ ; MSR_0xC0010131 - Bit 0 (SEV enabled)
+ ; MSR_0xC0010131 - Bit 1 (SEV-ES enabled)
+ mov ecx, 0xc0010131
+ rdmsr
+
+ ; Check for (SevEsEnabled == 0 && SevEnabled == 1)
+ and eax, 3
+ cmp eax, 1
+ je @SevNoRepIo_Done
+
+@UseRepIo:
+ xor eax, eax
+
+@SevNoRepIo_Done:
+ pop edx
+ pop ecx
+ pop ebx
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo8 (
+; IN UINTN Port,
+; IN UINTN Size,
+; OUT VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo8)
+ASM_PFX(IoReadFifo8):
+ push edi
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov edi, [esp + 16]
+
+ ; Check if we need to unroll String I/O
+ call ASM_PFX(SevNoRepIo)
+ test eax, eax
+ jnz @IoReadFifo8_NoRep
+
+ cld
+ rep insb
+ jmp @IoReadFifo8_Done
+
+@IoReadFifo8_NoRep:
+ jecxz @IoReadFifo8_Done
+
+@IoReadFifo8_Loop:
+ in al, dx
+ mov byte [edi], al
+ inc edi
+ loop @IoReadFifo8_Loop
+
+@IoReadFifo8_Done:
+ pop edi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo16 (
+; IN UINTN Port,
+; IN UINTN Size,
+; OUT VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo16)
+ASM_PFX(IoReadFifo16):
+ push edi
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov edi, [esp + 16]
+
+ ; Check if we need to unroll String I/O
+ call ASM_PFX(SevNoRepIo)
+ test eax, eax
+ jnz @IoReadFifo16_NoRep
+
+ cld
+ rep insw
+ jmp @IoReadFifo16_Done
+
+@IoReadFifo16_NoRep:
+ jecxz @IoReadFifo16_Done
+
+@IoReadFifo16_Loop:
+ in ax, dx
+ mov word [edi], ax
+ add edi, 2
+ loop @IoReadFifo16_Loop
+
+@IoReadFifo16_Done:
+ pop edi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo32 (
+; IN UINTN Port,
+; IN UINTN Size,
+; OUT VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo32)
+ASM_PFX(IoReadFifo32):
+ push edi
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov edi, [esp + 16]
+
+ ; Check if we need to unroll String I/O
+ call ASM_PFX(SevNoRepIo)
+ test eax, eax
+ jnz @IoReadFifo32_NoRep
+
+ cld
+ rep insd
+ jmp @IoReadFifo32_Done
+
+@IoReadFifo32_NoRep:
+ jecxz @IoReadFifo32_Done
+
+@IoReadFifo32_Loop:
+ in eax, dx
+ mov dword [edi], eax
+ add edi, 4
+ loop @IoReadFifo32_Loop
+
+@IoReadFifo32_Done:
+ pop edi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo8 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo8)
+ASM_PFX(IoWriteFifo8):
+ push esi
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov esi, [esp + 16]
+
+ ; Check if we need to unroll String I/O
+ call ASM_PFX(SevNoRepIo)
+ test eax, eax
+ jnz @IoWriteFifo8_NoRep
+
+ cld
+ rep outsb
+ jmp @IoWriteFifo8_Done
+
+@IoWriteFifo8_NoRep:
+ jecxz @IoWriteFifo8_Done
+
+@IoWriteFifo8_Loop:
+ mov al, byte [esi]
+ out dx, al
+ inc esi
+ loop @IoWriteFifo8_Loop
+
+@IoWriteFifo8_Done:
+ pop esi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo16 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo16)
+ASM_PFX(IoWriteFifo16):
+ push esi
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov esi, [esp + 16]
+
+ ; Check if we need to unroll String I/O
+ call ASM_PFX(SevNoRepIo)
+ test eax, eax
+ jnz @IoWriteFifo16_NoRep
+
+ cld
+ rep outsw
+ jmp @IoWriteFifo16_Done
+
+@IoWriteFifo16_NoRep:
+ jecxz @IoWriteFifo16_Done
+
+@IoWriteFifo16_Loop:
+ mov ax, word [esi]
+ out dx, ax
+ add esi, 2
+ loop @IoWriteFifo16_Loop
+
+@IoWriteFifo16_Done:
+ pop esi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo32 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo32)
+ASM_PFX(IoWriteFifo32):
+ push esi
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov esi, [esp + 16]
+
+ ; Check if we need to unroll String I/O
+ call ASM_PFX(SevNoRepIo)
+ test eax, eax
+ jnz @IoWriteFifo32_NoRep
+
+ cld
+ rep outsd
+ jmp @IoWriteFifo32_Done
+
+@IoWriteFifo32_NoRep:
+ jecxz @IoWriteFifo32_Done
+
+@IoWriteFifo32_Loop:
+ mov eax, dword [esi]
+ out dx, eax
+ add esi, 4
+ loop @IoWriteFifo32_Loop
+
+@IoWriteFifo32_Done:
+ pop esi
+ ret
+
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoHighLevel.c b/MdePkg/Library/BaseIoLibIntrinsic/IoHighLevel.c
index 8a03e33934fe..ff54bf7e5e94 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/IoHighLevel.c
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoHighLevel.c
@@ -4,14 +4,8 @@
All assertions for bit field operations are handled bit field functions in the
Base Library.
- Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
The following IoLib instances contain the same copy of this file:
@@ -80,7 +74,7 @@ IoAnd8 (
}
/**
- Reads an 8-bit I/O port, performs a bitwise AND followed by a bitwise
+ Reads an 8-bit I/O port, performs a bitwise AND followed by a bitwise
OR, and writes the result back to the 8-bit I/O port.
Reads the 8-bit I/O port specified by Port, performs a bitwise AND between
@@ -146,7 +140,7 @@ IoBitFieldRead8 (
Writes Value to the bit field of the I/O register. The bit field is specified
by the StartBit and the EndBit. All other bits in the destination I/O
- register are preserved. The value written to the I/O port is returned.
+ register are preserved. The value written to the I/O port is returned.
If 8-bit I/O port operations are not supported, then ASSERT().
If StartBit is greater than 7, then ASSERT().
@@ -348,7 +342,7 @@ IoOr16 (
If 16-bit I/O port operations are not supported, then ASSERT().
If Port is not aligned on a 16-bit boundary, then ASSERT().
-
+
@param Port The I/O port to write.
@param AndData The value to AND with the read value from the I/O port.
@@ -366,7 +360,7 @@ IoAnd16 (
}
/**
- Reads a 16-bit I/O port, performs a bitwise AND followed by a bitwise
+ Reads a 16-bit I/O port, performs a bitwise AND followed by a bitwise
OR, and writes the result back to the 16-bit I/O port.
Reads the 16-bit I/O port specified by Port, performs a bitwise AND between
@@ -378,7 +372,7 @@ IoAnd16 (
If 16-bit I/O port operations are not supported, then ASSERT().
If Port is not aligned on a 16-bit boundary, then ASSERT().
-
+
@param Port The I/O port to write.
@param AndData The value to AND with the read value from the I/O port.
@param OrData The value to OR with the result of the AND operation.
@@ -659,7 +653,7 @@ IoAnd32 (
}
/**
- Reads a 32-bit I/O port, performs a bitwise AND followed by a bitwise
+ Reads a 32-bit I/O port, performs a bitwise AND followed by a bitwise
OR, and writes the result back to the 32-bit I/O port.
Reads the 32-bit I/O port specified by Port, performs a bitwise AND between
@@ -952,7 +946,7 @@ IoAnd64 (
}
/**
- Reads a 64-bit I/O port, performs a bitwise AND followed by a bitwise
+ Reads a 64-bit I/O port, performs a bitwise AND followed by a bitwise
OR, and writes the result back to the 64-bit I/O port.
Reads the 64-bit I/O port specified by Port, performs a bitwise AND between
@@ -1190,7 +1184,7 @@ IoBitFieldAndThenOr64 (
Reads an 8-bit MMIO register, performs a bitwise OR, and writes the
result back to the 8-bit MMIO register.
- Reads the 8-bit MMIO register specified by Address, performs a bitwise
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise
OR between the read result and the value specified by OrData, and
writes the result to the 8-bit MMIO register specified by Address. The value
written to the MMIO register is returned. This function must guarantee that
@@ -1243,7 +1237,7 @@ MmioAnd8 (
}
/**
- Reads an 8-bit MMIO register, performs a bitwise AND followed by a bitwise
+ Reads an 8-bit MMIO register, performs a bitwise AND followed by a bitwise
OR, and writes the result back to the 8-bit MMIO register.
Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
@@ -1347,7 +1341,7 @@ MmioBitFieldWrite8 (
Reads a bit field in an 8-bit MMIO register, performs a bitwise OR, and
writes the result back to the bit field in the 8-bit MMIO register.
- Reads the 8-bit MMIO register specified by Address, performs a bitwise
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise
OR between the read result and the value specified by OrData, and
writes the result to the 8-bit MMIO register specified by Address. The value
written to the MMIO register is returned. This function must guarantee that
@@ -1477,7 +1471,7 @@ MmioBitFieldAndThenOr8 (
Reads a 16-bit MMIO register, performs a bitwise OR, and writes the
result back to the 16-bit MMIO register.
- Reads the 16-bit MMIO register specified by Address, performs a bitwise
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise
OR between the read result and the value specified by OrData, and
writes the result to the 16-bit MMIO register specified by Address. The value
written to the MMIO register is returned. This function must guarantee that
@@ -1532,7 +1526,7 @@ MmioAnd16 (
}
/**
- Reads a 16-bit MMIO register, performs a bitwise AND followed by a bitwise
+ Reads a 16-bit MMIO register, performs a bitwise AND followed by a bitwise
OR, and writes the result back to the 16-bit MMIO register.
Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
@@ -1638,7 +1632,7 @@ MmioBitFieldWrite16 (
Reads a bit field in a 16-bit MMIO register, performs a bitwise OR, and
writes the result back to the bit field in the 16-bit MMIO register.
- Reads the 16-bit MMIO register specified by Address, performs a bitwise
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise
OR between the read result and the value specified by OrData, and
writes the result to the 16-bit MMIO register specified by Address. The value
written to the MMIO register is returned. This function must guarantee that
@@ -1771,7 +1765,7 @@ MmioBitFieldAndThenOr16 (
Reads a 32-bit MMIO register, performs a bitwise OR, and writes the
result back to the 32-bit MMIO register.
- Reads the 32-bit MMIO register specified by Address, performs a bitwise
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise
OR between the read result and the value specified by OrData, and
writes the result to the 32-bit MMIO register specified by Address. The value
written to the MMIO register is returned. This function must guarantee that
@@ -1826,7 +1820,7 @@ MmioAnd32 (
}
/**
- Reads a 32-bit MMIO register, performs a bitwise AND followed by a bitwise
+ Reads a 32-bit MMIO register, performs a bitwise AND followed by a bitwise
OR, and writes the result back to the 32-bit MMIO register.
Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
@@ -1932,7 +1926,7 @@ MmioBitFieldWrite32 (
Reads a bit field in a 32-bit MMIO register, performs a bitwise OR, and
writes the result back to the bit field in the 32-bit MMIO register.
- Reads the 32-bit MMIO register specified by Address, performs a bitwise
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise
OR between the read result and the value specified by OrData, and
writes the result to the 32-bit MMIO register specified by Address. The value
written to the MMIO register is returned. This function must guarantee that
@@ -2065,7 +2059,7 @@ MmioBitFieldAndThenOr32 (
Reads a 64-bit MMIO register, performs a bitwise OR, and writes the
result back to the 64-bit MMIO register.
- Reads the 64-bit MMIO register specified by Address, performs a bitwise
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise
OR between the read result and the value specified by OrData, and
writes the result to the 64-bit MMIO register specified by Address. The value
written to the MMIO register is returned. This function must guarantee that
@@ -2120,7 +2114,7 @@ MmioAnd64 (
}
/**
- Reads a 64-bit MMIO register, performs a bitwise AND followed by a bitwise
+ Reads a 64-bit MMIO register, performs a bitwise AND followed by a bitwise
OR, and writes the result back to the 64-bit MMIO register.
Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
@@ -2226,7 +2220,7 @@ MmioBitFieldWrite64 (
Reads a bit field in a 64-bit MMIO register, performs a bitwise OR, and
writes the result back to the bit field in the 64-bit MMIO register.
- Reads the 64-bit MMIO register specified by Address, performs a bitwise
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise
OR between the read result and the value specified by OrData, and
writes the result to the 64-bit MMIO register specified by Address. The value
written to the MMIO register is returned. This function must guarantee that
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLib.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLib.c
index 407c66a03ae5..f55b328d5a7f 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/IoLib.c
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLib.c
@@ -1,14 +1,8 @@
/** @file
Common I/O Library routines.
- Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -107,7 +101,7 @@ MmioRead8 (
@param Address The MMIO register to write.
@param Value The value to write to the MMIO register.
-
+
@return Value.
**/
@@ -169,7 +163,7 @@ MmioRead16 (
@param Address The MMIO register to write.
@param Value The value to write to the MMIO register.
-
+
@return Value.
**/
@@ -185,7 +179,7 @@ MmioWrite16 (
MemoryFence ();
*(volatile UINT16*)Address = Value;
MemoryFence ();
-
+
return Value;
}
@@ -213,11 +207,11 @@ MmioRead32 (
UINT32 Value;
ASSERT ((Address & 3) == 0);
-
+
MemoryFence ();
Value = *(volatile UINT32*)Address;
MemoryFence ();
-
+
return Value;
}
@@ -233,7 +227,7 @@ MmioRead32 (
@param Address The MMIO register to write.
@param Value The value to write to the MMIO register.
-
+
@return Value.
**/
@@ -245,11 +239,11 @@ MmioWrite32 (
)
{
ASSERT ((Address & 3) == 0);
-
+
MemoryFence ();
*(volatile UINT32*)Address = Value;
MemoryFence ();
-
+
return Value;
}
@@ -277,7 +271,7 @@ MmioRead64 (
UINT64 Value;
ASSERT ((Address & 7) == 0);
-
+
MemoryFence ();
Value = *(volatile UINT64*)Address;
MemoryFence ();
@@ -307,11 +301,11 @@ MmioWrite64 (
)
{
ASSERT ((Address & 7) == 0);
-
+
MemoryFence ();
*(volatile UINT64*)Address = Value;
MemoryFence ();
-
+
return Value;
}
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibArmVirt.c
index e5fccb76ff7e..763441e0709f 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibArmVirt.c
@@ -1,147 +1,178 @@
/** @file
- Common I/O Library routines.
+ I/O Library for ARM.
- Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+ Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+ Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
-
#include "BaseIoLibIntrinsicInternal.h"
-#include <Library/PcdLib.h>
-
-#define MAP_PORT_BASE_TO_MEM(_Port) \
- ((((_Port) & 0xfffc) << 10) | ((_Port) & 0x0fff))
/**
- Translates I/O port address to memory address.
+ Reads an 8-bit MMIO register.
- This function translates I/O port address to memory address by adding the 64MB
- aligned I/O Port space to the I/O address.
- If I/O Port space base is not 64MB aligned, then ASSERT ().
+ Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
- @param Port The I/O port to read.
+ @param Address The MMIO register to read.
- @return The memory address.
+ @return The value read.
**/
-UINTN
-InternalGetMemoryMapAddress (
- IN UINTN Port
- )
-{
- UINTN Address;
- UINTN IoBlockBaseAddress;
+UINT8
+EFIAPI
+MmioRead8Internal (
+ IN UINTN Address
+ );
- Address = MAP_PORT_BASE_TO_MEM (Port);
- IoBlockBaseAddress = PcdGet64(PcdIoBlockBaseAddressForIpf);
+/**
+ Writes an 8-bit MMIO register.
- //
- // Make sure that the I/O Port space base is 64MB aligned.
- //
- ASSERT ((IoBlockBaseAddress & 0x3ffffff) == 0);
- Address += IoBlockBaseAddress;
+ Writes the 8-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
- return Address;
-}
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
-/**
- Reads an 8-bit I/O port.
+**/
+VOID
+EFIAPI
+MmioWrite8Internal (
+ IN UINTN Address,
+ IN UINT8 Value
+ );
- Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
- This function must guarantee that all I/O read and write operations are
- serialized.
+/**
+ Reads a 16-bit MMIO register.
- If 8-bit I/O port operations are not supported, then ASSERT().
+ Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
- @param Port The I/O port to read.
+ @param Address The MMIO register to read.
@return The value read.
**/
-UINT8
+UINT16
EFIAPI
-IoRead8 (
- IN UINTN Port
- )
-{
- return MmioRead8 (InternalGetMemoryMapAddress (Port));
-}
+MmioRead16Internal (
+ IN UINTN Address
+ );
/**
- Reads a 16-bit I/O port.
+ Writes a 16-bit MMIO register.
- Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
- This function must guarantee that all I/O read and write operations are
- serialized.
+ Writes the 16-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
- If 16-bit I/O port operations are not supported, then ASSERT().
- If Port is not aligned on a 16-bit boundary, then ASSERT().
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
- @param Port The I/O port to read.
+**/
+VOID
+EFIAPI
+MmioWrite16Internal (
+ IN UINTN Address,
+ IN UINT16 Value
+ );
+
+/**
+ Reads a 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ @param Address The MMIO register to read.
@return The value read.
**/
-UINT16
+UINT32
EFIAPI
-IoRead16 (
- IN UINTN Port
- )
-{
- return MmioRead16 (InternalGetMemoryMapAddress (Port));
-}
+MmioRead32Internal (
+ IN UINTN Address
+ );
/**
- Reads a 32-bit I/O port.
+ Writes a 32-bit MMIO register.
- Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
- This function must guarantee that all I/O read and write operations are
- serialized.
+ Writes the 32-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
- If 32-bit I/O port operations are not supported, then ASSERT().
- If Port is not aligned on a 32-bit boundary, then ASSERT().
-
- @param Port The I/O port to read.
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+VOID
+EFIAPI
+MmioWrite32Internal (
+ IN UINTN Address,
+ IN UINT32 Value
+ );
+
+/**
+ Reads a 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ @param Address The MMIO register to read.
@return The value read.
**/
-UINT32
+UINT64
EFIAPI
-IoRead32 (
- IN UINTN Port
- )
-{
- return MmioRead32 (InternalGetMemoryMapAddress (Port));
-}
+MmioRead64Internal (
+ IN UINTN Address
+ );
/**
- Reads a 64-bit I/O port.
+ Writes a 64-bit MMIO register.
- Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.
+ Writes the 64-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+VOID
+EFIAPI
+MmioWrite64Internal (
+ IN UINTN Address,
+ IN UINT64 Value
+ );
+
+/**
+ Reads an 8-bit I/O port.
+
+ Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
This function must guarantee that all I/O read and write operations are
serialized.
- If 64-bit I/O port operations are not supported, then ASSERT().
- If Port is not aligned on a 64-bit boundary, then ASSERT().
+ If 8-bit I/O port operations are not supported, then ASSERT().
@param Port The I/O port to read.
@return The value read.
**/
-UINT64
+UINT8
EFIAPI
-IoRead64 (
+IoRead8 (
IN UINTN Port
)
{
@@ -149,7 +180,6 @@ IoRead64 (
return 0;
}
-
/**
Writes an 8-bit I/O port.
@@ -172,7 +202,32 @@ IoWrite8 (
IN UINT8 Value
)
{
- return MmioWrite8 (InternalGetMemoryMapAddress (Port), Value);
+ ASSERT (FALSE);
+ return Value;
+}
+
+/**
+ Reads a 16-bit I/O port.
+
+ Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+IoRead16 (
+ IN UINTN Port
+ )
+{
+ ASSERT (FALSE);
+ return 0;
}
/**
@@ -183,8 +238,7 @@ IoWrite8 (
operations are serialized.
If 16-bit I/O port operations are not supported, then ASSERT().
- If Port is not aligned on a 16-bit boundary, then ASSERT().
-
+
@param Port The I/O port to write.
@param Value The value to write to the I/O port.
@@ -198,7 +252,32 @@ IoWrite16 (
IN UINT16 Value
)
{
- return MmioWrite16 (InternalGetMemoryMapAddress (Port), Value);
+ ASSERT (FALSE);
+ return Value;
+}
+
+/**
+ Reads a 32-bit I/O port.
+
+ Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+IoRead32 (
+ IN UINTN Port
+ )
+{
+ ASSERT (FALSE);
+ return 0;
}
/**
@@ -209,8 +288,7 @@ IoWrite16 (
operations are serialized.
If 32-bit I/O port operations are not supported, then ASSERT().
- If Port is not aligned on a 32-bit boundary, then ASSERT().
-
+
@param Port The I/O port to write.
@param Value The value to write to the I/O port.
@@ -224,7 +302,33 @@ IoWrite32 (
IN UINT32 Value
)
{
- return MmioWrite32 (InternalGetMemoryMapAddress (Port), Value);
+ ASSERT (FALSE);
+ return Value;
+}
+
+/**
+ Reads a 64-bit I/O port.
+
+ Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If Port is not aligned on a 64-bit boundary, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+IoRead64 (
+ IN UINTN Port
+ )
+{
+ ASSERT (FALSE);
+ return 0;
}
/**
@@ -240,7 +344,7 @@ IoWrite32 (
@param Port The I/O port to write.
@param Value The value to write to the I/O port.
- @return The value written the I/O port.
+ @return The value written to the I/O port.
**/
UINT64
@@ -279,58 +383,48 @@ IoReadFifo8 (
OUT VOID *Buffer
)
{
- UINT8 *Buffer8;
-
- Buffer8 = (UINT8 *)Buffer;
- while (Count-- > 0) {
- *Buffer8++ = IoRead8 (Port);
- }
+ ASSERT (FALSE);
}
/**
- Reads a 16-bit I/O port fifo into a block of memory.
+ Writes a block of memory into an 8-bit I/O port fifo.
- Reads the 16-bit I/O fifo port specified by Port.
- The port is read Count times, and the read data is
- stored in the provided Buffer.
+ Writes the 8-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
- This function must guarantee that all I/O read and write operations are
+ This function must guarantee that all I/O write and write operations are
serialized.
- If 16-bit I/O port operations are not supported, then ASSERT().
+ If 8-bit I/O port operations are not supported, then ASSERT().
- @param Port The I/O port to read.
- @param Count The number of times to read I/O port.
- @param Buffer The buffer to store the read data into.
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
**/
VOID
EFIAPI
-IoReadFifo16 (
+IoWriteFifo8 (
IN UINTN Port,
IN UINTN Count,
- OUT VOID *Buffer
+ IN VOID *Buffer
)
{
- UINT16 *Buffer16;
-
- Buffer16 = (UINT16 *)Buffer;
- while (Count-- > 0) {
- *Buffer16++ = IoRead16 (Port);
- }
+ ASSERT (FALSE);
}
/**
- Reads a 32-bit I/O port fifo into a block of memory.
+ Reads a 16-bit I/O port fifo into a block of memory.
- Reads the 32-bit I/O fifo port specified by Port.
+ Reads the 16-bit I/O fifo port specified by Port.
The port is read Count times, and the read data is
stored in the provided Buffer.
This function must guarantee that all I/O read and write operations are
serialized.
- If 32-bit I/O port operations are not supported, then ASSERT().
+ If 16-bit I/O port operations are not supported, then ASSERT().
@param Port The I/O port to read.
@param Count The number of times to read I/O port.
@@ -339,31 +433,26 @@ IoReadFifo16 (
**/
VOID
EFIAPI
-IoReadFifo32 (
+IoReadFifo16 (
IN UINTN Port,
IN UINTN Count,
OUT VOID *Buffer
)
{
- UINT32 *Buffer32;
-
- Buffer32 = (UINT32 *)Buffer;
- while (Count-- > 0) {
- *Buffer32++ = IoRead32 (Port);
- }
+ ASSERT (FALSE);
}
/**
- Writes a block of memory into an 8-bit I/O port fifo.
+ Writes a block of memory into a 16-bit I/O port fifo.
- Writes the 8-bit I/O fifo port specified by Port.
+ Writes the 16-bit I/O fifo port specified by Port.
The port is written Count times, and the write data is
retrieved from the provided Buffer.
This function must guarantee that all I/O write and write operations are
serialized.
- If 8-bit I/O port operations are not supported, then ASSERT().
+ If 16-bit I/O port operations are not supported, then ASSERT().
@param Port The I/O port to write.
@param Count The number of times to write I/O port.
@@ -372,51 +461,41 @@ IoReadFifo32 (
**/
VOID
EFIAPI
-IoWriteFifo8 (
+IoWriteFifo16 (
IN UINTN Port,
IN UINTN Count,
IN VOID *Buffer
)
{
- UINT8 *Buffer8;
-
- Buffer8 = (UINT8 *)Buffer;
- while (Count-- > 0) {
- IoWrite8 (Port, *Buffer8++);
- }
+ ASSERT (FALSE);
}
/**
- Writes a block of memory into a 16-bit I/O port fifo.
+ Reads a 32-bit I/O port fifo into a block of memory.
- Writes the 16-bit I/O fifo port specified by Port.
- The port is written Count times, and the write data is
- retrieved from the provided Buffer.
+ Reads the 32-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
- This function must guarantee that all I/O write and write operations are
+ This function must guarantee that all I/O read and write operations are
serialized.
- If 16-bit I/O port operations are not supported, then ASSERT().
+ If 32-bit I/O port operations are not supported, then ASSERT().
- @param Port The I/O port to write.
- @param Count The number of times to write I/O port.
- @param Buffer The buffer to retrieve the write data from.
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
**/
VOID
EFIAPI
-IoWriteFifo16 (
+IoReadFifo32 (
IN UINTN Port,
IN UINTN Count,
- IN VOID *Buffer
+ OUT VOID *Buffer
)
{
- UINT16 *Buffer16;
-
- Buffer16 = (UINT16 *)Buffer;
- while (Count-- > 0) {
- IoWrite16 (Port, *Buffer16++);
- }
+ ASSERT (FALSE);
}
/**
@@ -444,12 +523,7 @@ IoWriteFifo32 (
IN VOID *Buffer
)
{
- UINT32 *Buffer32;
-
- Buffer32 = (UINT32 *)Buffer;
- while (Count-- > 0) {
- IoWrite32 (Port, *Buffer32++);
- }
+ ASSERT (FALSE);
}
/**
@@ -472,15 +546,31 @@ MmioRead8 (
IN UINTN Address
)
{
- UINT8 Data;
+ return MmioRead8Internal (Address);
+}
+
+/**
+ Writes an 8-bit MMIO register.
+
+ Writes the 8-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
- Address |= BIT63;
+ If 8-bit MMIO register operations are not supported, then ASSERT().
- MemoryFence ();
- Data = *((volatile UINT8 *) Address);
- MemoryFence ();
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
- return Data;
+**/
+UINT8
+EFIAPI
+MmioWrite8 (
+ IN UINTN Address,
+ IN UINT8 Value
+ )
+{
+ MmioWrite8Internal (Address, Value);
+ return Value;
}
/**
@@ -491,7 +581,6 @@ MmioRead8 (
operations are serialized.
If 16-bit MMIO register operations are not supported, then ASSERT().
- If Address is not aligned on a 16-bit boundary, then ASSERT().
@param Address The MMIO register to read.
@@ -504,200 +593,111 @@ MmioRead16 (
IN UINTN Address
)
{
- UINT16 Data;
-
- //
- // Make sure that Address is 16-bit aligned.
- //
ASSERT ((Address & 1) == 0);
- Address |= BIT63;
-
- MemoryFence ();
- Data = *((volatile UINT16 *) Address);
- MemoryFence ();
-
- return Data;
+ return MmioRead16Internal (Address);
}
/**
- Reads a 32-bit MMIO register.
-
- Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
- returned. This function must guarantee that all MMIO read and write
- operations are serialized.
+ Writes a 16-bit MMIO register.
- If 32-bit MMIO register operations are not supported, then ASSERT().
- If Address is not aligned on a 32-bit boundary, then ASSERT().
+ Writes the 16-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
- @param Address The MMIO register to read.
+ If 16-bit MMIO register operations are not supported, then ASSERT().
- @return The value read.
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
**/
-UINT32
+UINT16
EFIAPI
-MmioRead32 (
- IN UINTN Address
+MmioWrite16 (
+ IN UINTN Address,
+ IN UINT16 Value
)
{
- UINT32 Data;
-
- //
- // Make sure that Address is 32-bit aligned.
- //
- ASSERT ((Address & 3) == 0);
-
- Address |= BIT63;
-
- MemoryFence ();
- Data = *((volatile UINT32 *) Address);
- MemoryFence ();
+ ASSERT ((Address & 1) == 0);
- return Data;
+ MmioWrite16Internal (Address, Value);
+ return Value;
}
/**
- Reads a 64-bit MMIO register.
+ Reads a 32-bit MMIO register.
- Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
+ Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
returned. This function must guarantee that all MMIO read and write
operations are serialized.
- If 64-bit MMIO register operations are not supported, then ASSERT().
- If Address is not aligned on a 64-bit boundary, then ASSERT().
+ If 32-bit MMIO register operations are not supported, then ASSERT().
@param Address The MMIO register to read.
@return The value read.
**/
-UINT64
+UINT32
EFIAPI
-MmioRead64 (
+MmioRead32 (
IN UINTN Address
)
{
- UINT64 Data;
-
- //
- // Make sure that Address is 64-bit aligned.
- //
- ASSERT ((Address & 7) == 0);
-
- Address |= BIT63;
-
- MemoryFence ();
- Data = *((volatile UINT64 *) Address);
- MemoryFence ();
-
- return Data;
+ ASSERT ((Address & 3) == 0);
+ return MmioRead32Internal (Address);
}
/**
- Writes an 8-bit MMIO register.
+ Writes a 32-bit MMIO register.
- Writes the 8-bit MMIO register specified by Address with the value specified
+ Writes the 32-bit MMIO register specified by Address with the value specified
by Value and returns Value. This function must guarantee that all MMIO read
and write operations are serialized.
- If 8-bit MMIO register operations are not supported, then ASSERT().
+ If 32-bit MMIO register operations are not supported, then ASSERT().
@param Address The MMIO register to write.
@param Value The value to write to the MMIO register.
-
- @return Value.
**/
-UINT8
+UINT32
EFIAPI
-MmioWrite8 (
+MmioWrite32 (
IN UINTN Address,
- IN UINT8 Value
+ IN UINT32 Value
)
{
- Address |= BIT63;
-
- MemoryFence ();
- *((volatile UINT8 *) Address) = Value;
- MemoryFence ();
+ ASSERT ((Address & 3) == 0);
+ MmioWrite32Internal (Address, Value);
return Value;
}
/**
- Writes a 16-bit MMIO register.
-
- Writes the 16-bit MMIO register specified by Address with the value specified
- by Value and returns Value. This function must guarantee that all MMIO read
- and write operations are serialized.
-
- If 16-bit MMIO register operations are not supported, then ASSERT().
- If Address is not aligned on a 16-bit boundary, then ASSERT().
-
- @param Address The MMIO register to write.
- @param Value The value to write to the MMIO register.
-
- @return Value.
-
-**/
-UINT16
-EFIAPI
-MmioWrite16 (
- IN UINTN Address,
- IN UINT16 Value
- )
-{
- //
- // Make sure that Address is 16-bit aligned.
- //
- ASSERT ((Address & 1) == 0);
-
- Address |= BIT63;
-
- MemoryFence ();
- *((volatile UINT16 *) Address) = Value;
- MemoryFence ();
-
- return Value;
-}
+ Reads a 64-bit MMIO register.
-/**
- Writes a 32-bit MMIO register.
+ Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
- Writes the 32-bit MMIO register specified by Address with the value specified
- by Value and returns Value. This function must guarantee that all MMIO read
- and write operations are serialized.
+ If 64-bit MMIO register operations are not supported, then ASSERT().
- If 32-bit MMIO register operations are not supported, then ASSERT().
- If Address is not aligned on a 32-bit boundary, then ASSERT().
+ @param Address The MMIO register to read.
- @param Address The MMIO register to write.
- @param Value The value to write to the MMIO register.
-
- @return Value.
+ @return The value read.
**/
-UINT32
+UINT64
EFIAPI
-MmioWrite32 (
- IN UINTN Address,
- IN UINT32 Value
+MmioRead64 (
+ IN UINTN Address
)
{
- //
- // Make sure that Address is 32-bit aligned.
- //
- ASSERT ((Address & 3) == 0);
-
- Address |= BIT63;
-
- MemoryFence ();
- *((volatile UINT32 *) Address) = Value;
- MemoryFence ();
+ ASSERT ((Address & 7) == 0);
- return Value;
+ return MmioRead64Internal (Address);
}
/**
@@ -708,7 +708,6 @@ MmioWrite32 (
and write operations are serialized.
If 64-bit MMIO register operations are not supported, then ASSERT().
- If Address is not aligned on a 64-bit boundary, then ASSERT().
@param Address The MMIO register to write.
@param Value The value to write to the MMIO register.
@@ -721,16 +720,8 @@ MmioWrite64 (
IN UINT64 Value
)
{
- //
- // Make sure that Address is 64-bit aligned.
- //
ASSERT ((Address & 7) == 0);
- Address |= BIT63;
-
- MemoryFence ();
- *((volatile UINT64 *) Address) = Value;
- MemoryFence ();
-
+ MmioWrite64Internal (Address, Value);
return Value;
}
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c
index d000675767c2..10ba764764a7 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c
@@ -6,13 +6,7 @@
Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c
index c57da737ec9d..313a38e3d80b 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c
@@ -10,14 +10,8 @@
We don't advocate putting compiler specifics in libraries or drivers but there
is no other way to make this work.
- Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -38,7 +32,6 @@
@return The value read.
**/
-__inline__
UINT8
EFIAPI
IoRead8 (
@@ -66,7 +59,6 @@ IoRead8 (
@return The value written the I/O port.
**/
-__inline__
UINT8
EFIAPI
IoWrite8 (
@@ -93,7 +85,6 @@ IoWrite8 (
@return The value read.
**/
-__inline__
UINT16
EFIAPI
IoRead16 (
@@ -116,14 +107,13 @@ IoRead16 (
If 16-bit I/O port operations are not supported, then ASSERT().
If Port is not aligned on a 16-bit boundary, then ASSERT().
-
+
@param Port The I/O port to write.
@param Value The value to write to the I/O port.
@return The value written the I/O port.
**/
-__inline__
UINT16
EFIAPI
IoWrite16 (
@@ -145,13 +135,12 @@ IoWrite16 (
If 32-bit I/O port operations are not supported, then ASSERT().
If Port is not aligned on a 32-bit boundary, then ASSERT().
-
+
@param Port The I/O port to read.
@return The value read.
**/
-__inline__
UINT32
EFIAPI
IoRead32 (
@@ -174,14 +163,13 @@ IoRead32 (
If 32-bit I/O port operations are not supported, then ASSERT().
If Port is not aligned on a 32-bit boundary, then ASSERT().
-
+
@param Port The I/O port to write.
@param Value The value to write to the I/O port.
@return The value written the I/O port.
**/
-__inline__
UINT32
EFIAPI
IoWrite32 (
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibIcc.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibIcc.c
deleted file mode 100644
index adb2eff9403c..000000000000
--- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibIcc.c
+++ /dev/null
@@ -1,214 +0,0 @@
-/** @file
- I/O Library. This file has compiler specifics for ICC as there
- is no ANSI C standard for doing IO.
-
- Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials are
- licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "BaseIoLibIntrinsicInternal.h"
-
-/**
- Reads an 8-bit I/O port.
-
- Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
- This function must guarantee that all I/O read and write operations are
- serialized.
-
- If 8-bit I/O port operations are not supported, then ASSERT().
-
- @param Port The I/O port to read.
-
- @return The value read.
-
-**/
-UINT8
-EFIAPI
-IoRead8 (
- IN UINTN Port
- )
-{
- UINT8 Data;
-
- __asm {
- mov dx, word ptr [Port]
- in al, dx
-
- mov Data, al
- }
- return Data;
-}
-
-/**
- Writes an 8-bit I/O port.
-
- Writes the 8-bit I/O port specified by Port with the value specified by Value
- and returns Value. This function must guarantee that all I/O read and write
- operations are serialized.
-
- If 8-bit I/O port operations are not supported, then ASSERT().
-
- @param Port The I/O port to write.
- @param Value The value to write to the I/O port.
-
- @return The value written the I/O port.
-
-**/
-UINT8
-EFIAPI
-IoWrite8 (
- IN UINTN Port,
- IN UINT8 Value
- )
-{
- __asm {
- mov al, byte ptr [Value]
- mov dx, word ptr [Port]
- out dx, al
- }
- return Value;
-}
-
-/**
- Reads a 16-bit I/O port.
-
- Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
- This function must guarantee that all I/O read and write operations are
- serialized.
-
- If 16-bit I/O port operations are not supported, then ASSERT().
- If Port is not aligned on a 16-bit boundary, then ASSERT().
-
- @param Port The I/O port to read.
-
- @return The value read.
-
-**/
-UINT16
-EFIAPI
-IoRead16 (
- IN UINTN Port
- )
-{
- UINT16 Data;
-
- ASSERT ((Port & 1) == 0);
-
- __asm {
- mov dx, word ptr [Port]
- in ax, dx
- mov word ptr [Data], ax
- }
-
- return Data;
-}
-
-/**
- Writes a 16-bit I/O port.
-
- Writes the 16-bit I/O port specified by Port with the value specified by Value
- and returns Value. This function must guarantee that all I/O read and write
- operations are serialized.
-
- If 16-bit I/O port operations are not supported, then ASSERT().
- If Port is not aligned on a 16-bit boundary, then ASSERT().
-
- @param Port The I/O port to write.
- @param Value The value to write to the I/O port.
-
- @return The value written the I/O port.
-
-**/
-UINT16
-EFIAPI
-IoWrite16 (
- IN UINTN Port,
- IN UINT16 Value
- )
-{
- ASSERT ((Port & 1) == 0);
-
- __asm {
- mov ax, word ptr [Value]
- mov dx, word ptr [Port]
- out dx, ax
- }
-
- return Value;
-}
-
-/**
- Reads a 32-bit I/O port.
-
- Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
- This function must guarantee that all I/O read and write operations are
- serialized.
-
- If 32-bit I/O port operations are not supported, then ASSERT().
- If Port is not aligned on a 32-bit boundary, then ASSERT().
-
- @param Port The I/O port to read.
-
- @return The value read.
-
-**/
-UINT32
-EFIAPI
-IoRead32 (
- IN UINTN Port
- )
-{
- UINT32 Data;
-
- ASSERT ((Port & 3) == 0);
-
- __asm {
- mov dx, word ptr [Port]
- in eax, dx
- mov dword ptr [Data], eax
- }
-
- return Data;
-}
-
-/**
- Writes a 32-bit I/O port.
-
- Writes the 32-bit I/O port specified by Port with the value specified by Value
- and returns Value. This function must guarantee that all I/O read and write
- operations are serialized.
-
- If 32-bit I/O port operations are not supported, then ASSERT().
- If Port is not aligned on a 32-bit boundary, then ASSERT().
-
- @param Port The I/O port to write.
- @param Value The value to write to the I/O port.
-
- @return The value written the I/O port.
-
-**/
-UINT32
-EFIAPI
-IoWrite32 (
- IN UINTN Port,
- IN UINT32 Value
- )
-{
- ASSERT ((Port & 3) == 0);
-
- __asm {
- mov eax, dword ptr [Value]
- mov dx, word ptr [Port]
- out dx, eax
- }
-
- return Value;
-}
-
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibMmioBuffer.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibMmioBuffer.c
index 8163f8d7ac6e..a07897338ba2 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibMmioBuffer.c
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibMmioBuffer.c
@@ -1,14 +1,8 @@
/** @file
I/O Library MMIO Buffer Functions.
- Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -17,11 +11,11 @@
/**
Copy data from the MMIO region to system memory by using 8-bit access.
- Copy data from the MMIO region specified by starting address StartAddress
- to system memory specified by Buffer by using 8-bit access. The total
+ Copy data from the MMIO region specified by starting address StartAddress
+ to system memory specified by Buffer by using 8-bit access. The total
number of byte to be copied is specified by Length. Buffer is returned.
-
- If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
@@ -44,9 +38,9 @@ MmioReadBuffer8 (
ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
-
+
ReturnBuffer = Buffer;
-
+
while (Length-- != 0) {
*(Buffer++) = MmioRead8 (StartAddress++);
}
@@ -57,13 +51,13 @@ MmioReadBuffer8 (
/**
Copy data from the MMIO region to system memory by using 16-bit access.
- Copy data from the MMIO region specified by starting address StartAddress
- to system memory specified by Buffer by using 16-bit access. The total
+ Copy data from the MMIO region specified by starting address StartAddress
+ to system memory specified by Buffer by using 16-bit access. The total
number of byte to be copied is specified by Length. Buffer is returned.
-
+
If StartAddress is not aligned on a 16-bit boundary, then ASSERT().
- If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
If Length is not aligned on a 16-bit boundary, then ASSERT().
@@ -87,15 +81,15 @@ MmioReadBuffer16 (
UINT16 *ReturnBuffer;
ASSERT ((StartAddress & (sizeof (UINT16) - 1)) == 0);
-
+
ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
ASSERT ((Length & (sizeof (UINT16) - 1)) == 0);
ASSERT (((UINTN) Buffer & (sizeof (UINT16) - 1)) == 0);
-
+
ReturnBuffer = Buffer;
-
+
while (Length != 0) {
*(Buffer++) = MmioRead16 (StartAddress);
StartAddress += sizeof (UINT16);
@@ -108,13 +102,13 @@ MmioReadBuffer16 (
/**
Copy data from the MMIO region to system memory by using 32-bit access.
- Copy data from the MMIO region specified by starting address StartAddress
- to system memory specified by Buffer by using 32-bit access. The total
+ Copy data from the MMIO region specified by starting address StartAddress
+ to system memory specified by Buffer by using 32-bit access. The total
number of byte to be copied is specified by Length. Buffer is returned.
-
+
If StartAddress is not aligned on a 32-bit boundary, then ASSERT().
- If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
If Length is not aligned on a 32-bit boundary, then ASSERT().
@@ -138,15 +132,15 @@ MmioReadBuffer32 (
UINT32 *ReturnBuffer;
ASSERT ((StartAddress & (sizeof (UINT32) - 1)) == 0);
-
+
ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
ASSERT ((Length & (sizeof (UINT32) - 1)) == 0);
ASSERT (((UINTN) Buffer & (sizeof (UINT32) - 1)) == 0);
-
+
ReturnBuffer = Buffer;
-
+
while (Length != 0) {
*(Buffer++) = MmioRead32 (StartAddress);
StartAddress += sizeof (UINT32);
@@ -159,13 +153,13 @@ MmioReadBuffer32 (
/**
Copy data from the MMIO region to system memory by using 64-bit access.
- Copy data from the MMIO region specified by starting address StartAddress
- to system memory specified by Buffer by using 64-bit access. The total
+ Copy data from the MMIO region specified by starting address StartAddress
+ to system memory specified by Buffer by using 64-bit access. The total
number of byte to be copied is specified by Length. Buffer is returned.
-
+
If StartAddress is not aligned on a 64-bit boundary, then ASSERT().
- If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
If Length is not aligned on a 64-bit boundary, then ASSERT().
@@ -189,15 +183,15 @@ MmioReadBuffer64 (
UINT64 *ReturnBuffer;
ASSERT ((StartAddress & (sizeof (UINT64) - 1)) == 0);
-
+
ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
ASSERT ((Length & (sizeof (UINT64) - 1)) == 0);
ASSERT (((UINTN) Buffer & (sizeof (UINT64) - 1)) == 0);
-
+
ReturnBuffer = Buffer;
-
+
while (Length != 0) {
*(Buffer++) = MmioRead64 (StartAddress);
StartAddress += sizeof (UINT64);
@@ -211,11 +205,11 @@ MmioReadBuffer64 (
/**
Copy data from system memory to the MMIO region by using 8-bit access.
- Copy data from system memory specified by Buffer to the MMIO region specified
- by starting address StartAddress by using 8-bit access. The total number
+ Copy data from system memory specified by Buffer to the MMIO region specified
+ by starting address StartAddress by using 8-bit access. The total number
of byte to be copied is specified by Length. Buffer is returned.
-
- If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().
@@ -238,27 +232,27 @@ MmioWriteBuffer8 (
ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
-
+
ReturnBuffer = (UINT8 *) Buffer;
-
+
while (Length-- != 0) {
MmioWrite8 (StartAddress++, *(Buffer++));
}
return ReturnBuffer;
-
+
}
/**
Copy data from system memory to the MMIO region by using 16-bit access.
- Copy data from system memory specified by Buffer to the MMIO region specified
- by starting address StartAddress by using 16-bit access. The total number
+ Copy data from system memory specified by Buffer to the MMIO region specified
+ by starting address StartAddress by using 16-bit access. The total number
of byte to be copied is specified by Length. Buffer is returned.
-
+
If StartAddress is not aligned on a 16-bit boundary, then ASSERT().
- If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().
If Length is not aligned on a 16-bit boundary, then ASSERT().
@@ -283,7 +277,7 @@ MmioWriteBuffer16 (
UINT16 *ReturnBuffer;
ASSERT ((StartAddress & (sizeof (UINT16) - 1)) == 0);
-
+
ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
@@ -291,10 +285,10 @@ MmioWriteBuffer16 (
ASSERT (((UINTN) Buffer & (sizeof (UINT16) - 1)) == 0);
ReturnBuffer = (UINT16 *) Buffer;
-
+
while (Length != 0) {
MmioWrite16 (StartAddress, *(Buffer++));
-
+
StartAddress += sizeof (UINT16);
Length -= sizeof (UINT16);
}
@@ -306,13 +300,13 @@ MmioWriteBuffer16 (
/**
Copy data from system memory to the MMIO region by using 32-bit access.
- Copy data from system memory specified by Buffer to the MMIO region specified
- by starting address StartAddress by using 32-bit access. The total number
+ Copy data from system memory specified by Buffer to the MMIO region specified
+ by starting address StartAddress by using 32-bit access. The total number
of byte to be copied is specified by Length. Buffer is returned.
-
+
If StartAddress is not aligned on a 32-bit boundary, then ASSERT().
- If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().
If Length is not aligned on a 32-bit boundary, then ASSERT().
@@ -337,7 +331,7 @@ MmioWriteBuffer32 (
UINT32 *ReturnBuffer;
ASSERT ((StartAddress & (sizeof (UINT32) - 1)) == 0);
-
+
ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
@@ -345,10 +339,10 @@ MmioWriteBuffer32 (
ASSERT (((UINTN) Buffer & (sizeof (UINT32) - 1)) == 0);
ReturnBuffer = (UINT32 *) Buffer;
-
+
while (Length != 0) {
MmioWrite32 (StartAddress, *(Buffer++));
-
+
StartAddress += sizeof (UINT32);
Length -= sizeof (UINT32);
}
@@ -359,13 +353,13 @@ MmioWriteBuffer32 (
/**
Copy data from system memory to the MMIO region by using 64-bit access.
- Copy data from system memory specified by Buffer to the MMIO region specified
- by starting address StartAddress by using 64-bit access. The total number
+ Copy data from system memory specified by Buffer to the MMIO region specified
+ by starting address StartAddress by using 64-bit access. The total number
of byte to be copied is specified by Length. Buffer is returned.
-
+
If StartAddress is not aligned on a 64-bit boundary, then ASSERT().
- If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().
If Length is not aligned on a 64-bit boundary, then ASSERT().
@@ -390,7 +384,7 @@ MmioWriteBuffer64 (
UINT64 *ReturnBuffer;
ASSERT ((StartAddress & (sizeof (UINT64) - 1)) == 0);
-
+
ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
@@ -398,10 +392,10 @@ MmioWriteBuffer64 (
ASSERT (((UINTN) Buffer & (sizeof (UINT64) - 1)) == 0);
ReturnBuffer = (UINT64 *) Buffer;
-
+
while (Length != 0) {
MmioWrite64 (StartAddress, *(Buffer++));
-
+
StartAddress += sizeof (UINT64);
Length -= sizeof (UINT64);
}
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibMsc.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibMsc.c
index 3a7608752090..01aa48edc4da 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibMsc.c
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibMsc.c
@@ -8,14 +8,8 @@
We don't advocate putting compiler specifics in libraries or drivers but there
is no other way to make this work.
- Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -146,7 +140,7 @@ IoRead16 (
If 16-bit I/O port operations are not supported, then ASSERT().
If Port is not aligned on a 16-bit boundary, then ASSERT().
-
+
@param Port The I/O port to write.
@param Value The value to write to the I/O port.
@@ -176,7 +170,7 @@ IoWrite16 (
If 32-bit I/O port operations are not supported, then ASSERT().
If Port is not aligned on a 32-bit boundary, then ASSERT().
-
+
@param Port The I/O port to read.
@return The value read.
@@ -206,7 +200,7 @@ IoRead32 (
If 32-bit I/O port operations are not supported, then ASSERT().
If Port is not aligned on a 32-bit boundary, then ASSERT().
-
+
@param Port The I/O port to write.
@param Value The value to write to the I/O port.
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c
index 3192c172a2ab..fd43d809de85 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c
@@ -1,17 +1,13 @@
/** @file
- I/O Library for ARM.
+ I/O library for non I/O read and write access (memory map I/O read and
+ write only) architecture, such as ARM and RISC-V processor.
- Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+ Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.asm b/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.asm
deleted file mode 100644
index 7e294a620201..000000000000
--- a/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.asm
+++ /dev/null
@@ -1,127 +0,0 @@
-;------------------------------------------------------------------------------
-;
-; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
-; Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
-;
-; This program and the accompanying materials are licensed and made available
-; under the terms and conditions of the BSD License which accompanies this
-; distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
- .code
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo8 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; OUT VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-IoReadFifo8 PROC
- cld
- xchg rcx, rdx
- xchg rdi, r8 ; rdi: buffer address; r8: save rdi
-rep insb
- mov rdi, r8 ; restore rdi
- ret
-IoReadFifo8 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo16 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; OUT VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-IoReadFifo16 PROC
- cld
- xchg rcx, rdx
- xchg rdi, r8 ; rdi: buffer address; r8: save rdi
-rep insw
- mov rdi, r8 ; restore rdi
- ret
-IoReadFifo16 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo32 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; OUT VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-IoReadFifo32 PROC
- cld
- xchg rcx, rdx
- xchg rdi, r8 ; rdi: buffer address; r8: save rdi
-rep insd
- mov rdi, r8 ; restore rdi
- ret
-IoReadFifo32 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo8 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-IoWriteFifo8 PROC
- cld
- xchg rcx, rdx
- xchg rsi, r8 ; rsi: buffer address; r8: save rsi
-rep outsb
- mov rsi, r8 ; restore rsi
- ret
-IoWriteFifo8 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo16 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-IoWriteFifo16 PROC
- cld
- xchg rcx, rdx
- xchg rsi, r8 ; rsi: buffer address; r8: save rsi
-rep outsw
- mov rsi, r8 ; restore rsi
- ret
-IoWriteFifo16 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo32 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-IoWriteFifo32 PROC
- cld
- xchg rcx, rdx
- xchg rsi, r8 ; rsi: buffer address; r8: save rsi
-rep outsd
- mov rsi, r8 ; restore rsi
- ret
-IoWriteFifo32 ENDP
-
- END
-
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm b/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm
index 27c97d23c741..4b6f8118aacb 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm
+++ b/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm
@@ -3,13 +3,7 @@
; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
;
-; This program and the accompanying materials are licensed and made available
-; under the terms and conditions of the BSD License which accompanies this
-; distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+; SPDX-License-Identifier: BSD-2-Clause-Patent
;
;------------------------------------------------------------------------------
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifoSev.nasm b/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifoSev.nasm
new file mode 100644
index 000000000000..1ff063a74ce6
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifoSev.nasm
@@ -0,0 +1,282 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+;
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+;------------------------------------------------------------------------------
+
+ DEFAULT REL
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; Check whether we need to unroll the String I/O in SEV guest
+;
+; Return // eax (1 - unroll, 0 - no unroll)
+;------------------------------------------------------------------------------
+global ASM_PFX(SevNoRepIo)
+ASM_PFX(SevNoRepIo):
+
+ ; CPUID clobbers ebx, ecx and edx
+ push rbx
+ push rcx
+ push rdx
+
+ ; Check if we are runing under hypervisor
+ ; CPUID(1).ECX Bit 31
+ mov eax, 1
+ cpuid
+ bt ecx, 31
+ jnc @UseRepIo
+
+ ; Check if we have Memory encryption CPUID leaf
+ mov eax, 0x80000000
+ cpuid
+ cmp eax, 0x8000001f
+ jl @UseRepIo
+
+ ; Check for memory encryption feature:
+ ; CPUID Fn8000_001F[EAX] - Bit 1
+ ;
+ mov eax, 0x8000001f
+ cpuid
+ bt eax, 1
+ jnc @UseRepIo
+
+ ; Check if memory encryption is enabled
+ ; MSR_0xC0010131 - Bit 0 (SEV enabled)
+ ; MSR_0xC0010131 - Bit 1 (SEV-ES enabled)
+ mov ecx, 0xc0010131
+ rdmsr
+
+ ; Check for (SevEsEnabled == 0 && SevEnabled == 1)
+ and eax, 3
+ cmp eax, 1
+ je @SevNoRepIo_Done
+
+@UseRepIo:
+ xor eax, eax
+
+@SevNoRepIo_Done:
+ pop rdx
+ pop rcx
+ pop rbx
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo8 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; OUT VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo8)
+ASM_PFX(IoReadFifo8):
+ xchg rcx, rdx
+ xchg rdi, r8 ; rdi: buffer address; r8: save rdi
+
+ ; Check if we need to unroll String I/O
+ call ASM_PFX(SevNoRepIo)
+ test eax, eax
+ jnz @IoReadFifo8_NoRep
+
+ cld
+ rep insb
+ jmp @IoReadFifo8_Done
+
+@IoReadFifo8_NoRep:
+ jrcxz @IoReadFifo8_Done
+
+@IoReadFifo8_Loop:
+ in al, dx
+ mov byte [rdi], al
+ inc rdi
+ loop @IoReadFifo8_Loop
+
+@IoReadFifo8_Done:
+ mov rdi, r8 ; restore rdi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo16 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; OUT VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo16)
+ASM_PFX(IoReadFifo16):
+ xchg rcx, rdx
+ xchg rdi, r8 ; rdi: buffer address; r8: save rdi
+
+ ; Check if we need to unroll String I/O
+ call ASM_PFX(SevNoRepIo)
+ test eax, eax
+ jnz @IoReadFifo16_NoRep
+
+ cld
+ rep insw
+ jmp @IoReadFifo16_Done
+
+@IoReadFifo16_NoRep:
+ jrcxz @IoReadFifo16_Done
+
+@IoReadFifo16_Loop:
+ in ax, dx
+ mov word [rdi], ax
+ add rdi, 2
+ loop @IoReadFifo16_Loop
+
+@IoReadFifo16_Done:
+ mov rdi, r8 ; restore rdi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo32 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; OUT VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo32)
+ASM_PFX(IoReadFifo32):
+ xchg rcx, rdx
+ xchg rdi, r8 ; rdi: buffer address; r8: save rdi
+
+ ; Check if we need to unroll String I/O
+ call ASM_PFX(SevNoRepIo)
+ test eax, eax
+ jnz @IoReadFifo32_NoRep
+
+ cld
+ rep insd
+ jmp @IoReadFifo32_Done
+
+@IoReadFifo32_NoRep:
+ jrcxz @IoReadFifo32_Done
+
+@IoReadFifo32_Loop:
+ in eax, dx
+ mov dword [rdi], eax
+ add rdi, 4
+ loop @IoReadFifo32_Loop
+
+@IoReadFifo32_Done:
+ mov rdi, r8 ; restore rdi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo8 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo8)
+ASM_PFX(IoWriteFifo8):
+ xchg rcx, rdx
+ xchg rsi, r8 ; rsi: buffer address; r8: save rsi
+
+ ; Check if we need to unroll String I/O
+ call ASM_PFX(SevNoRepIo)
+ test eax, eax
+ jnz @IoWriteFifo8_NoRep
+
+ cld
+ rep outsb
+ jmp @IoWriteFifo8_Done
+
+@IoWriteFifo8_NoRep:
+ jrcxz @IoWriteFifo8_Done
+
+@IoWriteFifo8_Loop:
+ mov al, byte [rsi]
+ out dx, al
+ inc rsi
+ loop @IoWriteFifo8_Loop
+
+@IoWriteFifo8_Done:
+ mov rsi, r8 ; restore rsi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo16 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo16)
+ASM_PFX(IoWriteFifo16):
+ xchg rcx, rdx
+ xchg rsi, r8 ; rsi: buffer address; r8: save rsi
+
+ ; Check if we need to unroll String I/O
+ call ASM_PFX(SevNoRepIo)
+ test eax, eax
+ jnz @IoWriteFifo16_NoRep
+
+ cld
+ rep outsw
+ jmp @IoWriteFifo16_Done
+
+@IoWriteFifo16_NoRep:
+ jrcxz @IoWriteFifo16_Done
+
+@IoWriteFifo16_Loop:
+ mov ax, word [rsi]
+ out dx, ax
+ add rsi, 2
+ loop @IoWriteFifo16_Loop
+
+@IoWriteFifo16_Done:
+ mov rsi, r8 ; restore rsi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo32 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo32)
+ASM_PFX(IoWriteFifo32):
+ xchg rcx, rdx
+ xchg rsi, r8 ; rsi: buffer address; r8: save rsi
+
+ ; Check if we need to unroll String I/O
+ call ASM_PFX(SevNoRepIo)
+ test eax, eax
+ jnz @IoWriteFifo32_NoRep
+
+ cld
+ rep outsd
+ jmp @IoWriteFifo32_Done
+
+@IoWriteFifo32_NoRep:
+ jrcxz @IoWriteFifo32_Done
+
+@IoWriteFifo32_Loop:
+ mov eax, dword [rsi]
+ out dx, eax
+ add rsi, 4
+ loop @IoWriteFifo32_Loop
+
+@IoWriteFifo32_Done:
+ mov rsi, r8 ; restore rsi
+ ret
+
diff --git a/MdePkg/Library/BaseLib/AArch64/CpuBreakpoint.S b/MdePkg/Library/BaseLib/AArch64/CpuBreakpoint.S
index 68bc05549d69..b1354b77fcf7 100644
--- a/MdePkg/Library/BaseLib/AArch64/CpuBreakpoint.S
+++ b/MdePkg/Library/BaseLib/AArch64/CpuBreakpoint.S
@@ -5,13 +5,7 @@
# Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+# SPDX-License-Identifier: BSD-2-Clause-Patent
#
#------------------------------------------------------------------------------
diff --git a/MdePkg/Library/BaseLib/AArch64/CpuBreakpoint.asm b/MdePkg/Library/BaseLib/AArch64/CpuBreakpoint.asm
new file mode 100644
index 000000000000..57129ee343c5
--- /dev/null
+++ b/MdePkg/Library/BaseLib/AArch64/CpuBreakpoint.asm
@@ -0,0 +1,33 @@
+;------------------------------------------------------------------------------
+;
+; CpuBreakpoint() for AArch64
+;
+; Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+; Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+; Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+;------------------------------------------------------------------------------
+
+
+ EXPORT CpuBreakpoint
+ AREA BaseLib_LowLevel, CODE, READONLY
+
+;/**
+; Generates a breakpoint on the CPU.
+;
+; Generates a breakpoint on the CPU. The breakpoint must be implemented such
+; that code can resume normal execution after the breakpoint.
+;
+;**/
+;VOID
+;EFIAPI
+;CpuBreakpoint (
+; VOID
+; );
+;
+CpuBreakpoint
+ svc 0xdbdb // Superviser exception. Takes 16bit arg -> Armv7 had 'swi' here.
+ ret
+
+ END
diff --git a/MdePkg/Library/BaseLib/AArch64/DisableInterrupts.S b/MdePkg/Library/BaseLib/AArch64/DisableInterrupts.S
index 9d67d07a86b5..3b3e8309fa22 100644
--- a/MdePkg/Library/BaseLib/AArch64/DisableInterrupts.S
+++ b/MdePkg/Library/BaseLib/AArch64/DisableInterrupts.S
@@ -5,13 +5,7 @@
# Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+# SPDX-License-Identifier: BSD-2-Clause-Patent
#
#------------------------------------------------------------------------------
diff --git a/MdePkg/Library/BaseLib/AArch64/DisableInterrupts.asm b/MdePkg/Library/BaseLib/AArch64/DisableInterrupts.asm
new file mode 100644
index 000000000000..c299c51e8a1a
--- /dev/null
+++ b/MdePkg/Library/BaseLib/AArch64/DisableInterrupts.asm
@@ -0,0 +1,31 @@
+;------------------------------------------------------------------------------
+;
+; DisableInterrupts() for AArch64
+;
+; Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+; Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+; Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+;------------------------------------------------------------------------------
+
+ EXPORT DisableInterrupts
+ AREA BaseLib_LowLevel, CODE, READONLY
+
+DAIF_WR_IRQ_BIT EQU (1 << 1)
+
+;/**
+; Disables CPU interrupts.
+;
+;**/
+;VOID
+;EFIAPI
+;DisableInterrupts (
+; VOID
+; );
+;
+DisableInterrupts
+ msr daifset, #DAIF_WR_IRQ_BIT
+ ret
+
+ END
diff --git a/MdePkg/Library/BaseLib/AArch64/EnableInterrupts.S b/MdePkg/Library/BaseLib/AArch64/EnableInterrupts.S
index 14915ed24b29..42918a16018a 100644
--- a/MdePkg/Library/BaseLib/AArch64/EnableInterrupts.S
+++ b/MdePkg/Library/BaseLib/AArch64/EnableInterrupts.S
@@ -5,13 +5,7 @@
# Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+# SPDX-License-Identifier: BSD-2-Clause-Patent
#
#------------------------------------------------------------------------------
diff --git a/MdePkg/Library/BaseLib/AArch64/EnableInterrupts.asm b/MdePkg/Library/BaseLib/AArch64/EnableInterrupts.asm
new file mode 100644
index 000000000000..fd1c21a59a91
--- /dev/null
+++ b/MdePkg/Library/BaseLib/AArch64/EnableInterrupts.asm
@@ -0,0 +1,31 @@
+;------------------------------------------------------------------------------
+;
+; EnableInterrupts() for AArch64
+;
+; Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+; Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+; Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+;------------------------------------------------------------------------------
+
+ EXPORT EnableInterrupts
+ AREA BaseLib_LowLevel, CODE, READONLY
+
+DAIF_WR_IRQ_BIT EQU (1 << 1)
+
+;/**
+; Enables CPU interrupts.
+;
+;**/
+;VOID
+;EFIAPI
+;EnableInterrupts (
+; VOID
+; );
+;
+EnableInterrupts
+ msr daifclr, #DAIF_WR_IRQ_BIT
+ ret
+
+ END
diff --git a/MdePkg/Library/BaseLib/AArch64/GetInterruptsState.S b/MdePkg/Library/BaseLib/AArch64/GetInterruptsState.S
index 1818c62560fe..feedc4dc9218 100644
--- a/MdePkg/Library/BaseLib/AArch64/GetInterruptsState.S
+++ b/MdePkg/Library/BaseLib/AArch64/GetInterruptsState.S
@@ -5,13 +5,7 @@