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authorDimitry Andric <dim@FreeBSD.org>2020-12-12 23:59:05 +0000
committerDimitry Andric <dim@FreeBSD.org>2020-12-12 23:59:05 +0000
commitfb2fb79e10b22f542d8709cc1c1f15579a3fcbf9 (patch)
tree4a706606aec1e4002ebcf3a5b341fff0b3c90c4f
parent12df7266d9b07aab25c28cf27883f34b44309d0f (diff)
downloadsrc-fb2fb79e10b22f542d8709cc1c1f15579a3fcbf9.tar.gz
src-fb2fb79e10b22f542d8709cc1c1f15579a3fcbf9.zip
MFC r368489:
Merge commit 28de0fb48 from llvm git (by Luís Marques): [RISCV] Set __GCC_HAVE_SYNC_COMPARE_AND_SWAP_x defines The RISCV target did not set the GCC atomic compare and swap defines, unlike other targets. This broke builds for things like glib on RISCV. Patch by Kristof Provost (kprovost) Differential Revision: https://reviews.llvm.org/D91784 This should fix building glib20 on RISC-V and unblock a number of dependent ports. Requested by: kp
Notes
Notes: svn path=/stable/11/; revision=368599
-rw-r--r--contrib/llvm-project/clang/lib/Basic/Targets/RISCV.cpp8
1 files changed, 7 insertions, 1 deletions
diff --git a/contrib/llvm-project/clang/lib/Basic/Targets/RISCV.cpp b/contrib/llvm-project/clang/lib/Basic/Targets/RISCV.cpp
index ab8272c034fd..d9a0466666b5 100644
--- a/contrib/llvm-project/clang/lib/Basic/Targets/RISCV.cpp
+++ b/contrib/llvm-project/clang/lib/Basic/Targets/RISCV.cpp
@@ -114,8 +114,14 @@ void RISCVTargetInfo::getTargetDefines(const LangOptions &Opts,
Builder.defineMacro("__riscv_muldiv");
}
- if (HasA)
+ if (HasA) {
Builder.defineMacro("__riscv_atomic");
+ Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
+ Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
+ Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");
+ if (Is64Bit)
+ Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");
+ }
if (HasF || HasD) {
Builder.defineMacro("__riscv_flen", HasD ? "64" : "32");