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authorJohn Baldwin <jhb@FreeBSD.org>2003-10-22 14:43:52 +0000
committerJohn Baldwin <jhb@FreeBSD.org>2003-10-22 14:43:52 +0000
commit76b353e5eb4e21a53d6bf8521dd4fd28a36dec52 (patch)
treef9c0248145248da232da91df26597246731c53a7
parent5dcb3762e044be0675993baab8f177018b9678d4 (diff)
downloadsrc-76b353e5eb4e21a53d6bf8521dd4fd28a36dec52.tar.gz
src-76b353e5eb4e21a53d6bf8521dd4fd28a36dec52.zip
MFC: Add support for the Intel ICH5 SATA controller in both legacy and
enhanced mode. Submitted by: Dan Strick <strick@covad.net> Approved by: re (murray)
Notes
Notes: svn path=/stable/4/; revision=121339
-rw-r--r--sys/dev/ata/ata-dma.c1
-rw-r--r--sys/dev/ata/ata-pci.c13
2 files changed, 14 insertions, 0 deletions
diff --git a/sys/dev/ata/ata-dma.c b/sys/dev/ata/ata-dma.c
index cae80345033c..60cb0f5dd2db 100644
--- a/sys/dev/ata/ata-dma.c
+++ b/sys/dev/ata/ata-dma.c
@@ -217,6 +217,7 @@ ata_dmainit(struct ata_device *atadev, int apiomode, int wdmamode, int udmamode)
switch (chiptype) {
case 0x24db8086: /* Intel ICH5 */
+ case 0x24d18086: /* Intel ICH5 SATA */
case 0x24cb8086: /* Intel ICH4 */
case 0x248a8086: /* Intel ICH3 mobile */
case 0x248b8086: /* Intel ICH3 */
diff --git a/sys/dev/ata/ata-pci.c b/sys/dev/ata/ata-pci.c
index 4d744b639aab..8094e933f933 100644
--- a/sys/dev/ata/ata-pci.c
+++ b/sys/dev/ata/ata-pci.c
@@ -149,6 +149,9 @@ ata_pci_match(device_t dev)
case 0x24cb8086:
return "Intel ICH4 ATA100 controller";
+ case 0x24d18086:
+ return "Intel ICH5 SATA150 controller";
+
case 0x24db8086:
return "Intel ICH5 ATA100 controller";
@@ -605,6 +608,16 @@ ata_pci_intr(struct ata_channel *ch)
if (!(ATA_INB(ch->r_bmio, ATA_BMDEVSPEC_1) & 0x20))
return 1;
break;
+
+ case 0x24d18086: /* Intel ICH5 SATA150 */
+ dmastat = ATA_INB(ch->r_bmio, ATA_BMSTAT_PORT);
+ if ((dmastat & (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) !=
+ ATA_BMSTAT_INTERRUPT)
+ return 1;
+ ATA_OUTB(ch->r_bmio, ATA_BMSTAT_PORT, dmastat &
+ ~(ATA_BMSTAT_DMA_SIMPLEX | ATA_BMSTAT_ERROR));
+ DELAY(1);
+ return 0;
}
if (ch->flags & ATA_DMA_ACTIVE) {